diff options
Diffstat (limited to 'include/drm')
-rw-r--r-- | include/drm/drm.h | 21 | ||||
-rw-r--r-- | include/drm/drm_mode.h | 153 | ||||
-rw-r--r-- | include/drm/i915_drm.h | 140 | ||||
-rw-r--r-- | include/drm/mga_drm.h | 18 | ||||
-rw-r--r-- | include/drm/radeon_drm.h | 4 | ||||
-rw-r--r-- | include/drm/via_drm.h | 42 |
6 files changed, 190 insertions, 188 deletions
diff --git a/include/drm/drm.h b/include/drm/drm.h index 8e77357334ad..7cb50bdde46d 100644 --- a/include/drm/drm.h +++ b/include/drm/drm.h | |||
@@ -36,8 +36,7 @@ | |||
36 | #ifndef _DRM_H_ | 36 | #ifndef _DRM_H_ |
37 | #define _DRM_H_ | 37 | #define _DRM_H_ |
38 | 38 | ||
39 | #if defined(__KERNEL__) | 39 | #include <linux/types.h> |
40 | #endif | ||
41 | #include <asm/ioctl.h> /* For _IO* macros */ | 40 | #include <asm/ioctl.h> /* For _IO* macros */ |
42 | #define DRM_IOCTL_NR(n) _IOC_NR(n) | 41 | #define DRM_IOCTL_NR(n) _IOC_NR(n) |
43 | #define DRM_IOC_VOID _IOC_NONE | 42 | #define DRM_IOC_VOID _IOC_NONE |
@@ -497,8 +496,8 @@ union drm_wait_vblank { | |||
497 | * \sa drmModesetCtl(). | 496 | * \sa drmModesetCtl(). |
498 | */ | 497 | */ |
499 | struct drm_modeset_ctl { | 498 | struct drm_modeset_ctl { |
500 | uint32_t crtc; | 499 | __u32 crtc; |
501 | uint32_t cmd; | 500 | __u32 cmd; |
502 | }; | 501 | }; |
503 | 502 | ||
504 | /** | 503 | /** |
@@ -574,29 +573,29 @@ struct drm_set_version { | |||
574 | /** DRM_IOCTL_GEM_CLOSE ioctl argument type */ | 573 | /** DRM_IOCTL_GEM_CLOSE ioctl argument type */ |
575 | struct drm_gem_close { | 574 | struct drm_gem_close { |
576 | /** Handle of the object to be closed. */ | 575 | /** Handle of the object to be closed. */ |
577 | uint32_t handle; | 576 | __u32 handle; |
578 | uint32_t pad; | 577 | __u32 pad; |
579 | }; | 578 | }; |
580 | 579 | ||
581 | /** DRM_IOCTL_GEM_FLINK ioctl argument type */ | 580 | /** DRM_IOCTL_GEM_FLINK ioctl argument type */ |
582 | struct drm_gem_flink { | 581 | struct drm_gem_flink { |
583 | /** Handle for the object being named */ | 582 | /** Handle for the object being named */ |
584 | uint32_t handle; | 583 | __u32 handle; |
585 | 584 | ||
586 | /** Returned global name */ | 585 | /** Returned global name */ |
587 | uint32_t name; | 586 | __u32 name; |
588 | }; | 587 | }; |
589 | 588 | ||
590 | /** DRM_IOCTL_GEM_OPEN ioctl argument type */ | 589 | /** DRM_IOCTL_GEM_OPEN ioctl argument type */ |
591 | struct drm_gem_open { | 590 | struct drm_gem_open { |
592 | /** Name of object being opened */ | 591 | /** Name of object being opened */ |
593 | uint32_t name; | 592 | __u32 name; |
594 | 593 | ||
595 | /** Returned handle for the object */ | 594 | /** Returned handle for the object */ |
596 | uint32_t handle; | 595 | __u32 handle; |
597 | 596 | ||
598 | /** Returned size of the object */ | 597 | /** Returned size of the object */ |
599 | uint64_t size; | 598 | __u64 size; |
600 | }; | 599 | }; |
601 | 600 | ||
602 | #include "drm_mode.h" | 601 | #include "drm_mode.h" |
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h index 601d2bd839f6..ae304cc73c90 100644 --- a/include/drm/drm_mode.h +++ b/include/drm/drm_mode.h | |||
@@ -27,11 +27,8 @@ | |||
27 | #ifndef _DRM_MODE_H | 27 | #ifndef _DRM_MODE_H |
28 | #define _DRM_MODE_H | 28 | #define _DRM_MODE_H |
29 | 29 | ||
30 | #if !defined(__KERNEL__) && !defined(_KERNEL) | ||
31 | #include <stdint.h> | ||
32 | #else | ||
33 | #include <linux/kernel.h> | 30 | #include <linux/kernel.h> |
34 | #endif | 31 | #include <linux/types.h> |
35 | 32 | ||
36 | #define DRM_DISPLAY_INFO_LEN 32 | 33 | #define DRM_DISPLAY_INFO_LEN 32 |
37 | #define DRM_CONNECTOR_NAME_LEN 32 | 34 | #define DRM_CONNECTOR_NAME_LEN 32 |
@@ -81,41 +78,41 @@ | |||
81 | #define DRM_MODE_DITHERING_ON 1 | 78 | #define DRM_MODE_DITHERING_ON 1 |
82 | 79 | ||
83 | struct drm_mode_modeinfo { | 80 | struct drm_mode_modeinfo { |
84 | uint32_t clock; | 81 | __u32 clock; |
85 | uint16_t hdisplay, hsync_start, hsync_end, htotal, hskew; | 82 | __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; |
86 | uint16_t vdisplay, vsync_start, vsync_end, vtotal, vscan; | 83 | __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; |
87 | 84 | ||
88 | uint32_t vrefresh; /* vertical refresh * 1000 */ | 85 | __u32 vrefresh; /* vertical refresh * 1000 */ |
89 | 86 | ||
90 | uint32_t flags; | 87 | __u32 flags; |
91 | uint32_t type; | 88 | __u32 type; |
92 | char name[DRM_DISPLAY_MODE_LEN]; | 89 | char name[DRM_DISPLAY_MODE_LEN]; |
93 | }; | 90 | }; |
94 | 91 | ||
95 | struct drm_mode_card_res { | 92 | struct drm_mode_card_res { |
96 | uint64_t fb_id_ptr; | 93 | __u64 fb_id_ptr; |
97 | uint64_t crtc_id_ptr; | 94 | __u64 crtc_id_ptr; |
98 | uint64_t connector_id_ptr; | 95 | __u64 connector_id_ptr; |
99 | uint64_t encoder_id_ptr; | 96 | __u64 encoder_id_ptr; |
100 | uint32_t count_fbs; | 97 | __u32 count_fbs; |
101 | uint32_t count_crtcs; | 98 | __u32 count_crtcs; |
102 | uint32_t count_connectors; | 99 | __u32 count_connectors; |
103 | uint32_t count_encoders; | 100 | __u32 count_encoders; |
104 | uint32_t min_width, max_width; | 101 | __u32 min_width, max_width; |
105 | uint32_t min_height, max_height; | 102 | __u32 min_height, max_height; |
106 | }; | 103 | }; |
107 | 104 | ||
108 | struct drm_mode_crtc { | 105 | struct drm_mode_crtc { |
109 | uint64_t set_connectors_ptr; | 106 | __u64 set_connectors_ptr; |
110 | uint32_t count_connectors; | 107 | __u32 count_connectors; |
111 | 108 | ||
112 | uint32_t crtc_id; /**< Id */ | 109 | __u32 crtc_id; /**< Id */ |
113 | uint32_t fb_id; /**< Id of framebuffer */ | 110 | __u32 fb_id; /**< Id of framebuffer */ |
114 | 111 | ||
115 | uint32_t x, y; /**< Position on the frameuffer */ | 112 | __u32 x, y; /**< Position on the frameuffer */ |
116 | 113 | ||
117 | uint32_t gamma_size; | 114 | __u32 gamma_size; |
118 | uint32_t mode_valid; | 115 | __u32 mode_valid; |
119 | struct drm_mode_modeinfo mode; | 116 | struct drm_mode_modeinfo mode; |
120 | }; | 117 | }; |
121 | 118 | ||
@@ -126,13 +123,13 @@ struct drm_mode_crtc { | |||
126 | #define DRM_MODE_ENCODER_TVDAC 4 | 123 | #define DRM_MODE_ENCODER_TVDAC 4 |
127 | 124 | ||
128 | struct drm_mode_get_encoder { | 125 | struct drm_mode_get_encoder { |
129 | uint32_t encoder_id; | 126 | __u32 encoder_id; |
130 | uint32_t encoder_type; | 127 | __u32 encoder_type; |
131 | 128 | ||
132 | uint32_t crtc_id; /**< Id of crtc */ | 129 | __u32 crtc_id; /**< Id of crtc */ |
133 | 130 | ||
134 | uint32_t possible_crtcs; | 131 | __u32 possible_crtcs; |
135 | uint32_t possible_clones; | 132 | __u32 possible_clones; |
136 | }; | 133 | }; |
137 | 134 | ||
138 | /* This is for connectors with multiple signal types. */ | 135 | /* This is for connectors with multiple signal types. */ |
@@ -161,23 +158,23 @@ struct drm_mode_get_encoder { | |||
161 | 158 | ||
162 | struct drm_mode_get_connector { | 159 | struct drm_mode_get_connector { |
163 | 160 | ||
164 | uint64_t encoders_ptr; | 161 | __u64 encoders_ptr; |
165 | uint64_t modes_ptr; | 162 | __u64 modes_ptr; |
166 | uint64_t props_ptr; | 163 | __u64 props_ptr; |
167 | uint64_t prop_values_ptr; | 164 | __u64 prop_values_ptr; |
168 | 165 | ||
169 | uint32_t count_modes; | 166 | __u32 count_modes; |
170 | uint32_t count_props; | 167 | __u32 count_props; |
171 | uint32_t count_encoders; | 168 | __u32 count_encoders; |
172 | 169 | ||
173 | uint32_t encoder_id; /**< Current Encoder */ | 170 | __u32 encoder_id; /**< Current Encoder */ |
174 | uint32_t connector_id; /**< Id */ | 171 | __u32 connector_id; /**< Id */ |
175 | uint32_t connector_type; | 172 | __u32 connector_type; |
176 | uint32_t connector_type_id; | 173 | __u32 connector_type_id; |
177 | 174 | ||
178 | uint32_t connection; | 175 | __u32 connection; |
179 | uint32_t mm_width, mm_height; /**< HxW in millimeters */ | 176 | __u32 mm_width, mm_height; /**< HxW in millimeters */ |
180 | uint32_t subpixel; | 177 | __u32 subpixel; |
181 | }; | 178 | }; |
182 | 179 | ||
183 | #define DRM_MODE_PROP_PENDING (1<<0) | 180 | #define DRM_MODE_PROP_PENDING (1<<0) |
@@ -187,46 +184,46 @@ struct drm_mode_get_connector { | |||
187 | #define DRM_MODE_PROP_BLOB (1<<4) | 184 | #define DRM_MODE_PROP_BLOB (1<<4) |
188 | 185 | ||
189 | struct drm_mode_property_enum { | 186 | struct drm_mode_property_enum { |
190 | uint64_t value; | 187 | __u64 value; |
191 | char name[DRM_PROP_NAME_LEN]; | 188 | char name[DRM_PROP_NAME_LEN]; |
192 | }; | 189 | }; |
193 | 190 | ||
194 | struct drm_mode_get_property { | 191 | struct drm_mode_get_property { |
195 | uint64_t values_ptr; /* values and blob lengths */ | 192 | __u64 values_ptr; /* values and blob lengths */ |
196 | uint64_t enum_blob_ptr; /* enum and blob id ptrs */ | 193 | __u64 enum_blob_ptr; /* enum and blob id ptrs */ |
197 | 194 | ||
198 | uint32_t prop_id; | 195 | __u32 prop_id; |
199 | uint32_t flags; | 196 | __u32 flags; |
200 | char name[DRM_PROP_NAME_LEN]; | 197 | char name[DRM_PROP_NAME_LEN]; |
201 | 198 | ||
202 | uint32_t count_values; | 199 | __u32 count_values; |
203 | uint32_t count_enum_blobs; | 200 | __u32 count_enum_blobs; |
204 | }; | 201 | }; |
205 | 202 | ||
206 | struct drm_mode_connector_set_property { | 203 | struct drm_mode_connector_set_property { |
207 | uint64_t value; | 204 | __u64 value; |
208 | uint32_t prop_id; | 205 | __u32 prop_id; |
209 | uint32_t connector_id; | 206 | __u32 connector_id; |
210 | }; | 207 | }; |
211 | 208 | ||
212 | struct drm_mode_get_blob { | 209 | struct drm_mode_get_blob { |
213 | uint32_t blob_id; | 210 | __u32 blob_id; |
214 | uint32_t length; | 211 | __u32 length; |
215 | uint64_t data; | 212 | __u64 data; |
216 | }; | 213 | }; |
217 | 214 | ||
218 | struct drm_mode_fb_cmd { | 215 | struct drm_mode_fb_cmd { |
219 | uint32_t fb_id; | 216 | __u32 fb_id; |
220 | uint32_t width, height; | 217 | __u32 width, height; |
221 | uint32_t pitch; | 218 | __u32 pitch; |
222 | uint32_t bpp; | 219 | __u32 bpp; |
223 | uint32_t depth; | 220 | __u32 depth; |
224 | /* driver specific handle */ | 221 | /* driver specific handle */ |
225 | uint32_t handle; | 222 | __u32 handle; |
226 | }; | 223 | }; |
227 | 224 | ||
228 | struct drm_mode_mode_cmd { | 225 | struct drm_mode_mode_cmd { |
229 | uint32_t connector_id; | 226 | __u32 connector_id; |
230 | struct drm_mode_modeinfo mode; | 227 | struct drm_mode_modeinfo mode; |
231 | }; | 228 | }; |
232 | 229 | ||
@@ -248,24 +245,24 @@ struct drm_mode_mode_cmd { | |||
248 | * y | 245 | * y |
249 | */ | 246 | */ |
250 | struct drm_mode_cursor { | 247 | struct drm_mode_cursor { |
251 | uint32_t flags; | 248 | __u32 flags; |
252 | uint32_t crtc_id; | 249 | __u32 crtc_id; |
253 | int32_t x; | 250 | __s32 x; |
254 | int32_t y; | 251 | __s32 y; |
255 | uint32_t width; | 252 | __u32 width; |
256 | uint32_t height; | 253 | __u32 height; |
257 | /* driver specific handle */ | 254 | /* driver specific handle */ |
258 | uint32_t handle; | 255 | __u32 handle; |
259 | }; | 256 | }; |
260 | 257 | ||
261 | struct drm_mode_crtc_lut { | 258 | struct drm_mode_crtc_lut { |
262 | uint32_t crtc_id; | 259 | __u32 crtc_id; |
263 | uint32_t gamma_size; | 260 | __u32 gamma_size; |
264 | 261 | ||
265 | /* pointers to arrays */ | 262 | /* pointers to arrays */ |
266 | uint64_t red; | 263 | __u64 red; |
267 | uint64_t green; | 264 | __u64 green; |
268 | uint64_t blue; | 265 | __u64 blue; |
269 | }; | 266 | }; |
270 | 267 | ||
271 | #endif | 268 | #endif |
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index b3bcf72dc656..641b9b210d3c 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h | |||
@@ -30,7 +30,7 @@ | |||
30 | /* Please note that modifications to all structs defined here are | 30 | /* Please note that modifications to all structs defined here are |
31 | * subject to backwards-compatibility constraints. | 31 | * subject to backwards-compatibility constraints. |
32 | */ | 32 | */ |
33 | 33 | #include <linux/types.h> | |
34 | #include "drm.h" | 34 | #include "drm.h" |
35 | 35 | ||
36 | /* Each region is a minimum of 16k, and there are at most 255 of them. | 36 | /* Each region is a minimum of 16k, and there are at most 255 of them. |
@@ -116,15 +116,15 @@ typedef struct _drm_i915_sarea { | |||
116 | 116 | ||
117 | /* fill out some space for old userspace triple buffer */ | 117 | /* fill out some space for old userspace triple buffer */ |
118 | drm_handle_t unused_handle; | 118 | drm_handle_t unused_handle; |
119 | uint32_t unused1, unused2, unused3; | 119 | __u32 unused1, unused2, unused3; |
120 | 120 | ||
121 | /* buffer object handles for static buffers. May change | 121 | /* buffer object handles for static buffers. May change |
122 | * over the lifetime of the client. | 122 | * over the lifetime of the client. |
123 | */ | 123 | */ |
124 | uint32_t front_bo_handle; | 124 | __u32 front_bo_handle; |
125 | uint32_t back_bo_handle; | 125 | __u32 back_bo_handle; |
126 | uint32_t unused_bo_handle; | 126 | __u32 unused_bo_handle; |
127 | uint32_t depth_bo_handle; | 127 | __u32 depth_bo_handle; |
128 | 128 | ||
129 | } drm_i915_sarea_t; | 129 | } drm_i915_sarea_t; |
130 | 130 | ||
@@ -325,7 +325,7 @@ typedef struct drm_i915_vblank_swap { | |||
325 | } drm_i915_vblank_swap_t; | 325 | } drm_i915_vblank_swap_t; |
326 | 326 | ||
327 | typedef struct drm_i915_hws_addr { | 327 | typedef struct drm_i915_hws_addr { |
328 | uint64_t addr; | 328 | __u64 addr; |
329 | } drm_i915_hws_addr_t; | 329 | } drm_i915_hws_addr_t; |
330 | 330 | ||
331 | struct drm_i915_gem_init { | 331 | struct drm_i915_gem_init { |
@@ -333,12 +333,12 @@ struct drm_i915_gem_init { | |||
333 | * Beginning offset in the GTT to be managed by the DRM memory | 333 | * Beginning offset in the GTT to be managed by the DRM memory |
334 | * manager. | 334 | * manager. |
335 | */ | 335 | */ |
336 | uint64_t gtt_start; | 336 | __u64 gtt_start; |
337 | /** | 337 | /** |
338 | * Ending offset in the GTT to be managed by the DRM memory | 338 | * Ending offset in the GTT to be managed by the DRM memory |
339 | * manager. | 339 | * manager. |
340 | */ | 340 | */ |
341 | uint64_t gtt_end; | 341 | __u64 gtt_end; |
342 | }; | 342 | }; |
343 | 343 | ||
344 | struct drm_i915_gem_create { | 344 | struct drm_i915_gem_create { |
@@ -347,94 +347,94 @@ struct drm_i915_gem_create { | |||
347 | * | 347 | * |
348 | * The (page-aligned) allocated size for the object will be returned. | 348 | * The (page-aligned) allocated size for the object will be returned. |
349 | */ | 349 | */ |
350 | uint64_t size; | 350 | __u64 size; |
351 | /** | 351 | /** |
352 | * Returned handle for the object. | 352 | * Returned handle for the object. |
353 | * | 353 | * |
354 | * Object handles are nonzero. | 354 | * Object handles are nonzero. |
355 | */ | 355 | */ |
356 | uint32_t handle; | 356 | __u32 handle; |
357 | uint32_t pad; | 357 | __u32 pad; |
358 | }; | 358 | }; |
359 | 359 | ||
360 | struct drm_i915_gem_pread { | 360 | struct drm_i915_gem_pread { |
361 | /** Handle for the object being read. */ | 361 | /** Handle for the object being read. */ |
362 | uint32_t handle; | 362 | __u32 handle; |
363 | uint32_t pad; | 363 | __u32 pad; |
364 | /** Offset into the object to read from */ | 364 | /** Offset into the object to read from */ |
365 | uint64_t offset; | 365 | __u64 offset; |
366 | /** Length of data to read */ | 366 | /** Length of data to read */ |
367 | uint64_t size; | 367 | __u64 size; |
368 | /** | 368 | /** |
369 | * Pointer to write the data into. | 369 | * Pointer to write the data into. |
370 | * | 370 | * |
371 | * This is a fixed-size type for 32/64 compatibility. | 371 | * This is a fixed-size type for 32/64 compatibility. |
372 | */ | 372 | */ |
373 | uint64_t data_ptr; | 373 | __u64 data_ptr; |
374 | }; | 374 | }; |
375 | 375 | ||
376 | struct drm_i915_gem_pwrite { | 376 | struct drm_i915_gem_pwrite { |
377 | /** Handle for the object being written to. */ | 377 | /** Handle for the object being written to. */ |
378 | uint32_t handle; | 378 | __u32 handle; |
379 | uint32_t pad; | 379 | __u32 pad; |
380 | /** Offset into the object to write to */ | 380 | /** Offset into the object to write to */ |
381 | uint64_t offset; | 381 | __u64 offset; |
382 | /** Length of data to write */ | 382 | /** Length of data to write */ |
383 | uint64_t size; | 383 | __u64 size; |
384 | /** | 384 | /** |
385 | * Pointer to read the data from. | 385 | * Pointer to read the data from. |
386 | * | 386 | * |
387 | * This is a fixed-size type for 32/64 compatibility. | 387 | * This is a fixed-size type for 32/64 compatibility. |
388 | */ | 388 | */ |
389 | uint64_t data_ptr; | 389 | __u64 data_ptr; |
390 | }; | 390 | }; |
391 | 391 | ||
392 | struct drm_i915_gem_mmap { | 392 | struct drm_i915_gem_mmap { |
393 | /** Handle for the object being mapped. */ | 393 | /** Handle for the object being mapped. */ |
394 | uint32_t handle; | 394 | __u32 handle; |
395 | uint32_t pad; | 395 | __u32 pad; |
396 | /** Offset in the object to map. */ | 396 | /** Offset in the object to map. */ |
397 | uint64_t offset; | 397 | __u64 offset; |
398 | /** | 398 | /** |
399 | * Length of data to map. | 399 | * Length of data to map. |
400 | * | 400 | * |
401 | * The value will be page-aligned. | 401 | * The value will be page-aligned. |
402 | */ | 402 | */ |
403 | uint64_t size; | 403 | __u64 size; |
404 | /** | 404 | /** |
405 | * Returned pointer the data was mapped at. | 405 | * Returned pointer the data was mapped at. |
406 | * | 406 | * |
407 | * This is a fixed-size type for 32/64 compatibility. | 407 | * This is a fixed-size type for 32/64 compatibility. |
408 | */ | 408 | */ |
409 | uint64_t addr_ptr; | 409 | __u64 addr_ptr; |
410 | }; | 410 | }; |
411 | 411 | ||
412 | struct drm_i915_gem_mmap_gtt { | 412 | struct drm_i915_gem_mmap_gtt { |
413 | /** Handle for the object being mapped. */ | 413 | /** Handle for the object being mapped. */ |
414 | uint32_t handle; | 414 | __u32 handle; |
415 | uint32_t pad; | 415 | __u32 pad; |
416 | /** | 416 | /** |
417 | * Fake offset to use for subsequent mmap call | 417 | * Fake offset to use for subsequent mmap call |
418 | * | 418 | * |
419 | * This is a fixed-size type for 32/64 compatibility. | 419 | * This is a fixed-size type for 32/64 compatibility. |
420 | */ | 420 | */ |
421 | uint64_t offset; | 421 | __u64 offset; |
422 | }; | 422 | }; |
423 | 423 | ||
424 | struct drm_i915_gem_set_domain { | 424 | struct drm_i915_gem_set_domain { |
425 | /** Handle for the object */ | 425 | /** Handle for the object */ |
426 | uint32_t handle; | 426 | __u32 handle; |
427 | 427 | ||
428 | /** New read domains */ | 428 | /** New read domains */ |
429 | uint32_t read_domains; | 429 | __u32 read_domains; |
430 | 430 | ||
431 | /** New write domain */ | 431 | /** New write domain */ |
432 | uint32_t write_domain; | 432 | __u32 write_domain; |
433 | }; | 433 | }; |
434 | 434 | ||
435 | struct drm_i915_gem_sw_finish { | 435 | struct drm_i915_gem_sw_finish { |
436 | /** Handle for the object */ | 436 | /** Handle for the object */ |
437 | uint32_t handle; | 437 | __u32 handle; |
438 | }; | 438 | }; |
439 | 439 | ||
440 | struct drm_i915_gem_relocation_entry { | 440 | struct drm_i915_gem_relocation_entry { |
@@ -446,16 +446,16 @@ struct drm_i915_gem_relocation_entry { | |||
446 | * a relocation list for state buffers and not re-write it per | 446 | * a relocation list for state buffers and not re-write it per |
447 | * exec using the buffer. | 447 | * exec using the buffer. |
448 | */ | 448 | */ |
449 | uint32_t target_handle; | 449 | __u32 target_handle; |
450 | 450 | ||
451 | /** | 451 | /** |
452 | * Value to be added to the offset of the target buffer to make up | 452 | * Value to be added to the offset of the target buffer to make up |
453 | * the relocation entry. | 453 | * the relocation entry. |
454 | */ | 454 | */ |
455 | uint32_t delta; | 455 | __u32 delta; |
456 | 456 | ||
457 | /** Offset in the buffer the relocation entry will be written into */ | 457 | /** Offset in the buffer the relocation entry will be written into */ |
458 | uint64_t offset; | 458 | __u64 offset; |
459 | 459 | ||
460 | /** | 460 | /** |
461 | * Offset value of the target buffer that the relocation entry was last | 461 | * Offset value of the target buffer that the relocation entry was last |
@@ -465,12 +465,12 @@ struct drm_i915_gem_relocation_entry { | |||
465 | * and writing the relocation. This value is written back out by | 465 | * and writing the relocation. This value is written back out by |
466 | * the execbuffer ioctl when the relocation is written. | 466 | * the execbuffer ioctl when the relocation is written. |
467 | */ | 467 | */ |
468 | uint64_t presumed_offset; | 468 | __u64 presumed_offset; |
469 | 469 | ||
470 | /** | 470 | /** |
471 | * Target memory domains read by this operation. | 471 | * Target memory domains read by this operation. |
472 | */ | 472 | */ |
473 | uint32_t read_domains; | 473 | __u32 read_domains; |
474 | 474 | ||
475 | /** | 475 | /** |
476 | * Target memory domains written by this operation. | 476 | * Target memory domains written by this operation. |
@@ -479,7 +479,7 @@ struct drm_i915_gem_relocation_entry { | |||
479 | * execbuffer operation, so that where there are conflicts, | 479 | * execbuffer operation, so that where there are conflicts, |
480 | * the application will get -EINVAL back. | 480 | * the application will get -EINVAL back. |
481 | */ | 481 | */ |
482 | uint32_t write_domain; | 482 | __u32 write_domain; |
483 | }; | 483 | }; |
484 | 484 | ||
485 | /** @{ | 485 | /** @{ |
@@ -510,24 +510,24 @@ struct drm_i915_gem_exec_object { | |||
510 | * User's handle for a buffer to be bound into the GTT for this | 510 | * User's handle for a buffer to be bound into the GTT for this |
511 | * operation. | 511 | * operation. |
512 | */ | 512 | */ |
513 | uint32_t handle; | 513 | __u32 handle; |
514 | 514 | ||
515 | /** Number of relocations to be performed on this buffer */ | 515 | /** Number of relocations to be performed on this buffer */ |
516 | uint32_t relocation_count; | 516 | __u32 relocation_count; |
517 | /** | 517 | /** |
518 | * Pointer to array of struct drm_i915_gem_relocation_entry containing | 518 | * Pointer to array of struct drm_i915_gem_relocation_entry containing |
519 | * the relocations to be performed in this buffer. | 519 | * the relocations to be performed in this buffer. |
520 | */ | 520 | */ |
521 | uint64_t relocs_ptr; | 521 | __u64 relocs_ptr; |
522 | 522 | ||
523 | /** Required alignment in graphics aperture */ | 523 | /** Required alignment in graphics aperture */ |
524 | uint64_t alignment; | 524 | __u64 alignment; |
525 | 525 | ||
526 | /** | 526 | /** |
527 | * Returned value of the updated offset of the object, for future | 527 | * Returned value of the updated offset of the object, for future |
528 | * presumed_offset writes. | 528 | * presumed_offset writes. |
529 | */ | 529 | */ |
530 | uint64_t offset; | 530 | __u64 offset; |
531 | }; | 531 | }; |
532 | 532 | ||
533 | struct drm_i915_gem_execbuffer { | 533 | struct drm_i915_gem_execbuffer { |
@@ -541,44 +541,44 @@ struct drm_i915_gem_execbuffer { | |||
541 | * a buffer is performing refer to buffers that have already appeared | 541 | * a buffer is performing refer to buffers that have already appeared |
542 | * in the validate list. | 542 | * in the validate list. |
543 | */ | 543 | */ |
544 | uint64_t buffers_ptr; | 544 | __u64 buffers_ptr; |
545 | uint32_t buffer_count; | 545 | __u32 buffer_count; |
546 | 546 | ||
547 | /** Offset in the batchbuffer to start execution from. */ | 547 | /** Offset in the batchbuffer to start execution from. */ |
548 | uint32_t batch_start_offset; | 548 | __u32 batch_start_offset; |
549 | /** Bytes used in batchbuffer from batch_start_offset */ | 549 | /** Bytes used in batchbuffer from batch_start_offset */ |
550 | uint32_t batch_len; | 550 | __u32 batch_len; |
551 | uint32_t DR1; | 551 | __u32 DR1; |
552 | uint32_t DR4; | 552 | __u32 DR4; |
553 | uint32_t num_cliprects; | 553 | __u32 num_cliprects; |
554 | /** This is a struct drm_clip_rect *cliprects */ | 554 | /** This is a struct drm_clip_rect *cliprects */ |
555 | uint64_t cliprects_ptr; | 555 | __u64 cliprects_ptr; |
556 | }; | 556 | }; |
557 | 557 | ||
558 | struct drm_i915_gem_pin { | 558 | struct drm_i915_gem_pin { |
559 | /** Handle of the buffer to be pinned. */ | 559 | /** Handle of the buffer to be pinned. */ |
560 | uint32_t handle; | 560 | __u32 handle; |
561 | uint32_t pad; | 561 | __u32 pad; |
562 | 562 | ||
563 | /** alignment required within the aperture */ | 563 | /** alignment required within the aperture */ |
564 | uint64_t alignment; | 564 | __u64 alignment; |
565 | 565 | ||
566 | /** Returned GTT offset of the buffer. */ | 566 | /** Returned GTT offset of the buffer. */ |
567 | uint64_t offset; | 567 | __u64 offset; |
568 | }; | 568 | }; |
569 | 569 | ||
570 | struct drm_i915_gem_unpin { | 570 | struct drm_i915_gem_unpin { |
571 | /** Handle of the buffer to be unpinned. */ | 571 | /** Handle of the buffer to be unpinned. */ |
572 | uint32_t handle; | 572 | __u32 handle; |
573 | uint32_t pad; | 573 | __u32 pad; |
574 | }; | 574 | }; |
575 | 575 | ||
576 | struct drm_i915_gem_busy { | 576 | struct drm_i915_gem_busy { |
577 | /** Handle of the buffer to check for busy */ | 577 | /** Handle of the buffer to check for busy */ |
578 | uint32_t handle; | 578 | __u32 handle; |
579 | 579 | ||
580 | /** Return busy status (1 if busy, 0 if idle) */ | 580 | /** Return busy status (1 if busy, 0 if idle) */ |
581 | uint32_t busy; | 581 | __u32 busy; |
582 | }; | 582 | }; |
583 | 583 | ||
584 | #define I915_TILING_NONE 0 | 584 | #define I915_TILING_NONE 0 |
@@ -595,7 +595,7 @@ struct drm_i915_gem_busy { | |||
595 | 595 | ||
596 | struct drm_i915_gem_set_tiling { | 596 | struct drm_i915_gem_set_tiling { |
597 | /** Handle of the buffer to have its tiling state updated */ | 597 | /** Handle of the buffer to have its tiling state updated */ |
598 | uint32_t handle; | 598 | __u32 handle; |
599 | 599 | ||
600 | /** | 600 | /** |
601 | * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X, | 601 | * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X, |
@@ -609,47 +609,47 @@ struct drm_i915_gem_set_tiling { | |||
609 | * | 609 | * |
610 | * Buffer contents become undefined when changing tiling_mode. | 610 | * Buffer contents become undefined when changing tiling_mode. |
611 | */ | 611 | */ |
612 | uint32_t tiling_mode; | 612 | __u32 tiling_mode; |
613 | 613 | ||
614 | /** | 614 | /** |
615 | * Stride in bytes for the object when in I915_TILING_X or | 615 | * Stride in bytes for the object when in I915_TILING_X or |
616 | * I915_TILING_Y. | 616 | * I915_TILING_Y. |
617 | */ | 617 | */ |
618 | uint32_t stride; | 618 | __u32 stride; |
619 | 619 | ||
620 | /** | 620 | /** |
621 | * Returned address bit 6 swizzling required for CPU access through | 621 | * Returned address bit 6 swizzling required for CPU access through |
622 | * mmap mapping. | 622 | * mmap mapping. |
623 | */ | 623 | */ |
624 | uint32_t swizzle_mode; | 624 | __u32 swizzle_mode; |
625 | }; | 625 | }; |
626 | 626 | ||
627 | struct drm_i915_gem_get_tiling { | 627 | struct drm_i915_gem_get_tiling { |
628 | /** Handle of the buffer to get tiling state for. */ | 628 | /** Handle of the buffer to get tiling state for. */ |
629 | uint32_t handle; | 629 | __u32 handle; |
630 | 630 | ||
631 | /** | 631 | /** |
632 | * Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X, | 632 | * Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X, |
633 | * I915_TILING_Y). | 633 | * I915_TILING_Y). |
634 | */ | 634 | */ |
635 | uint32_t tiling_mode; | 635 | __u32 tiling_mode; |
636 | 636 | ||
637 | /** | 637 | /** |
638 | * Returned address bit 6 swizzling required for CPU access through | 638 | * Returned address bit 6 swizzling required for CPU access through |
639 | * mmap mapping. | 639 | * mmap mapping. |
640 | */ | 640 | */ |
641 | uint32_t swizzle_mode; | 641 | __u32 swizzle_mode; |
642 | }; | 642 | }; |
643 | 643 | ||
644 | struct drm_i915_gem_get_aperture { | 644 | struct drm_i915_gem_get_aperture { |
645 | /** Total size of the aperture used by i915_gem_execbuffer, in bytes */ | 645 | /** Total size of the aperture used by i915_gem_execbuffer, in bytes */ |
646 | uint64_t aper_size; | 646 | __u64 aper_size; |
647 | 647 | ||
648 | /** | 648 | /** |
649 | * Available space in the aperture used by i915_gem_execbuffer, in | 649 | * Available space in the aperture used by i915_gem_execbuffer, in |
650 | * bytes | 650 | * bytes |
651 | */ | 651 | */ |
652 | uint64_t aper_available_size; | 652 | __u64 aper_available_size; |
653 | }; | 653 | }; |
654 | 654 | ||
655 | #endif /* _I915_DRM_H_ */ | 655 | #endif /* _I915_DRM_H_ */ |
diff --git a/include/drm/mga_drm.h b/include/drm/mga_drm.h index 944b50a5ff24..325fd6fb4a42 100644 --- a/include/drm/mga_drm.h +++ b/include/drm/mga_drm.h | |||
@@ -35,6 +35,8 @@ | |||
35 | #ifndef __MGA_DRM_H__ | 35 | #ifndef __MGA_DRM_H__ |
36 | #define __MGA_DRM_H__ | 36 | #define __MGA_DRM_H__ |
37 | 37 | ||
38 | #include <linux/types.h> | ||
39 | |||
38 | /* WARNING: If you change any of these defines, make sure to change the | 40 | /* WARNING: If you change any of these defines, make sure to change the |
39 | * defines in the Xserver file (mga_sarea.h) | 41 | * defines in the Xserver file (mga_sarea.h) |
40 | */ | 42 | */ |
@@ -255,8 +257,8 @@ typedef struct _drm_mga_sarea { | |||
255 | #define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t) | 257 | #define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t) |
256 | #define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t) | 258 | #define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t) |
257 | #define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t) | 259 | #define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t) |
258 | #define DRM_IOCTL_MGA_SET_FENCE DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, uint32_t) | 260 | #define DRM_IOCTL_MGA_SET_FENCE DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, __u32) |
259 | #define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, uint32_t) | 261 | #define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, __u32) |
260 | #define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) | 262 | #define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) |
261 | 263 | ||
262 | typedef struct _drm_mga_warp_index { | 264 | typedef struct _drm_mga_warp_index { |
@@ -310,7 +312,7 @@ typedef struct drm_mga_dma_bootstrap { | |||
310 | */ | 312 | */ |
311 | /*@{ */ | 313 | /*@{ */ |
312 | unsigned long texture_handle; /**< Handle used to map AGP textures. */ | 314 | unsigned long texture_handle; /**< Handle used to map AGP textures. */ |
313 | uint32_t texture_size; /**< Size of the AGP texture region. */ | 315 | __u32 texture_size; /**< Size of the AGP texture region. */ |
314 | /*@} */ | 316 | /*@} */ |
315 | 317 | ||
316 | /** | 318 | /** |
@@ -319,7 +321,7 @@ typedef struct drm_mga_dma_bootstrap { | |||
319 | * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be | 321 | * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be |
320 | * filled in with the actual AGP mode. If AGP was not available | 322 | * filled in with the actual AGP mode. If AGP was not available |
321 | */ | 323 | */ |
322 | uint32_t primary_size; | 324 | __u32 primary_size; |
323 | 325 | ||
324 | /** | 326 | /** |
325 | * Requested number of secondary DMA buffers. | 327 | * Requested number of secondary DMA buffers. |
@@ -329,7 +331,7 @@ typedef struct drm_mga_dma_bootstrap { | |||
329 | * allocated. Particularly when PCI DMA is used, this may be | 331 | * allocated. Particularly when PCI DMA is used, this may be |
330 | * (subtantially) less than the number requested. | 332 | * (subtantially) less than the number requested. |
331 | */ | 333 | */ |
332 | uint32_t secondary_bin_count; | 334 | __u32 secondary_bin_count; |
333 | 335 | ||
334 | /** | 336 | /** |
335 | * Requested size of each secondary DMA buffer. | 337 | * Requested size of each secondary DMA buffer. |
@@ -338,7 +340,7 @@ typedef struct drm_mga_dma_bootstrap { | |||
338 | * dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed | 340 | * dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed |
339 | * to reduce dma_mga_dma_bootstrap::secondary_bin_size. | 341 | * to reduce dma_mga_dma_bootstrap::secondary_bin_size. |
340 | */ | 342 | */ |
341 | uint32_t secondary_bin_size; | 343 | __u32 secondary_bin_size; |
342 | 344 | ||
343 | /** | 345 | /** |
344 | * Bit-wise mask of AGPSTAT2_* values. Currently only \c AGPSTAT2_1X, | 346 | * Bit-wise mask of AGPSTAT2_* values. Currently only \c AGPSTAT2_1X, |
@@ -350,12 +352,12 @@ typedef struct drm_mga_dma_bootstrap { | |||
350 | * filled in with the actual AGP mode. If AGP was not available | 352 | * filled in with the actual AGP mode. If AGP was not available |
351 | * (i.e., PCI DMA was used), this value will be zero. | 353 | * (i.e., PCI DMA was used), this value will be zero. |
352 | */ | 354 | */ |
353 | uint32_t agp_mode; | 355 | __u32 agp_mode; |
354 | 356 | ||
355 | /** | 357 | /** |
356 | * Desired AGP GART size, measured in megabytes. | 358 | * Desired AGP GART size, measured in megabytes. |
357 | */ | 359 | */ |
358 | uint8_t agp_size; | 360 | __u8 agp_size; |
359 | } drm_mga_dma_bootstrap_t; | 361 | } drm_mga_dma_bootstrap_t; |
360 | 362 | ||
361 | typedef struct drm_mga_clear { | 363 | typedef struct drm_mga_clear { |
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h index 73ff51f12311..72ecf67ad3ec 100644 --- a/include/drm/radeon_drm.h +++ b/include/drm/radeon_drm.h | |||
@@ -33,6 +33,8 @@ | |||
33 | #ifndef __RADEON_DRM_H__ | 33 | #ifndef __RADEON_DRM_H__ |
34 | #define __RADEON_DRM_H__ | 34 | #define __RADEON_DRM_H__ |
35 | 35 | ||
36 | #include <linux/types.h> | ||
37 | |||
36 | /* WARNING: If you change any of these defines, make sure to change the | 38 | /* WARNING: If you change any of these defines, make sure to change the |
37 | * defines in the X server file (radeon_sarea.h) | 39 | * defines in the X server file (radeon_sarea.h) |
38 | */ | 40 | */ |
@@ -722,7 +724,7 @@ typedef struct drm_radeon_irq_wait { | |||
722 | 724 | ||
723 | typedef struct drm_radeon_setparam { | 725 | typedef struct drm_radeon_setparam { |
724 | unsigned int param; | 726 | unsigned int param; |
725 | int64_t value; | 727 | __s64 value; |
726 | } drm_radeon_setparam_t; | 728 | } drm_radeon_setparam_t; |
727 | 729 | ||
728 | #define RADEON_SETPARAM_FB_LOCATION 1 /* determined framebuffer location */ | 730 | #define RADEON_SETPARAM_FB_LOCATION 1 /* determined framebuffer location */ |
diff --git a/include/drm/via_drm.h b/include/drm/via_drm.h index a3b5c102b067..170786e5c2ff 100644 --- a/include/drm/via_drm.h +++ b/include/drm/via_drm.h | |||
@@ -24,6 +24,8 @@ | |||
24 | #ifndef _VIA_DRM_H_ | 24 | #ifndef _VIA_DRM_H_ |
25 | #define _VIA_DRM_H_ | 25 | #define _VIA_DRM_H_ |
26 | 26 | ||
27 | #include <linux/types.h> | ||
28 | |||
27 | /* WARNING: These defines must be the same as what the Xserver uses. | 29 | /* WARNING: These defines must be the same as what the Xserver uses. |
28 | * if you change them, you must change the defines in the Xserver. | 30 | * if you change them, you must change the defines in the Xserver. |
29 | */ | 31 | */ |
@@ -114,19 +116,19 @@ | |||
114 | #define VIA_MEM_UNKNOWN 4 | 116 | #define VIA_MEM_UNKNOWN 4 |
115 | 117 | ||
116 | typedef struct { | 118 | typedef struct { |
117 | uint32_t offset; | 119 | __u32 offset; |
118 | uint32_t size; | 120 | __u32 size; |
119 | } drm_via_agp_t; | 121 | } drm_via_agp_t; |
120 | 122 | ||
121 | typedef struct { | 123 | typedef struct { |
122 | uint32_t offset; | 124 | __u32 offset; |
123 | uint32_t size; | 125 | __u32 size; |
124 | } drm_via_fb_t; | 126 | } drm_via_fb_t; |
125 | 127 | ||
126 | typedef struct { | 128 | typedef struct { |
127 | uint32_t context; | 129 | __u32 context; |
128 | uint32_t type; | 130 | __u32 type; |
129 | uint32_t size; | 131 | __u32 size; |
130 | unsigned long index; | 132 | unsigned long index; |
131 | unsigned long offset; | 133 | unsigned long offset; |
132 | } drm_via_mem_t; | 134 | } drm_via_mem_t; |
@@ -148,9 +150,9 @@ typedef struct _drm_via_futex { | |||
148 | VIA_FUTEX_WAIT = 0x00, | 150 | VIA_FUTEX_WAIT = 0x00, |
149 | VIA_FUTEX_WAKE = 0X01 | 151 | VIA_FUTEX_WAKE = 0X01 |
150 | } func; | 152 | } func; |
151 | uint32_t ms; | 153 | __u32 ms; |
152 | uint32_t lock; | 154 | __u32 lock; |
153 | uint32_t val; | 155 | __u32 val; |
154 | } drm_via_futex_t; | 156 | } drm_via_futex_t; |
155 | 157 | ||
156 | typedef struct _drm_via_dma_init { | 158 | typedef struct _drm_via_dma_init { |
@@ -211,7 +213,7 @@ typedef struct _drm_via_cmdbuf_size { | |||
211 | VIA_CMDBUF_LAG = 0x02 | 213 | VIA_CMDBUF_LAG = 0x02 |
212 | } func; | 214 | } func; |
213 | int wait; | 215 | int wait; |
214 | uint32_t size; | 216 | __u32 size; |
215 | } drm_via_cmdbuf_size_t; | 217 | } drm_via_cmdbuf_size_t; |
216 | 218 | ||
217 | typedef enum { | 219 | typedef enum { |
@@ -236,8 +238,8 @@ enum drm_via_irqs { | |||
236 | struct drm_via_wait_irq_request { | 238 | struct drm_via_wait_irq_request { |
237 | unsigned irq; | 239 | unsigned irq; |
238 | via_irq_seq_type_t type; | 240 | via_irq_seq_type_t type; |
239 | uint32_t sequence; | 241 | __u32 sequence; |
240 | uint32_t signal; | 242 | __u32 signal; |
241 | }; | 243 | }; |
242 | 244 | ||
243 | typedef union drm_via_irqwait { | 245 | typedef union drm_via_irqwait { |
@@ -246,7 +248,7 @@ typedef union drm_via_irqwait { | |||
246 | } drm_via_irqwait_t; | 248 | } drm_via_irqwait_t; |
247 | 249 | ||
248 | typedef struct drm_via_blitsync { | 250 | typedef struct drm_via_blitsync { |
249 | uint32_t sync_handle; | 251 | __u32 sync_handle; |
250 | unsigned engine; | 252 | unsigned engine; |
251 | } drm_via_blitsync_t; | 253 | } drm_via_blitsync_t; |
252 | 254 | ||
@@ -257,16 +259,16 @@ typedef struct drm_via_blitsync { | |||
257 | */ | 259 | */ |
258 | 260 | ||
259 | typedef struct drm_via_dmablit { | 261 | typedef struct drm_via_dmablit { |
260 | uint32_t num_lines; | 262 | __u32 num_lines; |
261 | uint32_t line_length; | 263 | __u32 line_length; |
262 | 264 | ||
263 | uint32_t fb_addr; | 265 | __u32 fb_addr; |
264 | uint32_t fb_stride; | 266 | __u32 fb_stride; |
265 | 267 | ||
266 | unsigned char *mem_addr; | 268 | unsigned char *mem_addr; |
267 | uint32_t mem_stride; | 269 | __u32 mem_stride; |
268 | 270 | ||
269 | uint32_t flags; | 271 | __u32 flags; |
270 | int to_fb; | 272 | int to_fb; |
271 | 273 | ||
272 | drm_via_blitsync_t sync; | 274 | drm_via_blitsync_t sync; |