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Diffstat (limited to 'include/drm/ttm/ttm_placement.h')
-rw-r--r-- | include/drm/ttm/ttm_placement.h | 92 |
1 files changed, 92 insertions, 0 deletions
diff --git a/include/drm/ttm/ttm_placement.h b/include/drm/ttm/ttm_placement.h new file mode 100644 index 000000000000..c84ff153a564 --- /dev/null +++ b/include/drm/ttm/ttm_placement.h | |||
@@ -0,0 +1,92 @@ | |||
1 | /************************************************************************** | ||
2 | * | ||
3 | * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA | ||
4 | * All Rights Reserved. | ||
5 | * | ||
6 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
7 | * copy of this software and associated documentation files (the | ||
8 | * "Software"), to deal in the Software without restriction, including | ||
9 | * without limitation the rights to use, copy, modify, merge, publish, | ||
10 | * distribute, sub license, and/or sell copies of the Software, and to | ||
11 | * permit persons to whom the Software is furnished to do so, subject to | ||
12 | * the following conditions: | ||
13 | * | ||
14 | * The above copyright notice and this permission notice (including the | ||
15 | * next paragraph) shall be included in all copies or substantial portions | ||
16 | * of the Software. | ||
17 | * | ||
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | ||
21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | ||
22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | ||
23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | ||
24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | ||
25 | * | ||
26 | **************************************************************************/ | ||
27 | /* | ||
28 | * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> | ||
29 | */ | ||
30 | |||
31 | #ifndef _TTM_PLACEMENT_H_ | ||
32 | #define _TTM_PLACEMENT_H_ | ||
33 | /* | ||
34 | * Memory regions for data placement. | ||
35 | */ | ||
36 | |||
37 | #define TTM_PL_SYSTEM 0 | ||
38 | #define TTM_PL_TT 1 | ||
39 | #define TTM_PL_VRAM 2 | ||
40 | #define TTM_PL_PRIV0 3 | ||
41 | #define TTM_PL_PRIV1 4 | ||
42 | #define TTM_PL_PRIV2 5 | ||
43 | #define TTM_PL_PRIV3 6 | ||
44 | #define TTM_PL_PRIV4 7 | ||
45 | #define TTM_PL_PRIV5 8 | ||
46 | #define TTM_PL_SWAPPED 15 | ||
47 | |||
48 | #define TTM_PL_FLAG_SYSTEM (1 << TTM_PL_SYSTEM) | ||
49 | #define TTM_PL_FLAG_TT (1 << TTM_PL_TT) | ||
50 | #define TTM_PL_FLAG_VRAM (1 << TTM_PL_VRAM) | ||
51 | #define TTM_PL_FLAG_PRIV0 (1 << TTM_PL_PRIV0) | ||
52 | #define TTM_PL_FLAG_PRIV1 (1 << TTM_PL_PRIV1) | ||
53 | #define TTM_PL_FLAG_PRIV2 (1 << TTM_PL_PRIV2) | ||
54 | #define TTM_PL_FLAG_PRIV3 (1 << TTM_PL_PRIV3) | ||
55 | #define TTM_PL_FLAG_PRIV4 (1 << TTM_PL_PRIV4) | ||
56 | #define TTM_PL_FLAG_PRIV5 (1 << TTM_PL_PRIV5) | ||
57 | #define TTM_PL_FLAG_SWAPPED (1 << TTM_PL_SWAPPED) | ||
58 | #define TTM_PL_MASK_MEM 0x0000FFFF | ||
59 | |||
60 | /* | ||
61 | * Other flags that affects data placement. | ||
62 | * TTM_PL_FLAG_CACHED indicates cache-coherent mappings | ||
63 | * if available. | ||
64 | * TTM_PL_FLAG_SHARED means that another application may | ||
65 | * reference the buffer. | ||
66 | * TTM_PL_FLAG_NO_EVICT means that the buffer may never | ||
67 | * be evicted to make room for other buffers. | ||
68 | */ | ||
69 | |||
70 | #define TTM_PL_FLAG_CACHED (1 << 16) | ||
71 | #define TTM_PL_FLAG_UNCACHED (1 << 17) | ||
72 | #define TTM_PL_FLAG_WC (1 << 18) | ||
73 | #define TTM_PL_FLAG_SHARED (1 << 20) | ||
74 | #define TTM_PL_FLAG_NO_EVICT (1 << 21) | ||
75 | |||
76 | #define TTM_PL_MASK_CACHING (TTM_PL_FLAG_CACHED | \ | ||
77 | TTM_PL_FLAG_UNCACHED | \ | ||
78 | TTM_PL_FLAG_WC) | ||
79 | |||
80 | #define TTM_PL_MASK_MEMTYPE (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING) | ||
81 | |||
82 | /* | ||
83 | * Access flags to be used for CPU- and GPU- mappings. | ||
84 | * The idea is that the TTM synchronization mechanism will | ||
85 | * allow concurrent READ access and exclusive write access. | ||
86 | * Currently GPU- and CPU accesses are exclusive. | ||
87 | */ | ||
88 | |||
89 | #define TTM_ACCESS_READ (1 << 0) | ||
90 | #define TTM_ACCESS_WRITE (1 << 1) | ||
91 | |||
92 | #endif | ||