diff options
Diffstat (limited to 'include/drm/radeon_drm.h')
-rw-r--r-- | include/drm/radeon_drm.h | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h index af4b4826997e..3b9932ab1756 100644 --- a/include/drm/radeon_drm.h +++ b/include/drm/radeon_drm.h | |||
@@ -508,6 +508,7 @@ typedef struct { | |||
508 | #define DRM_RADEON_INFO 0x27 | 508 | #define DRM_RADEON_INFO 0x27 |
509 | #define DRM_RADEON_GEM_SET_TILING 0x28 | 509 | #define DRM_RADEON_GEM_SET_TILING 0x28 |
510 | #define DRM_RADEON_GEM_GET_TILING 0x29 | 510 | #define DRM_RADEON_GEM_GET_TILING 0x29 |
511 | #define DRM_RADEON_GEM_BUSY 0x2a | ||
511 | 512 | ||
512 | #define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t) | 513 | #define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t) |
513 | #define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START) | 514 | #define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START) |
@@ -548,6 +549,7 @@ typedef struct { | |||
548 | #define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info) | 549 | #define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info) |
549 | #define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) | 550 | #define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) |
550 | #define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) | 551 | #define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) |
552 | #define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy) | ||
551 | 553 | ||
552 | typedef struct drm_radeon_init { | 554 | typedef struct drm_radeon_init { |
553 | enum { | 555 | enum { |
@@ -707,6 +709,7 @@ typedef struct drm_radeon_indirect { | |||
707 | #define RADEON_PARAM_FB_LOCATION 14 /* FB location */ | 709 | #define RADEON_PARAM_FB_LOCATION 14 /* FB location */ |
708 | #define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */ | 710 | #define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */ |
709 | #define RADEON_PARAM_DEVICE_ID 16 | 711 | #define RADEON_PARAM_DEVICE_ID 16 |
712 | #define RADEON_PARAM_NUM_Z_PIPES 17 /* num Z pipes */ | ||
710 | 713 | ||
711 | typedef struct drm_radeon_getparam { | 714 | typedef struct drm_radeon_getparam { |
712 | int param; | 715 | int param; |
@@ -799,11 +802,12 @@ struct drm_radeon_gem_create { | |||
799 | uint32_t flags; | 802 | uint32_t flags; |
800 | }; | 803 | }; |
801 | 804 | ||
802 | #define RADEON_TILING_MACRO 0x1 | 805 | #define RADEON_TILING_MACRO 0x1 |
803 | #define RADEON_TILING_MICRO 0x2 | 806 | #define RADEON_TILING_MICRO 0x2 |
804 | #define RADEON_TILING_SWAP 0x4 | 807 | #define RADEON_TILING_SWAP_16BIT 0x4 |
805 | #define RADEON_TILING_SURFACE 0x8 /* this object requires a surface | 808 | #define RADEON_TILING_SWAP_32BIT 0x8 |
806 | * when mapped - i.e. front buffer */ | 809 | #define RADEON_TILING_SURFACE 0x10 /* this object requires a surface |
810 | * when mapped - i.e. front buffer */ | ||
807 | 811 | ||
808 | struct drm_radeon_gem_set_tiling { | 812 | struct drm_radeon_gem_set_tiling { |
809 | uint32_t handle; | 813 | uint32_t handle; |
@@ -838,7 +842,7 @@ struct drm_radeon_gem_wait_idle { | |||
838 | 842 | ||
839 | struct drm_radeon_gem_busy { | 843 | struct drm_radeon_gem_busy { |
840 | uint32_t handle; | 844 | uint32_t handle; |
841 | uint32_t busy; | 845 | uint32_t domain; |
842 | }; | 846 | }; |
843 | 847 | ||
844 | struct drm_radeon_gem_pread { | 848 | struct drm_radeon_gem_pread { |
@@ -895,6 +899,8 @@ struct drm_radeon_cs { | |||
895 | 899 | ||
896 | #define RADEON_INFO_DEVICE_ID 0x00 | 900 | #define RADEON_INFO_DEVICE_ID 0x00 |
897 | #define RADEON_INFO_NUM_GB_PIPES 0x01 | 901 | #define RADEON_INFO_NUM_GB_PIPES 0x01 |
902 | #define RADEON_INFO_NUM_Z_PIPES 0x02 | ||
903 | #define RADEON_INFO_ACCEL_WORKING 0x03 | ||
898 | 904 | ||
899 | struct drm_radeon_info { | 905 | struct drm_radeon_info { |
900 | uint32_t request; | 906 | uint32_t request; |