diff options
Diffstat (limited to 'include/drm/i915_drm.h')
-rw-r--r-- | include/drm/i915_drm.h | 41 |
1 files changed, 40 insertions, 1 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 152b34da927c..b3bcf72dc656 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h | |||
@@ -113,8 +113,31 @@ typedef struct _drm_i915_sarea { | |||
113 | int pipeB_y; | 113 | int pipeB_y; |
114 | int pipeB_w; | 114 | int pipeB_w; |
115 | int pipeB_h; | 115 | int pipeB_h; |
116 | |||
117 | /* fill out some space for old userspace triple buffer */ | ||
118 | drm_handle_t unused_handle; | ||
119 | uint32_t unused1, unused2, unused3; | ||
120 | |||
121 | /* buffer object handles for static buffers. May change | ||
122 | * over the lifetime of the client. | ||
123 | */ | ||
124 | uint32_t front_bo_handle; | ||
125 | uint32_t back_bo_handle; | ||
126 | uint32_t unused_bo_handle; | ||
127 | uint32_t depth_bo_handle; | ||
128 | |||
116 | } drm_i915_sarea_t; | 129 | } drm_i915_sarea_t; |
117 | 130 | ||
131 | /* due to userspace building against these headers we need some compat here */ | ||
132 | #define planeA_x pipeA_x | ||
133 | #define planeA_y pipeA_y | ||
134 | #define planeA_w pipeA_w | ||
135 | #define planeA_h pipeA_h | ||
136 | #define planeB_x pipeB_x | ||
137 | #define planeB_y pipeB_y | ||
138 | #define planeB_w pipeB_w | ||
139 | #define planeB_h pipeB_h | ||
140 | |||
118 | /* Flags for perf_boxes | 141 | /* Flags for perf_boxes |
119 | */ | 142 | */ |
120 | #define I915_BOX_RING_EMPTY 0x1 | 143 | #define I915_BOX_RING_EMPTY 0x1 |
@@ -160,6 +183,7 @@ typedef struct _drm_i915_sarea { | |||
160 | #define DRM_I915_GEM_SET_TILING 0x21 | 183 | #define DRM_I915_GEM_SET_TILING 0x21 |
161 | #define DRM_I915_GEM_GET_TILING 0x22 | 184 | #define DRM_I915_GEM_GET_TILING 0x22 |
162 | #define DRM_I915_GEM_GET_APERTURE 0x23 | 185 | #define DRM_I915_GEM_GET_APERTURE 0x23 |
186 | #define DRM_I915_GEM_MMAP_GTT 0x24 | ||
163 | 187 | ||
164 | #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) | 188 | #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) |
165 | #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) | 189 | #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) |
@@ -177,6 +201,8 @@ typedef struct _drm_i915_sarea { | |||
177 | #define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t) | 201 | #define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t) |
178 | #define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t) | 202 | #define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t) |
179 | #define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) | 203 | #define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) |
204 | #define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init) | ||
205 | #define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer) | ||
180 | #define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin) | 206 | #define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin) |
181 | #define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin) | 207 | #define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin) |
182 | #define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy) | 208 | #define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy) |
@@ -187,6 +213,7 @@ typedef struct _drm_i915_sarea { | |||
187 | #define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread) | 213 | #define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread) |
188 | #define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite) | 214 | #define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite) |
189 | #define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap) | 215 | #define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap) |
216 | #define DRM_IOCTL_I915_GEM_MMAP_GTT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP_GTT, struct drm_i915_gem_mmap_gtt) | ||
190 | #define DRM_IOCTL_I915_GEM_SET_DOMAIN DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SET_DOMAIN, struct drm_i915_gem_set_domain) | 217 | #define DRM_IOCTL_I915_GEM_SET_DOMAIN DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SET_DOMAIN, struct drm_i915_gem_set_domain) |
191 | #define DRM_IOCTL_I915_GEM_SW_FINISH DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SW_FINISH, struct drm_i915_gem_sw_finish) | 218 | #define DRM_IOCTL_I915_GEM_SW_FINISH DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SW_FINISH, struct drm_i915_gem_sw_finish) |
192 | #define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling) | 219 | #define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling) |
@@ -196,7 +223,7 @@ typedef struct _drm_i915_sarea { | |||
196 | /* Allow drivers to submit batchbuffers directly to hardware, relying | 223 | /* Allow drivers to submit batchbuffers directly to hardware, relying |
197 | * on the security mechanisms provided by hardware. | 224 | * on the security mechanisms provided by hardware. |
198 | */ | 225 | */ |
199 | typedef struct _drm_i915_batchbuffer { | 226 | typedef struct drm_i915_batchbuffer { |
200 | int start; /* agp offset */ | 227 | int start; /* agp offset */ |
201 | int used; /* nr bytes in use */ | 228 | int used; /* nr bytes in use */ |
202 | int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ | 229 | int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ |
@@ -382,6 +409,18 @@ struct drm_i915_gem_mmap { | |||
382 | uint64_t addr_ptr; | 409 | uint64_t addr_ptr; |
383 | }; | 410 | }; |
384 | 411 | ||
412 | struct drm_i915_gem_mmap_gtt { | ||
413 | /** Handle for the object being mapped. */ | ||
414 | uint32_t handle; | ||
415 | uint32_t pad; | ||
416 | /** | ||
417 | * Fake offset to use for subsequent mmap call | ||
418 | * | ||
419 | * This is a fixed-size type for 32/64 compatibility. | ||
420 | */ | ||
421 | uint64_t offset; | ||
422 | }; | ||
423 | |||
385 | struct drm_i915_gem_set_domain { | 424 | struct drm_i915_gem_set_domain { |
386 | /** Handle for the object */ | 425 | /** Handle for the object */ |
387 | uint32_t handle; | 426 | uint32_t handle; |