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-rw-r--r--include/asm-xtensa/bitops.h69
-rw-r--r--include/asm-xtensa/byteorder.h3
-rw-r--r--include/asm-xtensa/coprocessor.h8
-rw-r--r--include/asm-xtensa/div64.h15
-rw-r--r--include/asm-xtensa/elf.h3
-rw-r--r--include/asm-xtensa/fcntl.h100
-rw-r--r--include/asm-xtensa/mmu_context.h1
-rw-r--r--include/asm-xtensa/page.h2
-rw-r--r--include/asm-xtensa/param.h4
-rw-r--r--include/asm-xtensa/ptrace.h8
-rw-r--r--include/asm-xtensa/shmparam.h2
-rw-r--r--include/asm-xtensa/sigcontext.h24
-rw-r--r--include/asm-xtensa/thread_info.h2
-rw-r--r--include/asm-xtensa/unistd.h4
14 files changed, 61 insertions, 184 deletions
diff --git a/include/asm-xtensa/bitops.h b/include/asm-xtensa/bitops.h
index d815649617aa..1c1e0d933eea 100644
--- a/include/asm-xtensa/bitops.h
+++ b/include/asm-xtensa/bitops.h
@@ -7,7 +7,7 @@
7 * License. See the file "COPYING" in the main directory of this archive 7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details. 8 * for more details.
9 * 9 *
10 * Copyright (C) 2001 - 2005 Tensilica Inc. 10 * Copyright (C) 2001 - 2007 Tensilica Inc.
11 */ 11 */
12 12
13#ifndef _XTENSA_BITOPS_H 13#ifndef _XTENSA_BITOPS_H
@@ -31,53 +31,30 @@
31 31
32#if XCHAL_HAVE_NSA 32#if XCHAL_HAVE_NSA
33 33
34static __inline__ int __cntlz (unsigned long x) 34static inline unsigned long __cntlz (unsigned long x)
35{ 35{
36 int lz; 36 int lz;
37 asm ("nsau %0, %1" : "=r" (lz) : "r" (x)); 37 asm ("nsau %0, %1" : "=r" (lz) : "r" (x));
38 return 31 - lz; 38 return lz;
39} 39}
40 40
41#else
42
43static __inline__ int __cntlz (unsigned long x)
44{
45 unsigned long sum, x1, x2, x4, x8, x16;
46 x1 = x & 0xAAAAAAAA;
47 x2 = x & 0xCCCCCCCC;
48 x4 = x & 0xF0F0F0F0;
49 x8 = x & 0xFF00FF00;
50 x16 = x & 0xFFFF0000;
51 sum = x2 ? 2 : 0;
52 sum += (x16 != 0) * 16;
53 sum += (x8 != 0) * 8;
54 sum += (x4 != 0) * 4;
55 sum += (x1 != 0);
56
57 return sum;
58}
59
60#endif
61
62/* 41/*
63 * ffz: Find first zero in word. Undefined if no zero exists. 42 * ffz: Find first zero in word. Undefined if no zero exists.
64 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). 43 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
65 */ 44 */
66 45
67static __inline__ int ffz(unsigned long x) 46static inline int ffz(unsigned long x)
68{ 47{
69 if ((x = ~x) == 0) 48 return 31 - __cntlz(~x & -~x);
70 return 32;
71 return __cntlz(x & -x);
72} 49}
73 50
74/* 51/*
75 * __ffs: Find first bit set in word. Return 0 for bit 0 52 * __ffs: Find first bit set in word. Return 0 for bit 0
76 */ 53 */
77 54
78static __inline__ int __ffs(unsigned long x) 55static inline int __ffs(unsigned long x)
79{ 56{
80 return __cntlz(x & -x); 57 return 31 - __cntlz(x & -x);
81} 58}
82 59
83/* 60/*
@@ -86,9 +63,9 @@ static __inline__ int __ffs(unsigned long x)
86 * differs in spirit from the above ffz (man ffs). 63 * differs in spirit from the above ffz (man ffs).
87 */ 64 */
88 65
89static __inline__ int ffs(unsigned long x) 66static inline int ffs(unsigned long x)
90{ 67{
91 return __cntlz(x & -x) + 1; 68 return 32 - __cntlz(x & -x);
92} 69}
93 70
94/* 71/*
@@ -96,20 +73,36 @@ static __inline__ int ffs(unsigned long x)
96 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. 73 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
97 */ 74 */
98 75
99static __inline__ int fls (unsigned int x) 76static inline int fls (unsigned int x)
100{ 77{
101 return __cntlz(x); 78 return 32 - __cntlz(x);
102} 79}
80
81#else
82
83/* Use the generic implementation if we don't have the nsa/nsau instructions. */
84
85# include <asm-generic/bitops/ffs.h>
86# include <asm-generic/bitops/__ffs.h>
87# include <asm-generic/bitops/ffz.h>
88# include <asm-generic/bitops/fls.h>
89
90#endif
91
103#include <asm-generic/bitops/fls64.h> 92#include <asm-generic/bitops/fls64.h>
104#include <asm-generic/bitops/find.h> 93#include <asm-generic/bitops/find.h>
105#include <asm-generic/bitops/ext2-non-atomic.h> 94#include <asm-generic/bitops/ext2-non-atomic.h>
106 95
107#ifdef __XTENSA_EL__ 96#ifdef __XTENSA_EL__
108# define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit((nr),(addr)) 97# define ext2_set_bit_atomic(lock,nr,addr) \
109# define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr),(addr)) 98 test_and_set_bit((nr), (unsigned long*)(addr))
99# define ext2_clear_bit_atomic(lock,nr,addr) \
100 test_and_clear_bit((nr), (unsigned long*)(addr))
110#elif defined(__XTENSA_EB__) 101#elif defined(__XTENSA_EB__)
111# define ext2_set_bit_atomic(lock,nr,addr) test_and_set_bit((nr) ^ 0x18, (addr)) 102# define ext2_set_bit_atomic(lock,nr,addr) \
112# define ext2_clear_bit_atomic(lock,nr,addr) test_and_clear_bit((nr)^0x18,(addr)) 103 test_and_set_bit((nr) ^ 0x18, (unsigned long*)(addr))
104# define ext2_clear_bit_atomic(lock,nr,addr) \
105 test_and_clear_bit((nr) ^ 0x18, (unsigned long*)(addr))
113#else 106#else
114# error processor byte order undefined! 107# error processor byte order undefined!
115#endif 108#endif
diff --git a/include/asm-xtensa/byteorder.h b/include/asm-xtensa/byteorder.h
index 0f540a5f4c01..765edf17a9a4 100644
--- a/include/asm-xtensa/byteorder.h
+++ b/include/asm-xtensa/byteorder.h
@@ -12,6 +12,7 @@
12#define _XTENSA_BYTEORDER_H 12#define _XTENSA_BYTEORDER_H
13 13
14#include <asm/types.h> 14#include <asm/types.h>
15#include <linux/compiler.h>
15 16
16static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) 17static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x)
17{ 18{
@@ -78,4 +79,4 @@ static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x)
78# error processor byte order undefined! 79# error processor byte order undefined!
79#endif 80#endif
80 81
81#endif /* __ASM_XTENSA_BYTEORDER_H */ 82#endif /* _XTENSA_BYTEORDER_H */
diff --git a/include/asm-xtensa/coprocessor.h b/include/asm-xtensa/coprocessor.h
index bd09ec02d57f..aa2121034558 100644
--- a/include/asm-xtensa/coprocessor.h
+++ b/include/asm-xtensa/coprocessor.h
@@ -64,6 +64,7 @@ typedef struct {
64# define COPROCESSOR_INFO_SIZE 8 64# define COPROCESSOR_INFO_SIZE 8
65# endif 65# endif
66#endif 66#endif
67#endif /* XCHAL_HAVE_CP */
67 68
68 69
69#ifndef __ASSEMBLY__ 70#ifndef __ASSEMBLY__
@@ -74,8 +75,11 @@ extern void save_coprocessor_registers(void*, int);
74# else 75# else
75# define release_coprocessors(task) 76# define release_coprocessors(task)
76# endif 77# endif
77#endif
78 78
79#endif 79typedef unsigned char cp_state_t[XTENSA_CP_EXTRA_SIZE]
80 __attribute__ ((aligned (XTENSA_CP_EXTRA_ALIGN)));
81
82#endif /* !__ASSEMBLY__ */
83
80 84
81#endif /* _XTENSA_COPROCESSOR_H */ 85#endif /* _XTENSA_COPROCESSOR_H */
diff --git a/include/asm-xtensa/div64.h b/include/asm-xtensa/div64.h
index 20965e3af1dd..f35678cb0a9b 100644
--- a/include/asm-xtensa/div64.h
+++ b/include/asm-xtensa/div64.h
@@ -5,21 +5,12 @@
5 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details. 6 * for more details.
7 * 7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc. 8 * Copyright (C) 2001 - 2007 Tensilica Inc.
9 */ 9 */
10 10
11#ifndef _XTENSA_DIV64_H 11#ifndef _XTENSA_DIV64_H
12#define _XTENSA_DIV64_H 12#define _XTENSA_DIV64_H
13 13
14#include <linux/types.h> 14#include <asm-generic/div64.h>
15 15
16#define do_div(n,base) ({ \ 16#endif /* _XTENSA_DIV64_H */
17 int __res = n % ((unsigned int) base); \
18 n /= (unsigned int) base; \
19 __res; })
20
21static inline uint64_t div64_64(uint64_t dividend, uint64_t divisor)
22{
23 return dividend / divisor;
24}
25#endif
diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h
index f0f9fd8560a5..1569b53cec91 100644
--- a/include/asm-xtensa/elf.h
+++ b/include/asm-xtensa/elf.h
@@ -13,7 +13,6 @@
13#ifndef _XTENSA_ELF_H 13#ifndef _XTENSA_ELF_H
14#define _XTENSA_ELF_H 14#define _XTENSA_ELF_H
15 15
16#include <asm/variant/core.h>
17#include <asm/ptrace.h> 16#include <asm/ptrace.h>
18 17
19/* Xtensa processor ELF architecture-magic number */ 18/* Xtensa processor ELF architecture-magic number */
@@ -49,7 +48,7 @@ typedef struct {
49 elf_greg_t lcount; 48 elf_greg_t lcount;
50 elf_greg_t sar; 49 elf_greg_t sar;
51 elf_greg_t syscall; 50 elf_greg_t syscall;
52 elf_greg_t ar[XCHAL_NUM_AREGS]; 51 elf_greg_t ar[64];
53} xtensa_gregset_t; 52} xtensa_gregset_t;
54 53
55#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t)) 54#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
diff --git a/include/asm-xtensa/fcntl.h b/include/asm-xtensa/fcntl.h
index 0609fc691b72..46ab12db5739 100644
--- a/include/asm-xtensa/fcntl.h
+++ b/include/asm-xtensa/fcntl.h
@@ -1,99 +1 @@
1/* #include <asm-generic/fcntl.h>
2 * include/asm-xtensa/fcntl.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
9 * Copyright (C) 2001 - 2005 Tensilica Inc.
10 */
11
12#ifndef _XTENSA_FCNTL_H
13#define _XTENSA_FCNTL_H
14
15/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
16 located on an ext2 file system */
17#define O_ACCMODE 0003
18#define O_RDONLY 00
19#define O_WRONLY 01
20#define O_RDWR 02
21#define O_CREAT 0100 /* not fcntl */
22#define O_EXCL 0200 /* not fcntl */
23#define O_NOCTTY 0400 /* not fcntl */
24#define O_TRUNC 01000 /* not fcntl */
25#define O_APPEND 02000
26#define O_NONBLOCK 04000
27#define O_NDELAY O_NONBLOCK
28#define O_SYNC 010000
29#define FASYNC 020000 /* fcntl, for BSD compatibility */
30#define O_DIRECT 040000 /* direct disk access hint */
31#define O_LARGEFILE 0100000
32#define O_DIRECTORY 0200000 /* must be a directory */
33#define O_NOFOLLOW 0400000 /* don't follow links */
34#define O_NOATIME 01000000
35
36#define F_DUPFD 0 /* dup */
37#define F_GETFD 1 /* get close_on_exec */
38#define F_SETFD 2 /* set/clear close_on_exec */
39#define F_GETFL 3 /* get file->f_flags */
40#define F_SETFL 4 /* set file->f_flags */
41#define F_GETLK 5
42#define F_SETLK 6
43#define F_SETLKW 7
44
45#define F_SETOWN 8 /* for sockets. */
46#define F_GETOWN 9 /* for sockets. */
47#define F_SETSIG 10 /* for sockets. */
48#define F_GETSIG 11 /* for sockets. */
49
50#define F_GETLK64 12 /* using 'struct flock64' */
51#define F_SETLK64 13
52#define F_SETLKW64 14
53
54/* for F_[GET|SET]FL */
55#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
56
57/* for posix fcntl() and lockf() */
58#define F_RDLCK 0
59#define F_WRLCK 1
60#define F_UNLCK 2
61
62/* for old implementation of bsd flock () */
63#define F_EXLCK 4 /* or 3 */
64#define F_SHLCK 8 /* or 4 */
65
66/* for leases */
67#define F_INPROGRESS 16
68
69/* operations for bsd flock(), also used by the kernel implementation */
70#define LOCK_SH 1 /* shared lock */
71#define LOCK_EX 2 /* exclusive lock */
72#define LOCK_NB 4 /* or'd with one of the above to prevent
73 blocking */
74#define LOCK_UN 8 /* remove lock */
75
76#define LOCK_MAND 32 /* This is a mandatory flock */
77#define LOCK_READ 64 /* ... Which allows concurrent read operations */
78#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */
79#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */
80
81struct flock {
82 short l_type;
83 short l_whence;
84 off_t l_start;
85 off_t l_len;
86 pid_t l_pid;
87};
88
89struct flock64 {
90 short l_type;
91 short l_whence;
92 loff_t l_start;
93 loff_t l_len;
94 pid_t l_pid;
95};
96
97#define F_LINUX_SPECIFIC_BASE 1024
98
99#endif /* _XTENSA_FCNTL_H */
diff --git a/include/asm-xtensa/mmu_context.h b/include/asm-xtensa/mmu_context.h
index 92f948392ebc..c0fd8e5b4513 100644
--- a/include/asm-xtensa/mmu_context.h
+++ b/include/asm-xtensa/mmu_context.h
@@ -14,6 +14,7 @@
14#define _XTENSA_MMU_CONTEXT_H 14#define _XTENSA_MMU_CONTEXT_H
15 15
16#include <linux/stringify.h> 16#include <linux/stringify.h>
17#include <linux/sched.h>
17 18
18#include <asm/pgtable.h> 19#include <asm/pgtable.h>
19#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
diff --git a/include/asm-xtensa/page.h b/include/asm-xtensa/page.h
index c631d006194b..1213cde75438 100644
--- a/include/asm-xtensa/page.h
+++ b/include/asm-xtensa/page.h
@@ -131,6 +131,6 @@ void copy_user_page(void *to,void* from,unsigned long vaddr,struct page* page);
131#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ 131#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
132 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 132 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
133 133
134#endif /* __KERNEL__ */
135#include <asm-generic/memory_model.h> 134#include <asm-generic/memory_model.h>
135#endif /* __KERNEL__ */
136#endif /* _XTENSA_PAGE_H */ 136#endif /* _XTENSA_PAGE_H */
diff --git a/include/asm-xtensa/param.h b/include/asm-xtensa/param.h
index 6f281392e3f8..ce3a336cad07 100644
--- a/include/asm-xtensa/param.h
+++ b/include/asm-xtensa/param.h
@@ -11,15 +11,13 @@
11#ifndef _XTENSA_PARAM_H 11#ifndef _XTENSA_PARAM_H
12#define _XTENSA_PARAM_H 12#define _XTENSA_PARAM_H
13 13
14#include <asm/variant/core.h>
15
16#ifdef __KERNEL__ 14#ifdef __KERNEL__
17# define HZ 100 /* internal timer frequency */ 15# define HZ 100 /* internal timer frequency */
18# define USER_HZ 100 /* for user interfaces in "ticks" */ 16# define USER_HZ 100 /* for user interfaces in "ticks" */
19# define CLOCKS_PER_SEC (USER_HZ) /* frequnzy at which times() counts */ 17# define CLOCKS_PER_SEC (USER_HZ) /* frequnzy at which times() counts */
20#endif 18#endif
21 19
22#define EXEC_PAGESIZE (1 << XCHAL_MMU_MIN_PTE_PAGE_SIZE) 20#define EXEC_PAGESIZE 4096
23 21
24#ifndef NGROUPS 22#ifndef NGROUPS
25#define NGROUPS 32 23#define NGROUPS 32
diff --git a/include/asm-xtensa/ptrace.h b/include/asm-xtensa/ptrace.h
index 1b7fe363fad1..77ff02d307bb 100644
--- a/include/asm-xtensa/ptrace.h
+++ b/include/asm-xtensa/ptrace.h
@@ -11,8 +11,6 @@
11#ifndef _XTENSA_PTRACE_H 11#ifndef _XTENSA_PTRACE_H
12#define _XTENSA_PTRACE_H 12#define _XTENSA_PTRACE_H
13 13
14#include <asm/variant/core.h>
15
16/* 14/*
17 * Kernel stack 15 * Kernel stack
18 * 16 *
@@ -101,7 +99,8 @@ struct pt_regs {
101 unsigned long windowbase; /* 48 */ 99 unsigned long windowbase; /* 48 */
102 unsigned long windowstart; /* 52 */ 100 unsigned long windowstart; /* 52 */
103 unsigned long syscall; /* 56 */ 101 unsigned long syscall; /* 56 */
104 int reserved[2]; /* 64 */ 102 unsigned long icountlevel; /* 60 */
103 int reserved[1]; /* 64 */
105 104
106 /* Make sure the areg field is 16 bytes aligned. */ 105 /* Make sure the areg field is 16 bytes aligned. */
107 int align[0] __attribute__ ((aligned(16))); 106 int align[0] __attribute__ ((aligned(16)));
@@ -113,6 +112,9 @@ struct pt_regs {
113}; 112};
114 113
115#ifdef __KERNEL__ 114#ifdef __KERNEL__
115
116#include <asm/variant/core.h>
117
116# define task_pt_regs(tsk) ((struct pt_regs*) \ 118# define task_pt_regs(tsk) ((struct pt_regs*) \
117 (task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1) 119 (task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1)
118# define user_mode(regs) (((regs)->ps & 0x00000020)!=0) 120# define user_mode(regs) (((regs)->ps & 0x00000020)!=0)
diff --git a/include/asm-xtensa/shmparam.h b/include/asm-xtensa/shmparam.h
index d3b65bfa71c3..c8cc16c3da9e 100644
--- a/include/asm-xtensa/shmparam.h
+++ b/include/asm-xtensa/shmparam.h
@@ -9,8 +9,6 @@
9#ifndef _XTENSA_SHMPARAM_H 9#ifndef _XTENSA_SHMPARAM_H
10#define _XTENSA_SHMPARAM_H 10#define _XTENSA_SHMPARAM_H
11 11
12#include <asm/processor.h>
13
14/* 12/*
15 * Xtensa can have variable size caches, and if 13 * Xtensa can have variable size caches, and if
16 * the size of single way is larger than the page size, 14 * the size of single way is larger than the page size,
diff --git a/include/asm-xtensa/sigcontext.h b/include/asm-xtensa/sigcontext.h
index a75177291418..e3381cee5059 100644
--- a/include/asm-xtensa/sigcontext.h
+++ b/include/asm-xtensa/sigcontext.h
@@ -5,21 +5,12 @@
5 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details. 6 * for more details.
7 * 7 *
8 * Copyright (C) 2001 - 2003 Tensilica Inc. 8 * Copyright (C) 2001 - 2007 Tensilica Inc.
9 */ 9 */
10 10
11#ifndef _XTENSA_SIGCONTEXT_H 11#ifndef _XTENSA_SIGCONTEXT_H
12#define _XTENSA_SIGCONTEXT_H 12#define _XTENSA_SIGCONTEXT_H
13 13
14#define _ASMLANGUAGE
15#include <asm/processor.h>
16#include <asm/coprocessor.h>
17
18
19struct _cpstate {
20 unsigned char _cpstate[XTENSA_CP_EXTRA_SIZE];
21} __attribute__ ((aligned (XTENSA_CP_EXTRA_ALIGN)));
22
23 14
24struct sigcontext { 15struct sigcontext {
25 unsigned long oldmask; 16 unsigned long oldmask;
@@ -27,18 +18,13 @@ struct sigcontext {
27 /* CPU registers */ 18 /* CPU registers */
28 unsigned long sc_pc; 19 unsigned long sc_pc;
29 unsigned long sc_ps; 20 unsigned long sc_ps;
30 unsigned long sc_wmask;
31 unsigned long sc_windowbase;
32 unsigned long sc_windowstart;
33 unsigned long sc_lbeg; 21 unsigned long sc_lbeg;
34 unsigned long sc_lend; 22 unsigned long sc_lend;
35 unsigned long sc_lcount; 23 unsigned long sc_lcount;
36 unsigned long sc_sar; 24 unsigned long sc_sar;
37 unsigned long sc_depc; 25 unsigned long sc_acclo;
38 unsigned long sc_dareg0; 26 unsigned long sc_acchi;
39 unsigned long sc_treg[4]; 27 unsigned long sc_a[16];
40 unsigned long sc_areg[XCHAL_NUM_AREGS];
41 struct _cpstate *sc_cpstate;
42}; 28};
43 29
44#endif /* __ASM_XTENSA_SIGCONTEXT_H */ 30#endif /* _XTENSA_SIGCONTEXT_H */
diff --git a/include/asm-xtensa/thread_info.h b/include/asm-xtensa/thread_info.h
index 5ae34ab71597..3fa29799b435 100644
--- a/include/asm-xtensa/thread_info.h
+++ b/include/asm-xtensa/thread_info.h
@@ -116,6 +116,7 @@ static inline struct thread_info *current_thread_info(void)
116#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */ 116#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
117#define TIF_IRET 5 /* return with iret */ 117#define TIF_IRET 5 /* return with iret */
118#define TIF_MEMDIE 6 118#define TIF_MEMDIE 6
119#define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal() */
119#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 120#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
120 121
121#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 122#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
@@ -125,6 +126,7 @@ static inline struct thread_info *current_thread_info(void)
125#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) 126#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
126#define _TIF_IRET (1<<TIF_IRET) 127#define _TIF_IRET (1<<TIF_IRET)
127#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 128#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
129#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
128 130
129#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */ 131#define _TIF_WORK_MASK 0x0000FFFE /* work to do on interrupt/exception return */
130#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */ 132#define _TIF_ALLWORK_MASK 0x0000FFFF /* work to do on any return to u-space */
diff --git a/include/asm-xtensa/unistd.h b/include/asm-xtensa/unistd.h
index 8a7fb6964ce1..9bd34024431c 100644
--- a/include/asm-xtensa/unistd.h
+++ b/include/asm-xtensa/unistd.h
@@ -485,8 +485,8 @@ __SYSCALL(217, sys_sched_get_priority_min, 1)
485__SYSCALL(218, sys_sched_rr_get_interval, 2) 485__SYSCALL(218, sys_sched_rr_get_interval, 2)
486#define __NR_sched_yield 219 486#define __NR_sched_yield 219
487__SYSCALL(219, sys_sched_yield, 0) 487__SYSCALL(219, sys_sched_yield, 0)
488#define __NR_sigreturn 222 488#define __NR_available222 222
489__SYSCALL(222, xtensa_sigreturn, 0) 489__SYSCALL(222, sys_ni_syscall, 0)
490 490
491/* Signal Handling */ 491/* Signal Handling */
492 492