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-rw-r--r--include/asm-xtensa/atomic.h2
-rw-r--r--include/asm-xtensa/bitops.h2
-rw-r--r--include/asm-xtensa/hardirq.h1
-rw-r--r--include/asm-xtensa/semaphore.h49
-rw-r--r--include/asm-xtensa/system.h16
5 files changed, 14 insertions, 56 deletions
diff --git a/include/asm-xtensa/atomic.h b/include/asm-xtensa/atomic.h
index 24f86f0e43cf..12b5732dc6e5 100644
--- a/include/asm-xtensa/atomic.h
+++ b/include/asm-xtensa/atomic.h
@@ -22,7 +22,7 @@ typedef struct { volatile int counter; } atomic_t;
22#include <asm/processor.h> 22#include <asm/processor.h>
23#include <asm/system.h> 23#include <asm/system.h>
24 24
25#define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) 25#define ATOMIC_INIT(i) { (i) }
26 26
27/* 27/*
28 * This Xtensa implementation assumes that the right mechanism 28 * This Xtensa implementation assumes that the right mechanism
diff --git a/include/asm-xtensa/bitops.h b/include/asm-xtensa/bitops.h
index d395ef226c32..e76ee889e21d 100644
--- a/include/asm-xtensa/bitops.h
+++ b/include/asm-xtensa/bitops.h
@@ -174,7 +174,7 @@ static __inline__ int test_bit(int nr, const volatile void *addr)
174 return 1UL & (((const volatile unsigned int *)addr)[nr>>5] >> (nr&31)); 174 return 1UL & (((const volatile unsigned int *)addr)[nr>>5] >> (nr&31));
175} 175}
176 176
177#if XCHAL_HAVE_NSAU 177#if XCHAL_HAVE_NSA
178 178
179static __inline__ int __cntlz (unsigned long x) 179static __inline__ int __cntlz (unsigned long x)
180{ 180{
diff --git a/include/asm-xtensa/hardirq.h b/include/asm-xtensa/hardirq.h
index e07c76c36b95..aa9c1adf68d7 100644
--- a/include/asm-xtensa/hardirq.h
+++ b/include/asm-xtensa/hardirq.h
@@ -23,6 +23,7 @@ typedef struct {
23 unsigned int __nmi_count; /* arch dependent */ 23 unsigned int __nmi_count; /* arch dependent */
24} ____cacheline_aligned irq_cpustat_t; 24} ____cacheline_aligned irq_cpustat_t;
25 25
26void ack_bad_irq(unsigned int irq);
26#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ 27#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
27 28
28#endif /* _XTENSA_HARDIRQ_H */ 29#endif /* _XTENSA_HARDIRQ_H */
diff --git a/include/asm-xtensa/semaphore.h b/include/asm-xtensa/semaphore.h
index db740b8bc6f0..09e89ab3eb61 100644
--- a/include/asm-xtensa/semaphore.h
+++ b/include/asm-xtensa/semaphore.h
@@ -20,28 +20,19 @@ struct semaphore {
20 atomic_t count; 20 atomic_t count;
21 int sleepers; 21 int sleepers;
22 wait_queue_head_t wait; 22 wait_queue_head_t wait;
23#if WAITQUEUE_DEBUG
24 long __magic;
25#endif
26}; 23};
27 24
28#if WAITQUEUE_DEBUG 25#define __SEMAPHORE_INITIALIZER(name,n) \
29# define __SEM_DEBUG_INIT(name) \ 26{ \
30 , (int)&(name).__magic 27 .count = ATOMIC_INIT(n), \
31#else 28 .sleepers = 0, \
32# define __SEM_DEBUG_INIT(name) 29 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
33#endif 30}
34
35#define __SEMAPHORE_INITIALIZER(name,count) \
36 { ATOMIC_INIT(count), \
37 0, \
38 __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
39 __SEM_DEBUG_INIT(name) }
40 31
41#define __MUTEX_INITIALIZER(name) \ 32#define __MUTEX_INITIALIZER(name) \
42 __SEMAPHORE_INITIALIZER(name, 1) 33 __SEMAPHORE_INITIALIZER(name, 1)
43 34
44#define __DECLARE_SEMAPHORE_GENERIC(name,count) \ 35#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
45 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count) 36 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
46 37
47#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) 38#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
@@ -49,17 +40,8 @@ struct semaphore {
49 40
50static inline void sema_init (struct semaphore *sem, int val) 41static inline void sema_init (struct semaphore *sem, int val)
51{ 42{
52/*
53 * *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val);
54 *
55 * i'd rather use the more flexible initialization above, but sadly
56 * GCC 2.7.2.3 emits a bogus warning. EGCS doesnt. Oh well.
57 */
58 atomic_set(&sem->count, val); 43 atomic_set(&sem->count, val);
59 init_waitqueue_head(&sem->wait); 44 init_waitqueue_head(&sem->wait);
60#if WAITQUEUE_DEBUG
61 sem->__magic = (int)&sem->__magic;
62#endif
63} 45}
64 46
65static inline void init_MUTEX (struct semaphore *sem) 47static inline void init_MUTEX (struct semaphore *sem)
@@ -81,9 +63,7 @@ extern spinlock_t semaphore_wake_lock;
81 63
82static inline void down(struct semaphore * sem) 64static inline void down(struct semaphore * sem)
83{ 65{
84#if WAITQUEUE_DEBUG 66 might_sleep();
85 CHECK_MAGIC(sem->__magic);
86#endif
87 67
88 if (atomic_sub_return(1, &sem->count) < 0) 68 if (atomic_sub_return(1, &sem->count) < 0)
89 __down(sem); 69 __down(sem);
@@ -92,9 +72,8 @@ static inline void down(struct semaphore * sem)
92static inline int down_interruptible(struct semaphore * sem) 72static inline int down_interruptible(struct semaphore * sem)
93{ 73{
94 int ret = 0; 74 int ret = 0;
95#if WAITQUEUE_DEBUG 75
96 CHECK_MAGIC(sem->__magic); 76 might_sleep();
97#endif
98 77
99 if (atomic_sub_return(1, &sem->count) < 0) 78 if (atomic_sub_return(1, &sem->count) < 0)
100 ret = __down_interruptible(sem); 79 ret = __down_interruptible(sem);
@@ -104,9 +83,6 @@ static inline int down_interruptible(struct semaphore * sem)
104static inline int down_trylock(struct semaphore * sem) 83static inline int down_trylock(struct semaphore * sem)
105{ 84{
106 int ret = 0; 85 int ret = 0;
107#if WAITQUEUE_DEBUG
108 CHECK_MAGIC(sem->__magic);
109#endif
110 86
111 if (atomic_sub_return(1, &sem->count) < 0) 87 if (atomic_sub_return(1, &sem->count) < 0)
112 ret = __down_trylock(sem); 88 ret = __down_trylock(sem);
@@ -119,9 +95,6 @@ static inline int down_trylock(struct semaphore * sem)
119 */ 95 */
120static inline void up(struct semaphore * sem) 96static inline void up(struct semaphore * sem)
121{ 97{
122#if WAITQUEUE_DEBUG
123 CHECK_MAGIC(sem->__magic);
124#endif
125 if (atomic_add_return(1, &sem->count) <= 0) 98 if (atomic_add_return(1, &sem->count) <= 0)
126 __up(sem); 99 __up(sem);
127} 100}
diff --git a/include/asm-xtensa/system.h b/include/asm-xtensa/system.h
index f09393232e5e..9284867f1cb9 100644
--- a/include/asm-xtensa/system.h
+++ b/include/asm-xtensa/system.h
@@ -189,20 +189,6 @@ static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
189 189
190#define tas(ptr) (xchg((ptr),1)) 190#define tas(ptr) (xchg((ptr),1))
191 191
192#if ( __XCC__ == 1 )
193
194/* xt-xcc processes __inline__ differently than xt-gcc and decides to
195 * insert an out-of-line copy of function __xchg. This presents the
196 * unresolved symbol at link time of __xchg_called_with_bad_pointer,
197 * even though such a function would never be called at run-time.
198 * xt-gcc always inlines __xchg, and optimizes away the undefined
199 * bad_pointer function.
200 */
201
202#define xchg(ptr,x) xchg_u32(ptr,x)
203
204#else /* assume xt-gcc */
205
206#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) 192#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
207 193
208/* 194/*
@@ -224,8 +210,6 @@ __xchg(unsigned long x, volatile void * ptr, int size)
224 return x; 210 return x;
225} 211}
226 212
227#endif
228
229extern void set_except_vector(int n, void *addr); 213extern void set_except_vector(int n, void *addr);
230 214
231static inline void spill_registers(void) 215static inline void spill_registers(void)