diff options
Diffstat (limited to 'include/asm-xtensa/xtensa/xt2000-uart.h')
-rw-r--r-- | include/asm-xtensa/xtensa/xt2000-uart.h | 155 |
1 files changed, 155 insertions, 0 deletions
diff --git a/include/asm-xtensa/xtensa/xt2000-uart.h b/include/asm-xtensa/xtensa/xt2000-uart.h new file mode 100644 index 000000000000..0154460f0ed8 --- /dev/null +++ b/include/asm-xtensa/xtensa/xt2000-uart.h | |||
@@ -0,0 +1,155 @@ | |||
1 | #ifndef _uart_h_included_ | ||
2 | #define _uart_h_included_ | ||
3 | |||
4 | /* | ||
5 | * THIS FILE IS GENERATED -- DO NOT MODIFY BY HAND | ||
6 | * | ||
7 | * include/asm-xtensa/xtensa/xt2000-uart.h -- NatSemi PC16552D DUART | ||
8 | * definitions | ||
9 | * | ||
10 | * This file is subject to the terms and conditions of the GNU General Public | ||
11 | * License. See the file "COPYING" in the main directory of this archive | ||
12 | * for more details. | ||
13 | * | ||
14 | * Copyright (C) 2002 Tensilica Inc. | ||
15 | */ | ||
16 | |||
17 | |||
18 | #include <xtensa/xt2000.h> | ||
19 | |||
20 | |||
21 | /* 16550 UART DEVICE REGISTERS | ||
22 | The XT2000 board aligns each register to a 32-bit word but the UART device only uses | ||
23 | one byte of the word, which is the least-significant byte regardless of the | ||
24 | endianness of the core (ie. byte offset 0 for little-endian and 3 for big-endian). | ||
25 | So if using word accesses then endianness doesn't matter. | ||
26 | The macros provided here do that. | ||
27 | */ | ||
28 | struct uart_dev_s { | ||
29 | union { | ||
30 | unsigned int rxb; /* DLAB=0: receive buffer, read-only */ | ||
31 | unsigned int txb; /* DLAB=0: transmit buffer, write-only */ | ||
32 | unsigned int dll; /* DLAB=1: divisor, least-significant byte latch (was write-only?) */ | ||
33 | } w0; | ||
34 | union { | ||
35 | unsigned int ier; /* DLAB=0: interrupt-enable register (was write-only?) */ | ||
36 | unsigned int dlm; /* DLAB=1: divisor, most-significant byte latch (was write-only?) */ | ||
37 | } w1; | ||
38 | |||
39 | union { | ||
40 | unsigned int isr; /* DLAB=0: interrupt status register, read-only */ | ||
41 | unsigned int fcr; /* DLAB=0: FIFO control register, write-only */ | ||
42 | unsigned int afr; /* DLAB=1: alternate function register */ | ||
43 | } w2; | ||
44 | |||
45 | unsigned int lcr; /* line control-register, write-only */ | ||
46 | unsigned int mcr; /* modem control-regsiter, write-only */ | ||
47 | unsigned int lsr; /* line status register, read-only */ | ||
48 | unsigned int msr; /* modem status register, read-only */ | ||
49 | unsigned int scr; /* scratch regsiter, read/write */ | ||
50 | }; | ||
51 | |||
52 | #define _RXB(u) ((u)->w0.rxb) | ||
53 | #define _TXB(u) ((u)->w0.txb) | ||
54 | #define _DLL(u) ((u)->w0.dll) | ||
55 | #define _IER(u) ((u)->w1.ier) | ||
56 | #define _DLM(u) ((u)->w1.dlm) | ||
57 | #define _ISR(u) ((u)->w2.isr) | ||
58 | #define _FCR(u) ((u)->w2.fcr) | ||
59 | #define _AFR(u) ((u)->w2.afr) | ||
60 | #define _LCR(u) ((u)->lcr) | ||
61 | #define _MCR(u) ((u)->mcr) | ||
62 | #define _LSR(u) ((u)->lsr) | ||
63 | #define _MSR(u) ((u)->msr) | ||
64 | #define _SCR(u) ((u)->scr) | ||
65 | |||
66 | typedef volatile struct uart_dev_s uart_dev_t; | ||
67 | |||
68 | /* IER bits */ | ||
69 | #define RCVR_DATA_REG_INTENABLE 0x01 | ||
70 | #define XMIT_HOLD_REG_INTENABLE 0x02 | ||
71 | #define RCVR_STATUS_INTENABLE 0x04 | ||
72 | #define MODEM_STATUS_INTENABLE 0x08 | ||
73 | |||
74 | /* FCR bits */ | ||
75 | #define _FIFO_ENABLE 0x01 | ||
76 | #define RCVR_FIFO_RESET 0x02 | ||
77 | #define XMIT_FIFO_RESET 0x04 | ||
78 | #define DMA_MODE_SELECT 0x08 | ||
79 | #define RCVR_TRIGGER_LSB 0x40 | ||
80 | #define RCVR_TRIGGER_MSB 0x80 | ||
81 | |||
82 | /* AFR bits */ | ||
83 | #define AFR_CONC_WRITE 0x01 | ||
84 | #define AFR_BAUDOUT_SEL 0x02 | ||
85 | #define AFR_RXRDY_SEL 0x04 | ||
86 | |||
87 | /* ISR bits */ | ||
88 | #define INT_STATUS(r) ((r)&1) | ||
89 | #define INT_PRIORITY(r) (((r)>>1)&0x7) | ||
90 | |||
91 | /* LCR bits */ | ||
92 | #define WORD_LENGTH(n) (((n)-5)&0x3) | ||
93 | #define STOP_BIT_ENABLE 0x04 | ||
94 | #define PARITY_ENABLE 0x08 | ||
95 | #define EVEN_PARITY 0x10 | ||
96 | #define FORCE_PARITY 0x20 | ||
97 | #define XMIT_BREAK 0x40 | ||
98 | #define DLAB_ENABLE 0x80 | ||
99 | |||
100 | /* MCR bits */ | ||
101 | #define _DTR 0x01 | ||
102 | #define _RTS 0x02 | ||
103 | #define _OP1 0x04 | ||
104 | #define _OP2 0x08 | ||
105 | #define LOOP_BACK 0x10 | ||
106 | |||
107 | /* LSR Bits */ | ||
108 | #define RCVR_DATA_READY 0x01 | ||
109 | #define OVERRUN_ERROR 0x02 | ||
110 | #define PARITY_ERROR 0x04 | ||
111 | #define FRAMING_ERROR 0x08 | ||
112 | #define BREAK_INTERRUPT 0x10 | ||
113 | #define XMIT_HOLD_EMPTY 0x20 | ||
114 | #define XMIT_EMPTY 0x40 | ||
115 | #define FIFO_ERROR 0x80 | ||
116 | #define RCVR_READY(u) (_LSR(u)&RCVR_DATA_READY) | ||
117 | #define XMIT_READY(u) (_LSR(u)&XMIT_HOLD_EMPTY) | ||
118 | |||
119 | /* MSR bits */ | ||
120 | #define _RDR 0x01 | ||
121 | #define DELTA_DSR 0x02 | ||
122 | #define DELTA_RI 0x04 | ||
123 | #define DELTA_CD 0x08 | ||
124 | #define _CTS 0x10 | ||
125 | #define _DSR 0x20 | ||
126 | #define _RI 0x40 | ||
127 | #define _CD 0x80 | ||
128 | |||
129 | /* prototypes */ | ||
130 | void uart_init( uart_dev_t *u, int bitrate ); | ||
131 | void uart_out( uart_dev_t *u, char c ); | ||
132 | void uart_puts( uart_dev_t *u, char *s ); | ||
133 | char uart_in( uart_dev_t *u ); | ||
134 | void uart_enable_rcvr_int( uart_dev_t *u ); | ||
135 | void uart_disable_rcvr_int( uart_dev_t *u ); | ||
136 | |||
137 | #ifdef DUART16552_1_VADDR | ||
138 | /* DUART present. */ | ||
139 | #define DUART_1_BASE (*(uart_dev_t*)DUART16552_1_VADDR) | ||
140 | #define DUART_2_BASE (*(uart_dev_t*)DUART16552_2_VADDR) | ||
141 | #define UART1_PUTS(s) uart_puts( &DUART_1_BASE, s ) | ||
142 | #define UART2_PUTS(s) uart_puts( &DUART_2_BASE, s ) | ||
143 | #else | ||
144 | /* DUART not configured, use dummy placeholders to allow compiles to work. */ | ||
145 | #define DUART_1_BASE (*(uart_dev_t*)0) | ||
146 | #define DUART_2_BASE (*(uart_dev_t*)0) | ||
147 | #define UART1_PUTS(s) | ||
148 | #define UART2_PUTS(s) | ||
149 | #endif | ||
150 | |||
151 | /* Compute 16-bit divisor for baudrate generator, with rounding: */ | ||
152 | #define DUART_DIVISOR(crystal,speed) (((crystal)/16 + (speed)/2)/(speed)) | ||
153 | |||
154 | #endif /*_uart_h_included_*/ | ||
155 | |||