diff options
Diffstat (limited to 'include/asm-xtensa/tlbflush.h')
-rw-r--r-- | include/asm-xtensa/tlbflush.h | 42 |
1 files changed, 22 insertions, 20 deletions
diff --git a/include/asm-xtensa/tlbflush.h b/include/asm-xtensa/tlbflush.h index 43f6ec859af9..7c637b3c352c 100644 --- a/include/asm-xtensa/tlbflush.h +++ b/include/asm-xtensa/tlbflush.h | |||
@@ -11,12 +11,20 @@ | |||
11 | #ifndef _XTENSA_TLBFLUSH_H | 11 | #ifndef _XTENSA_TLBFLUSH_H |
12 | #define _XTENSA_TLBFLUSH_H | 12 | #define _XTENSA_TLBFLUSH_H |
13 | 13 | ||
14 | #define DEBUG_TLB | ||
15 | |||
16 | #ifdef __KERNEL__ | 14 | #ifdef __KERNEL__ |
17 | 15 | ||
18 | #include <asm/processor.h> | ||
19 | #include <linux/stringify.h> | 16 | #include <linux/stringify.h> |
17 | #include <asm/processor.h> | ||
18 | |||
19 | #define DTLB_WAY_PGD 7 | ||
20 | |||
21 | #define ITLB_ARF_WAYS 4 | ||
22 | #define DTLB_ARF_WAYS 4 | ||
23 | |||
24 | #define ITLB_HIT_BIT 3 | ||
25 | #define DTLB_HIT_BIT 4 | ||
26 | |||
27 | #ifndef __ASSEMBLY__ | ||
20 | 28 | ||
21 | /* TLB flushing: | 29 | /* TLB flushing: |
22 | * | 30 | * |
@@ -46,11 +54,6 @@ static inline void flush_tlb_pgtables(struct mm_struct *mm, | |||
46 | 54 | ||
47 | /* TLB operations. */ | 55 | /* TLB operations. */ |
48 | 56 | ||
49 | #define ITLB_WAYS_LOG2 XCHAL_ITLB_WAY_BITS | ||
50 | #define DTLB_WAYS_LOG2 XCHAL_DTLB_WAY_BITS | ||
51 | #define ITLB_PROBE_SUCCESS (1 << ITLB_WAYS_LOG2) | ||
52 | #define DTLB_PROBE_SUCCESS (1 << DTLB_WAYS_LOG2) | ||
53 | |||
54 | static inline unsigned long itlb_probe(unsigned long addr) | 57 | static inline unsigned long itlb_probe(unsigned long addr) |
55 | { | 58 | { |
56 | unsigned long tmp; | 59 | unsigned long tmp; |
@@ -131,29 +134,30 @@ static inline void write_itlb_entry (pte_t entry, int way) | |||
131 | 134 | ||
132 | static inline void invalidate_page_directory (void) | 135 | static inline void invalidate_page_directory (void) |
133 | { | 136 | { |
134 | invalidate_dtlb_entry (DTLB_WAY_PGTABLE); | 137 | invalidate_dtlb_entry (DTLB_WAY_PGD); |
138 | invalidate_dtlb_entry (DTLB_WAY_PGD+1); | ||
139 | invalidate_dtlb_entry (DTLB_WAY_PGD+2); | ||
135 | } | 140 | } |
136 | 141 | ||
137 | static inline void invalidate_itlb_mapping (unsigned address) | 142 | static inline void invalidate_itlb_mapping (unsigned address) |
138 | { | 143 | { |
139 | unsigned long tlb_entry; | 144 | unsigned long tlb_entry; |
140 | while ((tlb_entry = itlb_probe (address)) & ITLB_PROBE_SUCCESS) | 145 | if (((tlb_entry = itlb_probe(address)) & (1 << ITLB_HIT_BIT)) != 0) |
141 | invalidate_itlb_entry (tlb_entry); | 146 | invalidate_itlb_entry(tlb_entry); |
142 | } | 147 | } |
143 | 148 | ||
144 | static inline void invalidate_dtlb_mapping (unsigned address) | 149 | static inline void invalidate_dtlb_mapping (unsigned address) |
145 | { | 150 | { |
146 | unsigned long tlb_entry; | 151 | unsigned long tlb_entry; |
147 | while ((tlb_entry = dtlb_probe (address)) & DTLB_PROBE_SUCCESS) | 152 | if (((tlb_entry = dtlb_probe(address)) & (1 << DTLB_HIT_BIT)) != 0) |
148 | invalidate_dtlb_entry (tlb_entry); | 153 | invalidate_dtlb_entry(tlb_entry); |
149 | } | 154 | } |
150 | 155 | ||
151 | #define check_pgt_cache() do { } while (0) | 156 | #define check_pgt_cache() do { } while (0) |
152 | 157 | ||
153 | 158 | ||
154 | #ifdef DEBUG_TLB | 159 | /* |
155 | 160 | * DO NOT USE THESE FUNCTIONS. These instructions aren't part of the Xtensa | |
156 | /* DO NOT USE THESE FUNCTIONS. These instructions aren't part of the Xtensa | ||
157 | * ISA and exist only for test purposes.. | 161 | * ISA and exist only for test purposes.. |
158 | * You may find it helpful for MMU debugging, however. | 162 | * You may find it helpful for MMU debugging, however. |
159 | * | 163 | * |
@@ -193,8 +197,6 @@ static inline unsigned long read_itlb_translation (int way) | |||
193 | return tmp; | 197 | return tmp; |
194 | } | 198 | } |
195 | 199 | ||
196 | #endif /* DEBUG_TLB */ | 200 | #endif /* __ASSEMBLY__ */ |
197 | |||
198 | |||
199 | #endif /* __KERNEL__ */ | 201 | #endif /* __KERNEL__ */ |
200 | #endif /* _XTENSA_PGALLOC_H */ | 202 | #endif /* _XTENSA_TLBFLUSH_H */ |