1 files changed, 7 insertions, 10 deletions

diff --git a/include/asm-x86_64/apic.h b/include/asm-x86_64/apic.h
index 5647b7de1749..4f6a4dc455bb 100644
--- a/include/asm-x86_64/apic.h
+++ b/include/asm-x86_64/apic.h
@@ -42,11 +42,6 @@ static __inline void apic_write(unsigned long reg, unsigned int v)
         *((volatile unsigned int *)(APIC_BASE+reg)) = v;
 }
 
-static __inline void apic_write_atomic(unsigned long reg, unsigned int v)
-{
-        xchg((volatile unsigned int *)(APIC_BASE+reg), v);
-}
-
 static __inline unsigned int apic_read(unsigned long reg)
 {
         return *((volatile unsigned int *)(APIC_BASE+reg));
@@ -57,10 +52,6 @@ static __inline__ void apic_wait_icr_idle(void)
         while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY );
 }
 
-#define FORCE_READ_AROUND_WRITE 0
-#define apic_read_around(x)
-#define apic_write_around(x,y) apic_write((x),(y))
-
 static inline void ack_APIC_irq(void)
 {
         /*
@@ -71,7 +62,7 @@ static inline void ack_APIC_irq(void)
          */
 
         /* Docs say use 0 for future compatibility */
-        apic_write_around(APIC_EOI, 0);
+        apic_write(APIC_EOI, 0);
 }
 
 extern int get_maxlvt (void);
@@ -113,6 +104,12 @@ extern int disable_timer_pin_1;
 
 extern void setup_threshold_lvt(unsigned long lvt_off);
 
+void smp_send_timer_broadcast_ipi(void);
+void switch_APIC_timer_to_ipi(void *cpumask);
+void switch_ipi_to_APIC_timer(void *cpumask);
+
+#define ARCH_APICTIMER_STOPS_ON_C3      1
+
 #endif /* CONFIG_X86_LOCAL_APIC */
 
 extern unsigned boot_cpu_id;