diff options
Diffstat (limited to 'include/asm-x86')
162 files changed, 5509 insertions, 3539 deletions
diff --git a/include/asm-x86/acpi.h b/include/asm-x86/acpi.h index 14411c9de46f..635d764dc13e 100644 --- a/include/asm-x86/acpi.h +++ b/include/asm-x86/acpi.h | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <asm/numa.h> | 28 | #include <asm/numa.h> |
29 | #include <asm/processor.h> | 29 | #include <asm/processor.h> |
30 | #include <asm/mmu.h> | 30 | #include <asm/mmu.h> |
31 | #include <asm/mpspec.h> | ||
31 | 32 | ||
32 | #define COMPILER_DEPENDENT_INT64 long long | 33 | #define COMPILER_DEPENDENT_INT64 long long |
33 | #define COMPILER_DEPENDENT_UINT64 unsigned long long | 34 | #define COMPILER_DEPENDENT_UINT64 unsigned long long |
@@ -160,9 +161,7 @@ struct bootnode; | |||
160 | #ifdef CONFIG_ACPI_NUMA | 161 | #ifdef CONFIG_ACPI_NUMA |
161 | extern int acpi_numa; | 162 | extern int acpi_numa; |
162 | extern int acpi_scan_nodes(unsigned long start, unsigned long end); | 163 | extern int acpi_scan_nodes(unsigned long start, unsigned long end); |
163 | #ifdef CONFIG_X86_64 | 164 | #define NR_NODE_MEMBLKS (MAX_NUMNODES*2) |
164 | # define NR_NODE_MEMBLKS (MAX_NUMNODES*2) | ||
165 | #endif | ||
166 | extern void acpi_fake_nodes(const struct bootnode *fake_nodes, | 165 | extern void acpi_fake_nodes(const struct bootnode *fake_nodes, |
167 | int num_nodes); | 166 | int num_nodes); |
168 | #else | 167 | #else |
diff --git a/include/asm-x86/alternative.h b/include/asm-x86/alternative.h index 1f6a9ca10126..f6aa18eadf71 100644 --- a/include/asm-x86/alternative.h +++ b/include/asm-x86/alternative.h | |||
@@ -72,6 +72,8 @@ static inline void alternatives_smp_module_del(struct module *mod) {} | |||
72 | static inline void alternatives_smp_switch(int smp) {} | 72 | static inline void alternatives_smp_switch(int smp) {} |
73 | #endif /* CONFIG_SMP */ | 73 | #endif /* CONFIG_SMP */ |
74 | 74 | ||
75 | const unsigned char *const *find_nop_table(void); | ||
76 | |||
75 | /* | 77 | /* |
76 | * Alternative instructions for different CPU types or capabilities. | 78 | * Alternative instructions for different CPU types or capabilities. |
77 | * | 79 | * |
diff --git a/include/asm-x86/amd_iommu.h b/include/asm-x86/amd_iommu.h new file mode 100644 index 000000000000..30a12049353b --- /dev/null +++ b/include/asm-x86/amd_iommu.h | |||
@@ -0,0 +1,32 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | ||
3 | * Author: Joerg Roedel <joerg.roedel@amd.com> | ||
4 | * Leo Duran <leo.duran@amd.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License version 2 as published | ||
8 | * by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #ifndef _ASM_X86_AMD_IOMMU_H | ||
21 | #define _ASM_X86_AMD_IOMMU_H | ||
22 | |||
23 | #ifdef CONFIG_AMD_IOMMU | ||
24 | extern int amd_iommu_init(void); | ||
25 | extern int amd_iommu_init_dma_ops(void); | ||
26 | extern void amd_iommu_detect(void); | ||
27 | #else | ||
28 | static inline int amd_iommu_init(void) { return -ENODEV; } | ||
29 | static inline void amd_iommu_detect(void) { } | ||
30 | #endif | ||
31 | |||
32 | #endif | ||
diff --git a/include/asm-x86/amd_iommu_types.h b/include/asm-x86/amd_iommu_types.h new file mode 100644 index 000000000000..22aa58ca1991 --- /dev/null +++ b/include/asm-x86/amd_iommu_types.h | |||
@@ -0,0 +1,342 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. | ||
3 | * Author: Joerg Roedel <joerg.roedel@amd.com> | ||
4 | * Leo Duran <leo.duran@amd.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License version 2 as published | ||
8 | * by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #ifndef __AMD_IOMMU_TYPES_H__ | ||
21 | #define __AMD_IOMMU_TYPES_H__ | ||
22 | |||
23 | #include <linux/types.h> | ||
24 | #include <linux/list.h> | ||
25 | #include <linux/spinlock.h> | ||
26 | |||
27 | /* | ||
28 | * some size calculation constants | ||
29 | */ | ||
30 | #define DEV_TABLE_ENTRY_SIZE 32 | ||
31 | #define ALIAS_TABLE_ENTRY_SIZE 2 | ||
32 | #define RLOOKUP_TABLE_ENTRY_SIZE (sizeof(void *)) | ||
33 | |||
34 | /* helper macros */ | ||
35 | #define LOW_U32(x) ((x) & ((1ULL << 32)-1)) | ||
36 | |||
37 | /* Length of the MMIO region for the AMD IOMMU */ | ||
38 | #define MMIO_REGION_LENGTH 0x4000 | ||
39 | |||
40 | /* Capability offsets used by the driver */ | ||
41 | #define MMIO_CAP_HDR_OFFSET 0x00 | ||
42 | #define MMIO_RANGE_OFFSET 0x0c | ||
43 | |||
44 | /* Masks, shifts and macros to parse the device range capability */ | ||
45 | #define MMIO_RANGE_LD_MASK 0xff000000 | ||
46 | #define MMIO_RANGE_FD_MASK 0x00ff0000 | ||
47 | #define MMIO_RANGE_BUS_MASK 0x0000ff00 | ||
48 | #define MMIO_RANGE_LD_SHIFT 24 | ||
49 | #define MMIO_RANGE_FD_SHIFT 16 | ||
50 | #define MMIO_RANGE_BUS_SHIFT 8 | ||
51 | #define MMIO_GET_LD(x) (((x) & MMIO_RANGE_LD_MASK) >> MMIO_RANGE_LD_SHIFT) | ||
52 | #define MMIO_GET_FD(x) (((x) & MMIO_RANGE_FD_MASK) >> MMIO_RANGE_FD_SHIFT) | ||
53 | #define MMIO_GET_BUS(x) (((x) & MMIO_RANGE_BUS_MASK) >> MMIO_RANGE_BUS_SHIFT) | ||
54 | |||
55 | /* Flag masks for the AMD IOMMU exclusion range */ | ||
56 | #define MMIO_EXCL_ENABLE_MASK 0x01ULL | ||
57 | #define MMIO_EXCL_ALLOW_MASK 0x02ULL | ||
58 | |||
59 | /* Used offsets into the MMIO space */ | ||
60 | #define MMIO_DEV_TABLE_OFFSET 0x0000 | ||
61 | #define MMIO_CMD_BUF_OFFSET 0x0008 | ||
62 | #define MMIO_EVT_BUF_OFFSET 0x0010 | ||
63 | #define MMIO_CONTROL_OFFSET 0x0018 | ||
64 | #define MMIO_EXCL_BASE_OFFSET 0x0020 | ||
65 | #define MMIO_EXCL_LIMIT_OFFSET 0x0028 | ||
66 | #define MMIO_CMD_HEAD_OFFSET 0x2000 | ||
67 | #define MMIO_CMD_TAIL_OFFSET 0x2008 | ||
68 | #define MMIO_EVT_HEAD_OFFSET 0x2010 | ||
69 | #define MMIO_EVT_TAIL_OFFSET 0x2018 | ||
70 | #define MMIO_STATUS_OFFSET 0x2020 | ||
71 | |||
72 | /* feature control bits */ | ||
73 | #define CONTROL_IOMMU_EN 0x00ULL | ||
74 | #define CONTROL_HT_TUN_EN 0x01ULL | ||
75 | #define CONTROL_EVT_LOG_EN 0x02ULL | ||
76 | #define CONTROL_EVT_INT_EN 0x03ULL | ||
77 | #define CONTROL_COMWAIT_EN 0x04ULL | ||
78 | #define CONTROL_PASSPW_EN 0x08ULL | ||
79 | #define CONTROL_RESPASSPW_EN 0x09ULL | ||
80 | #define CONTROL_COHERENT_EN 0x0aULL | ||
81 | #define CONTROL_ISOC_EN 0x0bULL | ||
82 | #define CONTROL_CMDBUF_EN 0x0cULL | ||
83 | #define CONTROL_PPFLOG_EN 0x0dULL | ||
84 | #define CONTROL_PPFINT_EN 0x0eULL | ||
85 | |||
86 | /* command specific defines */ | ||
87 | #define CMD_COMPL_WAIT 0x01 | ||
88 | #define CMD_INV_DEV_ENTRY 0x02 | ||
89 | #define CMD_INV_IOMMU_PAGES 0x03 | ||
90 | |||
91 | #define CMD_COMPL_WAIT_STORE_MASK 0x01 | ||
92 | #define CMD_INV_IOMMU_PAGES_SIZE_MASK 0x01 | ||
93 | #define CMD_INV_IOMMU_PAGES_PDE_MASK 0x02 | ||
94 | |||
95 | #define CMD_INV_IOMMU_ALL_PAGES_ADDRESS 0x7fffffffffffffffULL | ||
96 | |||
97 | /* macros and definitions for device table entries */ | ||
98 | #define DEV_ENTRY_VALID 0x00 | ||
99 | #define DEV_ENTRY_TRANSLATION 0x01 | ||
100 | #define DEV_ENTRY_IR 0x3d | ||
101 | #define DEV_ENTRY_IW 0x3e | ||
102 | #define DEV_ENTRY_EX 0x67 | ||
103 | #define DEV_ENTRY_SYSMGT1 0x68 | ||
104 | #define DEV_ENTRY_SYSMGT2 0x69 | ||
105 | #define DEV_ENTRY_INIT_PASS 0xb8 | ||
106 | #define DEV_ENTRY_EINT_PASS 0xb9 | ||
107 | #define DEV_ENTRY_NMI_PASS 0xba | ||
108 | #define DEV_ENTRY_LINT0_PASS 0xbe | ||
109 | #define DEV_ENTRY_LINT1_PASS 0xbf | ||
110 | |||
111 | /* constants to configure the command buffer */ | ||
112 | #define CMD_BUFFER_SIZE 8192 | ||
113 | #define CMD_BUFFER_ENTRIES 512 | ||
114 | #define MMIO_CMD_SIZE_SHIFT 56 | ||
115 | #define MMIO_CMD_SIZE_512 (0x9ULL << MMIO_CMD_SIZE_SHIFT) | ||
116 | |||
117 | #define PAGE_MODE_1_LEVEL 0x01 | ||
118 | #define PAGE_MODE_2_LEVEL 0x02 | ||
119 | #define PAGE_MODE_3_LEVEL 0x03 | ||
120 | |||
121 | #define IOMMU_PDE_NL_0 0x000ULL | ||
122 | #define IOMMU_PDE_NL_1 0x200ULL | ||
123 | #define IOMMU_PDE_NL_2 0x400ULL | ||
124 | #define IOMMU_PDE_NL_3 0x600ULL | ||
125 | |||
126 | #define IOMMU_PTE_L2_INDEX(address) (((address) >> 30) & 0x1ffULL) | ||
127 | #define IOMMU_PTE_L1_INDEX(address) (((address) >> 21) & 0x1ffULL) | ||
128 | #define IOMMU_PTE_L0_INDEX(address) (((address) >> 12) & 0x1ffULL) | ||
129 | |||
130 | #define IOMMU_MAP_SIZE_L1 (1ULL << 21) | ||
131 | #define IOMMU_MAP_SIZE_L2 (1ULL << 30) | ||
132 | #define IOMMU_MAP_SIZE_L3 (1ULL << 39) | ||
133 | |||
134 | #define IOMMU_PTE_P (1ULL << 0) | ||
135 | #define IOMMU_PTE_U (1ULL << 59) | ||
136 | #define IOMMU_PTE_FC (1ULL << 60) | ||
137 | #define IOMMU_PTE_IR (1ULL << 61) | ||
138 | #define IOMMU_PTE_IW (1ULL << 62) | ||
139 | |||
140 | #define IOMMU_L1_PDE(address) \ | ||
141 | ((address) | IOMMU_PDE_NL_1 | IOMMU_PTE_P | IOMMU_PTE_IR | IOMMU_PTE_IW) | ||
142 | #define IOMMU_L2_PDE(address) \ | ||
143 | ((address) | IOMMU_PDE_NL_2 | IOMMU_PTE_P | IOMMU_PTE_IR | IOMMU_PTE_IW) | ||
144 | |||
145 | #define IOMMU_PAGE_MASK (((1ULL << 52) - 1) & ~0xfffULL) | ||
146 | #define IOMMU_PTE_PRESENT(pte) ((pte) & IOMMU_PTE_P) | ||
147 | #define IOMMU_PTE_PAGE(pte) (phys_to_virt((pte) & IOMMU_PAGE_MASK)) | ||
148 | #define IOMMU_PTE_MODE(pte) (((pte) >> 9) & 0x07) | ||
149 | |||
150 | #define IOMMU_PROT_MASK 0x03 | ||
151 | #define IOMMU_PROT_IR 0x01 | ||
152 | #define IOMMU_PROT_IW 0x02 | ||
153 | |||
154 | /* IOMMU capabilities */ | ||
155 | #define IOMMU_CAP_IOTLB 24 | ||
156 | #define IOMMU_CAP_NPCACHE 26 | ||
157 | |||
158 | #define MAX_DOMAIN_ID 65536 | ||
159 | |||
160 | /* | ||
161 | * This structure contains generic data for IOMMU protection domains | ||
162 | * independent of their use. | ||
163 | */ | ||
164 | struct protection_domain { | ||
165 | spinlock_t lock; /* mostly used to lock the page table*/ | ||
166 | u16 id; /* the domain id written to the device table */ | ||
167 | int mode; /* paging mode (0-6 levels) */ | ||
168 | u64 *pt_root; /* page table root pointer */ | ||
169 | void *priv; /* private data */ | ||
170 | }; | ||
171 | |||
172 | /* | ||
173 | * Data container for a dma_ops specific protection domain | ||
174 | */ | ||
175 | struct dma_ops_domain { | ||
176 | struct list_head list; | ||
177 | |||
178 | /* generic protection domain information */ | ||
179 | struct protection_domain domain; | ||
180 | |||
181 | /* size of the aperture for the mappings */ | ||
182 | unsigned long aperture_size; | ||
183 | |||
184 | /* address we start to search for free addresses */ | ||
185 | unsigned long next_bit; | ||
186 | |||
187 | /* address allocation bitmap */ | ||
188 | unsigned long *bitmap; | ||
189 | |||
190 | /* | ||
191 | * Array of PTE pages for the aperture. In this array we save all the | ||
192 | * leaf pages of the domain page table used for the aperture. This way | ||
193 | * we don't need to walk the page table to find a specific PTE. We can | ||
194 | * just calculate its address in constant time. | ||
195 | */ | ||
196 | u64 **pte_pages; | ||
197 | }; | ||
198 | |||
199 | /* | ||
200 | * Structure where we save information about one hardware AMD IOMMU in the | ||
201 | * system. | ||
202 | */ | ||
203 | struct amd_iommu { | ||
204 | struct list_head list; | ||
205 | |||
206 | /* locks the accesses to the hardware */ | ||
207 | spinlock_t lock; | ||
208 | |||
209 | /* device id of this IOMMU */ | ||
210 | u16 devid; | ||
211 | /* | ||
212 | * Capability pointer. There could be more than one IOMMU per PCI | ||
213 | * device function if there are more than one AMD IOMMU capability | ||
214 | * pointers. | ||
215 | */ | ||
216 | u16 cap_ptr; | ||
217 | |||
218 | /* physical address of MMIO space */ | ||
219 | u64 mmio_phys; | ||
220 | /* virtual address of MMIO space */ | ||
221 | u8 *mmio_base; | ||
222 | |||
223 | /* capabilities of that IOMMU read from ACPI */ | ||
224 | u32 cap; | ||
225 | |||
226 | /* first device this IOMMU handles. read from PCI */ | ||
227 | u16 first_device; | ||
228 | /* last device this IOMMU handles. read from PCI */ | ||
229 | u16 last_device; | ||
230 | |||
231 | /* start of exclusion range of that IOMMU */ | ||
232 | u64 exclusion_start; | ||
233 | /* length of exclusion range of that IOMMU */ | ||
234 | u64 exclusion_length; | ||
235 | |||
236 | /* command buffer virtual address */ | ||
237 | u8 *cmd_buf; | ||
238 | /* size of command buffer */ | ||
239 | u32 cmd_buf_size; | ||
240 | |||
241 | /* if one, we need to send a completion wait command */ | ||
242 | int need_sync; | ||
243 | |||
244 | /* default dma_ops domain for that IOMMU */ | ||
245 | struct dma_ops_domain *default_dom; | ||
246 | }; | ||
247 | |||
248 | /* | ||
249 | * List with all IOMMUs in the system. This list is not locked because it is | ||
250 | * only written and read at driver initialization or suspend time | ||
251 | */ | ||
252 | extern struct list_head amd_iommu_list; | ||
253 | |||
254 | /* | ||
255 | * Structure defining one entry in the device table | ||
256 | */ | ||
257 | struct dev_table_entry { | ||
258 | u32 data[8]; | ||
259 | }; | ||
260 | |||
261 | /* | ||
262 | * One entry for unity mappings parsed out of the ACPI table. | ||
263 | */ | ||
264 | struct unity_map_entry { | ||
265 | struct list_head list; | ||
266 | |||
267 | /* starting device id this entry is used for (including) */ | ||
268 | u16 devid_start; | ||
269 | /* end device id this entry is used for (including) */ | ||
270 | u16 devid_end; | ||
271 | |||
272 | /* start address to unity map (including) */ | ||
273 | u64 address_start; | ||
274 | /* end address to unity map (including) */ | ||
275 | u64 address_end; | ||
276 | |||
277 | /* required protection */ | ||
278 | int prot; | ||
279 | }; | ||
280 | |||
281 | /* | ||
282 | * List of all unity mappings. It is not locked because as runtime it is only | ||
283 | * read. It is created at ACPI table parsing time. | ||
284 | */ | ||
285 | extern struct list_head amd_iommu_unity_map; | ||
286 | |||
287 | /* | ||
288 | * Data structures for device handling | ||
289 | */ | ||
290 | |||
291 | /* | ||
292 | * Device table used by hardware. Read and write accesses by software are | ||
293 | * locked with the amd_iommu_pd_table lock. | ||
294 | */ | ||
295 | extern struct dev_table_entry *amd_iommu_dev_table; | ||
296 | |||
297 | /* | ||
298 | * Alias table to find requestor ids to device ids. Not locked because only | ||
299 | * read on runtime. | ||
300 | */ | ||
301 | extern u16 *amd_iommu_alias_table; | ||
302 | |||
303 | /* | ||
304 | * Reverse lookup table to find the IOMMU which translates a specific device. | ||
305 | */ | ||
306 | extern struct amd_iommu **amd_iommu_rlookup_table; | ||
307 | |||
308 | /* size of the dma_ops aperture as power of 2 */ | ||
309 | extern unsigned amd_iommu_aperture_order; | ||
310 | |||
311 | /* largest PCI device id we expect translation requests for */ | ||
312 | extern u16 amd_iommu_last_bdf; | ||
313 | |||
314 | /* data structures for protection domain handling */ | ||
315 | extern struct protection_domain **amd_iommu_pd_table; | ||
316 | |||
317 | /* allocation bitmap for domain ids */ | ||
318 | extern unsigned long *amd_iommu_pd_alloc_bitmap; | ||
319 | |||
320 | /* will be 1 if device isolation is enabled */ | ||
321 | extern int amd_iommu_isolate; | ||
322 | |||
323 | /* takes a PCI device id and prints it out in a readable form */ | ||
324 | static inline void print_devid(u16 devid, int nl) | ||
325 | { | ||
326 | int bus = devid >> 8; | ||
327 | int dev = devid >> 3 & 0x1f; | ||
328 | int fn = devid & 0x07; | ||
329 | |||
330 | printk("%02x:%02x.%x", bus, dev, fn); | ||
331 | if (nl) | ||
332 | printk("\n"); | ||
333 | } | ||
334 | |||
335 | /* takes bus and device/function and returns the device id | ||
336 | * FIXME: should that be in generic PCI code? */ | ||
337 | static inline u16 calc_devid(u8 bus, u8 devfn) | ||
338 | { | ||
339 | return (((u16)bus) << 8) | devfn; | ||
340 | } | ||
341 | |||
342 | #endif | ||
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h index be9639a9a186..133c998161ca 100644 --- a/include/asm-x86/apic.h +++ b/include/asm-x86/apic.h | |||
@@ -3,6 +3,8 @@ | |||
3 | 3 | ||
4 | #include <linux/pm.h> | 4 | #include <linux/pm.h> |
5 | #include <linux/delay.h> | 5 | #include <linux/delay.h> |
6 | |||
7 | #include <asm/alternative.h> | ||
6 | #include <asm/fixmap.h> | 8 | #include <asm/fixmap.h> |
7 | #include <asm/apicdef.h> | 9 | #include <asm/apicdef.h> |
8 | #include <asm/processor.h> | 10 | #include <asm/processor.h> |
@@ -10,8 +12,6 @@ | |||
10 | 12 | ||
11 | #define ARCH_APICTIMER_STOPS_ON_C3 1 | 13 | #define ARCH_APICTIMER_STOPS_ON_C3 1 |
12 | 14 | ||
13 | #define Dprintk(x...) | ||
14 | |||
15 | /* | 15 | /* |
16 | * Debugging macros | 16 | * Debugging macros |
17 | */ | 17 | */ |
@@ -35,16 +35,12 @@ extern void generic_apic_probe(void); | |||
35 | 35 | ||
36 | #ifdef CONFIG_X86_LOCAL_APIC | 36 | #ifdef CONFIG_X86_LOCAL_APIC |
37 | 37 | ||
38 | extern int apic_verbosity; | 38 | extern unsigned int apic_verbosity; |
39 | extern int timer_over_8254; | ||
40 | extern int local_apic_timer_c2_ok; | 39 | extern int local_apic_timer_c2_ok; |
41 | extern int local_apic_timer_disabled; | ||
42 | 40 | ||
43 | extern int apic_runs_main_timer; | ||
44 | extern int ioapic_force; | 41 | extern int ioapic_force; |
45 | extern int disable_apic; | ||
46 | extern int disable_apic_timer; | ||
47 | 42 | ||
43 | extern int disable_apic; | ||
48 | /* | 44 | /* |
49 | * Basic functions accessing APICs. | 45 | * Basic functions accessing APICs. |
50 | */ | 46 | */ |
@@ -52,7 +48,6 @@ extern int disable_apic_timer; | |||
52 | #include <asm/paravirt.h> | 48 | #include <asm/paravirt.h> |
53 | #else | 49 | #else |
54 | #define apic_write native_apic_write | 50 | #define apic_write native_apic_write |
55 | #define apic_write_atomic native_apic_write_atomic | ||
56 | #define apic_read native_apic_read | 51 | #define apic_read native_apic_read |
57 | #define setup_boot_clock setup_boot_APIC_clock | 52 | #define setup_boot_clock setup_boot_APIC_clock |
58 | #define setup_secondary_clock setup_secondary_APIC_clock | 53 | #define setup_secondary_clock setup_secondary_APIC_clock |
@@ -62,12 +57,11 @@ extern int is_vsmp_box(void); | |||
62 | 57 | ||
63 | static inline void native_apic_write(unsigned long reg, u32 v) | 58 | static inline void native_apic_write(unsigned long reg, u32 v) |
64 | { | 59 | { |
65 | *((volatile u32 *)(APIC_BASE + reg)) = v; | 60 | volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); |
66 | } | ||
67 | 61 | ||
68 | static inline void native_apic_write_atomic(unsigned long reg, u32 v) | 62 | alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP, |
69 | { | 63 | ASM_OUTPUT2("=r" (v), "=m" (*addr)), |
70 | (void)xchg((u32 *)(APIC_BASE + reg), v); | 64 | ASM_OUTPUT2("0" (v), "m" (*addr))); |
71 | } | 65 | } |
72 | 66 | ||
73 | static inline u32 native_apic_read(unsigned long reg) | 67 | static inline u32 native_apic_read(unsigned long reg) |
@@ -79,16 +73,6 @@ extern void apic_wait_icr_idle(void); | |||
79 | extern u32 safe_apic_wait_icr_idle(void); | 73 | extern u32 safe_apic_wait_icr_idle(void); |
80 | extern int get_physical_broadcast(void); | 74 | extern int get_physical_broadcast(void); |
81 | 75 | ||
82 | #ifdef CONFIG_X86_GOOD_APIC | ||
83 | # define FORCE_READ_AROUND_WRITE 0 | ||
84 | # define apic_read_around(x) | ||
85 | # define apic_write_around(x, y) apic_write((x), (y)) | ||
86 | #else | ||
87 | # define FORCE_READ_AROUND_WRITE 1 | ||
88 | # define apic_read_around(x) apic_read(x) | ||
89 | # define apic_write_around(x, y) apic_write_atomic((x), (y)) | ||
90 | #endif | ||
91 | |||
92 | static inline void ack_APIC_irq(void) | 76 | static inline void ack_APIC_irq(void) |
93 | { | 77 | { |
94 | /* | 78 | /* |
@@ -99,7 +83,7 @@ static inline void ack_APIC_irq(void) | |||
99 | */ | 83 | */ |
100 | 84 | ||
101 | /* Docs say use 0 for future compatibility */ | 85 | /* Docs say use 0 for future compatibility */ |
102 | apic_write_around(APIC_EOI, 0); | 86 | apic_write(APIC_EOI, 0); |
103 | } | 87 | } |
104 | 88 | ||
105 | extern int lapic_get_maxlvt(void); | 89 | extern int lapic_get_maxlvt(void); |
@@ -125,16 +109,22 @@ extern void enable_NMI_through_LVT0(void); | |||
125 | */ | 109 | */ |
126 | #ifdef CONFIG_X86_64 | 110 | #ifdef CONFIG_X86_64 |
127 | extern void early_init_lapic_mapping(void); | 111 | extern void early_init_lapic_mapping(void); |
112 | extern int apic_is_clustered_box(void); | ||
113 | #else | ||
114 | static inline int apic_is_clustered_box(void) | ||
115 | { | ||
116 | return 0; | ||
117 | } | ||
128 | #endif | 118 | #endif |
129 | 119 | ||
130 | extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); | 120 | extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); |
131 | extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); | 121 | extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); |
132 | 122 | ||
133 | extern int apic_is_clustered_box(void); | ||
134 | 123 | ||
135 | #else /* !CONFIG_X86_LOCAL_APIC */ | 124 | #else /* !CONFIG_X86_LOCAL_APIC */ |
136 | static inline void lapic_shutdown(void) { } | 125 | static inline void lapic_shutdown(void) { } |
137 | #define local_apic_timer_c2_ok 1 | 126 | #define local_apic_timer_c2_ok 1 |
127 | static inline void init_apic_mappings(void) { } | ||
138 | 128 | ||
139 | #endif /* !CONFIG_X86_LOCAL_APIC */ | 129 | #endif /* !CONFIG_X86_LOCAL_APIC */ |
140 | 130 | ||
diff --git a/include/asm-x86/arch_hooks.h b/include/asm-x86/arch_hooks.h index 768aee8a04ef..8411750ceb63 100644 --- a/include/asm-x86/arch_hooks.h +++ b/include/asm-x86/arch_hooks.h | |||
@@ -21,6 +21,7 @@ extern void intr_init_hook(void); | |||
21 | extern void pre_intr_init_hook(void); | 21 | extern void pre_intr_init_hook(void); |
22 | extern void pre_setup_arch_hook(void); | 22 | extern void pre_setup_arch_hook(void); |
23 | extern void trap_init_hook(void); | 23 | extern void trap_init_hook(void); |
24 | extern void pre_time_init_hook(void); | ||
24 | extern void time_init_hook(void); | 25 | extern void time_init_hook(void); |
25 | extern void mca_nmi_hook(void); | 26 | extern void mca_nmi_hook(void); |
26 | 27 | ||
diff --git a/include/asm-x86/asm.h b/include/asm-x86/asm.h index 90dec0c23646..97220321f39d 100644 --- a/include/asm-x86/asm.h +++ b/include/asm-x86/asm.h | |||
@@ -1,37 +1,40 @@ | |||
1 | #ifndef _ASM_X86_ASM_H | 1 | #ifndef _ASM_X86_ASM_H |
2 | #define _ASM_X86_ASM_H | 2 | #define _ASM_X86_ASM_H |
3 | 3 | ||
4 | #ifdef CONFIG_X86_32 | 4 | #ifdef __ASSEMBLY__ |
5 | /* 32 bits */ | 5 | # define __ASM_FORM(x) x |
6 | 6 | # define __ASM_EX_SEC .section __ex_table | |
7 | # define _ASM_PTR " .long " | ||
8 | # define _ASM_ALIGN " .balign 4 " | ||
9 | # define _ASM_MOV_UL " movl " | ||
10 | |||
11 | # define _ASM_INC " incl " | ||
12 | # define _ASM_DEC " decl " | ||
13 | # define _ASM_ADD " addl " | ||
14 | # define _ASM_SUB " subl " | ||
15 | # define _ASM_XADD " xaddl " | ||
16 | |||
17 | #else | 7 | #else |
18 | /* 64 bits */ | 8 | # define __ASM_FORM(x) " " #x " " |
9 | # define __ASM_EX_SEC " .section __ex_table,\"a\"\n" | ||
10 | #endif | ||
19 | 11 | ||
20 | # define _ASM_PTR " .quad " | 12 | #ifdef CONFIG_X86_32 |
21 | # define _ASM_ALIGN " .balign 8 " | 13 | # define __ASM_SEL(a,b) __ASM_FORM(a) |
22 | # define _ASM_MOV_UL " movq " | 14 | #else |
23 | 15 | # define __ASM_SEL(a,b) __ASM_FORM(b) | |
24 | # define _ASM_INC " incq " | 16 | #endif |
25 | # define _ASM_DEC " decq " | 17 | |
26 | # define _ASM_ADD " addq " | 18 | #define __ASM_SIZE(inst) __ASM_SEL(inst##l, inst##q) |
27 | # define _ASM_SUB " subq " | 19 | #define __ASM_REG(reg) __ASM_SEL(e##reg, r##reg) |
28 | # define _ASM_XADD " xaddq " | 20 | |
29 | 21 | #define _ASM_PTR __ASM_SEL(.long, .quad) | |
30 | #endif /* CONFIG_X86_32 */ | 22 | #define _ASM_ALIGN __ASM_SEL(.balign 4, .balign 8) |
23 | #define _ASM_MOV_UL __ASM_SIZE(mov) | ||
24 | |||
25 | #define _ASM_INC __ASM_SIZE(inc) | ||
26 | #define _ASM_DEC __ASM_SIZE(dec) | ||
27 | #define _ASM_ADD __ASM_SIZE(add) | ||
28 | #define _ASM_SUB __ASM_SIZE(sub) | ||
29 | #define _ASM_XADD __ASM_SIZE(xadd) | ||
30 | #define _ASM_AX __ASM_REG(ax) | ||
31 | #define _ASM_BX __ASM_REG(bx) | ||
32 | #define _ASM_CX __ASM_REG(cx) | ||
33 | #define _ASM_DX __ASM_REG(dx) | ||
31 | 34 | ||
32 | /* Exception table entry */ | 35 | /* Exception table entry */ |
33 | # define _ASM_EXTABLE(from,to) \ | 36 | # define _ASM_EXTABLE(from,to) \ |
34 | " .section __ex_table,\"a\"\n" \ | 37 | __ASM_EX_SEC \ |
35 | _ASM_ALIGN "\n" \ | 38 | _ASM_ALIGN "\n" \ |
36 | _ASM_PTR #from "," #to "\n" \ | 39 | _ASM_PTR #from "," #to "\n" \ |
37 | " .previous\n" | 40 | " .previous\n" |
diff --git a/include/asm-x86/atomic_64.h b/include/asm-x86/atomic_64.h index 3e0cd7d38335..a0095191c02e 100644 --- a/include/asm-x86/atomic_64.h +++ b/include/asm-x86/atomic_64.h | |||
@@ -11,12 +11,6 @@ | |||
11 | * resource counting etc.. | 11 | * resource counting etc.. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #ifdef CONFIG_SMP | ||
15 | #define LOCK "lock ; " | ||
16 | #else | ||
17 | #define LOCK "" | ||
18 | #endif | ||
19 | |||
20 | /* | 14 | /* |
21 | * Make sure gcc doesn't try to be clever and move things around | 15 | * Make sure gcc doesn't try to be clever and move things around |
22 | * on us. We need to use _exactly_ the address the user gave us, | 16 | * on us. We need to use _exactly_ the address the user gave us, |
@@ -431,6 +425,32 @@ static inline int atomic64_add_unless(atomic64_t *v, long a, long u) | |||
431 | return c != (u); | 425 | return c != (u); |
432 | } | 426 | } |
433 | 427 | ||
428 | /** | ||
429 | * atomic_inc_short - increment of a short integer | ||
430 | * @v: pointer to type int | ||
431 | * | ||
432 | * Atomically adds 1 to @v | ||
433 | * Returns the new value of @u | ||
434 | */ | ||
435 | static inline short int atomic_inc_short(short int *v) | ||
436 | { | ||
437 | asm(LOCK_PREFIX "addw $1, %0" : "+m" (*v)); | ||
438 | return *v; | ||
439 | } | ||
440 | |||
441 | /** | ||
442 | * atomic_or_long - OR of two long integers | ||
443 | * @v1: pointer to type unsigned long | ||
444 | * @v2: pointer to type unsigned long | ||
445 | * | ||
446 | * Atomically ORs @v1 and @v2 | ||
447 | * Returns the result of the OR | ||
448 | */ | ||
449 | static inline void atomic_or_long(unsigned long *v1, unsigned long v2) | ||
450 | { | ||
451 | asm(LOCK_PREFIX "orq %1, %0" : "+m" (*v1) : "r" (v2)); | ||
452 | } | ||
453 | |||
434 | #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) | 454 | #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) |
435 | 455 | ||
436 | /* These are x86-specific, used by some header files */ | 456 | /* These are x86-specific, used by some header files */ |
diff --git a/include/asm-x86/bios_ebda.h b/include/asm-x86/bios_ebda.h index b4a46b7be794..0033e50c13b2 100644 --- a/include/asm-x86/bios_ebda.h +++ b/include/asm-x86/bios_ebda.h | |||
@@ -14,4 +14,6 @@ static inline unsigned int get_bios_ebda(void) | |||
14 | return address; /* 0 means none */ | 14 | return address; /* 0 means none */ |
15 | } | 15 | } |
16 | 16 | ||
17 | void reserve_ebda_region(void); | ||
18 | |||
17 | #endif /* _MACH_BIOS_EBDA_H */ | 19 | #endif /* _MACH_BIOS_EBDA_H */ |
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h index ee4b3ead6a43..cfb2b64f76e7 100644 --- a/include/asm-x86/bitops.h +++ b/include/asm-x86/bitops.h | |||
@@ -23,11 +23,21 @@ | |||
23 | #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1) | 23 | #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1) |
24 | /* Technically wrong, but this avoids compilation errors on some gcc | 24 | /* Technically wrong, but this avoids compilation errors on some gcc |
25 | versions. */ | 25 | versions. */ |
26 | #define ADDR "=m" (*(volatile long *) addr) | 26 | #define BITOP_ADDR(x) "=m" (*(volatile long *) (x)) |
27 | #else | 27 | #else |
28 | #define ADDR "+m" (*(volatile long *) addr) | 28 | #define BITOP_ADDR(x) "+m" (*(volatile long *) (x)) |
29 | #endif | 29 | #endif |
30 | 30 | ||
31 | #define ADDR BITOP_ADDR(addr) | ||
32 | |||
33 | /* | ||
34 | * We do the locked ops that don't return the old value as | ||
35 | * a mask operation on a byte. | ||
36 | */ | ||
37 | #define IS_IMMEDIATE(nr) (__builtin_constant_p(nr)) | ||
38 | #define CONST_MASK_ADDR(nr, addr) BITOP_ADDR((void *)(addr) + ((nr)>>3)) | ||
39 | #define CONST_MASK(nr) (1 << ((nr) & 7)) | ||
40 | |||
31 | /** | 41 | /** |
32 | * set_bit - Atomically set a bit in memory | 42 | * set_bit - Atomically set a bit in memory |
33 | * @nr: the bit to set | 43 | * @nr: the bit to set |
@@ -43,9 +53,17 @@ | |||
43 | * Note that @nr may be almost arbitrarily large; this function is not | 53 | * Note that @nr may be almost arbitrarily large; this function is not |
44 | * restricted to acting on a single-word quantity. | 54 | * restricted to acting on a single-word quantity. |
45 | */ | 55 | */ |
46 | static inline void set_bit(int nr, volatile void *addr) | 56 | static inline void set_bit(unsigned int nr, volatile unsigned long *addr) |
47 | { | 57 | { |
48 | asm volatile(LOCK_PREFIX "bts %1,%0" : ADDR : "Ir" (nr) : "memory"); | 58 | if (IS_IMMEDIATE(nr)) { |
59 | asm volatile(LOCK_PREFIX "orb %1,%0" | ||
60 | : CONST_MASK_ADDR(nr, addr) | ||
61 | : "iq" ((u8)CONST_MASK(nr)) | ||
62 | : "memory"); | ||
63 | } else { | ||
64 | asm volatile(LOCK_PREFIX "bts %1,%0" | ||
65 | : BITOP_ADDR(addr) : "Ir" (nr) : "memory"); | ||
66 | } | ||
49 | } | 67 | } |
50 | 68 | ||
51 | /** | 69 | /** |
@@ -57,7 +75,7 @@ static inline void set_bit(int nr, volatile void *addr) | |||
57 | * If it's called on the same region of memory simultaneously, the effect | 75 | * If it's called on the same region of memory simultaneously, the effect |
58 | * may be that only one operation succeeds. | 76 | * may be that only one operation succeeds. |
59 | */ | 77 | */ |
60 | static inline void __set_bit(int nr, volatile void *addr) | 78 | static inline void __set_bit(int nr, volatile unsigned long *addr) |
61 | { | 79 | { |
62 | asm volatile("bts %1,%0" : ADDR : "Ir" (nr) : "memory"); | 80 | asm volatile("bts %1,%0" : ADDR : "Ir" (nr) : "memory"); |
63 | } | 81 | } |
@@ -72,9 +90,17 @@ static inline void __set_bit(int nr, volatile void *addr) | |||
72 | * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit() | 90 | * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit() |
73 | * in order to ensure changes are visible on other processors. | 91 | * in order to ensure changes are visible on other processors. |
74 | */ | 92 | */ |
75 | static inline void clear_bit(int nr, volatile void *addr) | 93 | static inline void clear_bit(int nr, volatile unsigned long *addr) |
76 | { | 94 | { |
77 | asm volatile(LOCK_PREFIX "btr %1,%0" : ADDR : "Ir" (nr)); | 95 | if (IS_IMMEDIATE(nr)) { |
96 | asm volatile(LOCK_PREFIX "andb %1,%0" | ||
97 | : CONST_MASK_ADDR(nr, addr) | ||
98 | : "iq" ((u8)~CONST_MASK(nr))); | ||
99 | } else { | ||
100 | asm volatile(LOCK_PREFIX "btr %1,%0" | ||
101 | : BITOP_ADDR(addr) | ||
102 | : "Ir" (nr)); | ||
103 | } | ||
78 | } | 104 | } |
79 | 105 | ||
80 | /* | 106 | /* |
@@ -85,13 +111,13 @@ static inline void clear_bit(int nr, volatile void *addr) | |||
85 | * clear_bit() is atomic and implies release semantics before the memory | 111 | * clear_bit() is atomic and implies release semantics before the memory |
86 | * operation. It can be used for an unlock. | 112 | * operation. It can be used for an unlock. |
87 | */ | 113 | */ |
88 | static inline void clear_bit_unlock(unsigned nr, volatile void *addr) | 114 | static inline void clear_bit_unlock(unsigned nr, volatile unsigned long *addr) |
89 | { | 115 | { |
90 | barrier(); | 116 | barrier(); |
91 | clear_bit(nr, addr); | 117 | clear_bit(nr, addr); |
92 | } | 118 | } |
93 | 119 | ||
94 | static inline void __clear_bit(int nr, volatile void *addr) | 120 | static inline void __clear_bit(int nr, volatile unsigned long *addr) |
95 | { | 121 | { |
96 | asm volatile("btr %1,%0" : ADDR : "Ir" (nr)); | 122 | asm volatile("btr %1,%0" : ADDR : "Ir" (nr)); |
97 | } | 123 | } |
@@ -108,7 +134,7 @@ static inline void __clear_bit(int nr, volatile void *addr) | |||
108 | * No memory barrier is required here, because x86 cannot reorder stores past | 134 | * No memory barrier is required here, because x86 cannot reorder stores past |
109 | * older loads. Same principle as spin_unlock. | 135 | * older loads. Same principle as spin_unlock. |
110 | */ | 136 | */ |
111 | static inline void __clear_bit_unlock(unsigned nr, volatile void *addr) | 137 | static inline void __clear_bit_unlock(unsigned nr, volatile unsigned long *addr) |
112 | { | 138 | { |
113 | barrier(); | 139 | barrier(); |
114 | __clear_bit(nr, addr); | 140 | __clear_bit(nr, addr); |
@@ -126,7 +152,7 @@ static inline void __clear_bit_unlock(unsigned nr, volatile void *addr) | |||
126 | * If it's called on the same region of memory simultaneously, the effect | 152 | * If it's called on the same region of memory simultaneously, the effect |
127 | * may be that only one operation succeeds. | 153 | * may be that only one operation succeeds. |
128 | */ | 154 | */ |
129 | static inline void __change_bit(int nr, volatile void *addr) | 155 | static inline void __change_bit(int nr, volatile unsigned long *addr) |
130 | { | 156 | { |
131 | asm volatile("btc %1,%0" : ADDR : "Ir" (nr)); | 157 | asm volatile("btc %1,%0" : ADDR : "Ir" (nr)); |
132 | } | 158 | } |
@@ -140,7 +166,7 @@ static inline void __change_bit(int nr, volatile void *addr) | |||
140 | * Note that @nr may be almost arbitrarily large; this function is not | 166 | * Note that @nr may be almost arbitrarily large; this function is not |
141 | * restricted to acting on a single-word quantity. | 167 | * restricted to acting on a single-word quantity. |
142 | */ | 168 | */ |
143 | static inline void change_bit(int nr, volatile void *addr) | 169 | static inline void change_bit(int nr, volatile unsigned long *addr) |
144 | { | 170 | { |
145 | asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr)); | 171 | asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr)); |
146 | } | 172 | } |
@@ -153,7 +179,7 @@ static inline void change_bit(int nr, volatile void *addr) | |||
153 | * This operation is atomic and cannot be reordered. | 179 | * This operation is atomic and cannot be reordered. |
154 | * It also implies a memory barrier. | 180 | * It also implies a memory barrier. |
155 | */ | 181 | */ |
156 | static inline int test_and_set_bit(int nr, volatile void *addr) | 182 | static inline int test_and_set_bit(int nr, volatile unsigned long *addr) |
157 | { | 183 | { |
158 | int oldbit; | 184 | int oldbit; |
159 | 185 | ||
@@ -170,7 +196,7 @@ static inline int test_and_set_bit(int nr, volatile void *addr) | |||
170 | * | 196 | * |
171 | * This is the same as test_and_set_bit on x86. | 197 | * This is the same as test_and_set_bit on x86. |
172 | */ | 198 | */ |
173 | static inline int test_and_set_bit_lock(int nr, volatile void *addr) | 199 | static inline int test_and_set_bit_lock(int nr, volatile unsigned long *addr) |
174 | { | 200 | { |
175 | return test_and_set_bit(nr, addr); | 201 | return test_and_set_bit(nr, addr); |
176 | } | 202 | } |
@@ -184,7 +210,7 @@ static inline int test_and_set_bit_lock(int nr, volatile void *addr) | |||
184 | * If two examples of this operation race, one can appear to succeed | 210 | * If two examples of this operation race, one can appear to succeed |
185 | * but actually fail. You must protect multiple accesses with a lock. | 211 | * but actually fail. You must protect multiple accesses with a lock. |
186 | */ | 212 | */ |
187 | static inline int __test_and_set_bit(int nr, volatile void *addr) | 213 | static inline int __test_and_set_bit(int nr, volatile unsigned long *addr) |
188 | { | 214 | { |
189 | int oldbit; | 215 | int oldbit; |
190 | 216 | ||
@@ -203,7 +229,7 @@ static inline int __test_and_set_bit(int nr, volatile void *addr) | |||
203 | * This operation is atomic and cannot be reordered. | 229 | * This operation is atomic and cannot be reordered. |
204 | * It also implies a memory barrier. | 230 | * It also implies a memory barrier. |
205 | */ | 231 | */ |
206 | static inline int test_and_clear_bit(int nr, volatile void *addr) | 232 | static inline int test_and_clear_bit(int nr, volatile unsigned long *addr) |
207 | { | 233 | { |
208 | int oldbit; | 234 | int oldbit; |
209 | 235 | ||
@@ -223,7 +249,7 @@ static inline int test_and_clear_bit(int nr, volatile void *addr) | |||
223 | * If two examples of this operation race, one can appear to succeed | 249 | * If two examples of this operation race, one can appear to succeed |
224 | * but actually fail. You must protect multiple accesses with a lock. | 250 | * but actually fail. You must protect multiple accesses with a lock. |
225 | */ | 251 | */ |
226 | static inline int __test_and_clear_bit(int nr, volatile void *addr) | 252 | static inline int __test_and_clear_bit(int nr, volatile unsigned long *addr) |
227 | { | 253 | { |
228 | int oldbit; | 254 | int oldbit; |
229 | 255 | ||
@@ -235,7 +261,7 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr) | |||
235 | } | 261 | } |
236 | 262 | ||
237 | /* WARNING: non atomic and it can be reordered! */ | 263 | /* WARNING: non atomic and it can be reordered! */ |
238 | static inline int __test_and_change_bit(int nr, volatile void *addr) | 264 | static inline int __test_and_change_bit(int nr, volatile unsigned long *addr) |
239 | { | 265 | { |
240 | int oldbit; | 266 | int oldbit; |
241 | 267 | ||
@@ -255,7 +281,7 @@ static inline int __test_and_change_bit(int nr, volatile void *addr) | |||
255 | * This operation is atomic and cannot be reordered. | 281 | * This operation is atomic and cannot be reordered. |
256 | * It also implies a memory barrier. | 282 | * It also implies a memory barrier. |
257 | */ | 283 | */ |
258 | static inline int test_and_change_bit(int nr, volatile void *addr) | 284 | static inline int test_and_change_bit(int nr, volatile unsigned long *addr) |
259 | { | 285 | { |
260 | int oldbit; | 286 | int oldbit; |
261 | 287 | ||
@@ -266,13 +292,13 @@ static inline int test_and_change_bit(int nr, volatile void *addr) | |||
266 | return oldbit; | 292 | return oldbit; |
267 | } | 293 | } |
268 | 294 | ||
269 | static inline int constant_test_bit(int nr, const volatile void *addr) | 295 | static inline int constant_test_bit(int nr, const volatile unsigned long *addr) |
270 | { | 296 | { |
271 | return ((1UL << (nr % BITS_PER_LONG)) & | 297 | return ((1UL << (nr % BITS_PER_LONG)) & |
272 | (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0; | 298 | (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0; |
273 | } | 299 | } |
274 | 300 | ||
275 | static inline int variable_test_bit(int nr, volatile const void *addr) | 301 | static inline int variable_test_bit(int nr, volatile const unsigned long *addr) |
276 | { | 302 | { |
277 | int oldbit; | 303 | int oldbit; |
278 | 304 | ||
@@ -330,7 +356,7 @@ static inline unsigned long ffz(unsigned long word) | |||
330 | * __fls: find last set bit in word | 356 | * __fls: find last set bit in word |
331 | * @word: The word to search | 357 | * @word: The word to search |
332 | * | 358 | * |
333 | * Undefined if no zero exists, so code should check against ~0UL first. | 359 | * Undefined if no set bit exists, so code should check against 0 first. |
334 | */ | 360 | */ |
335 | static inline unsigned long __fls(unsigned long word) | 361 | static inline unsigned long __fls(unsigned long word) |
336 | { | 362 | { |
diff --git a/include/asm-x86/bootparam.h b/include/asm-x86/bootparam.h index f62f4733606b..ae22bdf0ab14 100644 --- a/include/asm-x86/bootparam.h +++ b/include/asm-x86/bootparam.h | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | /* setup data types */ | 12 | /* setup data types */ |
13 | #define SETUP_NONE 0 | 13 | #define SETUP_NONE 0 |
14 | #define SETUP_E820_EXT 1 | ||
14 | 15 | ||
15 | /* extensible setup data list node */ | 16 | /* extensible setup data list node */ |
16 | struct setup_data { | 17 | struct setup_data { |
@@ -40,6 +41,7 @@ struct setup_header { | |||
40 | __u8 type_of_loader; | 41 | __u8 type_of_loader; |
41 | __u8 loadflags; | 42 | __u8 loadflags; |
42 | #define LOADED_HIGH (1<<0) | 43 | #define LOADED_HIGH (1<<0) |
44 | #define QUIET_FLAG (1<<5) | ||
43 | #define KEEP_SEGMENTS (1<<6) | 45 | #define KEEP_SEGMENTS (1<<6) |
44 | #define CAN_USE_HEAP (1<<7) | 46 | #define CAN_USE_HEAP (1<<7) |
45 | __u16 setup_move_size; | 47 | __u16 setup_move_size; |
diff --git a/include/asm-x86/calling.h b/include/asm-x86/calling.h index f13e62e2cb3e..2bc162e0ec6e 100644 --- a/include/asm-x86/calling.h +++ b/include/asm-x86/calling.h | |||
@@ -104,7 +104,7 @@ | |||
104 | .endif | 104 | .endif |
105 | .endm | 105 | .endm |
106 | 106 | ||
107 | .macro LOAD_ARGS offset | 107 | .macro LOAD_ARGS offset, skiprax=0 |
108 | movq \offset(%rsp), %r11 | 108 | movq \offset(%rsp), %r11 |
109 | movq \offset+8(%rsp), %r10 | 109 | movq \offset+8(%rsp), %r10 |
110 | movq \offset+16(%rsp), %r9 | 110 | movq \offset+16(%rsp), %r9 |
@@ -113,7 +113,10 @@ | |||
113 | movq \offset+48(%rsp), %rdx | 113 | movq \offset+48(%rsp), %rdx |
114 | movq \offset+56(%rsp), %rsi | 114 | movq \offset+56(%rsp), %rsi |
115 | movq \offset+64(%rsp), %rdi | 115 | movq \offset+64(%rsp), %rdi |
116 | .if \skiprax | ||
117 | .else | ||
116 | movq \offset+72(%rsp), %rax | 118 | movq \offset+72(%rsp), %rax |
119 | .endif | ||
117 | .endm | 120 | .endm |
118 | 121 | ||
119 | #define REST_SKIP 6*8 | 122 | #define REST_SKIP 6*8 |
@@ -165,4 +168,3 @@ | |||
165 | .macro icebp | 168 | .macro icebp |
166 | .byte 0xf1 | 169 | .byte 0xf1 |
167 | .endm | 170 | .endm |
168 | |||
diff --git a/include/asm-x86/cmpxchg_64.h b/include/asm-x86/cmpxchg_64.h index d9b26b9a28cf..17463ccf8166 100644 --- a/include/asm-x86/cmpxchg_64.h +++ b/include/asm-x86/cmpxchg_64.h | |||
@@ -93,6 +93,39 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, | |||
93 | return old; | 93 | return old; |
94 | } | 94 | } |
95 | 95 | ||
96 | /* | ||
97 | * Always use locked operations when touching memory shared with a | ||
98 | * hypervisor, since the system may be SMP even if the guest kernel | ||
99 | * isn't. | ||
100 | */ | ||
101 | static inline unsigned long __sync_cmpxchg(volatile void *ptr, | ||
102 | unsigned long old, | ||
103 | unsigned long new, int size) | ||
104 | { | ||
105 | unsigned long prev; | ||
106 | switch (size) { | ||
107 | case 1: | ||
108 | asm volatile("lock; cmpxchgb %b1,%2" | ||
109 | : "=a"(prev) | ||
110 | : "q"(new), "m"(*__xg(ptr)), "0"(old) | ||
111 | : "memory"); | ||
112 | return prev; | ||
113 | case 2: | ||
114 | asm volatile("lock; cmpxchgw %w1,%2" | ||
115 | : "=a"(prev) | ||
116 | : "r"(new), "m"(*__xg(ptr)), "0"(old) | ||
117 | : "memory"); | ||
118 | return prev; | ||
119 | case 4: | ||
120 | asm volatile("lock; cmpxchgl %1,%2" | ||
121 | : "=a"(prev) | ||
122 | : "r"(new), "m"(*__xg(ptr)), "0"(old) | ||
123 | : "memory"); | ||
124 | return prev; | ||
125 | } | ||
126 | return old; | ||
127 | } | ||
128 | |||
96 | static inline unsigned long __cmpxchg_local(volatile void *ptr, | 129 | static inline unsigned long __cmpxchg_local(volatile void *ptr, |
97 | unsigned long old, | 130 | unsigned long old, |
98 | unsigned long new, int size) | 131 | unsigned long new, int size) |
@@ -139,6 +172,10 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr, | |||
139 | ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ | 172 | ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ |
140 | (unsigned long)(n), \ | 173 | (unsigned long)(n), \ |
141 | sizeof(*(ptr)))) | 174 | sizeof(*(ptr)))) |
175 | #define sync_cmpxchg(ptr, o, n) \ | ||
176 | ((__typeof__(*(ptr)))__sync_cmpxchg((ptr), (unsigned long)(o), \ | ||
177 | (unsigned long)(n), \ | ||
178 | sizeof(*(ptr)))) | ||
142 | #define cmpxchg64_local(ptr, o, n) \ | 179 | #define cmpxchg64_local(ptr, o, n) \ |
143 | ({ \ | 180 | ({ \ |
144 | BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ | 181 | BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ |
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h index 0d609c837a41..2f5a792b0acc 100644 --- a/include/asm-x86/cpufeature.h +++ b/include/asm-x86/cpufeature.h | |||
@@ -74,11 +74,12 @@ | |||
74 | #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */ | 74 | #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */ |
75 | #define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */ | 75 | #define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */ |
76 | #define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ | 76 | #define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ |
77 | /* 14 free */ | 77 | #define X86_FEATURE_SYSCALL32 (3*32+14) /* syscall in ia32 userspace */ |
78 | /* 15 free */ | 78 | #define X86_FEATURE_SYSENTER32 (3*32+15) /* sysenter in ia32 userspace */ |
79 | #define X86_FEATURE_REP_GOOD (3*32+16) /* rep microcode works well on this CPU */ | 79 | #define X86_FEATURE_REP_GOOD (3*32+16) /* rep microcode works well on this CPU */ |
80 | #define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* Mfence synchronizes RDTSC */ | 80 | #define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* Mfence synchronizes RDTSC */ |
81 | #define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */ | 81 | #define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */ |
82 | #define X86_FEATURE_11AP (3*32+19) /* Bad local APIC aka 11AP */ | ||
82 | 83 | ||
83 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ | 84 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ |
84 | #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ | 85 | #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ |
@@ -106,6 +107,7 @@ | |||
106 | /* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */ | 107 | /* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */ |
107 | #define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ | 108 | #define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ |
108 | #define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ | 109 | #define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ |
110 | #define X86_FEATURE_IBS (6*32+ 10) /* Instruction Based Sampling */ | ||
109 | 111 | ||
110 | /* | 112 | /* |
111 | * Auxiliary flags: Linux defined - For features scattered in various | 113 | * Auxiliary flags: Linux defined - For features scattered in various |
@@ -142,11 +144,11 @@ extern const char * const x86_power_flags[32]; | |||
142 | #define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability)) | 144 | #define clear_cpu_cap(c, bit) clear_bit(bit, (unsigned long *)((c)->x86_capability)) |
143 | #define setup_clear_cpu_cap(bit) do { \ | 145 | #define setup_clear_cpu_cap(bit) do { \ |
144 | clear_cpu_cap(&boot_cpu_data, bit); \ | 146 | clear_cpu_cap(&boot_cpu_data, bit); \ |
145 | set_bit(bit, cleared_cpu_caps); \ | 147 | set_bit(bit, (unsigned long *)cleared_cpu_caps); \ |
146 | } while (0) | 148 | } while (0) |
147 | #define setup_force_cpu_cap(bit) do { \ | 149 | #define setup_force_cpu_cap(bit) do { \ |
148 | set_cpu_cap(&boot_cpu_data, bit); \ | 150 | set_cpu_cap(&boot_cpu_data, bit); \ |
149 | clear_bit(bit, cleared_cpu_caps); \ | 151 | clear_bit(bit, (unsigned long *)cleared_cpu_caps); \ |
150 | } while (0) | 152 | } while (0) |
151 | 153 | ||
152 | #define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU) | 154 | #define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU) |
diff --git a/include/asm-x86/current.h b/include/asm-x86/current.h index d2526d3f7346..7515c19d4988 100644 --- a/include/asm-x86/current.h +++ b/include/asm-x86/current.h | |||
@@ -1,5 +1,39 @@ | |||
1 | #ifndef _X86_CURRENT_H | ||
2 | #define _X86_CURRENT_H | ||
3 | |||
1 | #ifdef CONFIG_X86_32 | 4 | #ifdef CONFIG_X86_32 |
2 | # include "current_32.h" | 5 | #include <linux/compiler.h> |
3 | #else | 6 | #include <asm/percpu.h> |
4 | # include "current_64.h" | 7 | |
5 | #endif | 8 | struct task_struct; |
9 | |||
10 | DECLARE_PER_CPU(struct task_struct *, current_task); | ||
11 | static __always_inline struct task_struct *get_current(void) | ||
12 | { | ||
13 | return x86_read_percpu(current_task); | ||
14 | } | ||
15 | |||
16 | #else /* X86_32 */ | ||
17 | |||
18 | #ifndef __ASSEMBLY__ | ||
19 | #include <asm/pda.h> | ||
20 | |||
21 | struct task_struct; | ||
22 | |||
23 | static __always_inline struct task_struct *get_current(void) | ||
24 | { | ||
25 | return read_pda(pcurrent); | ||
26 | } | ||
27 | |||
28 | #else /* __ASSEMBLY__ */ | ||
29 | |||
30 | #include <asm/asm-offsets.h> | ||
31 | #define GET_CURRENT(reg) movq %gs:(pda_pcurrent),reg | ||
32 | |||
33 | #endif /* __ASSEMBLY__ */ | ||
34 | |||
35 | #endif /* X86_32 */ | ||
36 | |||
37 | #define current get_current() | ||
38 | |||
39 | #endif /* X86_CURRENT_H */ | ||
diff --git a/include/asm-x86/current_32.h b/include/asm-x86/current_32.h deleted file mode 100644 index 5af9bdb97a16..000000000000 --- a/include/asm-x86/current_32.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | #ifndef _I386_CURRENT_H | ||
2 | #define _I386_CURRENT_H | ||
3 | |||
4 | #include <linux/compiler.h> | ||
5 | #include <asm/percpu.h> | ||
6 | |||
7 | struct task_struct; | ||
8 | |||
9 | DECLARE_PER_CPU(struct task_struct *, current_task); | ||
10 | static __always_inline struct task_struct *get_current(void) | ||
11 | { | ||
12 | return x86_read_percpu(current_task); | ||
13 | } | ||
14 | |||
15 | #define current get_current() | ||
16 | |||
17 | #endif /* !(_I386_CURRENT_H) */ | ||
diff --git a/include/asm-x86/current_64.h b/include/asm-x86/current_64.h deleted file mode 100644 index 2d368ede2fc1..000000000000 --- a/include/asm-x86/current_64.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | #ifndef _X86_64_CURRENT_H | ||
2 | #define _X86_64_CURRENT_H | ||
3 | |||
4 | #if !defined(__ASSEMBLY__) | ||
5 | struct task_struct; | ||
6 | |||
7 | #include <asm/pda.h> | ||
8 | |||
9 | static inline struct task_struct *get_current(void) | ||
10 | { | ||
11 | struct task_struct *t = read_pda(pcurrent); | ||
12 | return t; | ||
13 | } | ||
14 | |||
15 | #define current get_current() | ||
16 | |||
17 | #else | ||
18 | |||
19 | #ifndef ASM_OFFSET_H | ||
20 | #include <asm/asm-offsets.h> | ||
21 | #endif | ||
22 | |||
23 | #define GET_CURRENT(reg) movq %gs:(pda_pcurrent),reg | ||
24 | |||
25 | #endif | ||
26 | |||
27 | #endif /* !(_X86_64_CURRENT_H) */ | ||
diff --git a/include/asm-x86/desc.h b/include/asm-x86/desc.h index 268a012bcd79..a44c4dc70590 100644 --- a/include/asm-x86/desc.h +++ b/include/asm-x86/desc.h | |||
@@ -29,11 +29,17 @@ static inline void fill_ldt(struct desc_struct *desc, | |||
29 | extern struct desc_ptr idt_descr; | 29 | extern struct desc_ptr idt_descr; |
30 | extern gate_desc idt_table[]; | 30 | extern gate_desc idt_table[]; |
31 | 31 | ||
32 | struct gdt_page { | ||
33 | struct desc_struct gdt[GDT_ENTRIES]; | ||
34 | } __attribute__((aligned(PAGE_SIZE))); | ||
35 | DECLARE_PER_CPU(struct gdt_page, gdt_page); | ||
36 | |||
37 | static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu) | ||
38 | { | ||
39 | return per_cpu(gdt_page, cpu).gdt; | ||
40 | } | ||
41 | |||
32 | #ifdef CONFIG_X86_64 | 42 | #ifdef CONFIG_X86_64 |
33 | extern struct desc_struct cpu_gdt_table[GDT_ENTRIES]; | ||
34 | extern struct desc_ptr cpu_gdt_descr[]; | ||
35 | /* the cpu gdt accessor */ | ||
36 | #define get_cpu_gdt_table(x) ((struct desc_struct *)cpu_gdt_descr[x].address) | ||
37 | 43 | ||
38 | static inline void pack_gate(gate_desc *gate, unsigned type, unsigned long func, | 44 | static inline void pack_gate(gate_desc *gate, unsigned type, unsigned long func, |
39 | unsigned dpl, unsigned ist, unsigned seg) | 45 | unsigned dpl, unsigned ist, unsigned seg) |
@@ -51,16 +57,6 @@ static inline void pack_gate(gate_desc *gate, unsigned type, unsigned long func, | |||
51 | } | 57 | } |
52 | 58 | ||
53 | #else | 59 | #else |
54 | struct gdt_page { | ||
55 | struct desc_struct gdt[GDT_ENTRIES]; | ||
56 | } __attribute__((aligned(PAGE_SIZE))); | ||
57 | DECLARE_PER_CPU(struct gdt_page, gdt_page); | ||
58 | |||
59 | static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu) | ||
60 | { | ||
61 | return per_cpu(gdt_page, cpu).gdt; | ||
62 | } | ||
63 | |||
64 | static inline void pack_gate(gate_desc *gate, unsigned char type, | 60 | static inline void pack_gate(gate_desc *gate, unsigned char type, |
65 | unsigned long base, unsigned dpl, unsigned flags, | 61 | unsigned long base, unsigned dpl, unsigned flags, |
66 | unsigned short seg) | 62 | unsigned short seg) |
@@ -192,8 +188,8 @@ static inline void native_set_ldt(const void *addr, unsigned int entries) | |||
192 | unsigned cpu = smp_processor_id(); | 188 | unsigned cpu = smp_processor_id(); |
193 | ldt_desc ldt; | 189 | ldt_desc ldt; |
194 | 190 | ||
195 | set_tssldt_descriptor(&ldt, (unsigned long)addr, | 191 | set_tssldt_descriptor(&ldt, (unsigned long)addr, DESC_LDT, |
196 | DESC_LDT, entries * sizeof(ldt) - 1); | 192 | entries * LDT_ENTRY_SIZE - 1); |
197 | write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, | 193 | write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, |
198 | &ldt, DESC_LDT); | 194 | &ldt, DESC_LDT); |
199 | asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8)); | 195 | asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8)); |
@@ -311,6 +307,28 @@ static inline void set_intr_gate(unsigned int n, void *addr) | |||
311 | _set_gate(n, GATE_INTERRUPT, addr, 0, 0, __KERNEL_CS); | 307 | _set_gate(n, GATE_INTERRUPT, addr, 0, 0, __KERNEL_CS); |
312 | } | 308 | } |
313 | 309 | ||
310 | #define SYS_VECTOR_FREE 0 | ||
311 | #define SYS_VECTOR_ALLOCED 1 | ||
312 | |||
313 | extern int first_system_vector; | ||
314 | extern char system_vectors[]; | ||
315 | |||
316 | static inline void alloc_system_vector(int vector) | ||
317 | { | ||
318 | if (system_vectors[vector] == SYS_VECTOR_FREE) { | ||
319 | system_vectors[vector] = SYS_VECTOR_ALLOCED; | ||
320 | if (first_system_vector > vector) | ||
321 | first_system_vector = vector; | ||
322 | } else | ||
323 | BUG(); | ||
324 | } | ||
325 | |||
326 | static inline void alloc_intr_gate(unsigned int n, void *addr) | ||
327 | { | ||
328 | alloc_system_vector(n); | ||
329 | set_intr_gate(n, addr); | ||
330 | } | ||
331 | |||
314 | /* | 332 | /* |
315 | * This routine sets up an interrupt gate at directory privilege level 3. | 333 | * This routine sets up an interrupt gate at directory privilege level 3. |
316 | */ | 334 | */ |
diff --git a/include/asm-x86/desc_defs.h b/include/asm-x86/desc_defs.h index eccb4ea1f918..f7bacf357dac 100644 --- a/include/asm-x86/desc_defs.h +++ b/include/asm-x86/desc_defs.h | |||
@@ -75,10 +75,14 @@ struct ldttss_desc64 { | |||
75 | typedef struct gate_struct64 gate_desc; | 75 | typedef struct gate_struct64 gate_desc; |
76 | typedef struct ldttss_desc64 ldt_desc; | 76 | typedef struct ldttss_desc64 ldt_desc; |
77 | typedef struct ldttss_desc64 tss_desc; | 77 | typedef struct ldttss_desc64 tss_desc; |
78 | #define gate_offset(g) ((g).offset_low | ((unsigned long)(g).offset_middle << 16) | ((unsigned long)(g).offset_high << 32)) | ||
79 | #define gate_segment(g) ((g).segment) | ||
78 | #else | 80 | #else |
79 | typedef struct desc_struct gate_desc; | 81 | typedef struct desc_struct gate_desc; |
80 | typedef struct desc_struct ldt_desc; | 82 | typedef struct desc_struct ldt_desc; |
81 | typedef struct desc_struct tss_desc; | 83 | typedef struct desc_struct tss_desc; |
84 | #define gate_offset(g) (((g).b & 0xffff0000) | ((g).a & 0x0000ffff)) | ||
85 | #define gate_segment(g) ((g).a >> 16) | ||
82 | #endif | 86 | #endif |
83 | 87 | ||
84 | struct desc_ptr { | 88 | struct desc_ptr { |
diff --git a/include/asm-x86/dma-mapping.h b/include/asm-x86/dma-mapping.h index a1a4dc7fe6ec..c2ddd3d1b883 100644 --- a/include/asm-x86/dma-mapping.h +++ b/include/asm-x86/dma-mapping.h | |||
@@ -14,7 +14,6 @@ extern dma_addr_t bad_dma_address; | |||
14 | extern int iommu_merge; | 14 | extern int iommu_merge; |
15 | extern struct device fallback_dev; | 15 | extern struct device fallback_dev; |
16 | extern int panic_on_overflow; | 16 | extern int panic_on_overflow; |
17 | extern int forbid_dac; | ||
18 | extern int force_iommu; | 17 | extern int force_iommu; |
19 | 18 | ||
20 | struct dma_mapping_ops { | 19 | struct dma_mapping_ops { |
diff --git a/include/asm-x86/dmi.h b/include/asm-x86/dmi.h index 4edf7514a750..58a86571fe0f 100644 --- a/include/asm-x86/dmi.h +++ b/include/asm-x86/dmi.h | |||
@@ -3,12 +3,6 @@ | |||
3 | 3 | ||
4 | #include <asm/io.h> | 4 | #include <asm/io.h> |
5 | 5 | ||
6 | #ifdef CONFIG_X86_32 | ||
7 | |||
8 | #define dmi_alloc alloc_bootmem | ||
9 | |||
10 | #else /* CONFIG_X86_32 */ | ||
11 | |||
12 | #define DMI_MAX_DATA 2048 | 6 | #define DMI_MAX_DATA 2048 |
13 | 7 | ||
14 | extern int dmi_alloc_index; | 8 | extern int dmi_alloc_index; |
@@ -25,8 +19,6 @@ static inline void *dmi_alloc(unsigned len) | |||
25 | return dmi_alloc_data + idx; | 19 | return dmi_alloc_data + idx; |
26 | } | 20 | } |
27 | 21 | ||
28 | #endif | ||
29 | |||
30 | /* Use early IO mappings for DMI because it's initialized early */ | 22 | /* Use early IO mappings for DMI because it's initialized early */ |
31 | #define dmi_ioremap early_ioremap | 23 | #define dmi_ioremap early_ioremap |
32 | #define dmi_iounmap early_iounmap | 24 | #define dmi_iounmap early_iounmap |
diff --git a/include/asm-x86/dwarf2.h b/include/asm-x86/dwarf2.h index b3cbb0ccae18..738bb9fb3e53 100644 --- a/include/asm-x86/dwarf2.h +++ b/include/asm-x86/dwarf2.h | |||
@@ -1,5 +1,61 @@ | |||
1 | #ifdef CONFIG_X86_32 | 1 | #ifndef _DWARF2_H |
2 | # include "dwarf2_32.h" | 2 | #define _DWARF2_H |
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | #warning "asm/dwarf2.h should be only included in pure assembly files" | ||
6 | #endif | ||
7 | |||
8 | /* | ||
9 | Macros for dwarf2 CFI unwind table entries. | ||
10 | See "as.info" for details on these pseudo ops. Unfortunately | ||
11 | they are only supported in very new binutils, so define them | ||
12 | away for older version. | ||
13 | */ | ||
14 | |||
15 | #ifdef CONFIG_AS_CFI | ||
16 | |||
17 | #define CFI_STARTPROC .cfi_startproc | ||
18 | #define CFI_ENDPROC .cfi_endproc | ||
19 | #define CFI_DEF_CFA .cfi_def_cfa | ||
20 | #define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register | ||
21 | #define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset | ||
22 | #define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset | ||
23 | #define CFI_OFFSET .cfi_offset | ||
24 | #define CFI_REL_OFFSET .cfi_rel_offset | ||
25 | #define CFI_REGISTER .cfi_register | ||
26 | #define CFI_RESTORE .cfi_restore | ||
27 | #define CFI_REMEMBER_STATE .cfi_remember_state | ||
28 | #define CFI_RESTORE_STATE .cfi_restore_state | ||
29 | #define CFI_UNDEFINED .cfi_undefined | ||
30 | |||
31 | #ifdef CONFIG_AS_CFI_SIGNAL_FRAME | ||
32 | #define CFI_SIGNAL_FRAME .cfi_signal_frame | ||
33 | #else | ||
34 | #define CFI_SIGNAL_FRAME | ||
35 | #endif | ||
36 | |||
3 | #else | 37 | #else |
4 | # include "dwarf2_64.h" | 38 | |
39 | /* Due to the structure of pre-exisiting code, don't use assembler line | ||
40 | comment character # to ignore the arguments. Instead, use a dummy macro. */ | ||
41 | .macro cfi_ignore a=0, b=0, c=0, d=0 | ||
42 | .endm | ||
43 | |||
44 | #define CFI_STARTPROC cfi_ignore | ||
45 | #define CFI_ENDPROC cfi_ignore | ||
46 | #define CFI_DEF_CFA cfi_ignore | ||
47 | #define CFI_DEF_CFA_REGISTER cfi_ignore | ||
48 | #define CFI_DEF_CFA_OFFSET cfi_ignore | ||
49 | #define CFI_ADJUST_CFA_OFFSET cfi_ignore | ||
50 | #define CFI_OFFSET cfi_ignore | ||
51 | #define CFI_REL_OFFSET cfi_ignore | ||
52 | #define CFI_REGISTER cfi_ignore | ||
53 | #define CFI_RESTORE cfi_ignore | ||
54 | #define CFI_REMEMBER_STATE cfi_ignore | ||
55 | #define CFI_RESTORE_STATE cfi_ignore | ||
56 | #define CFI_UNDEFINED cfi_ignore | ||
57 | #define CFI_SIGNAL_FRAME cfi_ignore | ||
58 | |||
59 | #endif | ||
60 | |||
5 | #endif | 61 | #endif |
diff --git a/include/asm-x86/dwarf2_32.h b/include/asm-x86/dwarf2_32.h deleted file mode 100644 index 6d66398a307d..000000000000 --- a/include/asm-x86/dwarf2_32.h +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | #ifndef _DWARF2_H | ||
2 | #define _DWARF2_H | ||
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | #warning "asm/dwarf2.h should be only included in pure assembly files" | ||
6 | #endif | ||
7 | |||
8 | /* | ||
9 | Macros for dwarf2 CFI unwind table entries. | ||
10 | See "as.info" for details on these pseudo ops. Unfortunately | ||
11 | they are only supported in very new binutils, so define them | ||
12 | away for older version. | ||
13 | */ | ||
14 | |||
15 | #ifdef CONFIG_UNWIND_INFO | ||
16 | |||
17 | #define CFI_STARTPROC .cfi_startproc | ||
18 | #define CFI_ENDPROC .cfi_endproc | ||
19 | #define CFI_DEF_CFA .cfi_def_cfa | ||
20 | #define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register | ||
21 | #define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset | ||
22 | #define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset | ||
23 | #define CFI_OFFSET .cfi_offset | ||
24 | #define CFI_REL_OFFSET .cfi_rel_offset | ||
25 | #define CFI_REGISTER .cfi_register | ||
26 | #define CFI_RESTORE .cfi_restore | ||
27 | #define CFI_REMEMBER_STATE .cfi_remember_state | ||
28 | #define CFI_RESTORE_STATE .cfi_restore_state | ||
29 | #define CFI_UNDEFINED .cfi_undefined | ||
30 | |||
31 | #ifdef CONFIG_AS_CFI_SIGNAL_FRAME | ||
32 | #define CFI_SIGNAL_FRAME .cfi_signal_frame | ||
33 | #else | ||
34 | #define CFI_SIGNAL_FRAME | ||
35 | #endif | ||
36 | |||
37 | #else | ||
38 | |||
39 | /* Due to the structure of pre-exisiting code, don't use assembler line | ||
40 | comment character # to ignore the arguments. Instead, use a dummy macro. */ | ||
41 | .macro ignore a=0, b=0, c=0, d=0 | ||
42 | .endm | ||
43 | |||
44 | #define CFI_STARTPROC ignore | ||
45 | #define CFI_ENDPROC ignore | ||
46 | #define CFI_DEF_CFA ignore | ||
47 | #define CFI_DEF_CFA_REGISTER ignore | ||
48 | #define CFI_DEF_CFA_OFFSET ignore | ||
49 | #define CFI_ADJUST_CFA_OFFSET ignore | ||
50 | #define CFI_OFFSET ignore | ||
51 | #define CFI_REL_OFFSET ignore | ||
52 | #define CFI_REGISTER ignore | ||
53 | #define CFI_RESTORE ignore | ||
54 | #define CFI_REMEMBER_STATE ignore | ||
55 | #define CFI_RESTORE_STATE ignore | ||
56 | #define CFI_UNDEFINED ignore | ||
57 | #define CFI_SIGNAL_FRAME ignore | ||
58 | |||
59 | #endif | ||
60 | |||
61 | #endif | ||
diff --git a/include/asm-x86/dwarf2_64.h b/include/asm-x86/dwarf2_64.h deleted file mode 100644 index c950519a264d..000000000000 --- a/include/asm-x86/dwarf2_64.h +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | #ifndef _DWARF2_H | ||
2 | #define _DWARF2_H 1 | ||
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | #warning "asm/dwarf2.h should be only included in pure assembly files" | ||
6 | #endif | ||
7 | |||
8 | /* | ||
9 | Macros for dwarf2 CFI unwind table entries. | ||
10 | See "as.info" for details on these pseudo ops. Unfortunately | ||
11 | they are only supported in very new binutils, so define them | ||
12 | away for older version. | ||
13 | */ | ||
14 | |||
15 | #ifdef CONFIG_AS_CFI | ||
16 | |||
17 | #define CFI_STARTPROC .cfi_startproc | ||
18 | #define CFI_ENDPROC .cfi_endproc | ||
19 | #define CFI_DEF_CFA .cfi_def_cfa | ||
20 | #define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register | ||
21 | #define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset | ||
22 | #define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset | ||
23 | #define CFI_OFFSET .cfi_offset | ||
24 | #define CFI_REL_OFFSET .cfi_rel_offset | ||
25 | #define CFI_REGISTER .cfi_register | ||
26 | #define CFI_RESTORE .cfi_restore | ||
27 | #define CFI_REMEMBER_STATE .cfi_remember_state | ||
28 | #define CFI_RESTORE_STATE .cfi_restore_state | ||
29 | #define CFI_UNDEFINED .cfi_undefined | ||
30 | #ifdef CONFIG_AS_CFI_SIGNAL_FRAME | ||
31 | #define CFI_SIGNAL_FRAME .cfi_signal_frame | ||
32 | #else | ||
33 | #define CFI_SIGNAL_FRAME | ||
34 | #endif | ||
35 | |||
36 | #else | ||
37 | |||
38 | /* use assembler line comment character # to ignore the arguments. */ | ||
39 | #define CFI_STARTPROC # | ||
40 | #define CFI_ENDPROC # | ||
41 | #define CFI_DEF_CFA # | ||
42 | #define CFI_DEF_CFA_REGISTER # | ||
43 | #define CFI_DEF_CFA_OFFSET # | ||
44 | #define CFI_ADJUST_CFA_OFFSET # | ||
45 | #define CFI_OFFSET # | ||
46 | #define CFI_REL_OFFSET # | ||
47 | #define CFI_REGISTER # | ||
48 | #define CFI_RESTORE # | ||
49 | #define CFI_REMEMBER_STATE # | ||
50 | #define CFI_RESTORE_STATE # | ||
51 | #define CFI_UNDEFINED # | ||
52 | #define CFI_SIGNAL_FRAME # | ||
53 | |||
54 | #endif | ||
55 | |||
56 | #endif | ||
diff --git a/include/asm-x86/e820.h b/include/asm-x86/e820.h index 7004251fc66b..16a31e2c7c57 100644 --- a/include/asm-x86/e820.h +++ b/include/asm-x86/e820.h | |||
@@ -2,6 +2,41 @@ | |||
2 | #define __ASM_E820_H | 2 | #define __ASM_E820_H |
3 | #define E820MAP 0x2d0 /* our map */ | 3 | #define E820MAP 0x2d0 /* our map */ |
4 | #define E820MAX 128 /* number of entries in E820MAP */ | 4 | #define E820MAX 128 /* number of entries in E820MAP */ |
5 | |||
6 | /* | ||
7 | * Legacy E820 BIOS limits us to 128 (E820MAX) nodes due to the | ||
8 | * constrained space in the zeropage. If we have more nodes than | ||
9 | * that, and if we've booted off EFI firmware, then the EFI tables | ||
10 | * passed us from the EFI firmware can list more nodes. Size our | ||
11 | * internal memory map tables to have room for these additional | ||
12 | * nodes, based on up to three entries per node for which the | ||
13 | * kernel was built: MAX_NUMNODES == (1 << CONFIG_NODES_SHIFT), | ||
14 | * plus E820MAX, allowing space for the possible duplicate E820 | ||
15 | * entries that might need room in the same arrays, prior to the | ||
16 | * call to sanitize_e820_map() to remove duplicates. The allowance | ||
17 | * of three memory map entries per node is "enough" entries for | ||
18 | * the initial hardware platform motivating this mechanism to make | ||
19 | * use of additional EFI map entries. Future platforms may want | ||
20 | * to allow more than three entries per node or otherwise refine | ||
21 | * this size. | ||
22 | */ | ||
23 | |||
24 | /* | ||
25 | * Odd: 'make headers_check' complains about numa.h if I try | ||
26 | * to collapse the next two #ifdef lines to a single line: | ||
27 | * #if defined(__KERNEL__) && defined(CONFIG_EFI) | ||
28 | */ | ||
29 | #ifdef __KERNEL__ | ||
30 | #ifdef CONFIG_EFI | ||
31 | #include <linux/numa.h> | ||
32 | #define E820_X_MAX (E820MAX + 3 * MAX_NUMNODES) | ||
33 | #else /* ! CONFIG_EFI */ | ||
34 | #define E820_X_MAX E820MAX | ||
35 | #endif | ||
36 | #else /* ! __KERNEL__ */ | ||
37 | #define E820_X_MAX E820MAX | ||
38 | #endif | ||
39 | |||
5 | #define E820NR 0x1e8 /* # entries in E820MAP */ | 40 | #define E820NR 0x1e8 /* # entries in E820MAP */ |
6 | 41 | ||
7 | #define E820_RAM 1 | 42 | #define E820_RAM 1 |
@@ -9,6 +44,9 @@ | |||
9 | #define E820_ACPI 3 | 44 | #define E820_ACPI 3 |
10 | #define E820_NVS 4 | 45 | #define E820_NVS 4 |
11 | 46 | ||
47 | /* reserved RAM used by kernel itself */ | ||
48 | #define E820_RESERVED_KERN 128 | ||
49 | |||
12 | #ifndef __ASSEMBLY__ | 50 | #ifndef __ASSEMBLY__ |
13 | struct e820entry { | 51 | struct e820entry { |
14 | __u64 addr; /* start of memory segment */ | 52 | __u64 addr; /* start of memory segment */ |
@@ -18,22 +56,88 @@ struct e820entry { | |||
18 | 56 | ||
19 | struct e820map { | 57 | struct e820map { |
20 | __u32 nr_map; | 58 | __u32 nr_map; |
21 | struct e820entry map[E820MAX]; | 59 | struct e820entry map[E820_X_MAX]; |
22 | }; | 60 | }; |
61 | |||
62 | #ifdef __KERNEL__ | ||
63 | /* see comment in arch/x86/kernel/e820.c */ | ||
64 | extern struct e820map e820; | ||
65 | extern struct e820map e820_saved; | ||
66 | |||
67 | extern int e820_any_mapped(u64 start, u64 end, unsigned type); | ||
68 | extern int e820_all_mapped(u64 start, u64 end, unsigned type); | ||
69 | extern void e820_add_region(u64 start, u64 size, int type); | ||
70 | extern void e820_print_map(char *who); | ||
71 | extern int | ||
72 | sanitize_e820_map(struct e820entry *biosmap, int max_nr_map, int *pnr_map); | ||
73 | extern u64 e820_update_range(u64 start, u64 size, unsigned old_type, | ||
74 | unsigned new_type); | ||
75 | extern u64 e820_remove_range(u64 start, u64 size, unsigned old_type, | ||
76 | int checktype); | ||
77 | extern void update_e820(void); | ||
78 | extern void e820_setup_gap(void); | ||
79 | extern int e820_search_gap(unsigned long *gapstart, unsigned long *gapsize, | ||
80 | unsigned long start_addr, unsigned long long end_addr); | ||
81 | struct setup_data; | ||
82 | extern void parse_e820_ext(struct setup_data *data, unsigned long pa_data); | ||
83 | |||
84 | #if defined(CONFIG_X86_64) || \ | ||
85 | (defined(CONFIG_X86_32) && defined(CONFIG_HIBERNATION)) | ||
86 | extern void e820_mark_nosave_regions(unsigned long limit_pfn); | ||
87 | #else | ||
88 | static inline void e820_mark_nosave_regions(unsigned long limit_pfn) | ||
89 | { | ||
90 | } | ||
91 | #endif | ||
92 | |||
93 | #ifdef CONFIG_MEMTEST | ||
94 | extern void early_memtest(unsigned long start, unsigned long end); | ||
95 | #else | ||
96 | static inline void early_memtest(unsigned long start, unsigned long end) | ||
97 | { | ||
98 | } | ||
99 | #endif | ||
100 | |||
101 | extern unsigned long end_user_pfn; | ||
102 | |||
103 | extern u64 find_e820_area(u64 start, u64 end, u64 size, u64 align); | ||
104 | extern u64 find_e820_area_size(u64 start, u64 *sizep, u64 align); | ||
105 | extern void reserve_early(u64 start, u64 end, char *name); | ||
106 | extern void reserve_early_overlap_ok(u64 start, u64 end, char *name); | ||
107 | extern void free_early(u64 start, u64 end); | ||
108 | extern void early_res_to_bootmem(u64 start, u64 end); | ||
109 | extern u64 early_reserve_e820(u64 startt, u64 sizet, u64 align); | ||
110 | |||
111 | extern unsigned long e820_end_of_ram_pfn(void); | ||
112 | extern unsigned long e820_end_of_low_ram_pfn(void); | ||
113 | extern int e820_find_active_region(const struct e820entry *ei, | ||
114 | unsigned long start_pfn, | ||
115 | unsigned long last_pfn, | ||
116 | unsigned long *ei_startpfn, | ||
117 | unsigned long *ei_endpfn); | ||
118 | extern void e820_register_active_regions(int nid, unsigned long start_pfn, | ||
119 | unsigned long end_pfn); | ||
120 | extern u64 e820_hole_size(u64 start, u64 end); | ||
121 | extern void finish_e820_parsing(void); | ||
122 | extern void e820_reserve_resources(void); | ||
123 | extern void setup_memory_map(void); | ||
124 | extern char *default_machine_specific_memory_setup(void); | ||
125 | extern char *machine_specific_memory_setup(void); | ||
126 | extern char *memory_setup(void); | ||
127 | #endif /* __KERNEL__ */ | ||
23 | #endif /* __ASSEMBLY__ */ | 128 | #endif /* __ASSEMBLY__ */ |
24 | 129 | ||
25 | #define ISA_START_ADDRESS 0xa0000 | 130 | #define ISA_START_ADDRESS 0xa0000 |
26 | #define ISA_END_ADDRESS 0x100000 | 131 | #define ISA_END_ADDRESS 0x100000 |
132 | #define is_ISA_range(s, e) ((s) >= ISA_START_ADDRESS && (e) < ISA_END_ADDRESS) | ||
27 | 133 | ||
28 | #define BIOS_BEGIN 0x000a0000 | 134 | #define BIOS_BEGIN 0x000a0000 |
29 | #define BIOS_END 0x00100000 | 135 | #define BIOS_END 0x00100000 |
30 | 136 | ||
31 | #ifdef __KERNEL__ | 137 | #ifdef __KERNEL__ |
32 | #ifdef CONFIG_X86_32 | 138 | #include <linux/ioport.h> |
33 | # include "e820_32.h" | 139 | |
34 | #else | 140 | #define HIGH_MEMORY (1024*1024) |
35 | # include "e820_64.h" | ||
36 | #endif | ||
37 | #endif /* __KERNEL__ */ | 141 | #endif /* __KERNEL__ */ |
38 | 142 | ||
39 | #endif /* __ASM_E820_H */ | 143 | #endif /* __ASM_E820_H */ |
diff --git a/include/asm-x86/e820_32.h b/include/asm-x86/e820_32.h deleted file mode 100644 index a9f7c6ec32bf..000000000000 --- a/include/asm-x86/e820_32.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* | ||
2 | * structures and definitions for the int 15, ax=e820 memory map | ||
3 | * scheme. | ||
4 | * | ||
5 | * In a nutshell, arch/i386/boot/setup.S populates a scratch table | ||
6 | * in the empty_zero_block that contains a list of usable address/size | ||
7 | * duples. In arch/i386/kernel/setup.c, this information is | ||
8 | * transferred into the e820map, and in arch/i386/mm/init.c, that | ||
9 | * new information is used to mark pages reserved or not. | ||
10 | * | ||
11 | */ | ||
12 | #ifndef __E820_HEADER | ||
13 | #define __E820_HEADER | ||
14 | |||
15 | #include <linux/ioport.h> | ||
16 | |||
17 | #define HIGH_MEMORY (1024*1024) | ||
18 | |||
19 | #ifndef __ASSEMBLY__ | ||
20 | |||
21 | extern struct e820map e820; | ||
22 | extern void update_e820(void); | ||
23 | |||
24 | extern int e820_all_mapped(unsigned long start, unsigned long end, | ||
25 | unsigned type); | ||
26 | extern int e820_any_mapped(u64 start, u64 end, unsigned type); | ||
27 | extern void propagate_e820_map(void); | ||
28 | extern void register_bootmem_low_pages(unsigned long max_low_pfn); | ||
29 | extern void add_memory_region(unsigned long long start, | ||
30 | unsigned long long size, int type); | ||
31 | extern void update_memory_range(u64 start, u64 size, unsigned old_type, | ||
32 | unsigned new_type); | ||
33 | extern void e820_register_memory(void); | ||
34 | extern void limit_regions(unsigned long long size); | ||
35 | extern void print_memory_map(char *who); | ||
36 | extern void init_iomem_resources(struct resource *code_resource, | ||
37 | struct resource *data_resource, | ||
38 | struct resource *bss_resource); | ||
39 | |||
40 | #if defined(CONFIG_PM) && defined(CONFIG_HIBERNATION) | ||
41 | extern void e820_mark_nosave_regions(void); | ||
42 | #else | ||
43 | static inline void e820_mark_nosave_regions(void) | ||
44 | { | ||
45 | } | ||
46 | #endif | ||
47 | |||
48 | |||
49 | #endif/*!__ASSEMBLY__*/ | ||
50 | #endif/*__E820_HEADER*/ | ||
diff --git a/include/asm-x86/e820_64.h b/include/asm-x86/e820_64.h deleted file mode 100644 index 71c4d685d30d..000000000000 --- a/include/asm-x86/e820_64.h +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /* | ||
2 | * structures and definitions for the int 15, ax=e820 memory map | ||
3 | * scheme. | ||
4 | * | ||
5 | * In a nutshell, setup.S populates a scratch table in the | ||
6 | * empty_zero_block that contains a list of usable address/size | ||
7 | * duples. setup.c, this information is transferred into the e820map, | ||
8 | * and in init.c/numa.c, that new information is used to mark pages | ||
9 | * reserved or not. | ||
10 | */ | ||
11 | #ifndef __E820_HEADER | ||
12 | #define __E820_HEADER | ||
13 | |||
14 | #include <linux/ioport.h> | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | extern unsigned long find_e820_area(unsigned long start, unsigned long end, | ||
18 | unsigned long size, unsigned long align); | ||
19 | extern unsigned long find_e820_area_size(unsigned long start, | ||
20 | unsigned long *sizep, | ||
21 | unsigned long align); | ||
22 | extern void add_memory_region(unsigned long start, unsigned long size, | ||
23 | int type); | ||
24 | extern void update_memory_range(u64 start, u64 size, unsigned old_type, | ||
25 | unsigned new_type); | ||
26 | extern void setup_memory_region(void); | ||
27 | extern void contig_e820_setup(void); | ||
28 | extern unsigned long e820_end_of_ram(void); | ||
29 | extern void e820_reserve_resources(void); | ||
30 | extern void e820_mark_nosave_regions(void); | ||
31 | extern int e820_any_mapped(unsigned long start, unsigned long end, | ||
32 | unsigned type); | ||
33 | extern int e820_all_mapped(unsigned long start, unsigned long end, | ||
34 | unsigned type); | ||
35 | extern int e820_any_non_reserved(unsigned long start, unsigned long end); | ||
36 | extern int is_memory_any_valid(unsigned long start, unsigned long end); | ||
37 | extern int e820_all_non_reserved(unsigned long start, unsigned long end); | ||
38 | extern int is_memory_all_valid(unsigned long start, unsigned long end); | ||
39 | extern unsigned long e820_hole_size(unsigned long start, unsigned long end); | ||
40 | |||
41 | extern void e820_setup_gap(void); | ||
42 | extern void e820_register_active_regions(int nid, unsigned long start_pfn, | ||
43 | unsigned long end_pfn); | ||
44 | |||
45 | extern void finish_e820_parsing(void); | ||
46 | |||
47 | extern struct e820map e820; | ||
48 | extern void update_e820(void); | ||
49 | |||
50 | extern void reserve_early(unsigned long start, unsigned long end, char *name); | ||
51 | extern void free_early(unsigned long start, unsigned long end); | ||
52 | extern void early_res_to_bootmem(unsigned long start, unsigned long end); | ||
53 | |||
54 | #endif/*!__ASSEMBLY__*/ | ||
55 | |||
56 | #endif/*__E820_HEADER*/ | ||
diff --git a/include/asm-x86/efi.h b/include/asm-x86/efi.h index d53004b855cc..7ed2bd7a7f51 100644 --- a/include/asm-x86/efi.h +++ b/include/asm-x86/efi.h | |||
@@ -90,7 +90,7 @@ extern void *efi_ioremap(unsigned long addr, unsigned long size); | |||
90 | 90 | ||
91 | #endif /* CONFIG_X86_32 */ | 91 | #endif /* CONFIG_X86_32 */ |
92 | 92 | ||
93 | extern void efi_reserve_bootmem(void); | 93 | extern void efi_reserve_early(void); |
94 | extern void efi_call_phys_prelog(void); | 94 | extern void efi_call_phys_prelog(void); |
95 | extern void efi_call_phys_epilog(void); | 95 | extern void efi_call_phys_epilog(void); |
96 | 96 | ||
diff --git a/include/asm-x86/elf.h b/include/asm-x86/elf.h index 8f232dc5b5fe..7be4733c793e 100644 --- a/include/asm-x86/elf.h +++ b/include/asm-x86/elf.h | |||
@@ -83,9 +83,9 @@ extern unsigned int vdso_enabled; | |||
83 | (((x)->e_machine == EM_386) || ((x)->e_machine == EM_486)) | 83 | (((x)->e_machine == EM_386) || ((x)->e_machine == EM_486)) |
84 | 84 | ||
85 | #include <asm/processor.h> | 85 | #include <asm/processor.h> |
86 | #include <asm/system.h> | ||
86 | 87 | ||
87 | #ifdef CONFIG_X86_32 | 88 | #ifdef CONFIG_X86_32 |
88 | #include <asm/system.h> /* for savesegment */ | ||
89 | #include <asm/desc.h> | 89 | #include <asm/desc.h> |
90 | 90 | ||
91 | #define elf_check_arch(x) elf_check_arch_ia32(x) | 91 | #define elf_check_arch(x) elf_check_arch_ia32(x) |
diff --git a/include/asm-x86/fixmap.h b/include/asm-x86/fixmap.h index 5bd206973dca..44d4f8217349 100644 --- a/include/asm-x86/fixmap.h +++ b/include/asm-x86/fixmap.h | |||
@@ -7,7 +7,62 @@ | |||
7 | # include "fixmap_64.h" | 7 | # include "fixmap_64.h" |
8 | #endif | 8 | #endif |
9 | 9 | ||
10 | extern int fixmaps_set; | ||
11 | |||
12 | void __native_set_fixmap(enum fixed_addresses idx, pte_t pte); | ||
13 | void native_set_fixmap(enum fixed_addresses idx, | ||
14 | unsigned long phys, pgprot_t flags); | ||
15 | |||
16 | #ifndef CONFIG_PARAVIRT | ||
17 | static inline void __set_fixmap(enum fixed_addresses idx, | ||
18 | unsigned long phys, pgprot_t flags) | ||
19 | { | ||
20 | native_set_fixmap(idx, phys, flags); | ||
21 | } | ||
22 | #endif | ||
23 | |||
24 | #define set_fixmap(idx, phys) \ | ||
25 | __set_fixmap(idx, phys, PAGE_KERNEL) | ||
26 | |||
27 | /* | ||
28 | * Some hardware wants to get fixmapped without caching. | ||
29 | */ | ||
30 | #define set_fixmap_nocache(idx, phys) \ | ||
31 | __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) | ||
32 | |||
10 | #define clear_fixmap(idx) \ | 33 | #define clear_fixmap(idx) \ |
11 | __set_fixmap(idx, 0, __pgprot(0)) | 34 | __set_fixmap(idx, 0, __pgprot(0)) |
12 | 35 | ||
36 | #define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) | ||
37 | #define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) | ||
38 | |||
39 | extern void __this_fixmap_does_not_exist(void); | ||
40 | |||
41 | /* | ||
42 | * 'index to address' translation. If anyone tries to use the idx | ||
43 | * directly without translation, we catch the bug with a NULL-deference | ||
44 | * kernel oops. Illegal ranges of incoming indices are caught too. | ||
45 | */ | ||
46 | static __always_inline unsigned long fix_to_virt(const unsigned int idx) | ||
47 | { | ||
48 | /* | ||
49 | * this branch gets completely eliminated after inlining, | ||
50 | * except when someone tries to use fixaddr indices in an | ||
51 | * illegal way. (such as mixing up address types or using | ||
52 | * out-of-range indices). | ||
53 | * | ||
54 | * If it doesn't get removed, the linker will complain | ||
55 | * loudly with a reasonably clear error message.. | ||
56 | */ | ||
57 | if (idx >= __end_of_fixed_addresses) | ||
58 | __this_fixmap_does_not_exist(); | ||
59 | |||
60 | return __fix_to_virt(idx); | ||
61 | } | ||
62 | |||
63 | static inline unsigned long virt_to_fix(const unsigned long vaddr) | ||
64 | { | ||
65 | BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); | ||
66 | return __virt_to_fix(vaddr); | ||
67 | } | ||
13 | #endif | 68 | #endif |
diff --git a/include/asm-x86/fixmap_32.h b/include/asm-x86/fixmap_32.h index 4b96148e90c1..f1ac2b2167d7 100644 --- a/include/asm-x86/fixmap_32.h +++ b/include/asm-x86/fixmap_32.h | |||
@@ -79,10 +79,6 @@ enum fixed_addresses { | |||
79 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ | 79 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ |
80 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, | 80 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, |
81 | #endif | 81 | #endif |
82 | #ifdef CONFIG_ACPI | ||
83 | FIX_ACPI_BEGIN, | ||
84 | FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1, | ||
85 | #endif | ||
86 | #ifdef CONFIG_PCI_MMCONFIG | 82 | #ifdef CONFIG_PCI_MMCONFIG |
87 | FIX_PCIE_MCFG, | 83 | FIX_PCIE_MCFG, |
88 | #endif | 84 | #endif |
@@ -94,32 +90,27 @@ enum fixed_addresses { | |||
94 | * 256 temporary boot-time mappings, used by early_ioremap(), | 90 | * 256 temporary boot-time mappings, used by early_ioremap(), |
95 | * before ioremap() is functional. | 91 | * before ioremap() is functional. |
96 | * | 92 | * |
97 | * We round it up to the next 512 pages boundary so that we | 93 | * We round it up to the next 256 pages boundary so that we |
98 | * can have a single pgd entry and a single pte table: | 94 | * can have a single pgd entry and a single pte table: |
99 | */ | 95 | */ |
100 | #define NR_FIX_BTMAPS 64 | 96 | #define NR_FIX_BTMAPS 64 |
101 | #define FIX_BTMAPS_NESTING 4 | 97 | #define FIX_BTMAPS_NESTING 4 |
102 | FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 512 - | 98 | FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 256 - |
103 | (__end_of_permanent_fixed_addresses & 511), | 99 | (__end_of_permanent_fixed_addresses & 255), |
104 | FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_NESTING - 1, | 100 | FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_NESTING - 1, |
105 | FIX_WP_TEST, | 101 | FIX_WP_TEST, |
102 | #ifdef CONFIG_ACPI | ||
103 | FIX_ACPI_BEGIN, | ||
104 | FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1, | ||
105 | #endif | ||
106 | #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT | 106 | #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT |
107 | FIX_OHCI1394_BASE, | 107 | FIX_OHCI1394_BASE, |
108 | #endif | 108 | #endif |
109 | __end_of_fixed_addresses | 109 | __end_of_fixed_addresses |
110 | }; | 110 | }; |
111 | 111 | ||
112 | extern void __set_fixmap(enum fixed_addresses idx, | ||
113 | unsigned long phys, pgprot_t flags); | ||
114 | extern void reserve_top_address(unsigned long reserve); | 112 | extern void reserve_top_address(unsigned long reserve); |
115 | 113 | ||
116 | #define set_fixmap(idx, phys) \ | ||
117 | __set_fixmap(idx, phys, PAGE_KERNEL) | ||
118 | /* | ||
119 | * Some hardware wants to get fixmapped without caching. | ||
120 | */ | ||
121 | #define set_fixmap_nocache(idx, phys) \ | ||
122 | __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) | ||
123 | 114 | ||
124 | #define FIXADDR_TOP ((unsigned long)__FIXADDR_TOP) | 115 | #define FIXADDR_TOP ((unsigned long)__FIXADDR_TOP) |
125 | 116 | ||
@@ -128,38 +119,5 @@ extern void reserve_top_address(unsigned long reserve); | |||
128 | #define FIXADDR_START (FIXADDR_TOP - __FIXADDR_SIZE) | 119 | #define FIXADDR_START (FIXADDR_TOP - __FIXADDR_SIZE) |
129 | #define FIXADDR_BOOT_START (FIXADDR_TOP - __FIXADDR_BOOT_SIZE) | 120 | #define FIXADDR_BOOT_START (FIXADDR_TOP - __FIXADDR_BOOT_SIZE) |
130 | 121 | ||
131 | #define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) | ||
132 | #define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) | ||
133 | |||
134 | extern void __this_fixmap_does_not_exist(void); | ||
135 | |||
136 | /* | ||
137 | * 'index to address' translation. If anyone tries to use the idx | ||
138 | * directly without tranlation, we catch the bug with a NULL-deference | ||
139 | * kernel oops. Illegal ranges of incoming indices are caught too. | ||
140 | */ | ||
141 | static __always_inline unsigned long fix_to_virt(const unsigned int idx) | ||
142 | { | ||
143 | /* | ||
144 | * this branch gets completely eliminated after inlining, | ||
145 | * except when someone tries to use fixaddr indices in an | ||
146 | * illegal way. (such as mixing up address types or using | ||
147 | * out-of-range indices). | ||
148 | * | ||
149 | * If it doesn't get removed, the linker will complain | ||
150 | * loudly with a reasonably clear error message.. | ||
151 | */ | ||
152 | if (idx >= __end_of_fixed_addresses) | ||
153 | __this_fixmap_does_not_exist(); | ||
154 | |||
155 | return __fix_to_virt(idx); | ||
156 | } | ||
157 | |||
158 | static inline unsigned long virt_to_fix(const unsigned long vaddr) | ||
159 | { | ||
160 | BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); | ||
161 | return __virt_to_fix(vaddr); | ||
162 | } | ||
163 | |||
164 | #endif /* !__ASSEMBLY__ */ | 122 | #endif /* !__ASSEMBLY__ */ |
165 | #endif | 123 | #endif |
diff --git a/include/asm-x86/fixmap_64.h b/include/asm-x86/fixmap_64.h index 355d26a75a82..00f3d74a0524 100644 --- a/include/asm-x86/fixmap_64.h +++ b/include/asm-x86/fixmap_64.h | |||
@@ -12,6 +12,7 @@ | |||
12 | #define _ASM_FIXMAP_64_H | 12 | #define _ASM_FIXMAP_64_H |
13 | 13 | ||
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <asm/acpi.h> | ||
15 | #include <asm/apicdef.h> | 16 | #include <asm/apicdef.h> |
16 | #include <asm/page.h> | 17 | #include <asm/page.h> |
17 | #include <asm/vsyscall.h> | 18 | #include <asm/vsyscall.h> |
@@ -39,30 +40,38 @@ enum fixed_addresses { | |||
39 | VSYSCALL_HPET, | 40 | VSYSCALL_HPET, |
40 | FIX_DBGP_BASE, | 41 | FIX_DBGP_BASE, |
41 | FIX_EARLYCON_MEM_BASE, | 42 | FIX_EARLYCON_MEM_BASE, |
42 | FIX_HPET_BASE, | ||
43 | FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */ | 43 | FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */ |
44 | FIX_IO_APIC_BASE_0, | 44 | FIX_IO_APIC_BASE_0, |
45 | FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1, | 45 | FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS - 1, |
46 | FIX_EFI_IO_MAP_LAST_PAGE, | 46 | FIX_EFI_IO_MAP_LAST_PAGE, |
47 | FIX_EFI_IO_MAP_FIRST_PAGE = FIX_EFI_IO_MAP_LAST_PAGE | 47 | FIX_EFI_IO_MAP_FIRST_PAGE = FIX_EFI_IO_MAP_LAST_PAGE |
48 | + MAX_EFI_IO_PAGES - 1, | 48 | + MAX_EFI_IO_PAGES - 1, |
49 | #ifdef CONFIG_PARAVIRT | ||
50 | FIX_PARAVIRT_BOOTMAP, | ||
51 | #endif | ||
52 | #ifdef CONFIG_ACPI | ||
53 | FIX_ACPI_BEGIN, | ||
54 | FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1, | ||
55 | #endif | ||
49 | #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT | 56 | #ifdef CONFIG_PROVIDE_OHCI1394_DMA_INIT |
50 | FIX_OHCI1394_BASE, | 57 | FIX_OHCI1394_BASE, |
51 | #endif | 58 | #endif |
59 | __end_of_permanent_fixed_addresses, | ||
60 | /* | ||
61 | * 256 temporary boot-time mappings, used by early_ioremap(), | ||
62 | * before ioremap() is functional. | ||
63 | * | ||
64 | * We round it up to the next 512 pages boundary so that we | ||
65 | * can have a single pgd entry and a single pte table: | ||
66 | */ | ||
67 | #define NR_FIX_BTMAPS 64 | ||
68 | #define FIX_BTMAPS_NESTING 4 | ||
69 | FIX_BTMAP_END = __end_of_permanent_fixed_addresses + 512 - | ||
70 | (__end_of_permanent_fixed_addresses & 511), | ||
71 | FIX_BTMAP_BEGIN = FIX_BTMAP_END + NR_FIX_BTMAPS*FIX_BTMAPS_NESTING - 1, | ||
52 | __end_of_fixed_addresses | 72 | __end_of_fixed_addresses |
53 | }; | 73 | }; |
54 | 74 | ||
55 | extern void __set_fixmap(enum fixed_addresses idx, | ||
56 | unsigned long phys, pgprot_t flags); | ||
57 | |||
58 | #define set_fixmap(idx, phys) \ | ||
59 | __set_fixmap(idx, phys, PAGE_KERNEL) | ||
60 | /* | ||
61 | * Some hardware wants to get fixmapped without caching. | ||
62 | */ | ||
63 | #define set_fixmap_nocache(idx, phys) \ | ||
64 | __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) | ||
65 | |||
66 | #define FIXADDR_TOP (VSYSCALL_END-PAGE_SIZE) | 75 | #define FIXADDR_TOP (VSYSCALL_END-PAGE_SIZE) |
67 | #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) | 76 | #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) |
68 | #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) | 77 | #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) |
@@ -71,30 +80,4 @@ extern void __set_fixmap(enum fixed_addresses idx, | |||
71 | #define FIXADDR_USER_START ((unsigned long)VSYSCALL32_VSYSCALL) | 80 | #define FIXADDR_USER_START ((unsigned long)VSYSCALL32_VSYSCALL) |
72 | #define FIXADDR_USER_END (FIXADDR_USER_START + PAGE_SIZE) | 81 | #define FIXADDR_USER_END (FIXADDR_USER_START + PAGE_SIZE) |
73 | 82 | ||
74 | #define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) | ||
75 | |||
76 | extern void __this_fixmap_does_not_exist(void); | ||
77 | |||
78 | /* | ||
79 | * 'index to address' translation. If anyone tries to use the idx | ||
80 | * directly without translation, we catch the bug with a NULL-deference | ||
81 | * kernel oops. Illegal ranges of incoming indices are caught too. | ||
82 | */ | ||
83 | static __always_inline unsigned long fix_to_virt(const unsigned int idx) | ||
84 | { | ||
85 | /* | ||
86 | * this branch gets completely eliminated after inlining, | ||
87 | * except when someone tries to use fixaddr indices in an | ||
88 | * illegal way. (such as mixing up address types or using | ||
89 | * out-of-range indices). | ||
90 | * | ||
91 | * If it doesn't get removed, the linker will complain | ||
92 | * loudly with a reasonably clear error message.. | ||
93 | */ | ||
94 | if (idx >= __end_of_fixed_addresses) | ||
95 | __this_fixmap_does_not_exist(); | ||
96 | |||
97 | return __fix_to_virt(idx); | ||
98 | } | ||
99 | |||
100 | #endif | 83 | #endif |
diff --git a/include/asm-x86/ftrace.h b/include/asm-x86/ftrace.h new file mode 100644 index 000000000000..5c68b32ee1c8 --- /dev/null +++ b/include/asm-x86/ftrace.h | |||
@@ -0,0 +1,14 @@ | |||
1 | #ifndef _ASM_X86_FTRACE | ||
2 | #define _ASM_X86_FTRACE | ||
3 | |||
4 | #ifdef CONFIG_FTRACE | ||
5 | #define MCOUNT_ADDR ((long)(mcount)) | ||
6 | #define MCOUNT_INSN_SIZE 5 /* sizeof mcount call */ | ||
7 | |||
8 | #ifndef __ASSEMBLY__ | ||
9 | extern void mcount(void); | ||
10 | #endif | ||
11 | |||
12 | #endif /* CONFIG_FTRACE */ | ||
13 | |||
14 | #endif /* _ASM_X86_FTRACE */ | ||
diff --git a/include/asm-x86/gart.h b/include/asm-x86/gart.h index 90958ed993fa..3f62a83887f3 100644 --- a/include/asm-x86/gart.h +++ b/include/asm-x86/gart.h | |||
@@ -1,34 +1,71 @@ | |||
1 | #ifndef _ASM_X8664_IOMMU_H | 1 | #ifndef _ASM_X8664_GART_H |
2 | #define _ASM_X8664_IOMMU_H 1 | 2 | #define _ASM_X8664_GART_H 1 |
3 | 3 | ||
4 | extern void pci_iommu_shutdown(void); | 4 | #include <asm/e820.h> |
5 | extern void no_iommu_init(void); | 5 | |
6 | extern int force_iommu, no_iommu; | 6 | extern void set_up_gart_resume(u32, u32); |
7 | extern int iommu_detected; | 7 | |
8 | #ifdef CONFIG_GART_IOMMU | ||
9 | extern void gart_iommu_init(void); | ||
10 | extern void gart_iommu_shutdown(void); | ||
11 | extern void __init gart_parse_options(char *); | ||
12 | extern void early_gart_iommu_check(void); | ||
13 | extern void gart_iommu_hole_init(void); | ||
14 | extern int fallback_aper_order; | 8 | extern int fallback_aper_order; |
15 | extern int fallback_aper_force; | 9 | extern int fallback_aper_force; |
16 | extern int gart_iommu_aperture; | ||
17 | extern int gart_iommu_aperture_allowed; | ||
18 | extern int gart_iommu_aperture_disabled; | ||
19 | extern int fix_aperture; | 10 | extern int fix_aperture; |
20 | #else | ||
21 | #define gart_iommu_aperture 0 | ||
22 | #define gart_iommu_aperture_allowed 0 | ||
23 | 11 | ||
24 | static inline void early_gart_iommu_check(void) | 12 | /* PTE bits. */ |
13 | #define GPTE_VALID 1 | ||
14 | #define GPTE_COHERENT 2 | ||
15 | |||
16 | /* Aperture control register bits. */ | ||
17 | #define GARTEN (1<<0) | ||
18 | #define DISGARTCPU (1<<4) | ||
19 | #define DISGARTIO (1<<5) | ||
20 | |||
21 | /* GART cache control register bits. */ | ||
22 | #define INVGART (1<<0) | ||
23 | #define GARTPTEERR (1<<1) | ||
24 | |||
25 | /* K8 On-cpu GART registers */ | ||
26 | #define AMD64_GARTAPERTURECTL 0x90 | ||
27 | #define AMD64_GARTAPERTUREBASE 0x94 | ||
28 | #define AMD64_GARTTABLEBASE 0x98 | ||
29 | #define AMD64_GARTCACHECTL 0x9c | ||
30 | #define AMD64_GARTEN (1<<0) | ||
31 | |||
32 | static inline void enable_gart_translation(struct pci_dev *dev, u64 addr) | ||
25 | { | 33 | { |
34 | u32 tmp, ctl; | ||
35 | |||
36 | /* address of the mappings table */ | ||
37 | addr >>= 12; | ||
38 | tmp = (u32) addr<<4; | ||
39 | tmp &= ~0xf; | ||
40 | pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp); | ||
41 | |||
42 | /* Enable GART translation for this hammer. */ | ||
43 | pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl); | ||
44 | ctl |= GARTEN; | ||
45 | ctl &= ~(DISGARTCPU | DISGARTIO); | ||
46 | pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl); | ||
26 | } | 47 | } |
27 | 48 | ||
28 | static inline void gart_iommu_shutdown(void) | 49 | static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size) |
29 | { | 50 | { |
30 | } | 51 | if (!aper_base) |
52 | return 0; | ||
31 | 53 | ||
32 | #endif | 54 | if (aper_base + aper_size > 0x100000000ULL) { |
55 | printk(KERN_ERR "Aperture beyond 4GB. Ignoring.\n"); | ||
56 | return 0; | ||
57 | } | ||
58 | if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) { | ||
59 | printk(KERN_ERR "Aperture pointing to e820 RAM. Ignoring.\n"); | ||
60 | return 0; | ||
61 | } | ||
62 | if (aper_size < min_size) { | ||
63 | printk(KERN_ERR "Aperture too small (%d MB) than (%d MB)\n", | ||
64 | aper_size>>20, min_size>>20); | ||
65 | return 0; | ||
66 | } | ||
67 | |||
68 | return 1; | ||
69 | } | ||
33 | 70 | ||
34 | #endif | 71 | #endif |
diff --git a/include/asm-x86/genapic_64.h b/include/asm-x86/genapic_64.h index 1de931b263ce..0f8504627c41 100644 --- a/include/asm-x86/genapic_64.h +++ b/include/asm-x86/genapic_64.h | |||
@@ -44,4 +44,6 @@ DECLARE_PER_CPU(int, x2apic_extra_bits); | |||
44 | extern void uv_cpu_init(void); | 44 | extern void uv_cpu_init(void); |
45 | extern int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip); | 45 | extern int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip); |
46 | 46 | ||
47 | extern void setup_apic_routing(void); | ||
48 | |||
47 | #endif | 49 | #endif |
diff --git a/include/asm-x86/hardirq.h b/include/asm-x86/hardirq.h index 314434d664e7..000787df66e6 100644 --- a/include/asm-x86/hardirq.h +++ b/include/asm-x86/hardirq.h | |||
@@ -3,3 +3,9 @@ | |||
3 | #else | 3 | #else |
4 | # include "hardirq_64.h" | 4 | # include "hardirq_64.h" |
5 | #endif | 5 | #endif |
6 | |||
7 | extern u64 arch_irq_stat_cpu(unsigned int cpu); | ||
8 | #define arch_irq_stat_cpu arch_irq_stat_cpu | ||
9 | |||
10 | extern u64 arch_irq_stat(void); | ||
11 | #define arch_irq_stat arch_irq_stat | ||
diff --git a/include/asm-x86/highmem.h b/include/asm-x86/highmem.h index e153f3b44774..4514b16cc723 100644 --- a/include/asm-x86/highmem.h +++ b/include/asm-x86/highmem.h | |||
@@ -74,6 +74,9 @@ struct page *kmap_atomic_to_page(void *ptr); | |||
74 | 74 | ||
75 | #define flush_cache_kmaps() do { } while (0) | 75 | #define flush_cache_kmaps() do { } while (0) |
76 | 76 | ||
77 | extern void add_highpages_with_active_regions(int nid, unsigned long start_pfn, | ||
78 | unsigned long end_pfn); | ||
79 | |||
77 | #endif /* __KERNEL__ */ | 80 | #endif /* __KERNEL__ */ |
78 | 81 | ||
79 | #endif /* _ASM_HIGHMEM_H */ | 82 | #endif /* _ASM_HIGHMEM_H */ |
diff --git a/include/asm-x86/hpet.h b/include/asm-x86/hpet.h index 6a9b4ac59bf7..82f1ac641bd7 100644 --- a/include/asm-x86/hpet.h +++ b/include/asm-x86/hpet.h | |||
@@ -86,8 +86,8 @@ extern void hpet_unregister_irq_handler(rtc_irq_handler handler); | |||
86 | #else /* CONFIG_HPET_TIMER */ | 86 | #else /* CONFIG_HPET_TIMER */ |
87 | 87 | ||
88 | static inline int hpet_enable(void) { return 0; } | 88 | static inline int hpet_enable(void) { return 0; } |
89 | static inline unsigned long hpet_readl(unsigned long a) { return 0; } | ||
90 | static inline int is_hpet_enabled(void) { return 0; } | 89 | static inline int is_hpet_enabled(void) { return 0; } |
90 | #define hpet_readl(a) 0 | ||
91 | 91 | ||
92 | #endif | 92 | #endif |
93 | #endif /* ASM_X86_HPET_H */ | 93 | #endif /* ASM_X86_HPET_H */ |
diff --git a/include/asm-x86/hw_irq.h b/include/asm-x86/hw_irq.h index bf025399d939..77ba51df5668 100644 --- a/include/asm-x86/hw_irq.h +++ b/include/asm-x86/hw_irq.h | |||
@@ -1,5 +1,107 @@ | |||
1 | #ifndef _ASM_HW_IRQ_H | ||
2 | #define _ASM_HW_IRQ_H | ||
3 | |||
4 | /* | ||
5 | * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar | ||
6 | * | ||
7 | * moved some of the old arch/i386/kernel/irq.h to here. VY | ||
8 | * | ||
9 | * IRQ/IPI changes taken from work by Thomas Radke | ||
10 | * <tomsoft@informatik.tu-chemnitz.de> | ||
11 | * | ||
12 | * hacked by Andi Kleen for x86-64. | ||
13 | * unified by tglx | ||
14 | */ | ||
15 | |||
16 | #include <asm/irq_vectors.h> | ||
17 | |||
18 | #ifndef __ASSEMBLY__ | ||
19 | |||
20 | #include <linux/percpu.h> | ||
21 | #include <linux/profile.h> | ||
22 | #include <linux/smp.h> | ||
23 | |||
24 | #include <asm/atomic.h> | ||
25 | #include <asm/irq.h> | ||
26 | #include <asm/sections.h> | ||
27 | |||
28 | #define platform_legacy_irq(irq) ((irq) < 16) | ||
29 | |||
30 | /* Interrupt handlers registered during init_IRQ */ | ||
31 | extern void apic_timer_interrupt(void); | ||
32 | extern void error_interrupt(void); | ||
33 | extern void spurious_interrupt(void); | ||
34 | extern void thermal_interrupt(void); | ||
35 | extern void reschedule_interrupt(void); | ||
36 | |||
37 | extern void invalidate_interrupt(void); | ||
38 | extern void invalidate_interrupt0(void); | ||
39 | extern void invalidate_interrupt1(void); | ||
40 | extern void invalidate_interrupt2(void); | ||
41 | extern void invalidate_interrupt3(void); | ||
42 | extern void invalidate_interrupt4(void); | ||
43 | extern void invalidate_interrupt5(void); | ||
44 | extern void invalidate_interrupt6(void); | ||
45 | extern void invalidate_interrupt7(void); | ||
46 | |||
47 | extern void irq_move_cleanup_interrupt(void); | ||
48 | extern void threshold_interrupt(void); | ||
49 | |||
50 | extern void call_function_interrupt(void); | ||
51 | extern void call_function_single_interrupt(void); | ||
52 | |||
53 | /* PIC specific functions */ | ||
54 | extern void disable_8259A_irq(unsigned int irq); | ||
55 | extern void enable_8259A_irq(unsigned int irq); | ||
56 | extern int i8259A_irq_pending(unsigned int irq); | ||
57 | extern void make_8259A_irq(unsigned int irq); | ||
58 | extern void init_8259A(int aeoi); | ||
59 | |||
60 | /* IOAPIC */ | ||
61 | #define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs)) | ||
62 | extern unsigned long io_apic_irqs; | ||
63 | |||
64 | extern void init_VISWS_APIC_irqs(void); | ||
65 | extern void setup_IO_APIC(void); | ||
66 | extern void disable_IO_APIC(void); | ||
67 | extern void print_IO_APIC(void); | ||
68 | extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn); | ||
69 | extern void setup_ioapic_dest(void); | ||
70 | |||
71 | #ifdef CONFIG_X86_64 | ||
72 | extern void enable_IO_APIC(void); | ||
73 | #endif | ||
74 | |||
75 | /* IPI functions */ | ||
76 | extern void send_IPI_self(int vector); | ||
77 | extern void send_IPI(int dest, int vector); | ||
78 | |||
79 | /* Statistics */ | ||
80 | extern atomic_t irq_err_count; | ||
81 | extern atomic_t irq_mis_count; | ||
82 | |||
83 | /* EISA */ | ||
84 | extern void eisa_set_level_irq(unsigned int irq); | ||
85 | |||
86 | /* Voyager functions */ | ||
87 | extern asmlinkage void vic_cpi_interrupt(void); | ||
88 | extern asmlinkage void vic_sys_interrupt(void); | ||
89 | extern asmlinkage void vic_cmn_interrupt(void); | ||
90 | extern asmlinkage void qic_timer_interrupt(void); | ||
91 | extern asmlinkage void qic_invalidate_interrupt(void); | ||
92 | extern asmlinkage void qic_reschedule_interrupt(void); | ||
93 | extern asmlinkage void qic_enable_irq_interrupt(void); | ||
94 | extern asmlinkage void qic_call_function_interrupt(void); | ||
95 | |||
1 | #ifdef CONFIG_X86_32 | 96 | #ifdef CONFIG_X86_32 |
2 | # include "hw_irq_32.h" | 97 | extern void (*const interrupt[NR_IRQS])(void); |
3 | #else | 98 | #else |
4 | # include "hw_irq_64.h" | 99 | typedef int vector_irq_t[NR_VECTORS]; |
100 | DECLARE_PER_CPU(vector_irq_t, vector_irq); | ||
101 | extern spinlock_t vector_lock; | ||
102 | #endif | ||
103 | extern void setup_vector_irq(int cpu); | ||
104 | |||
105 | #endif /* !ASSEMBLY_ */ | ||
106 | |||
5 | #endif | 107 | #endif |
diff --git a/include/asm-x86/hw_irq_32.h b/include/asm-x86/hw_irq_32.h deleted file mode 100644 index ea88054e03f3..000000000000 --- a/include/asm-x86/hw_irq_32.h +++ /dev/null | |||
@@ -1,66 +0,0 @@ | |||
1 | #ifndef _ASM_HW_IRQ_H | ||
2 | #define _ASM_HW_IRQ_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm/hw_irq.h | ||
6 | * | ||
7 | * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar | ||
8 | * | ||
9 | * moved some of the old arch/i386/kernel/irq.h to here. VY | ||
10 | * | ||
11 | * IRQ/IPI changes taken from work by Thomas Radke | ||
12 | * <tomsoft@informatik.tu-chemnitz.de> | ||
13 | */ | ||
14 | |||
15 | #include <linux/profile.h> | ||
16 | #include <asm/atomic.h> | ||
17 | #include <asm/irq.h> | ||
18 | #include <asm/sections.h> | ||
19 | |||
20 | #define NMI_VECTOR 0x02 | ||
21 | |||
22 | /* | ||
23 | * Various low-level irq details needed by irq.c, process.c, | ||
24 | * time.c, io_apic.c and smp.c | ||
25 | * | ||
26 | * Interrupt entry/exit code at both C and assembly level | ||
27 | */ | ||
28 | |||
29 | extern void (*const interrupt[NR_IRQS])(void); | ||
30 | |||
31 | #ifdef CONFIG_SMP | ||
32 | void reschedule_interrupt(void); | ||
33 | void invalidate_interrupt(void); | ||
34 | void call_function_interrupt(void); | ||
35 | #endif | ||
36 | |||
37 | #ifdef CONFIG_X86_LOCAL_APIC | ||
38 | void apic_timer_interrupt(void); | ||
39 | void error_interrupt(void); | ||
40 | void spurious_interrupt(void); | ||
41 | void thermal_interrupt(void); | ||
42 | #define platform_legacy_irq(irq) ((irq) < 16) | ||
43 | #endif | ||
44 | |||
45 | void disable_8259A_irq(unsigned int irq); | ||
46 | void enable_8259A_irq(unsigned int irq); | ||
47 | int i8259A_irq_pending(unsigned int irq); | ||
48 | void make_8259A_irq(unsigned int irq); | ||
49 | void init_8259A(int aeoi); | ||
50 | void send_IPI_self(int vector); | ||
51 | void init_VISWS_APIC_irqs(void); | ||
52 | void setup_IO_APIC(void); | ||
53 | void disable_IO_APIC(void); | ||
54 | void print_IO_APIC(void); | ||
55 | int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn); | ||
56 | void send_IPI(int dest, int vector); | ||
57 | void setup_ioapic_dest(void); | ||
58 | |||
59 | extern unsigned long io_apic_irqs; | ||
60 | |||
61 | extern atomic_t irq_err_count; | ||
62 | extern atomic_t irq_mis_count; | ||
63 | |||
64 | #define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs)) | ||
65 | |||
66 | #endif /* _ASM_HW_IRQ_H */ | ||
diff --git a/include/asm-x86/hw_irq_64.h b/include/asm-x86/hw_irq_64.h deleted file mode 100644 index 0062ef390f67..000000000000 --- a/include/asm-x86/hw_irq_64.h +++ /dev/null | |||
@@ -1,173 +0,0 @@ | |||
1 | #ifndef _ASM_HW_IRQ_H | ||
2 | #define _ASM_HW_IRQ_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm/hw_irq.h | ||
6 | * | ||
7 | * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar | ||
8 | * | ||
9 | * moved some of the old arch/i386/kernel/irq.h to here. VY | ||
10 | * | ||
11 | * IRQ/IPI changes taken from work by Thomas Radke | ||
12 | * <tomsoft@informatik.tu-chemnitz.de> | ||
13 | * | ||
14 | * hacked by Andi Kleen for x86-64. | ||
15 | */ | ||
16 | |||
17 | #ifndef __ASSEMBLY__ | ||
18 | #include <asm/atomic.h> | ||
19 | #include <asm/irq.h> | ||
20 | #include <linux/profile.h> | ||
21 | #include <linux/smp.h> | ||
22 | #include <linux/percpu.h> | ||
23 | #endif | ||
24 | |||
25 | #define NMI_VECTOR 0x02 | ||
26 | /* | ||
27 | * IDT vectors usable for external interrupt sources start | ||
28 | * at 0x20: | ||
29 | */ | ||
30 | #define FIRST_EXTERNAL_VECTOR 0x20 | ||
31 | |||
32 | #define IA32_SYSCALL_VECTOR 0x80 | ||
33 | |||
34 | |||
35 | /* Reserve the lowest usable priority level 0x20 - 0x2f for triggering | ||
36 | * cleanup after irq migration. | ||
37 | */ | ||
38 | #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR | ||
39 | |||
40 | /* | ||
41 | * Vectors 0x30-0x3f are used for ISA interrupts. | ||
42 | */ | ||
43 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) | ||
44 | #define IRQ1_VECTOR (IRQ0_VECTOR + 1) | ||
45 | #define IRQ2_VECTOR (IRQ0_VECTOR + 2) | ||
46 | #define IRQ3_VECTOR (IRQ0_VECTOR + 3) | ||
47 | #define IRQ4_VECTOR (IRQ0_VECTOR + 4) | ||
48 | #define IRQ5_VECTOR (IRQ0_VECTOR + 5) | ||
49 | #define IRQ6_VECTOR (IRQ0_VECTOR + 6) | ||
50 | #define IRQ7_VECTOR (IRQ0_VECTOR + 7) | ||
51 | #define IRQ8_VECTOR (IRQ0_VECTOR + 8) | ||
52 | #define IRQ9_VECTOR (IRQ0_VECTOR + 9) | ||
53 | #define IRQ10_VECTOR (IRQ0_VECTOR + 10) | ||
54 | #define IRQ11_VECTOR (IRQ0_VECTOR + 11) | ||
55 | #define IRQ12_VECTOR (IRQ0_VECTOR + 12) | ||
56 | #define IRQ13_VECTOR (IRQ0_VECTOR + 13) | ||
57 | #define IRQ14_VECTOR (IRQ0_VECTOR + 14) | ||
58 | #define IRQ15_VECTOR (IRQ0_VECTOR + 15) | ||
59 | |||
60 | /* | ||
61 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff | ||
62 | * | ||
63 | * some of the following vectors are 'rare', they are merged | ||
64 | * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. | ||
65 | * TLB, reschedule and local APIC vectors are performance-critical. | ||
66 | */ | ||
67 | #define SPURIOUS_APIC_VECTOR 0xff | ||
68 | #define ERROR_APIC_VECTOR 0xfe | ||
69 | #define RESCHEDULE_VECTOR 0xfd | ||
70 | #define CALL_FUNCTION_VECTOR 0xfc | ||
71 | /* fb free - please don't readd KDB here because it's useless | ||
72 | (hint - think what a NMI bit does to a vector) */ | ||
73 | #define THERMAL_APIC_VECTOR 0xfa | ||
74 | #define THRESHOLD_APIC_VECTOR 0xf9 | ||
75 | /* f8 free */ | ||
76 | #define INVALIDATE_TLB_VECTOR_END 0xf7 | ||
77 | #define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */ | ||
78 | |||
79 | #define NUM_INVALIDATE_TLB_VECTORS 8 | ||
80 | |||
81 | /* | ||
82 | * Local APIC timer IRQ vector is on a different priority level, | ||
83 | * to work around the 'lost local interrupt if more than 2 IRQ | ||
84 | * sources per level' errata. | ||
85 | */ | ||
86 | #define LOCAL_TIMER_VECTOR 0xef | ||
87 | |||
88 | /* | ||
89 | * First APIC vector available to drivers: (vectors 0x30-0xee) | ||
90 | * we start at 0x41 to spread out vectors evenly between priority | ||
91 | * levels. (0x80 is the syscall vector) | ||
92 | */ | ||
93 | #define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) | ||
94 | #define FIRST_SYSTEM_VECTOR 0xef /* duplicated in irq.h */ | ||
95 | |||
96 | |||
97 | #ifndef __ASSEMBLY__ | ||
98 | |||
99 | /* Interrupt handlers registered during init_IRQ */ | ||
100 | void apic_timer_interrupt(void); | ||
101 | void spurious_interrupt(void); | ||
102 | void error_interrupt(void); | ||
103 | void reschedule_interrupt(void); | ||
104 | void call_function_interrupt(void); | ||
105 | void irq_move_cleanup_interrupt(void); | ||
106 | void invalidate_interrupt0(void); | ||
107 | void invalidate_interrupt1(void); | ||
108 | void invalidate_interrupt2(void); | ||
109 | void invalidate_interrupt3(void); | ||
110 | void invalidate_interrupt4(void); | ||
111 | void invalidate_interrupt5(void); | ||
112 | void invalidate_interrupt6(void); | ||
113 | void invalidate_interrupt7(void); | ||
114 | void thermal_interrupt(void); | ||
115 | void threshold_interrupt(void); | ||
116 | void i8254_timer_resume(void); | ||
117 | |||
118 | typedef int vector_irq_t[NR_VECTORS]; | ||
119 | DECLARE_PER_CPU(vector_irq_t, vector_irq); | ||
120 | extern void __setup_vector_irq(int cpu); | ||
121 | extern spinlock_t vector_lock; | ||
122 | |||
123 | /* | ||
124 | * Various low-level irq details needed by irq.c, process.c, | ||
125 | * time.c, io_apic.c and smp.c | ||
126 | * | ||
127 | * Interrupt entry/exit code at both C and assembly level | ||
128 | */ | ||
129 | |||
130 | extern void disable_8259A_irq(unsigned int irq); | ||
131 | extern void enable_8259A_irq(unsigned int irq); | ||
132 | extern int i8259A_irq_pending(unsigned int irq); | ||
133 | extern void make_8259A_irq(unsigned int irq); | ||
134 | extern void init_8259A(int aeoi); | ||
135 | extern void send_IPI_self(int vector); | ||
136 | extern void init_VISWS_APIC_irqs(void); | ||
137 | extern void setup_IO_APIC(void); | ||
138 | extern void enable_IO_APIC(void); | ||
139 | extern void disable_IO_APIC(void); | ||
140 | extern void print_IO_APIC(void); | ||
141 | extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn); | ||
142 | extern void send_IPI(int dest, int vector); | ||
143 | extern void setup_ioapic_dest(void); | ||
144 | extern void native_init_IRQ(void); | ||
145 | |||
146 | extern unsigned long io_apic_irqs; | ||
147 | |||
148 | extern atomic_t irq_err_count; | ||
149 | extern atomic_t irq_mis_count; | ||
150 | |||
151 | #define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs)) | ||
152 | |||
153 | #include <asm/ptrace.h> | ||
154 | |||
155 | #define IRQ_NAME2(nr) nr##_interrupt(void) | ||
156 | #define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr) | ||
157 | |||
158 | /* | ||
159 | * SMP has a few special interrupts for IPI messages | ||
160 | */ | ||
161 | |||
162 | #define BUILD_IRQ(nr) \ | ||
163 | asmlinkage void IRQ_NAME(nr); \ | ||
164 | asm("\n.p2align\n" \ | ||
165 | "IRQ" #nr "_interrupt:\n\t" \ | ||
166 | "push $~(" #nr ") ; " \ | ||
167 | "jmp common_interrupt"); | ||
168 | |||
169 | #define platform_legacy_irq(irq) ((irq) < 16) | ||
170 | |||
171 | #endif | ||
172 | |||
173 | #endif /* _ASM_HW_IRQ_H */ | ||
diff --git a/include/asm-x86/i8259.h b/include/asm-x86/i8259.h index 45d4df3e51e6..2f98df91f1f2 100644 --- a/include/asm-x86/i8259.h +++ b/include/asm-x86/i8259.h | |||
@@ -55,4 +55,6 @@ static inline void outb_pic(unsigned char value, unsigned int port) | |||
55 | udelay(2); | 55 | udelay(2); |
56 | } | 56 | } |
57 | 57 | ||
58 | extern struct irq_chip i8259A_chip; | ||
59 | |||
58 | #endif /* __ASM_I8259_H__ */ | 60 | #endif /* __ASM_I8259_H__ */ |
diff --git a/include/asm-x86/io.h b/include/asm-x86/io.h index d5b11f60dbd0..bf5d629b3a39 100644 --- a/include/asm-x86/io.h +++ b/include/asm-x86/io.h | |||
@@ -3,6 +3,76 @@ | |||
3 | 3 | ||
4 | #define ARCH_HAS_IOREMAP_WC | 4 | #define ARCH_HAS_IOREMAP_WC |
5 | 5 | ||
6 | #include <linux/compiler.h> | ||
7 | |||
8 | /* | ||
9 | * early_ioremap() and early_iounmap() are for temporary early boot-time | ||
10 | * mappings, before the real ioremap() is functional. | ||
11 | * A boot-time mapping is currently limited to at most 16 pages. | ||
12 | */ | ||
13 | #ifndef __ASSEMBLY__ | ||
14 | extern void early_ioremap_init(void); | ||
15 | extern void early_ioremap_clear(void); | ||
16 | extern void early_ioremap_reset(void); | ||
17 | extern void *early_ioremap(unsigned long offset, unsigned long size); | ||
18 | extern void early_iounmap(void *addr, unsigned long size); | ||
19 | extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys); | ||
20 | #endif | ||
21 | |||
22 | #define build_mmio_read(name, size, type, reg, barrier) \ | ||
23 | static inline type name(const volatile void __iomem *addr) \ | ||
24 | { type ret; asm volatile("mov" size " %1,%0":"=" reg (ret) \ | ||
25 | :"m" (*(volatile type __force *)addr) barrier); return ret; } | ||
26 | |||
27 | #define build_mmio_write(name, size, type, reg, barrier) \ | ||
28 | static inline void name(type val, volatile void __iomem *addr) \ | ||
29 | { asm volatile("mov" size " %0,%1": :reg (val), \ | ||
30 | "m" (*(volatile type __force *)addr) barrier); } | ||
31 | |||
32 | build_mmio_read(readb, "b", unsigned char, "q", :"memory") | ||
33 | build_mmio_read(readw, "w", unsigned short, "r", :"memory") | ||
34 | build_mmio_read(readl, "l", unsigned int, "r", :"memory") | ||
35 | |||
36 | build_mmio_read(__readb, "b", unsigned char, "q", ) | ||
37 | build_mmio_read(__readw, "w", unsigned short, "r", ) | ||
38 | build_mmio_read(__readl, "l", unsigned int, "r", ) | ||
39 | |||
40 | build_mmio_write(writeb, "b", unsigned char, "q", :"memory") | ||
41 | build_mmio_write(writew, "w", unsigned short, "r", :"memory") | ||
42 | build_mmio_write(writel, "l", unsigned int, "r", :"memory") | ||
43 | |||
44 | build_mmio_write(__writeb, "b", unsigned char, "q", ) | ||
45 | build_mmio_write(__writew, "w", unsigned short, "r", ) | ||
46 | build_mmio_write(__writel, "l", unsigned int, "r", ) | ||
47 | |||
48 | #define readb_relaxed(a) __readb(a) | ||
49 | #define readw_relaxed(a) __readw(a) | ||
50 | #define readl_relaxed(a) __readl(a) | ||
51 | #define __raw_readb __readb | ||
52 | #define __raw_readw __readw | ||
53 | #define __raw_readl __readl | ||
54 | |||
55 | #define __raw_writeb __writeb | ||
56 | #define __raw_writew __writew | ||
57 | #define __raw_writel __writel | ||
58 | |||
59 | #define mmiowb() barrier() | ||
60 | |||
61 | #ifdef CONFIG_X86_64 | ||
62 | build_mmio_read(readq, "q", unsigned long, "r", :"memory") | ||
63 | build_mmio_read(__readq, "q", unsigned long, "r", ) | ||
64 | build_mmio_write(writeq, "q", unsigned long, "r", :"memory") | ||
65 | build_mmio_write(__writeq, "q", unsigned long, "r", ) | ||
66 | |||
67 | #define readq_relaxed(a) __readq(a) | ||
68 | #define __raw_readq __readq | ||
69 | #define __raw_writeq writeq | ||
70 | |||
71 | /* Let people know we have them */ | ||
72 | #define readq readq | ||
73 | #define writeq writeq | ||
74 | #endif | ||
75 | |||
6 | #ifdef CONFIG_X86_32 | 76 | #ifdef CONFIG_X86_32 |
7 | # include "io_32.h" | 77 | # include "io_32.h" |
8 | #else | 78 | #else |
@@ -16,4 +86,17 @@ extern int ioremap_change_attr(unsigned long vaddr, unsigned long size, | |||
16 | unsigned long prot_val); | 86 | unsigned long prot_val); |
17 | extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size); | 87 | extern void __iomem *ioremap_wc(unsigned long offset, unsigned long size); |
18 | 88 | ||
89 | /* | ||
90 | * early_ioremap() and early_iounmap() are for temporary early boot-time | ||
91 | * mappings, before the real ioremap() is functional. | ||
92 | * A boot-time mapping is currently limited to at most 16 pages. | ||
93 | */ | ||
94 | extern void early_ioremap_init(void); | ||
95 | extern void early_ioremap_clear(void); | ||
96 | extern void early_ioremap_reset(void); | ||
97 | extern void *early_ioremap(unsigned long offset, unsigned long size); | ||
98 | extern void early_iounmap(void *addr, unsigned long size); | ||
99 | extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys); | ||
100 | |||
101 | |||
19 | #endif /* _ASM_X86_IO_H */ | 102 | #endif /* _ASM_X86_IO_H */ |
diff --git a/include/asm-x86/io_32.h b/include/asm-x86/io_32.h index 049e81e797a0..4df44ed54077 100644 --- a/include/asm-x86/io_32.h +++ b/include/asm-x86/io_32.h | |||
@@ -122,18 +122,6 @@ static inline void __iomem *ioremap(resource_size_t offset, unsigned long size) | |||
122 | extern void iounmap(volatile void __iomem *addr); | 122 | extern void iounmap(volatile void __iomem *addr); |
123 | 123 | ||
124 | /* | 124 | /* |
125 | * early_ioremap() and early_iounmap() are for temporary early boot-time | ||
126 | * mappings, before the real ioremap() is functional. | ||
127 | * A boot-time mapping is currently limited to at most 16 pages. | ||
128 | */ | ||
129 | extern void early_ioremap_init(void); | ||
130 | extern void early_ioremap_clear(void); | ||
131 | extern void early_ioremap_reset(void); | ||
132 | extern void *early_ioremap(unsigned long offset, unsigned long size); | ||
133 | extern void early_iounmap(void *addr, unsigned long size); | ||
134 | extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys); | ||
135 | |||
136 | /* | ||
137 | * ISA I/O bus memory addresses are 1:1 with the physical address. | 125 | * ISA I/O bus memory addresses are 1:1 with the physical address. |
138 | */ | 126 | */ |
139 | #define isa_virt_to_bus virt_to_phys | 127 | #define isa_virt_to_bus virt_to_phys |
@@ -149,55 +137,6 @@ extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys); | |||
149 | #define virt_to_bus virt_to_phys | 137 | #define virt_to_bus virt_to_phys |
150 | #define bus_to_virt phys_to_virt | 138 | #define bus_to_virt phys_to_virt |
151 | 139 | ||
152 | /* | ||
153 | * readX/writeX() are used to access memory mapped devices. On some | ||
154 | * architectures the memory mapped IO stuff needs to be accessed | ||
155 | * differently. On the x86 architecture, we just read/write the | ||
156 | * memory location directly. | ||
157 | */ | ||
158 | |||
159 | static inline unsigned char readb(const volatile void __iomem *addr) | ||
160 | { | ||
161 | return *(volatile unsigned char __force *)addr; | ||
162 | } | ||
163 | |||
164 | static inline unsigned short readw(const volatile void __iomem *addr) | ||
165 | { | ||
166 | return *(volatile unsigned short __force *)addr; | ||
167 | } | ||
168 | |||
169 | static inline unsigned int readl(const volatile void __iomem *addr) | ||
170 | { | ||
171 | return *(volatile unsigned int __force *) addr; | ||
172 | } | ||
173 | |||
174 | #define readb_relaxed(addr) readb(addr) | ||
175 | #define readw_relaxed(addr) readw(addr) | ||
176 | #define readl_relaxed(addr) readl(addr) | ||
177 | #define __raw_readb readb | ||
178 | #define __raw_readw readw | ||
179 | #define __raw_readl readl | ||
180 | |||
181 | static inline void writeb(unsigned char b, volatile void __iomem *addr) | ||
182 | { | ||
183 | *(volatile unsigned char __force *)addr = b; | ||
184 | } | ||
185 | |||
186 | static inline void writew(unsigned short b, volatile void __iomem *addr) | ||
187 | { | ||
188 | *(volatile unsigned short __force *)addr = b; | ||
189 | } | ||
190 | |||
191 | static inline void writel(unsigned int b, volatile void __iomem *addr) | ||
192 | { | ||
193 | *(volatile unsigned int __force *)addr = b; | ||
194 | } | ||
195 | #define __raw_writeb writeb | ||
196 | #define __raw_writew writew | ||
197 | #define __raw_writel writel | ||
198 | |||
199 | #define mmiowb() | ||
200 | |||
201 | static inline void | 140 | static inline void |
202 | memset_io(volatile void __iomem *addr, unsigned char val, int count) | 141 | memset_io(volatile void __iomem *addr, unsigned char val, int count) |
203 | { | 142 | { |
diff --git a/include/asm-x86/io_64.h b/include/asm-x86/io_64.h index 0930bedf9e4d..ddd8058a5026 100644 --- a/include/asm-x86/io_64.h +++ b/include/asm-x86/io_64.h | |||
@@ -204,77 +204,6 @@ extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys); | |||
204 | #define virt_to_bus virt_to_phys | 204 | #define virt_to_bus virt_to_phys |
205 | #define bus_to_virt phys_to_virt | 205 | #define bus_to_virt phys_to_virt |
206 | 206 | ||
207 | /* | ||
208 | * readX/writeX() are used to access memory mapped devices. On some | ||
209 | * architectures the memory mapped IO stuff needs to be accessed | ||
210 | * differently. On the x86 architecture, we just read/write the | ||
211 | * memory location directly. | ||
212 | */ | ||
213 | |||
214 | static inline __u8 __readb(const volatile void __iomem *addr) | ||
215 | { | ||
216 | return *(__force volatile __u8 *)addr; | ||
217 | } | ||
218 | |||
219 | static inline __u16 __readw(const volatile void __iomem *addr) | ||
220 | { | ||
221 | return *(__force volatile __u16 *)addr; | ||
222 | } | ||
223 | |||
224 | static __always_inline __u32 __readl(const volatile void __iomem *addr) | ||
225 | { | ||
226 | return *(__force volatile __u32 *)addr; | ||
227 | } | ||
228 | |||
229 | static inline __u64 __readq(const volatile void __iomem *addr) | ||
230 | { | ||
231 | return *(__force volatile __u64 *)addr; | ||
232 | } | ||
233 | |||
234 | #define readb(x) __readb(x) | ||
235 | #define readw(x) __readw(x) | ||
236 | #define readl(x) __readl(x) | ||
237 | #define readq(x) __readq(x) | ||
238 | #define readb_relaxed(a) readb(a) | ||
239 | #define readw_relaxed(a) readw(a) | ||
240 | #define readl_relaxed(a) readl(a) | ||
241 | #define readq_relaxed(a) readq(a) | ||
242 | #define __raw_readb readb | ||
243 | #define __raw_readw readw | ||
244 | #define __raw_readl readl | ||
245 | #define __raw_readq readq | ||
246 | |||
247 | #define mmiowb() | ||
248 | |||
249 | static inline void __writel(__u32 b, volatile void __iomem *addr) | ||
250 | { | ||
251 | *(__force volatile __u32 *)addr = b; | ||
252 | } | ||
253 | |||
254 | static inline void __writeq(__u64 b, volatile void __iomem *addr) | ||
255 | { | ||
256 | *(__force volatile __u64 *)addr = b; | ||
257 | } | ||
258 | |||
259 | static inline void __writeb(__u8 b, volatile void __iomem *addr) | ||
260 | { | ||
261 | *(__force volatile __u8 *)addr = b; | ||
262 | } | ||
263 | |||
264 | static inline void __writew(__u16 b, volatile void __iomem *addr) | ||
265 | { | ||
266 | *(__force volatile __u16 *)addr = b; | ||
267 | } | ||
268 | |||
269 | #define writeq(val, addr) __writeq((val), (addr)) | ||
270 | #define writel(val, addr) __writel((val), (addr)) | ||
271 | #define writew(val, addr) __writew((val), (addr)) | ||
272 | #define writeb(val, addr) __writeb((val), (addr)) | ||
273 | #define __raw_writeb writeb | ||
274 | #define __raw_writew writew | ||
275 | #define __raw_writel writel | ||
276 | #define __raw_writeq writeq | ||
277 | |||
278 | void __memcpy_fromio(void *, unsigned long, unsigned); | 207 | void __memcpy_fromio(void *, unsigned long, unsigned); |
279 | void __memcpy_toio(unsigned long, const void *, unsigned); | 208 | void __memcpy_toio(unsigned long, const void *, unsigned); |
280 | 209 | ||
diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h index d593e14f0341..14f82bbcb5fd 100644 --- a/include/asm-x86/io_apic.h +++ b/include/asm-x86/io_apic.h | |||
@@ -11,6 +11,15 @@ | |||
11 | * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar | 11 | * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar |
12 | */ | 12 | */ |
13 | 13 | ||
14 | /* I/O Unit Redirection Table */ | ||
15 | #define IO_APIC_REDIR_VECTOR_MASK 0x000FF | ||
16 | #define IO_APIC_REDIR_DEST_LOGICAL 0x00800 | ||
17 | #define IO_APIC_REDIR_DEST_PHYSICAL 0x00000 | ||
18 | #define IO_APIC_REDIR_SEND_PENDING (1 << 12) | ||
19 | #define IO_APIC_REDIR_REMOTE_IRR (1 << 14) | ||
20 | #define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15) | ||
21 | #define IO_APIC_REDIR_MASKED (1 << 16) | ||
22 | |||
14 | /* | 23 | /* |
15 | * The structure of the IO-APIC: | 24 | * The structure of the IO-APIC: |
16 | */ | 25 | */ |
@@ -112,21 +121,32 @@ extern int nr_ioapic_registers[MAX_IO_APICS]; | |||
112 | 121 | ||
113 | #define MP_MAX_IOAPIC_PIN 127 | 122 | #define MP_MAX_IOAPIC_PIN 127 |
114 | 123 | ||
115 | struct mp_ioapic_routing { | 124 | struct mp_config_ioapic { |
116 | int apic_id; | 125 | unsigned long mp_apicaddr; |
117 | int gsi_base; | 126 | unsigned int mp_apicid; |
118 | int gsi_end; | 127 | unsigned char mp_type; |
119 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | 128 | unsigned char mp_apicver; |
129 | unsigned char mp_flags; | ||
130 | }; | ||
131 | |||
132 | struct mp_config_intsrc { | ||
133 | unsigned int mp_dstapic; | ||
134 | unsigned char mp_type; | ||
135 | unsigned char mp_irqtype; | ||
136 | unsigned short mp_irqflag; | ||
137 | unsigned char mp_srcbus; | ||
138 | unsigned char mp_srcbusirq; | ||
139 | unsigned char mp_dstirq; | ||
120 | }; | 140 | }; |
121 | 141 | ||
122 | /* I/O APIC entries */ | 142 | /* I/O APIC entries */ |
123 | extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS]; | 143 | extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS]; |
124 | 144 | ||
125 | /* # of MP IRQ source entries */ | 145 | /* # of MP IRQ source entries */ |
126 | extern int mp_irq_entries; | 146 | extern int mp_irq_entries; |
127 | 147 | ||
128 | /* MP IRQ source entries */ | 148 | /* MP IRQ source entries */ |
129 | extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; | 149 | extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
130 | 150 | ||
131 | /* non-0 if default (table-less) MP configuration */ | 151 | /* non-0 if default (table-less) MP configuration */ |
132 | extern int mpc_default_type; | 152 | extern int mpc_default_type; |
@@ -137,6 +157,9 @@ extern int sis_apic_bug; | |||
137 | /* 1 if "noapic" boot option passed */ | 157 | /* 1 if "noapic" boot option passed */ |
138 | extern int skip_ioapic_setup; | 158 | extern int skip_ioapic_setup; |
139 | 159 | ||
160 | /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */ | ||
161 | extern int timer_through_8259; | ||
162 | |||
140 | static inline void disable_ioapic_setup(void) | 163 | static inline void disable_ioapic_setup(void) |
141 | { | 164 | { |
142 | skip_ioapic_setup = 1; | 165 | skip_ioapic_setup = 1; |
@@ -162,6 +185,8 @@ extern void ioapic_init_mappings(void); | |||
162 | 185 | ||
163 | #else /* !CONFIG_X86_IO_APIC */ | 186 | #else /* !CONFIG_X86_IO_APIC */ |
164 | #define io_apic_assign_pci_irqs 0 | 187 | #define io_apic_assign_pci_irqs 0 |
188 | static const int timer_through_8259 = 0; | ||
189 | static inline void ioapic_init_mappings(void) { } | ||
165 | #endif | 190 | #endif |
166 | 191 | ||
167 | #endif | 192 | #endif |
diff --git a/include/asm-x86/iommu.h b/include/asm-x86/iommu.h index 07862fdd23c0..d63166fb3ab7 100644 --- a/include/asm-x86/iommu.h +++ b/include/asm-x86/iommu.h | |||
@@ -1,29 +1,42 @@ | |||
1 | #ifndef _ASM_X8664_GART_H | 1 | #ifndef _ASM_X8664_IOMMU_H |
2 | #define _ASM_X8664_GART_H 1 | 2 | #define _ASM_X8664_IOMMU_H 1 |
3 | 3 | ||
4 | extern void pci_iommu_shutdown(void); | 4 | extern void pci_iommu_shutdown(void); |
5 | extern void no_iommu_init(void); | 5 | extern void no_iommu_init(void); |
6 | extern int force_iommu, no_iommu; | 6 | extern int force_iommu, no_iommu; |
7 | extern int iommu_detected; | 7 | extern int iommu_detected; |
8 | #ifdef CONFIG_IOMMU | 8 | |
9 | #ifdef CONFIG_GART_IOMMU | ||
10 | extern int gart_iommu_aperture; | ||
11 | extern int gart_iommu_aperture_allowed; | ||
12 | extern int gart_iommu_aperture_disabled; | ||
13 | |||
14 | extern void early_gart_iommu_check(void); | ||
9 | extern void gart_iommu_init(void); | 15 | extern void gart_iommu_init(void); |
10 | extern void gart_iommu_shutdown(void); | 16 | extern void gart_iommu_shutdown(void); |
11 | extern void __init gart_parse_options(char *); | 17 | extern void __init gart_parse_options(char *); |
12 | extern void iommu_hole_init(void); | 18 | extern void gart_iommu_hole_init(void); |
13 | extern int fallback_aper_order; | 19 | |
14 | extern int fallback_aper_force; | ||
15 | extern int iommu_aperture; | ||
16 | extern int iommu_aperture_allowed; | ||
17 | extern int iommu_aperture_disabled; | ||
18 | extern int fix_aperture; | ||
19 | #else | 20 | #else |
20 | #define iommu_aperture 0 | 21 | #define gart_iommu_aperture 0 |
21 | #define iommu_aperture_allowed 0 | 22 | #define gart_iommu_aperture_allowed 0 |
23 | #define gart_iommu_aperture_disabled 1 | ||
22 | 24 | ||
25 | static inline void early_gart_iommu_check(void) | ||
26 | { | ||
27 | } | ||
28 | static inline void gart_iommu_init(void) | ||
29 | { | ||
30 | } | ||
23 | static inline void gart_iommu_shutdown(void) | 31 | static inline void gart_iommu_shutdown(void) |
24 | { | 32 | { |
25 | } | 33 | } |
26 | 34 | static inline void gart_parse_options(char *options) | |
35 | { | ||
36 | } | ||
37 | static inline void gart_iommu_hole_init(void) | ||
38 | { | ||
39 | } | ||
27 | #endif | 40 | #endif |
28 | 41 | ||
29 | #endif | 42 | #endif |
diff --git a/include/asm-x86/ipi.h b/include/asm-x86/ipi.h index ecc80f341f37..bb1c09f7a76c 100644 --- a/include/asm-x86/ipi.h +++ b/include/asm-x86/ipi.h | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include <asm/hw_irq.h> | 21 | #include <asm/hw_irq.h> |
22 | #include <asm/apic.h> | 22 | #include <asm/apic.h> |
23 | #include <asm/smp.h> | ||
23 | 24 | ||
24 | /* | 25 | /* |
25 | * the following functions deal with sending IPIs between CPUs. | 26 | * the following functions deal with sending IPIs between CPUs. |
@@ -121,7 +122,7 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector) | |||
121 | * - mbligh | 122 | * - mbligh |
122 | */ | 123 | */ |
123 | local_irq_save(flags); | 124 | local_irq_save(flags); |
124 | for_each_cpu_mask(query_cpu, mask) { | 125 | for_each_cpu_mask_nr(query_cpu, mask) { |
125 | __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu), | 126 | __send_IPI_dest_field(per_cpu(x86_cpu_to_apicid, query_cpu), |
126 | vector, APIC_DEST_PHYSICAL); | 127 | vector, APIC_DEST_PHYSICAL); |
127 | } | 128 | } |
diff --git a/include/asm-x86/irq.h b/include/asm-x86/irq.h index 7ba905465a53..1a2925757317 100644 --- a/include/asm-x86/irq.h +++ b/include/asm-x86/irq.h | |||
@@ -1,5 +1,50 @@ | |||
1 | #ifdef CONFIG_X86_32 | 1 | #ifndef _ASM_IRQ_H |
2 | # include "irq_32.h" | 2 | #define _ASM_IRQ_H |
3 | /* | ||
4 | * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar | ||
5 | * | ||
6 | * IRQ/IPI changes taken from work by Thomas Radke | ||
7 | * <tomsoft@informatik.tu-chemnitz.de> | ||
8 | */ | ||
9 | |||
10 | #include <asm/apicdef.h> | ||
11 | #include <asm/irq_vectors.h> | ||
12 | |||
13 | static inline int irq_canonicalize(int irq) | ||
14 | { | ||
15 | return ((irq == 2) ? 9 : irq); | ||
16 | } | ||
17 | |||
18 | #ifdef CONFIG_X86_LOCAL_APIC | ||
19 | # define ARCH_HAS_NMI_WATCHDOG | ||
20 | #endif | ||
21 | |||
22 | #ifdef CONFIG_4KSTACKS | ||
23 | extern void irq_ctx_init(int cpu); | ||
24 | extern void irq_ctx_exit(int cpu); | ||
25 | # define __ARCH_HAS_DO_SOFTIRQ | ||
3 | #else | 26 | #else |
4 | # include "irq_64.h" | 27 | # define irq_ctx_init(cpu) do { } while (0) |
28 | # define irq_ctx_exit(cpu) do { } while (0) | ||
29 | # ifdef CONFIG_X86_64 | ||
30 | # define __ARCH_HAS_DO_SOFTIRQ | ||
31 | # endif | ||
32 | #endif | ||
33 | |||
34 | #ifdef CONFIG_IRQBALANCE | ||
35 | extern int irqbalance_disable(char *str); | ||
36 | #endif | ||
37 | |||
38 | #ifdef CONFIG_HOTPLUG_CPU | ||
39 | #include <linux/cpumask.h> | ||
40 | extern void fixup_irqs(cpumask_t map); | ||
5 | #endif | 41 | #endif |
42 | |||
43 | extern unsigned int do_IRQ(struct pt_regs *regs); | ||
44 | extern void init_IRQ(void); | ||
45 | extern void native_init_IRQ(void); | ||
46 | |||
47 | /* Interrupt vector management */ | ||
48 | extern DECLARE_BITMAP(used_vectors, NR_VECTORS); | ||
49 | |||
50 | #endif /* _ASM_IRQ_H */ | ||
diff --git a/include/asm-x86/irq_32.h b/include/asm-x86/irq_32.h deleted file mode 100644 index 0b79f3185243..000000000000 --- a/include/asm-x86/irq_32.h +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | #ifndef _ASM_IRQ_H | ||
2 | #define _ASM_IRQ_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm/irq.h | ||
6 | * | ||
7 | * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar | ||
8 | * | ||
9 | * IRQ/IPI changes taken from work by Thomas Radke | ||
10 | * <tomsoft@informatik.tu-chemnitz.de> | ||
11 | */ | ||
12 | |||
13 | #include <linux/sched.h> | ||
14 | /* include comes from machine specific directory */ | ||
15 | #include "irq_vectors.h" | ||
16 | #include <asm/thread_info.h> | ||
17 | |||
18 | static inline int irq_canonicalize(int irq) | ||
19 | { | ||
20 | return ((irq == 2) ? 9 : irq); | ||
21 | } | ||
22 | |||
23 | #ifdef CONFIG_X86_LOCAL_APIC | ||
24 | # define ARCH_HAS_NMI_WATCHDOG /* See include/linux/nmi.h */ | ||
25 | #endif | ||
26 | |||
27 | #ifdef CONFIG_4KSTACKS | ||
28 | extern void irq_ctx_init(int cpu); | ||
29 | extern void irq_ctx_exit(int cpu); | ||
30 | # define __ARCH_HAS_DO_SOFTIRQ | ||
31 | #else | ||
32 | # define irq_ctx_init(cpu) do { } while (0) | ||
33 | # define irq_ctx_exit(cpu) do { } while (0) | ||
34 | #endif | ||
35 | |||
36 | #ifdef CONFIG_IRQBALANCE | ||
37 | extern int irqbalance_disable(char *str); | ||
38 | #endif | ||
39 | |||
40 | #ifdef CONFIG_HOTPLUG_CPU | ||
41 | extern void fixup_irqs(cpumask_t map); | ||
42 | #endif | ||
43 | |||
44 | unsigned int do_IRQ(struct pt_regs *regs); | ||
45 | void init_IRQ(void); | ||
46 | void __init native_init_IRQ(void); | ||
47 | |||
48 | /* Interrupt vector management */ | ||
49 | extern DECLARE_BITMAP(used_vectors, NR_VECTORS); | ||
50 | |||
51 | #endif /* _ASM_IRQ_H */ | ||
diff --git a/include/asm-x86/irq_64.h b/include/asm-x86/irq_64.h deleted file mode 100644 index 083d35a62c94..000000000000 --- a/include/asm-x86/irq_64.h +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | #ifndef _ASM_IRQ_H | ||
2 | #define _ASM_IRQ_H | ||
3 | |||
4 | /* | ||
5 | * linux/include/asm/irq.h | ||
6 | * | ||
7 | * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar | ||
8 | * | ||
9 | * IRQ/IPI changes taken from work by Thomas Radke | ||
10 | * <tomsoft@informatik.tu-chemnitz.de> | ||
11 | */ | ||
12 | |||
13 | #define TIMER_IRQ 0 | ||
14 | |||
15 | /* | ||
16 | * 16 8259A IRQ's, 208 potential APIC interrupt sources. | ||
17 | * Right now the APIC is mostly only used for SMP. | ||
18 | * 256 vectors is an architectural limit. (we can have | ||
19 | * more than 256 devices theoretically, but they will | ||
20 | * have to use shared interrupts) | ||
21 | * Since vectors 0x00-0x1f are used/reserved for the CPU, | ||
22 | * the usable vector space is 0x20-0xff (224 vectors) | ||
23 | */ | ||
24 | |||
25 | /* | ||
26 | * The maximum number of vectors supported by x86_64 processors | ||
27 | * is limited to 256. For processors other than x86_64, NR_VECTORS | ||
28 | * should be changed accordingly. | ||
29 | */ | ||
30 | #define NR_VECTORS 256 | ||
31 | |||
32 | #define FIRST_SYSTEM_VECTOR 0xef /* duplicated in hw_irq.h */ | ||
33 | |||
34 | #define NR_IRQS (NR_VECTORS + (32 * NR_CPUS)) | ||
35 | #define NR_IRQ_VECTORS NR_IRQS | ||
36 | |||
37 | static inline int irq_canonicalize(int irq) | ||
38 | { | ||
39 | return ((irq == 2) ? 9 : irq); | ||
40 | } | ||
41 | |||
42 | #define ARCH_HAS_NMI_WATCHDOG /* See include/linux/nmi.h */ | ||
43 | |||
44 | #ifdef CONFIG_HOTPLUG_CPU | ||
45 | #include <linux/cpumask.h> | ||
46 | extern void fixup_irqs(cpumask_t map); | ||
47 | #endif | ||
48 | |||
49 | #define __ARCH_HAS_DO_SOFTIRQ 1 | ||
50 | |||
51 | #endif /* _ASM_IRQ_H */ | ||
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h new file mode 100644 index 000000000000..90b1d1f12f08 --- /dev/null +++ b/include/asm-x86/irq_vectors.h | |||
@@ -0,0 +1,173 @@ | |||
1 | #ifndef _ASM_IRQ_VECTORS_H | ||
2 | #define _ASM_IRQ_VECTORS_H | ||
3 | |||
4 | #include <linux/threads.h> | ||
5 | |||
6 | #define NMI_VECTOR 0x02 | ||
7 | |||
8 | /* | ||
9 | * IDT vectors usable for external interrupt sources start | ||
10 | * at 0x20: | ||
11 | */ | ||
12 | #define FIRST_EXTERNAL_VECTOR 0x20 | ||
13 | |||
14 | #ifdef CONFIG_X86_32 | ||
15 | # define SYSCALL_VECTOR 0x80 | ||
16 | #else | ||
17 | # define IA32_SYSCALL_VECTOR 0x80 | ||
18 | #endif | ||
19 | |||
20 | /* | ||
21 | * Reserve the lowest usable priority level 0x20 - 0x2f for triggering | ||
22 | * cleanup after irq migration on 64 bit. | ||
23 | */ | ||
24 | #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR | ||
25 | |||
26 | /* | ||
27 | * Vectors 0x20-0x2f are used for ISA interrupts on 32 bit. | ||
28 | * Vectors 0x30-0x3f are used for ISA interrupts on 64 bit. | ||
29 | */ | ||
30 | #ifdef CONFIG_X86_32 | ||
31 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR) | ||
32 | #else | ||
33 | #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10) | ||
34 | #endif | ||
35 | #define IRQ1_VECTOR (IRQ0_VECTOR + 1) | ||
36 | #define IRQ2_VECTOR (IRQ0_VECTOR + 2) | ||
37 | #define IRQ3_VECTOR (IRQ0_VECTOR + 3) | ||
38 | #define IRQ4_VECTOR (IRQ0_VECTOR + 4) | ||
39 | #define IRQ5_VECTOR (IRQ0_VECTOR + 5) | ||
40 | #define IRQ6_VECTOR (IRQ0_VECTOR + 6) | ||
41 | #define IRQ7_VECTOR (IRQ0_VECTOR + 7) | ||
42 | #define IRQ8_VECTOR (IRQ0_VECTOR + 8) | ||
43 | #define IRQ9_VECTOR (IRQ0_VECTOR + 9) | ||
44 | #define IRQ10_VECTOR (IRQ0_VECTOR + 10) | ||
45 | #define IRQ11_VECTOR (IRQ0_VECTOR + 11) | ||
46 | #define IRQ12_VECTOR (IRQ0_VECTOR + 12) | ||
47 | #define IRQ13_VECTOR (IRQ0_VECTOR + 13) | ||
48 | #define IRQ14_VECTOR (IRQ0_VECTOR + 14) | ||
49 | #define IRQ15_VECTOR (IRQ0_VECTOR + 15) | ||
50 | |||
51 | /* | ||
52 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff | ||
53 | * | ||
54 | * some of the following vectors are 'rare', they are merged | ||
55 | * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. | ||
56 | * TLB, reschedule and local APIC vectors are performance-critical. | ||
57 | * | ||
58 | * Vectors 0xf0-0xfa are free (reserved for future Linux use). | ||
59 | */ | ||
60 | #ifdef CONFIG_X86_32 | ||
61 | |||
62 | # define SPURIOUS_APIC_VECTOR 0xff | ||
63 | # define ERROR_APIC_VECTOR 0xfe | ||
64 | # define INVALIDATE_TLB_VECTOR 0xfd | ||
65 | # define RESCHEDULE_VECTOR 0xfc | ||
66 | # define CALL_FUNCTION_VECTOR 0xfb | ||
67 | # define CALL_FUNCTION_SINGLE_VECTOR 0xfa | ||
68 | # define THERMAL_APIC_VECTOR 0xf0 | ||
69 | |||
70 | #else | ||
71 | |||
72 | #define SPURIOUS_APIC_VECTOR 0xff | ||
73 | #define ERROR_APIC_VECTOR 0xfe | ||
74 | #define RESCHEDULE_VECTOR 0xfd | ||
75 | #define CALL_FUNCTION_VECTOR 0xfc | ||
76 | #define CALL_FUNCTION_SINGLE_VECTOR 0xfb | ||
77 | #define THERMAL_APIC_VECTOR 0xfa | ||
78 | #define THRESHOLD_APIC_VECTOR 0xf9 | ||
79 | #define INVALIDATE_TLB_VECTOR_END 0xf7 | ||
80 | #define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */ | ||
81 | |||
82 | #define NUM_INVALIDATE_TLB_VECTORS 8 | ||
83 | |||
84 | #endif | ||
85 | |||
86 | /* | ||
87 | * Local APIC timer IRQ vector is on a different priority level, | ||
88 | * to work around the 'lost local interrupt if more than 2 IRQ | ||
89 | * sources per level' errata. | ||
90 | */ | ||
91 | #define LOCAL_TIMER_VECTOR 0xef | ||
92 | |||
93 | /* | ||
94 | * First APIC vector available to drivers: (vectors 0x30-0xee) we | ||
95 | * start at 0x31(0x41) to spread out vectors evenly between priority | ||
96 | * levels. (0x80 is the syscall vector) | ||
97 | */ | ||
98 | #ifdef CONFIG_X86_32 | ||
99 | # define FIRST_DEVICE_VECTOR 0x31 | ||
100 | #else | ||
101 | # define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2) | ||
102 | #endif | ||
103 | |||
104 | #define NR_VECTORS 256 | ||
105 | |||
106 | #define FPU_IRQ 13 | ||
107 | |||
108 | #define FIRST_VM86_IRQ 3 | ||
109 | #define LAST_VM86_IRQ 15 | ||
110 | #define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) | ||
111 | |||
112 | #if !defined(CONFIG_X86_VOYAGER) | ||
113 | |||
114 | # if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) || defined(CONFIG_X86_VISWS) | ||
115 | |||
116 | # define NR_IRQS 224 | ||
117 | |||
118 | # if (224 >= 32 * NR_CPUS) | ||
119 | # define NR_IRQ_VECTORS NR_IRQS | ||
120 | # else | ||
121 | # define NR_IRQ_VECTORS (32 * NR_CPUS) | ||
122 | # endif | ||
123 | |||
124 | # else /* IO_APIC || PARAVIRT */ | ||
125 | |||
126 | # define NR_IRQS 16 | ||
127 | # define NR_IRQ_VECTORS NR_IRQS | ||
128 | |||
129 | # endif | ||
130 | |||
131 | #else /* !VISWS && !VOYAGER */ | ||
132 | |||
133 | # define NR_IRQS 224 | ||
134 | # define NR_IRQ_VECTORS NR_IRQS | ||
135 | |||
136 | #endif /* VISWS */ | ||
137 | |||
138 | /* Voyager specific defines */ | ||
139 | /* These define the CPIs we use in linux */ | ||
140 | #define VIC_CPI_LEVEL0 0 | ||
141 | #define VIC_CPI_LEVEL1 1 | ||
142 | /* now the fake CPIs */ | ||
143 | #define VIC_TIMER_CPI 2 | ||
144 | #define VIC_INVALIDATE_CPI 3 | ||
145 | #define VIC_RESCHEDULE_CPI 4 | ||
146 | #define VIC_ENABLE_IRQ_CPI 5 | ||
147 | #define VIC_CALL_FUNCTION_CPI 6 | ||
148 | #define VIC_CALL_FUNCTION_SINGLE_CPI 7 | ||
149 | |||
150 | /* Now the QIC CPIs: Since we don't need the two initial levels, | ||
151 | * these are 2 less than the VIC CPIs */ | ||
152 | #define QIC_CPI_OFFSET 1 | ||
153 | #define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET) | ||
154 | #define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET) | ||
155 | #define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET) | ||
156 | #define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET) | ||
157 | #define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET) | ||
158 | #define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET) | ||
159 | |||
160 | #define VIC_START_FAKE_CPI VIC_TIMER_CPI | ||
161 | #define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI | ||
162 | |||
163 | /* this is the SYS_INT CPI. */ | ||
164 | #define VIC_SYS_INT 8 | ||
165 | #define VIC_CMN_INT 15 | ||
166 | |||
167 | /* This is the boot CPI for alternate processors. It gets overwritten | ||
168 | * by the above once the system has activated all available processors */ | ||
169 | #define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0 | ||
170 | #define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8) | ||
171 | |||
172 | |||
173 | #endif /* _ASM_IRQ_VECTORS_H */ | ||
diff --git a/include/asm-x86/irqflags.h b/include/asm-x86/irqflags.h index c242527f970e..424acb48cd61 100644 --- a/include/asm-x86/irqflags.h +++ b/include/asm-x86/irqflags.h | |||
@@ -111,14 +111,35 @@ static inline unsigned long __raw_local_irq_save(void) | |||
111 | #define DISABLE_INTERRUPTS(x) cli | 111 | #define DISABLE_INTERRUPTS(x) cli |
112 | 112 | ||
113 | #ifdef CONFIG_X86_64 | 113 | #ifdef CONFIG_X86_64 |
114 | #define SWAPGS swapgs | ||
115 | /* | ||
116 | * Currently paravirt can't handle swapgs nicely when we | ||
117 | * don't have a stack we can rely on (such as a user space | ||
118 | * stack). So we either find a way around these or just fault | ||
119 | * and emulate if a guest tries to call swapgs directly. | ||
120 | * | ||
121 | * Either way, this is a good way to document that we don't | ||
122 | * have a reliable stack. x86_64 only. | ||
123 | */ | ||
124 | #define SWAPGS_UNSAFE_STACK swapgs | ||
125 | |||
126 | #define PARAVIRT_ADJUST_EXCEPTION_FRAME /* */ | ||
127 | |||
114 | #define INTERRUPT_RETURN iretq | 128 | #define INTERRUPT_RETURN iretq |
115 | #define ENABLE_INTERRUPTS_SYSCALL_RET \ | 129 | #define USERGS_SYSRET64 \ |
116 | movq %gs:pda_oldrsp, %rsp; \ | 130 | swapgs; \ |
117 | swapgs; \ | 131 | sysretq; |
118 | sysretq; | 132 | #define USERGS_SYSRET32 \ |
133 | swapgs; \ | ||
134 | sysretl | ||
135 | #define ENABLE_INTERRUPTS_SYSEXIT32 \ | ||
136 | swapgs; \ | ||
137 | sti; \ | ||
138 | sysexit | ||
139 | |||
119 | #else | 140 | #else |
120 | #define INTERRUPT_RETURN iret | 141 | #define INTERRUPT_RETURN iret |
121 | #define ENABLE_INTERRUPTS_SYSCALL_RET sti; sysexit | 142 | #define ENABLE_INTERRUPTS_SYSEXIT sti; sysexit |
122 | #define GET_CR0_INTO_EAX movl %cr0, %eax | 143 | #define GET_CR0_INTO_EAX movl %cr0, %eax |
123 | #endif | 144 | #endif |
124 | 145 | ||
@@ -169,18 +190,6 @@ static inline void trace_hardirqs_fixup(void) | |||
169 | #else | 190 | #else |
170 | 191 | ||
171 | #ifdef CONFIG_X86_64 | 192 | #ifdef CONFIG_X86_64 |
172 | /* | ||
173 | * Currently paravirt can't handle swapgs nicely when we | ||
174 | * don't have a stack we can rely on (such as a user space | ||
175 | * stack). So we either find a way around these or just fault | ||
176 | * and emulate if a guest tries to call swapgs directly. | ||
177 | * | ||
178 | * Either way, this is a good way to document that we don't | ||
179 | * have a reliable stack. x86_64 only. | ||
180 | */ | ||
181 | #define SWAPGS_UNSAFE_STACK swapgs | ||
182 | #define ARCH_TRACE_IRQS_ON call trace_hardirqs_on_thunk | ||
183 | #define ARCH_TRACE_IRQS_OFF call trace_hardirqs_off_thunk | ||
184 | #define ARCH_LOCKDEP_SYS_EXIT call lockdep_sys_exit_thunk | 193 | #define ARCH_LOCKDEP_SYS_EXIT call lockdep_sys_exit_thunk |
185 | #define ARCH_LOCKDEP_SYS_EXIT_IRQ \ | 194 | #define ARCH_LOCKDEP_SYS_EXIT_IRQ \ |
186 | TRACE_IRQS_ON; \ | 195 | TRACE_IRQS_ON; \ |
@@ -192,24 +201,6 @@ static inline void trace_hardirqs_fixup(void) | |||
192 | TRACE_IRQS_OFF; | 201 | TRACE_IRQS_OFF; |
193 | 202 | ||
194 | #else | 203 | #else |
195 | #define ARCH_TRACE_IRQS_ON \ | ||
196 | pushl %eax; \ | ||
197 | pushl %ecx; \ | ||
198 | pushl %edx; \ | ||
199 | call trace_hardirqs_on; \ | ||
200 | popl %edx; \ | ||
201 | popl %ecx; \ | ||
202 | popl %eax; | ||
203 | |||
204 | #define ARCH_TRACE_IRQS_OFF \ | ||
205 | pushl %eax; \ | ||
206 | pushl %ecx; \ | ||
207 | pushl %edx; \ | ||
208 | call trace_hardirqs_off; \ | ||
209 | popl %edx; \ | ||
210 | popl %ecx; \ | ||
211 | popl %eax; | ||
212 | |||
213 | #define ARCH_LOCKDEP_SYS_EXIT \ | 204 | #define ARCH_LOCKDEP_SYS_EXIT \ |
214 | pushl %eax; \ | 205 | pushl %eax; \ |
215 | pushl %ecx; \ | 206 | pushl %ecx; \ |
@@ -223,8 +214,8 @@ static inline void trace_hardirqs_fixup(void) | |||
223 | #endif | 214 | #endif |
224 | 215 | ||
225 | #ifdef CONFIG_TRACE_IRQFLAGS | 216 | #ifdef CONFIG_TRACE_IRQFLAGS |
226 | # define TRACE_IRQS_ON ARCH_TRACE_IRQS_ON | 217 | # define TRACE_IRQS_ON call trace_hardirqs_on_thunk; |
227 | # define TRACE_IRQS_OFF ARCH_TRACE_IRQS_OFF | 218 | # define TRACE_IRQS_OFF call trace_hardirqs_off_thunk; |
228 | #else | 219 | #else |
229 | # define TRACE_IRQS_ON | 220 | # define TRACE_IRQS_ON |
230 | # define TRACE_IRQS_OFF | 221 | # define TRACE_IRQS_OFF |
diff --git a/include/asm-x86/kvm.h b/include/asm-x86/kvm.h index 80eefef2cc76..6f1840812e59 100644 --- a/include/asm-x86/kvm.h +++ b/include/asm-x86/kvm.h | |||
@@ -228,5 +228,6 @@ struct kvm_pit_state { | |||
228 | #define KVM_TRC_CLTS (KVM_TRC_HANDLER + 0x12) | 228 | #define KVM_TRC_CLTS (KVM_TRC_HANDLER + 0x12) |
229 | #define KVM_TRC_LMSW (KVM_TRC_HANDLER + 0x13) | 229 | #define KVM_TRC_LMSW (KVM_TRC_HANDLER + 0x13) |
230 | #define KVM_TRC_APIC_ACCESS (KVM_TRC_HANDLER + 0x14) | 230 | #define KVM_TRC_APIC_ACCESS (KVM_TRC_HANDLER + 0x14) |
231 | #define KVM_TRC_TDP_FAULT (KVM_TRC_HANDLER + 0x15) | ||
231 | 232 | ||
232 | #endif | 233 | #endif |
diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h index 844f2a89afbc..fdde0bedaa90 100644 --- a/include/asm-x86/kvm_host.h +++ b/include/asm-x86/kvm_host.h | |||
@@ -27,6 +27,7 @@ | |||
27 | #define KVM_PRIVATE_MEM_SLOTS 4 | 27 | #define KVM_PRIVATE_MEM_SLOTS 4 |
28 | 28 | ||
29 | #define KVM_PIO_PAGE_OFFSET 1 | 29 | #define KVM_PIO_PAGE_OFFSET 1 |
30 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 | ||
30 | 31 | ||
31 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) | 32 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
32 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | 33 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) |
@@ -79,6 +80,7 @@ | |||
79 | #define KVM_MIN_FREE_MMU_PAGES 5 | 80 | #define KVM_MIN_FREE_MMU_PAGES 5 |
80 | #define KVM_REFILL_PAGES 25 | 81 | #define KVM_REFILL_PAGES 25 |
81 | #define KVM_MAX_CPUID_ENTRIES 40 | 82 | #define KVM_MAX_CPUID_ENTRIES 40 |
83 | #define KVM_NR_VAR_MTRR 8 | ||
82 | 84 | ||
83 | extern spinlock_t kvm_lock; | 85 | extern spinlock_t kvm_lock; |
84 | extern struct list_head vm_list; | 86 | extern struct list_head vm_list; |
@@ -109,12 +111,12 @@ enum { | |||
109 | }; | 111 | }; |
110 | 112 | ||
111 | enum { | 113 | enum { |
114 | VCPU_SREG_ES, | ||
112 | VCPU_SREG_CS, | 115 | VCPU_SREG_CS, |
116 | VCPU_SREG_SS, | ||
113 | VCPU_SREG_DS, | 117 | VCPU_SREG_DS, |
114 | VCPU_SREG_ES, | ||
115 | VCPU_SREG_FS, | 118 | VCPU_SREG_FS, |
116 | VCPU_SREG_GS, | 119 | VCPU_SREG_GS, |
117 | VCPU_SREG_SS, | ||
118 | VCPU_SREG_TR, | 120 | VCPU_SREG_TR, |
119 | VCPU_SREG_LDTR, | 121 | VCPU_SREG_LDTR, |
120 | }; | 122 | }; |
@@ -243,6 +245,7 @@ struct kvm_vcpu_arch { | |||
243 | gfn_t last_pt_write_gfn; | 245 | gfn_t last_pt_write_gfn; |
244 | int last_pt_write_count; | 246 | int last_pt_write_count; |
245 | u64 *last_pte_updated; | 247 | u64 *last_pte_updated; |
248 | gfn_t last_pte_gfn; | ||
246 | 249 | ||
247 | struct { | 250 | struct { |
248 | gfn_t gfn; /* presumed gfn during guest pte update */ | 251 | gfn_t gfn; /* presumed gfn during guest pte update */ |
@@ -287,6 +290,10 @@ struct kvm_vcpu_arch { | |||
287 | unsigned int hv_clock_tsc_khz; | 290 | unsigned int hv_clock_tsc_khz; |
288 | unsigned int time_offset; | 291 | unsigned int time_offset; |
289 | struct page *time_page; | 292 | struct page *time_page; |
293 | |||
294 | bool nmi_pending; | ||
295 | |||
296 | u64 mtrr[0x100]; | ||
290 | }; | 297 | }; |
291 | 298 | ||
292 | struct kvm_mem_alias { | 299 | struct kvm_mem_alias { |
@@ -344,6 +351,7 @@ struct kvm_vcpu_stat { | |||
344 | u32 mmio_exits; | 351 | u32 mmio_exits; |
345 | u32 signal_exits; | 352 | u32 signal_exits; |
346 | u32 irq_window_exits; | 353 | u32 irq_window_exits; |
354 | u32 nmi_window_exits; | ||
347 | u32 halt_exits; | 355 | u32 halt_exits; |
348 | u32 halt_wakeup; | 356 | u32 halt_wakeup; |
349 | u32 request_irq_exits; | 357 | u32 request_irq_exits; |
@@ -379,7 +387,6 @@ struct kvm_x86_ops { | |||
379 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | 387 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); |
380 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | 388 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); |
381 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | 389 | void (*vcpu_put)(struct kvm_vcpu *vcpu); |
382 | void (*vcpu_decache)(struct kvm_vcpu *vcpu); | ||
383 | 390 | ||
384 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | 391 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, |
385 | struct kvm_debug_guest *dbg); | 392 | struct kvm_debug_guest *dbg); |
@@ -497,6 +504,10 @@ int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, | |||
497 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | 504 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, |
498 | unsigned long value); | 505 | unsigned long value); |
499 | 506 | ||
507 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); | ||
508 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, | ||
509 | int type_bits, int seg); | ||
510 | |||
500 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason); | 511 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason); |
501 | 512 | ||
502 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); | 513 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
@@ -515,6 +526,8 @@ void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |||
515 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, | 526 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
516 | u32 error_code); | 527 | u32 error_code); |
517 | 528 | ||
529 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); | ||
530 | |||
518 | void fx_init(struct kvm_vcpu *vcpu); | 531 | void fx_init(struct kvm_vcpu *vcpu); |
519 | 532 | ||
520 | int emulator_read_std(unsigned long addr, | 533 | int emulator_read_std(unsigned long addr, |
@@ -554,55 +567,53 @@ static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |||
554 | return (struct kvm_mmu_page *)page_private(page); | 567 | return (struct kvm_mmu_page *)page_private(page); |
555 | } | 568 | } |
556 | 569 | ||
557 | static inline u16 read_fs(void) | 570 | static inline u16 kvm_read_fs(void) |
558 | { | 571 | { |
559 | u16 seg; | 572 | u16 seg; |
560 | asm("mov %%fs, %0" : "=g"(seg)); | 573 | asm("mov %%fs, %0" : "=g"(seg)); |
561 | return seg; | 574 | return seg; |
562 | } | 575 | } |
563 | 576 | ||
564 | static inline u16 read_gs(void) | 577 | static inline u16 kvm_read_gs(void) |
565 | { | 578 | { |
566 | u16 seg; | 579 | u16 seg; |
567 | asm("mov %%gs, %0" : "=g"(seg)); | 580 | asm("mov %%gs, %0" : "=g"(seg)); |
568 | return seg; | 581 | return seg; |
569 | } | 582 | } |
570 | 583 | ||
571 | static inline u16 read_ldt(void) | 584 | static inline u16 kvm_read_ldt(void) |
572 | { | 585 | { |
573 | u16 ldt; | 586 | u16 ldt; |
574 | asm("sldt %0" : "=g"(ldt)); | 587 | asm("sldt %0" : "=g"(ldt)); |
575 | return ldt; | 588 | return ldt; |
576 | } | 589 | } |
577 | 590 | ||
578 | static inline void load_fs(u16 sel) | 591 | static inline void kvm_load_fs(u16 sel) |
579 | { | 592 | { |
580 | asm("mov %0, %%fs" : : "rm"(sel)); | 593 | asm("mov %0, %%fs" : : "rm"(sel)); |
581 | } | 594 | } |
582 | 595 | ||
583 | static inline void load_gs(u16 sel) | 596 | static inline void kvm_load_gs(u16 sel) |
584 | { | 597 | { |
585 | asm("mov %0, %%gs" : : "rm"(sel)); | 598 | asm("mov %0, %%gs" : : "rm"(sel)); |
586 | } | 599 | } |
587 | 600 | ||
588 | #ifndef load_ldt | 601 | static inline void kvm_load_ldt(u16 sel) |
589 | static inline void load_ldt(u16 sel) | ||
590 | { | 602 | { |
591 | asm("lldt %0" : : "rm"(sel)); | 603 | asm("lldt %0" : : "rm"(sel)); |
592 | } | 604 | } |
593 | #endif | ||
594 | 605 | ||
595 | static inline void get_idt(struct descriptor_table *table) | 606 | static inline void kvm_get_idt(struct descriptor_table *table) |
596 | { | 607 | { |
597 | asm("sidt %0" : "=m"(*table)); | 608 | asm("sidt %0" : "=m"(*table)); |
598 | } | 609 | } |
599 | 610 | ||
600 | static inline void get_gdt(struct descriptor_table *table) | 611 | static inline void kvm_get_gdt(struct descriptor_table *table) |
601 | { | 612 | { |
602 | asm("sgdt %0" : "=m"(*table)); | 613 | asm("sgdt %0" : "=m"(*table)); |
603 | } | 614 | } |
604 | 615 | ||
605 | static inline unsigned long read_tr_base(void) | 616 | static inline unsigned long kvm_read_tr_base(void) |
606 | { | 617 | { |
607 | u16 tr; | 618 | u16 tr; |
608 | asm("str %0" : "=g"(tr)); | 619 | asm("str %0" : "=g"(tr)); |
@@ -619,17 +630,17 @@ static inline unsigned long read_msr(unsigned long msr) | |||
619 | } | 630 | } |
620 | #endif | 631 | #endif |
621 | 632 | ||
622 | static inline void fx_save(struct i387_fxsave_struct *image) | 633 | static inline void kvm_fx_save(struct i387_fxsave_struct *image) |
623 | { | 634 | { |
624 | asm("fxsave (%0)":: "r" (image)); | 635 | asm("fxsave (%0)":: "r" (image)); |
625 | } | 636 | } |
626 | 637 | ||
627 | static inline void fx_restore(struct i387_fxsave_struct *image) | 638 | static inline void kvm_fx_restore(struct i387_fxsave_struct *image) |
628 | { | 639 | { |
629 | asm("fxrstor (%0)":: "r" (image)); | 640 | asm("fxrstor (%0)":: "r" (image)); |
630 | } | 641 | } |
631 | 642 | ||
632 | static inline void fx_finit(void) | 643 | static inline void kvm_fx_finit(void) |
633 | { | 644 | { |
634 | asm("finit"); | 645 | asm("finit"); |
635 | } | 646 | } |
@@ -691,4 +702,30 @@ enum { | |||
691 | trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \ | 702 | trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \ |
692 | vcpu, 0, 0, 0, 0, 0, 0) | 703 | vcpu, 0, 0, 0, 0, 0, 0) |
693 | 704 | ||
705 | #ifdef CONFIG_64BIT | ||
706 | # define KVM_EX_ENTRY ".quad" | ||
707 | # define KVM_EX_PUSH "pushq" | ||
708 | #else | ||
709 | # define KVM_EX_ENTRY ".long" | ||
710 | # define KVM_EX_PUSH "pushl" | ||
711 | #endif | ||
712 | |||
713 | /* | ||
714 | * Hardware virtualization extension instructions may fault if a | ||
715 | * reboot turns off virtualization while processes are running. | ||
716 | * Trap the fault and ignore the instruction if that happens. | ||
717 | */ | ||
718 | asmlinkage void kvm_handle_fault_on_reboot(void); | ||
719 | |||
720 | #define __kvm_handle_fault_on_reboot(insn) \ | ||
721 | "666: " insn "\n\t" \ | ||
722 | ".pushsection .text.fixup, \"ax\" \n" \ | ||
723 | "667: \n\t" \ | ||
724 | KVM_EX_PUSH " $666b \n\t" \ | ||
725 | "jmp kvm_handle_fault_on_reboot \n\t" \ | ||
726 | ".popsection \n\t" \ | ||
727 | ".pushsection __ex_table, \"a\" \n\t" \ | ||
728 | KVM_EX_ENTRY " 666b, 667b \n\t" \ | ||
729 | ".popsection" | ||
730 | |||
694 | #endif | 731 | #endif |
diff --git a/include/asm-x86/kvm_x86_emulate.h b/include/asm-x86/kvm_x86_emulate.h index b877bbd2d3a7..4e8c1e48d91d 100644 --- a/include/asm-x86/kvm_x86_emulate.h +++ b/include/asm-x86/kvm_x86_emulate.h | |||
@@ -124,7 +124,8 @@ struct decode_cache { | |||
124 | u8 rex_prefix; | 124 | u8 rex_prefix; |
125 | struct operand src; | 125 | struct operand src; |
126 | struct operand dst; | 126 | struct operand dst; |
127 | unsigned long *override_base; | 127 | bool has_seg_override; |
128 | u8 seg_override; | ||
128 | unsigned int d; | 129 | unsigned int d; |
129 | unsigned long regs[NR_VCPU_REGS]; | 130 | unsigned long regs[NR_VCPU_REGS]; |
130 | unsigned long eip; | 131 | unsigned long eip; |
@@ -134,6 +135,7 @@ struct decode_cache { | |||
134 | u8 modrm_reg; | 135 | u8 modrm_reg; |
135 | u8 modrm_rm; | 136 | u8 modrm_rm; |
136 | u8 use_modrm_ea; | 137 | u8 use_modrm_ea; |
138 | bool rip_relative; | ||
137 | unsigned long modrm_ea; | 139 | unsigned long modrm_ea; |
138 | void *modrm_ptr; | 140 | void *modrm_ptr; |
139 | unsigned long modrm_val; | 141 | unsigned long modrm_val; |
@@ -150,12 +152,7 @@ struct x86_emulate_ctxt { | |||
150 | /* Emulated execution mode, represented by an X86EMUL_MODE value. */ | 152 | /* Emulated execution mode, represented by an X86EMUL_MODE value. */ |
151 | int mode; | 153 | int mode; |
152 | 154 | ||
153 | unsigned long cs_base; | 155 | u32 cs_base; |
154 | unsigned long ds_base; | ||
155 | unsigned long es_base; | ||
156 | unsigned long ss_base; | ||
157 | unsigned long gs_base; | ||
158 | unsigned long fs_base; | ||
159 | 156 | ||
160 | /* decode cache */ | 157 | /* decode cache */ |
161 | 158 | ||
diff --git a/include/asm-x86/mach-bigsmp/mach_apic.h b/include/asm-x86/mach-bigsmp/mach_apic.h index 8327907c79bf..c3b9dc6970c9 100644 --- a/include/asm-x86/mach-bigsmp/mach_apic.h +++ b/include/asm-x86/mach-bigsmp/mach_apic.h | |||
@@ -63,9 +63,9 @@ static inline void init_apic_ldr(void) | |||
63 | unsigned long val; | 63 | unsigned long val; |
64 | int cpu = smp_processor_id(); | 64 | int cpu = smp_processor_id(); |
65 | 65 | ||
66 | apic_write_around(APIC_DFR, APIC_DFR_VALUE); | 66 | apic_write(APIC_DFR, APIC_DFR_VALUE); |
67 | val = calculate_ldr(cpu); | 67 | val = calculate_ldr(cpu); |
68 | apic_write_around(APIC_LDR, val); | 68 | apic_write(APIC_LDR, val); |
69 | } | 69 | } |
70 | 70 | ||
71 | static inline void setup_apic_routing(void) | 71 | static inline void setup_apic_routing(void) |
@@ -81,7 +81,7 @@ static inline int multi_timer_check(int apic, int irq) | |||
81 | 81 | ||
82 | static inline int apicid_to_node(int logical_apicid) | 82 | static inline int apicid_to_node(int logical_apicid) |
83 | { | 83 | { |
84 | return (0); | 84 | return apicid_2_node[hard_smp_processor_id()]; |
85 | } | 85 | } |
86 | 86 | ||
87 | static inline int cpu_present_to_apicid(int mps_cpu) | 87 | static inline int cpu_present_to_apicid(int mps_cpu) |
diff --git a/include/asm-x86/mach-bigsmp/mach_mpspec.h b/include/asm-x86/mach-bigsmp/mach_mpspec.h deleted file mode 100644 index 6b5dadcf1d0e..000000000000 --- a/include/asm-x86/mach-bigsmp/mach_mpspec.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_MPSPEC_H | ||
2 | #define __ASM_MACH_MPSPEC_H | ||
3 | |||
4 | #define MAX_IRQ_SOURCES 256 | ||
5 | |||
6 | #define MAX_MP_BUSSES 32 | ||
7 | |||
8 | #endif /* __ASM_MACH_MPSPEC_H */ | ||
diff --git a/include/asm-x86/mach-default/entry_arch.h b/include/asm-x86/mach-default/entry_arch.h index bc861469bdba..9283b60a1dd2 100644 --- a/include/asm-x86/mach-default/entry_arch.h +++ b/include/asm-x86/mach-default/entry_arch.h | |||
@@ -13,6 +13,7 @@ | |||
13 | BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) | 13 | BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) |
14 | BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) | 14 | BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) |
15 | BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) | 15 | BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) |
16 | BUILD_INTERRUPT(call_function_single_interrupt,CALL_FUNCTION_SINGLE_VECTOR) | ||
16 | #endif | 17 | #endif |
17 | 18 | ||
18 | /* | 19 | /* |
diff --git a/include/asm-x86/mach-default/irq_vectors.h b/include/asm-x86/mach-default/irq_vectors.h deleted file mode 100644 index 881c63ca61ad..000000000000 --- a/include/asm-x86/mach-default/irq_vectors.h +++ /dev/null | |||
@@ -1,96 +0,0 @@ | |||
1 | /* | ||
2 | * This file should contain #defines for all of the interrupt vector | ||
3 | * numbers used by this architecture. | ||
4 | * | ||
5 | * In addition, there are some standard defines: | ||
6 | * | ||
7 | * FIRST_EXTERNAL_VECTOR: | ||
8 | * The first free place for external interrupts | ||
9 | * | ||
10 | * SYSCALL_VECTOR: | ||
11 | * The IRQ vector a syscall makes the user to kernel transition | ||
12 | * under. | ||
13 | * | ||
14 | * TIMER_IRQ: | ||
15 | * The IRQ number the timer interrupt comes in at. | ||
16 | * | ||
17 | * NR_IRQS: | ||
18 | * The total number of interrupt vectors (including all the | ||
19 | * architecture specific interrupts) needed. | ||
20 | * | ||
21 | */ | ||
22 | #ifndef _ASM_IRQ_VECTORS_H | ||
23 | #define _ASM_IRQ_VECTORS_H | ||
24 | |||
25 | /* | ||
26 | * IDT vectors usable for external interrupt sources start | ||
27 | * at 0x20: | ||
28 | */ | ||
29 | #define FIRST_EXTERNAL_VECTOR 0x20 | ||
30 | |||
31 | #define SYSCALL_VECTOR 0x80 | ||
32 | |||
33 | /* | ||
34 | * Vectors 0x20-0x2f are used for ISA interrupts. | ||
35 | */ | ||
36 | |||
37 | /* | ||
38 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff | ||
39 | * | ||
40 | * some of the following vectors are 'rare', they are merged | ||
41 | * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. | ||
42 | * TLB, reschedule and local APIC vectors are performance-critical. | ||
43 | * | ||
44 | * Vectors 0xf0-0xfa are free (reserved for future Linux use). | ||
45 | */ | ||
46 | #define SPURIOUS_APIC_VECTOR 0xff | ||
47 | #define ERROR_APIC_VECTOR 0xfe | ||
48 | #define INVALIDATE_TLB_VECTOR 0xfd | ||
49 | #define RESCHEDULE_VECTOR 0xfc | ||
50 | #define CALL_FUNCTION_VECTOR 0xfb | ||
51 | |||
52 | #define THERMAL_APIC_VECTOR 0xf0 | ||
53 | /* | ||
54 | * Local APIC timer IRQ vector is on a different priority level, | ||
55 | * to work around the 'lost local interrupt if more than 2 IRQ | ||
56 | * sources per level' errata. | ||
57 | */ | ||
58 | #define LOCAL_TIMER_VECTOR 0xef | ||
59 | |||
60 | /* | ||
61 | * First APIC vector available to drivers: (vectors 0x30-0xee) | ||
62 | * we start at 0x31 to spread out vectors evenly between priority | ||
63 | * levels. (0x80 is the syscall vector) | ||
64 | */ | ||
65 | #define FIRST_DEVICE_VECTOR 0x31 | ||
66 | #define FIRST_SYSTEM_VECTOR 0xef | ||
67 | |||
68 | #define TIMER_IRQ 0 | ||
69 | |||
70 | /* | ||
71 | * 16 8259A IRQ's, 208 potential APIC interrupt sources. | ||
72 | * Right now the APIC is mostly only used for SMP. | ||
73 | * 256 vectors is an architectural limit. (we can have | ||
74 | * more than 256 devices theoretically, but they will | ||
75 | * have to use shared interrupts) | ||
76 | * Since vectors 0x00-0x1f are used/reserved for the CPU, | ||
77 | * the usable vector space is 0x20-0xff (224 vectors) | ||
78 | */ | ||
79 | |||
80 | /* | ||
81 | * The maximum number of vectors supported by i386 processors | ||
82 | * is limited to 256. For processors other than i386, NR_VECTORS | ||
83 | * should be changed accordingly. | ||
84 | */ | ||
85 | #define NR_VECTORS 256 | ||
86 | |||
87 | #include "irq_vectors_limits.h" | ||
88 | |||
89 | #define FPU_IRQ 13 | ||
90 | |||
91 | #define FIRST_VM86_IRQ 3 | ||
92 | #define LAST_VM86_IRQ 15 | ||
93 | #define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) | ||
94 | |||
95 | |||
96 | #endif /* _ASM_IRQ_VECTORS_H */ | ||
diff --git a/include/asm-x86/mach-default/irq_vectors_limits.h b/include/asm-x86/mach-default/irq_vectors_limits.h deleted file mode 100644 index a90c7a60109f..000000000000 --- a/include/asm-x86/mach-default/irq_vectors_limits.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | #ifndef _ASM_IRQ_VECTORS_LIMITS_H | ||
2 | #define _ASM_IRQ_VECTORS_LIMITS_H | ||
3 | |||
4 | #if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) | ||
5 | #define NR_IRQS 224 | ||
6 | # if (224 >= 32 * NR_CPUS) | ||
7 | # define NR_IRQ_VECTORS NR_IRQS | ||
8 | # else | ||
9 | # define NR_IRQ_VECTORS (32 * NR_CPUS) | ||
10 | # endif | ||
11 | #else | ||
12 | #define NR_IRQS 16 | ||
13 | #define NR_IRQ_VECTORS NR_IRQS | ||
14 | #endif | ||
15 | |||
16 | #endif /* _ASM_IRQ_VECTORS_LIMITS_H */ | ||
diff --git a/include/asm-x86/mach-default/mach_apic.h b/include/asm-x86/mach-default/mach_apic.h index 21003b56ae95..f3226b9a6b82 100644 --- a/include/asm-x86/mach-default/mach_apic.h +++ b/include/asm-x86/mach-default/mach_apic.h | |||
@@ -46,10 +46,10 @@ static inline void init_apic_ldr(void) | |||
46 | { | 46 | { |
47 | unsigned long val; | 47 | unsigned long val; |
48 | 48 | ||
49 | apic_write_around(APIC_DFR, APIC_DFR_VALUE); | 49 | apic_write(APIC_DFR, APIC_DFR_VALUE); |
50 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | 50 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
51 | val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); | 51 | val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); |
52 | apic_write_around(APIC_LDR, val); | 52 | apic_write(APIC_LDR, val); |
53 | } | 53 | } |
54 | 54 | ||
55 | static inline int apic_id_registered(void) | 55 | static inline int apic_id_registered(void) |
@@ -77,7 +77,11 @@ static inline void setup_apic_routing(void) | |||
77 | 77 | ||
78 | static inline int apicid_to_node(int logical_apicid) | 78 | static inline int apicid_to_node(int logical_apicid) |
79 | { | 79 | { |
80 | #ifdef CONFIG_SMP | ||
81 | return apicid_2_node[hard_smp_processor_id()]; | ||
82 | #else | ||
80 | return 0; | 83 | return 0; |
84 | #endif | ||
81 | } | 85 | } |
82 | #endif | 86 | #endif |
83 | 87 | ||
diff --git a/include/asm-x86/mach-default/setup_arch.h b/include/asm-x86/mach-default/setup_arch.h index 605e3ccb991b..38846208b548 100644 --- a/include/asm-x86/mach-default/setup_arch.h +++ b/include/asm-x86/mach-default/setup_arch.h | |||
@@ -1,7 +1,3 @@ | |||
1 | /* Hook to call BIOS initialisation function */ | 1 | /* Hook to call BIOS initialisation function */ |
2 | 2 | ||
3 | /* no action for generic */ | 3 | /* no action for generic */ |
4 | |||
5 | #ifndef ARCH_SETUP | ||
6 | #define ARCH_SETUP | ||
7 | #endif | ||
diff --git a/include/asm-x86/mach-default/smpboot_hooks.h b/include/asm-x86/mach-default/smpboot_hooks.h index 56d0e1fa0258..dbab36d64d48 100644 --- a/include/asm-x86/mach-default/smpboot_hooks.h +++ b/include/asm-x86/mach-default/smpboot_hooks.h | |||
@@ -3,18 +3,20 @@ | |||
3 | 3 | ||
4 | static inline void smpboot_clear_io_apic_irqs(void) | 4 | static inline void smpboot_clear_io_apic_irqs(void) |
5 | { | 5 | { |
6 | #ifdef CONFIG_X86_IO_APIC | ||
6 | io_apic_irqs = 0; | 7 | io_apic_irqs = 0; |
8 | #endif | ||
7 | } | 9 | } |
8 | 10 | ||
9 | static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) | 11 | static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) |
10 | { | 12 | { |
11 | CMOS_WRITE(0xa, 0xf); | 13 | CMOS_WRITE(0xa, 0xf); |
12 | local_flush_tlb(); | 14 | local_flush_tlb(); |
13 | Dprintk("1.\n"); | 15 | pr_debug("1.\n"); |
14 | *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; | 16 | *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; |
15 | Dprintk("2.\n"); | 17 | pr_debug("2.\n"); |
16 | *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; | 18 | *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; |
17 | Dprintk("3.\n"); | 19 | pr_debug("3.\n"); |
18 | } | 20 | } |
19 | 21 | ||
20 | static inline void smpboot_restore_warm_reset_vector(void) | 22 | static inline void smpboot_restore_warm_reset_vector(void) |
@@ -35,17 +37,23 @@ static inline void smpboot_restore_warm_reset_vector(void) | |||
35 | 37 | ||
36 | static inline void __init smpboot_setup_io_apic(void) | 38 | static inline void __init smpboot_setup_io_apic(void) |
37 | { | 39 | { |
40 | #ifdef CONFIG_X86_IO_APIC | ||
38 | /* | 41 | /* |
39 | * Here we can be sure that there is an IO-APIC in the system. Let's | 42 | * Here we can be sure that there is an IO-APIC in the system. Let's |
40 | * go and set it up: | 43 | * go and set it up: |
41 | */ | 44 | */ |
42 | if (!skip_ioapic_setup && nr_ioapics) | 45 | if (!skip_ioapic_setup && nr_ioapics) |
43 | setup_IO_APIC(); | 46 | setup_IO_APIC(); |
44 | else | 47 | else { |
45 | nr_ioapics = 0; | 48 | nr_ioapics = 0; |
49 | localise_nmi_watchdog(); | ||
50 | } | ||
51 | #endif | ||
46 | } | 52 | } |
47 | 53 | ||
48 | static inline void smpboot_clear_io_apic(void) | 54 | static inline void smpboot_clear_io_apic(void) |
49 | { | 55 | { |
56 | #ifdef CONFIG_X86_IO_APIC | ||
50 | nr_ioapics = 0; | 57 | nr_ioapics = 0; |
58 | #endif | ||
51 | } | 59 | } |
diff --git a/include/asm-x86/mach-es7000/mach_apic.h b/include/asm-x86/mach-es7000/mach_apic.h index fbc8ad256f5a..0a3fdf930672 100644 --- a/include/asm-x86/mach-es7000/mach_apic.h +++ b/include/asm-x86/mach-es7000/mach_apic.h | |||
@@ -66,9 +66,9 @@ static inline void init_apic_ldr(void) | |||
66 | unsigned long val; | 66 | unsigned long val; |
67 | int cpu = smp_processor_id(); | 67 | int cpu = smp_processor_id(); |
68 | 68 | ||
69 | apic_write_around(APIC_DFR, APIC_DFR_VALUE); | 69 | apic_write(APIC_DFR, APIC_DFR_VALUE); |
70 | val = calculate_ldr(cpu); | 70 | val = calculate_ldr(cpu); |
71 | apic_write_around(APIC_LDR, val); | 71 | apic_write(APIC_LDR, val); |
72 | } | 72 | } |
73 | 73 | ||
74 | #ifndef CONFIG_X86_GENERICARCH | 74 | #ifndef CONFIG_X86_GENERICARCH |
diff --git a/include/asm-x86/mach-es7000/mach_mpspec.h b/include/asm-x86/mach-es7000/mach_mpspec.h deleted file mode 100644 index b1f5039d4506..000000000000 --- a/include/asm-x86/mach-es7000/mach_mpspec.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_MPSPEC_H | ||
2 | #define __ASM_MACH_MPSPEC_H | ||
3 | |||
4 | #define MAX_IRQ_SOURCES 256 | ||
5 | |||
6 | #define MAX_MP_BUSSES 256 | ||
7 | |||
8 | #endif /* __ASM_MACH_MPSPEC_H */ | ||
diff --git a/include/asm-x86/mach-generic/mach_mpparse.h b/include/asm-x86/mach-generic/mach_mpparse.h index 0d0b5ba2e9d1..586cadbf3787 100644 --- a/include/asm-x86/mach-generic/mach_mpparse.h +++ b/include/asm-x86/mach-generic/mach_mpparse.h | |||
@@ -1,7 +1,10 @@ | |||
1 | #ifndef _MACH_MPPARSE_H | 1 | #ifndef _MACH_MPPARSE_H |
2 | #define _MACH_MPPARSE_H 1 | 2 | #define _MACH_MPPARSE_H 1 |
3 | 3 | ||
4 | int mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid); | 4 | |
5 | int acpi_madt_oem_check(char *oem_id, char *oem_table_id); | 5 | extern int mps_oem_check(struct mp_config_table *mpc, char *oem, |
6 | char *productid); | ||
7 | |||
8 | extern int acpi_madt_oem_check(char *oem_id, char *oem_table_id); | ||
6 | 9 | ||
7 | #endif | 10 | #endif |
diff --git a/include/asm-x86/mach-generic/mach_mpspec.h b/include/asm-x86/mach-generic/mach_mpspec.h index 9ef0b941bb22..c83c120be538 100644 --- a/include/asm-x86/mach-generic/mach_mpspec.h +++ b/include/asm-x86/mach-generic/mach_mpspec.h | |||
@@ -7,4 +7,6 @@ | |||
7 | /* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */ | 7 | /* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */ |
8 | #define MAX_MP_BUSSES 260 | 8 | #define MAX_MP_BUSSES 260 |
9 | 9 | ||
10 | extern void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem, | ||
11 | char *productid); | ||
10 | #endif /* __ASM_MACH_MPSPEC_H */ | 12 | #endif /* __ASM_MACH_MPSPEC_H */ |
diff --git a/include/asm-x86/mach-numaq/mach_apic.h b/include/asm-x86/mach-numaq/mach_apic.h index 75a56e5afbe7..d802465e026a 100644 --- a/include/asm-x86/mach-numaq/mach_apic.h +++ b/include/asm-x86/mach-numaq/mach_apic.h | |||
@@ -20,8 +20,14 @@ static inline cpumask_t target_cpus(void) | |||
20 | #define INT_DELIVERY_MODE dest_LowestPrio | 20 | #define INT_DELIVERY_MODE dest_LowestPrio |
21 | #define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */ | 21 | #define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */ |
22 | 22 | ||
23 | #define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap) | 23 | static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) |
24 | #define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map) | 24 | { |
25 | return physid_isset(apicid, bitmap); | ||
26 | } | ||
27 | static inline unsigned long check_apicid_present(int bit) | ||
28 | { | ||
29 | return physid_isset(bit, phys_cpu_present_map); | ||
30 | } | ||
25 | #define apicid_cluster(apicid) (apicid & 0xF0) | 31 | #define apicid_cluster(apicid) (apicid & 0xF0) |
26 | 32 | ||
27 | static inline int apic_id_registered(void) | 33 | static inline int apic_id_registered(void) |
@@ -77,11 +83,6 @@ static inline int cpu_present_to_apicid(int mps_cpu) | |||
77 | return BAD_APICID; | 83 | return BAD_APICID; |
78 | } | 84 | } |
79 | 85 | ||
80 | static inline int generate_logical_apicid(int quad, int phys_apicid) | ||
81 | { | ||
82 | return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1); | ||
83 | } | ||
84 | |||
85 | static inline int apicid_to_node(int logical_apicid) | 86 | static inline int apicid_to_node(int logical_apicid) |
86 | { | 87 | { |
87 | return logical_apicid >> 4; | 88 | return logical_apicid >> 4; |
@@ -95,30 +96,6 @@ static inline physid_mask_t apicid_to_cpu_present(int logical_apicid) | |||
95 | return physid_mask_of_physid(cpu + 4*node); | 96 | return physid_mask_of_physid(cpu + 4*node); |
96 | } | 97 | } |
97 | 98 | ||
98 | struct mpc_config_translation { | ||
99 | unsigned char mpc_type; | ||
100 | unsigned char trans_len; | ||
101 | unsigned char trans_type; | ||
102 | unsigned char trans_quad; | ||
103 | unsigned char trans_global; | ||
104 | unsigned char trans_local; | ||
105 | unsigned short trans_reserved; | ||
106 | }; | ||
107 | |||
108 | static inline int mpc_apic_id(struct mpc_config_processor *m, | ||
109 | struct mpc_config_translation *translation_record) | ||
110 | { | ||
111 | int quad = translation_record->trans_quad; | ||
112 | int logical_apicid = generate_logical_apicid(quad, m->mpc_apicid); | ||
113 | |||
114 | printk("Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n", | ||
115 | m->mpc_apicid, | ||
116 | (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8, | ||
117 | (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4, | ||
118 | m->mpc_apicver, quad, logical_apicid); | ||
119 | return logical_apicid; | ||
120 | } | ||
121 | |||
122 | extern void *xquad_portio; | 99 | extern void *xquad_portio; |
123 | 100 | ||
124 | static inline void setup_portio_remap(void) | 101 | static inline void setup_portio_remap(void) |
diff --git a/include/asm-x86/mach-numaq/mach_mpparse.h b/include/asm-x86/mach-numaq/mach_mpparse.h index 459b12401187..626aef6b155f 100644 --- a/include/asm-x86/mach-numaq/mach_mpparse.h +++ b/include/asm-x86/mach-numaq/mach_mpparse.h | |||
@@ -1,14 +1,7 @@ | |||
1 | #ifndef __ASM_MACH_MPPARSE_H | 1 | #ifndef __ASM_MACH_MPPARSE_H |
2 | #define __ASM_MACH_MPPARSE_H | 2 | #define __ASM_MACH_MPPARSE_H |
3 | 3 | ||
4 | extern void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, | 4 | extern void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem, |
5 | struct mpc_config_translation *translation); | 5 | char *productid); |
6 | extern void mpc_oem_pci_bus(struct mpc_config_bus *m, | ||
7 | struct mpc_config_translation *translation); | ||
8 | |||
9 | /* Hook from generic ACPI tables.c */ | ||
10 | static inline void acpi_madt_oem_check(char *oem_id, char *oem_table_id) | ||
11 | { | ||
12 | } | ||
13 | 6 | ||
14 | #endif /* __ASM_MACH_MPPARSE_H */ | 7 | #endif /* __ASM_MACH_MPPARSE_H */ |
diff --git a/include/asm-x86/mach-numaq/mach_mpspec.h b/include/asm-x86/mach-numaq/mach_mpspec.h deleted file mode 100644 index dffb09856f8f..000000000000 --- a/include/asm-x86/mach-numaq/mach_mpspec.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_MPSPEC_H | ||
2 | #define __ASM_MACH_MPSPEC_H | ||
3 | |||
4 | #define MAX_IRQ_SOURCES 512 | ||
5 | |||
6 | #define MAX_MP_BUSSES 32 | ||
7 | |||
8 | #endif /* __ASM_MACH_MPSPEC_H */ | ||
diff --git a/include/asm-x86/mach-summit/mach_apic.h b/include/asm-x86/mach-summit/mach_apic.h index 1f76c2e70232..75d2c95005d7 100644 --- a/include/asm-x86/mach-summit/mach_apic.h +++ b/include/asm-x86/mach-summit/mach_apic.h | |||
@@ -63,10 +63,10 @@ static inline void init_apic_ldr(void) | |||
63 | * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */ | 63 | * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */ |
64 | BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT); | 64 | BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT); |
65 | id = my_cluster | (1UL << count); | 65 | id = my_cluster | (1UL << count); |
66 | apic_write_around(APIC_DFR, APIC_DFR_VALUE); | 66 | apic_write(APIC_DFR, APIC_DFR_VALUE); |
67 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | 67 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; |
68 | val |= SET_APIC_LOGICAL_ID(id); | 68 | val |= SET_APIC_LOGICAL_ID(id); |
69 | apic_write_around(APIC_LDR, val); | 69 | apic_write(APIC_LDR, val); |
70 | } | 70 | } |
71 | 71 | ||
72 | static inline int multi_timer_check(int apic, int irq) | 72 | static inline int multi_timer_check(int apic, int irq) |
diff --git a/include/asm-x86/mach-summit/mach_mpspec.h b/include/asm-x86/mach-summit/mach_mpspec.h deleted file mode 100644 index bd765523511a..000000000000 --- a/include/asm-x86/mach-summit/mach_mpspec.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_MPSPEC_H | ||
2 | #define __ASM_MACH_MPSPEC_H | ||
3 | |||
4 | #define MAX_IRQ_SOURCES 256 | ||
5 | |||
6 | /* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */ | ||
7 | #define MAX_MP_BUSSES 260 | ||
8 | |||
9 | #endif /* __ASM_MACH_MPSPEC_H */ | ||
diff --git a/include/asm-x86/mach-visws/entry_arch.h b/include/asm-x86/mach-visws/entry_arch.h deleted file mode 100644 index b183fa6d83d9..000000000000 --- a/include/asm-x86/mach-visws/entry_arch.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * The following vectors are part of the Linux architecture, there | ||
3 | * is no hardware IRQ pin equivalent for them, they are triggered | ||
4 | * through the ICC by us (IPIs) | ||
5 | */ | ||
6 | #ifdef CONFIG_X86_SMP | ||
7 | BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR) | ||
8 | BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR) | ||
9 | BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR) | ||
10 | #endif | ||
11 | |||
12 | /* | ||
13 | * every pentium local APIC has two 'local interrupts', with a | ||
14 | * soft-definable vector attached to both interrupts, one of | ||
15 | * which is a timer interrupt, the other one is error counter | ||
16 | * overflow. Linux uses the local APIC timer interrupt to get | ||
17 | * a much simpler SMP time architecture: | ||
18 | */ | ||
19 | #ifdef CONFIG_X86_LOCAL_APIC | ||
20 | BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR) | ||
21 | BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR) | ||
22 | BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR) | ||
23 | #endif | ||
diff --git a/include/asm-x86/mach-visws/irq_vectors.h b/include/asm-x86/mach-visws/irq_vectors.h deleted file mode 100644 index cb572d8db505..000000000000 --- a/include/asm-x86/mach-visws/irq_vectors.h +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | #ifndef _ASM_IRQ_VECTORS_H | ||
2 | #define _ASM_IRQ_VECTORS_H | ||
3 | |||
4 | /* | ||
5 | * IDT vectors usable for external interrupt sources start | ||
6 | * at 0x20: | ||
7 | */ | ||
8 | #define FIRST_EXTERNAL_VECTOR 0x20 | ||
9 | |||
10 | #define SYSCALL_VECTOR 0x80 | ||
11 | |||
12 | /* | ||
13 | * Vectors 0x20-0x2f are used for ISA interrupts. | ||
14 | */ | ||
15 | |||
16 | /* | ||
17 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff | ||
18 | * | ||
19 | * some of the following vectors are 'rare', they are merged | ||
20 | * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. | ||
21 | * TLB, reschedule and local APIC vectors are performance-critical. | ||
22 | * | ||
23 | * Vectors 0xf0-0xfa are free (reserved for future Linux use). | ||
24 | */ | ||
25 | #define SPURIOUS_APIC_VECTOR 0xff | ||
26 | #define ERROR_APIC_VECTOR 0xfe | ||
27 | #define INVALIDATE_TLB_VECTOR 0xfd | ||
28 | #define RESCHEDULE_VECTOR 0xfc | ||
29 | #define CALL_FUNCTION_VECTOR 0xfb | ||
30 | |||
31 | #define THERMAL_APIC_VECTOR 0xf0 | ||
32 | /* | ||
33 | * Local APIC timer IRQ vector is on a different priority level, | ||
34 | * to work around the 'lost local interrupt if more than 2 IRQ | ||
35 | * sources per level' errata. | ||
36 | */ | ||
37 | #define LOCAL_TIMER_VECTOR 0xef | ||
38 | |||
39 | /* | ||
40 | * First APIC vector available to drivers: (vectors 0x30-0xee) | ||
41 | * we start at 0x31 to spread out vectors evenly between priority | ||
42 | * levels. (0x80 is the syscall vector) | ||
43 | */ | ||
44 | #define FIRST_DEVICE_VECTOR 0x31 | ||
45 | #define FIRST_SYSTEM_VECTOR 0xef | ||
46 | |||
47 | #define TIMER_IRQ 0 | ||
48 | |||
49 | /* | ||
50 | * IRQ definitions | ||
51 | */ | ||
52 | #define NR_VECTORS 256 | ||
53 | #define NR_IRQS 224 | ||
54 | #define NR_IRQ_VECTORS NR_IRQS | ||
55 | |||
56 | #define FPU_IRQ 13 | ||
57 | |||
58 | #define FIRST_VM86_IRQ 3 | ||
59 | #define LAST_VM86_IRQ 15 | ||
60 | #define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) | ||
61 | |||
62 | #endif /* _ASM_IRQ_VECTORS_H */ | ||
diff --git a/include/asm-x86/mach-visws/mach_apic.h b/include/asm-x86/mach-visws/mach_apic.h deleted file mode 100644 index a9ef33a8a995..000000000000 --- a/include/asm-x86/mach-visws/mach_apic.h +++ /dev/null | |||
@@ -1,103 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_APIC_H | ||
2 | #define __ASM_MACH_APIC_H | ||
3 | |||
4 | #include <mach_apicdef.h> | ||
5 | #include <asm/smp.h> | ||
6 | |||
7 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) | ||
8 | |||
9 | #define no_balance_irq (0) | ||
10 | #define esr_disable (0) | ||
11 | |||
12 | #define INT_DELIVERY_MODE dest_LowestPrio | ||
13 | #define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */ | ||
14 | |||
15 | #ifdef CONFIG_SMP | ||
16 | #define TARGET_CPUS cpu_online_map | ||
17 | #else | ||
18 | #define TARGET_CPUS cpumask_of_cpu(0) | ||
19 | #endif | ||
20 | |||
21 | #define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap) | ||
22 | #define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map) | ||
23 | |||
24 | static inline int apic_id_registered(void) | ||
25 | { | ||
26 | return physid_isset(GET_APIC_ID(read_apic_id()), phys_cpu_present_map); | ||
27 | } | ||
28 | |||
29 | /* | ||
30 | * Set up the logical destination ID. | ||
31 | * | ||
32 | * Intel recommends to set DFR, LDR and TPR before enabling | ||
33 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | ||
34 | * document number 292116). So here it goes... | ||
35 | */ | ||
36 | static inline void init_apic_ldr(void) | ||
37 | { | ||
38 | unsigned long val; | ||
39 | |||
40 | apic_write_around(APIC_DFR, APIC_DFR_VALUE); | ||
41 | val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | ||
42 | val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id()); | ||
43 | apic_write_around(APIC_LDR, val); | ||
44 | } | ||
45 | |||
46 | static inline void summit_check(char *oem, char *productid) | ||
47 | { | ||
48 | } | ||
49 | |||
50 | static inline void setup_apic_routing(void) | ||
51 | { | ||
52 | } | ||
53 | |||
54 | static inline int apicid_to_node(int logical_apicid) | ||
55 | { | ||
56 | return 0; | ||
57 | } | ||
58 | |||
59 | /* Mapping from cpu number to logical apicid */ | ||
60 | static inline int cpu_to_logical_apicid(int cpu) | ||
61 | { | ||
62 | return 1 << cpu; | ||
63 | } | ||
64 | |||
65 | static inline int cpu_present_to_apicid(int mps_cpu) | ||
66 | { | ||
67 | if (mps_cpu < get_physical_broadcast()) | ||
68 | return mps_cpu; | ||
69 | else | ||
70 | return BAD_APICID; | ||
71 | } | ||
72 | |||
73 | static inline physid_mask_t apicid_to_cpu_present(int apicid) | ||
74 | { | ||
75 | return physid_mask_of_physid(apicid); | ||
76 | } | ||
77 | |||
78 | #define WAKE_SECONDARY_VIA_INIT | ||
79 | |||
80 | static inline void setup_portio_remap(void) | ||
81 | { | ||
82 | } | ||
83 | |||
84 | static inline void enable_apic_mode(void) | ||
85 | { | ||
86 | } | ||
87 | |||
88 | static inline int check_phys_apicid_present(int boot_cpu_physical_apicid) | ||
89 | { | ||
90 | return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map); | ||
91 | } | ||
92 | |||
93 | static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask) | ||
94 | { | ||
95 | return cpus_addr(cpumask)[0]; | ||
96 | } | ||
97 | |||
98 | static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb) | ||
99 | { | ||
100 | return cpuid_apic >> index_msb; | ||
101 | } | ||
102 | |||
103 | #endif /* __ASM_MACH_APIC_H */ | ||
diff --git a/include/asm-x86/mach-visws/mach_apicdef.h b/include/asm-x86/mach-visws/mach_apicdef.h deleted file mode 100644 index 826cfa97d778..000000000000 --- a/include/asm-x86/mach-visws/mach_apicdef.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef __ASM_MACH_APICDEF_H | ||
2 | #define __ASM_MACH_APICDEF_H | ||
3 | |||
4 | #define APIC_ID_MASK (0xF<<24) | ||
5 | |||
6 | static inline unsigned get_apic_id(unsigned long x) | ||
7 | { | ||
8 | return (((x)>>24)&0xF); | ||
9 | } | ||
10 | #define GET_APIC_ID(x) get_apic_id(x) | ||
11 | |||
12 | #endif | ||
diff --git a/include/asm-x86/mach-visws/setup_arch.h b/include/asm-x86/mach-visws/setup_arch.h deleted file mode 100644 index 33f700ef6831..000000000000 --- a/include/asm-x86/mach-visws/setup_arch.h +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | /* Hook to call BIOS initialisation function */ | ||
2 | |||
3 | extern unsigned long sgivwfb_mem_phys; | ||
4 | extern unsigned long sgivwfb_mem_size; | ||
5 | |||
6 | /* no action for visws */ | ||
7 | |||
8 | #define ARCH_SETUP | ||
diff --git a/include/asm-x86/mach-visws/smpboot_hooks.h b/include/asm-x86/mach-visws/smpboot_hooks.h deleted file mode 100644 index c9b83e395a2e..000000000000 --- a/include/asm-x86/mach-visws/smpboot_hooks.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) | ||
2 | { | ||
3 | CMOS_WRITE(0xa, 0xf); | ||
4 | local_flush_tlb(); | ||
5 | Dprintk("1.\n"); | ||
6 | *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4; | ||
7 | Dprintk("2.\n"); | ||
8 | *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf; | ||
9 | Dprintk("3.\n"); | ||
10 | } | ||
11 | |||
12 | /* for visws do nothing for any of these */ | ||
13 | |||
14 | static inline void smpboot_clear_io_apic_irqs(void) | ||
15 | { | ||
16 | } | ||
17 | |||
18 | static inline void smpboot_restore_warm_reset_vector(void) | ||
19 | { | ||
20 | } | ||
21 | |||
22 | static inline void smpboot_setup_io_apic(void) | ||
23 | { | ||
24 | } | ||
25 | |||
26 | static inline void smpboot_clear_io_apic(void) | ||
27 | { | ||
28 | } | ||
diff --git a/include/asm-x86/mach-voyager/entry_arch.h b/include/asm-x86/mach-voyager/entry_arch.h index 4a1e1e8c10b6..ae52624b5937 100644 --- a/include/asm-x86/mach-voyager/entry_arch.h +++ b/include/asm-x86/mach-voyager/entry_arch.h | |||
@@ -23,4 +23,4 @@ BUILD_INTERRUPT(qic_invalidate_interrupt, QIC_INVALIDATE_CPI); | |||
23 | BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI); | 23 | BUILD_INTERRUPT(qic_reschedule_interrupt, QIC_RESCHEDULE_CPI); |
24 | BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI); | 24 | BUILD_INTERRUPT(qic_enable_irq_interrupt, QIC_ENABLE_IRQ_CPI); |
25 | BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI); | 25 | BUILD_INTERRUPT(qic_call_function_interrupt, QIC_CALL_FUNCTION_CPI); |
26 | 26 | BUILD_INTERRUPT(qic_call_function_single_interrupt, QIC_CALL_FUNCTION_SINGLE_CPI); | |
diff --git a/include/asm-x86/mach-voyager/irq_vectors.h b/include/asm-x86/mach-voyager/irq_vectors.h deleted file mode 100644 index 165421f5821c..000000000000 --- a/include/asm-x86/mach-voyager/irq_vectors.h +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | /* -*- mode: c; c-basic-offset: 8 -*- */ | ||
2 | |||
3 | /* Copyright (C) 2002 | ||
4 | * | ||
5 | * Author: James.Bottomley@HansenPartnership.com | ||
6 | * | ||
7 | * linux/arch/i386/voyager/irq_vectors.h | ||
8 | * | ||
9 | * This file provides definitions for the VIC and QIC CPIs | ||
10 | */ | ||
11 | |||
12 | #ifndef _ASM_IRQ_VECTORS_H | ||
13 | #define _ASM_IRQ_VECTORS_H | ||
14 | |||
15 | /* | ||
16 | * IDT vectors usable for external interrupt sources start | ||
17 | * at 0x20: | ||
18 | */ | ||
19 | #define FIRST_EXTERNAL_VECTOR 0x20 | ||
20 | |||
21 | #define SYSCALL_VECTOR 0x80 | ||
22 | |||
23 | /* | ||
24 | * Vectors 0x20-0x2f are used for ISA interrupts. | ||
25 | */ | ||
26 | |||
27 | /* These define the CPIs we use in linux */ | ||
28 | #define VIC_CPI_LEVEL0 0 | ||
29 | #define VIC_CPI_LEVEL1 1 | ||
30 | /* now the fake CPIs */ | ||
31 | #define VIC_TIMER_CPI 2 | ||
32 | #define VIC_INVALIDATE_CPI 3 | ||
33 | #define VIC_RESCHEDULE_CPI 4 | ||
34 | #define VIC_ENABLE_IRQ_CPI 5 | ||
35 | #define VIC_CALL_FUNCTION_CPI 6 | ||
36 | |||
37 | /* Now the QIC CPIs: Since we don't need the two initial levels, | ||
38 | * these are 2 less than the VIC CPIs */ | ||
39 | #define QIC_CPI_OFFSET 1 | ||
40 | #define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET) | ||
41 | #define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET) | ||
42 | #define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET) | ||
43 | #define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET) | ||
44 | #define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET) | ||
45 | |||
46 | #define VIC_START_FAKE_CPI VIC_TIMER_CPI | ||
47 | #define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI | ||
48 | |||
49 | /* this is the SYS_INT CPI. */ | ||
50 | #define VIC_SYS_INT 8 | ||
51 | #define VIC_CMN_INT 15 | ||
52 | |||
53 | /* This is the boot CPI for alternate processors. It gets overwritten | ||
54 | * by the above once the system has activated all available processors */ | ||
55 | #define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0 | ||
56 | #define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8) | ||
57 | |||
58 | #define NR_VECTORS 256 | ||
59 | #define NR_IRQS 224 | ||
60 | #define NR_IRQ_VECTORS NR_IRQS | ||
61 | |||
62 | #define FPU_IRQ 13 | ||
63 | |||
64 | #define FIRST_VM86_IRQ 3 | ||
65 | #define LAST_VM86_IRQ 15 | ||
66 | #define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) | ||
67 | |||
68 | #ifndef __ASSEMBLY__ | ||
69 | extern asmlinkage void vic_cpi_interrupt(void); | ||
70 | extern asmlinkage void vic_sys_interrupt(void); | ||
71 | extern asmlinkage void vic_cmn_interrupt(void); | ||
72 | extern asmlinkage void qic_timer_interrupt(void); | ||
73 | extern asmlinkage void qic_invalidate_interrupt(void); | ||
74 | extern asmlinkage void qic_reschedule_interrupt(void); | ||
75 | extern asmlinkage void qic_enable_irq_interrupt(void); | ||
76 | extern asmlinkage void qic_call_function_interrupt(void); | ||
77 | #endif /* !__ASSEMBLY__ */ | ||
78 | |||
79 | #endif /* _ASM_IRQ_VECTORS_H */ | ||
diff --git a/include/asm-x86/mmconfig.h b/include/asm-x86/mmconfig.h new file mode 100644 index 000000000000..95beda07c6fa --- /dev/null +++ b/include/asm-x86/mmconfig.h | |||
@@ -0,0 +1,12 @@ | |||
1 | #ifndef _ASM_MMCONFIG_H | ||
2 | #define _ASM_MMCONFIG_H | ||
3 | |||
4 | #ifdef CONFIG_PCI_MMCONFIG | ||
5 | extern void __cpuinit fam10h_check_enable_mmcfg(void); | ||
6 | extern void __init check_enable_amd_mmconf_dmi(void); | ||
7 | #else | ||
8 | static inline void fam10h_check_enable_mmcfg(void) { } | ||
9 | static inline void check_enable_amd_mmconf_dmi(void) { } | ||
10 | #endif | ||
11 | |||
12 | #endif | ||
diff --git a/include/asm-x86/mmu_context.h b/include/asm-x86/mmu_context.h index 6598450da6c6..fac57014e7c6 100644 --- a/include/asm-x86/mmu_context.h +++ b/include/asm-x86/mmu_context.h | |||
@@ -1,5 +1,37 @@ | |||
1 | #ifndef __ASM_X86_MMU_CONTEXT_H | ||
2 | #define __ASM_X86_MMU_CONTEXT_H | ||
3 | |||
4 | #include <asm/desc.h> | ||
5 | #include <asm/atomic.h> | ||
6 | #include <asm/pgalloc.h> | ||
7 | #include <asm/tlbflush.h> | ||
8 | #include <asm/paravirt.h> | ||
9 | #ifndef CONFIG_PARAVIRT | ||
10 | #include <asm-generic/mm_hooks.h> | ||
11 | |||
12 | static inline void paravirt_activate_mm(struct mm_struct *prev, | ||
13 | struct mm_struct *next) | ||
14 | { | ||
15 | } | ||
16 | #endif /* !CONFIG_PARAVIRT */ | ||
17 | |||
18 | /* | ||
19 | * Used for LDT copy/destruction. | ||
20 | */ | ||
21 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm); | ||
22 | void destroy_context(struct mm_struct *mm); | ||
23 | |||
1 | #ifdef CONFIG_X86_32 | 24 | #ifdef CONFIG_X86_32 |
2 | # include "mmu_context_32.h" | 25 | # include "mmu_context_32.h" |
3 | #else | 26 | #else |
4 | # include "mmu_context_64.h" | 27 | # include "mmu_context_64.h" |
5 | #endif | 28 | #endif |
29 | |||
30 | #define activate_mm(prev, next) \ | ||
31 | do { \ | ||
32 | paravirt_activate_mm((prev), (next)); \ | ||
33 | switch_mm((prev), (next), NULL); \ | ||
34 | } while (0); | ||
35 | |||
36 | |||
37 | #endif /* __ASM_X86_MMU_CONTEXT_H */ | ||
diff --git a/include/asm-x86/mmu_context_32.h b/include/asm-x86/mmu_context_32.h index 9756ae0f1dd3..824fc575c6d8 100644 --- a/include/asm-x86/mmu_context_32.h +++ b/include/asm-x86/mmu_context_32.h | |||
@@ -1,28 +1,6 @@ | |||
1 | #ifndef __I386_SCHED_H | 1 | #ifndef __I386_SCHED_H |
2 | #define __I386_SCHED_H | 2 | #define __I386_SCHED_H |
3 | 3 | ||
4 | #include <asm/desc.h> | ||
5 | #include <asm/atomic.h> | ||
6 | #include <asm/pgalloc.h> | ||
7 | #include <asm/tlbflush.h> | ||
8 | #include <asm/paravirt.h> | ||
9 | #ifndef CONFIG_PARAVIRT | ||
10 | #include <asm-generic/mm_hooks.h> | ||
11 | |||
12 | static inline void paravirt_activate_mm(struct mm_struct *prev, | ||
13 | struct mm_struct *next) | ||
14 | { | ||
15 | } | ||
16 | #endif /* !CONFIG_PARAVIRT */ | ||
17 | |||
18 | |||
19 | /* | ||
20 | * Used for LDT copy/destruction. | ||
21 | */ | ||
22 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm); | ||
23 | void destroy_context(struct mm_struct *mm); | ||
24 | |||
25 | |||
26 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | 4 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) |
27 | { | 5 | { |
28 | #ifdef CONFIG_SMP | 6 | #ifdef CONFIG_SMP |
@@ -75,10 +53,4 @@ static inline void switch_mm(struct mm_struct *prev, | |||
75 | #define deactivate_mm(tsk, mm) \ | 53 | #define deactivate_mm(tsk, mm) \ |
76 | asm("movl %0,%%gs": :"r" (0)); | 54 | asm("movl %0,%%gs": :"r" (0)); |
77 | 55 | ||
78 | #define activate_mm(prev, next) \ | ||
79 | do { \ | ||
80 | paravirt_activate_mm((prev), (next)); \ | ||
81 | switch_mm((prev), (next), NULL); \ | ||
82 | } while (0); | ||
83 | |||
84 | #endif | 56 | #endif |
diff --git a/include/asm-x86/mmu_context_64.h b/include/asm-x86/mmu_context_64.h index ca44c71e7fb3..c7000634ccae 100644 --- a/include/asm-x86/mmu_context_64.h +++ b/include/asm-x86/mmu_context_64.h | |||
@@ -1,21 +1,7 @@ | |||
1 | #ifndef __X86_64_MMU_CONTEXT_H | 1 | #ifndef __X86_64_MMU_CONTEXT_H |
2 | #define __X86_64_MMU_CONTEXT_H | 2 | #define __X86_64_MMU_CONTEXT_H |
3 | 3 | ||
4 | #include <asm/desc.h> | ||
5 | #include <asm/atomic.h> | ||
6 | #include <asm/pgalloc.h> | ||
7 | #include <asm/pda.h> | 4 | #include <asm/pda.h> |
8 | #include <asm/pgtable.h> | ||
9 | #include <asm/tlbflush.h> | ||
10 | #ifndef CONFIG_PARAVIRT | ||
11 | #include <asm-generic/mm_hooks.h> | ||
12 | #endif | ||
13 | |||
14 | /* | ||
15 | * possibly do the LDT unload here? | ||
16 | */ | ||
17 | int init_new_context(struct task_struct *tsk, struct mm_struct *mm); | ||
18 | void destroy_context(struct mm_struct *mm); | ||
19 | 5 | ||
20 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | 6 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) |
21 | { | 7 | { |
@@ -65,8 +51,4 @@ do { \ | |||
65 | asm volatile("movl %0,%%fs"::"r"(0)); \ | 51 | asm volatile("movl %0,%%fs"::"r"(0)); \ |
66 | } while (0) | 52 | } while (0) |
67 | 53 | ||
68 | #define activate_mm(prev, next) \ | ||
69 | switch_mm((prev), (next), NULL) | ||
70 | |||
71 | |||
72 | #endif | 54 | #endif |
diff --git a/include/asm-x86/mmzone_32.h b/include/asm-x86/mmzone_32.h index cb2cad0b65a7..b2298a227567 100644 --- a/include/asm-x86/mmzone_32.h +++ b/include/asm-x86/mmzone_32.h | |||
@@ -12,11 +12,9 @@ | |||
12 | extern struct pglist_data *node_data[]; | 12 | extern struct pglist_data *node_data[]; |
13 | #define NODE_DATA(nid) (node_data[nid]) | 13 | #define NODE_DATA(nid) (node_data[nid]) |
14 | 14 | ||
15 | #ifdef CONFIG_X86_NUMAQ | 15 | #include <asm/numaq.h> |
16 | #include <asm/numaq.h> | 16 | /* summit or generic arch */ |
17 | #elif defined(CONFIG_ACPI_SRAT)/* summit or generic arch */ | 17 | #include <asm/srat.h> |
18 | #include <asm/srat.h> | ||
19 | #endif | ||
20 | 18 | ||
21 | extern int get_memcfg_numa_flat(void); | 19 | extern int get_memcfg_numa_flat(void); |
22 | /* | 20 | /* |
@@ -26,28 +24,20 @@ extern int get_memcfg_numa_flat(void); | |||
26 | */ | 24 | */ |
27 | static inline void get_memcfg_numa(void) | 25 | static inline void get_memcfg_numa(void) |
28 | { | 26 | { |
29 | #ifdef CONFIG_X86_NUMAQ | 27 | |
30 | if (get_memcfg_numaq()) | 28 | if (get_memcfg_numaq()) |
31 | return; | 29 | return; |
32 | #elif defined(CONFIG_ACPI_SRAT) | ||
33 | if (get_memcfg_from_srat()) | 30 | if (get_memcfg_from_srat()) |
34 | return; | 31 | return; |
35 | #endif | ||
36 | |||
37 | get_memcfg_numa_flat(); | 32 | get_memcfg_numa_flat(); |
38 | } | 33 | } |
39 | 34 | ||
40 | extern int early_pfn_to_nid(unsigned long pfn); | 35 | extern int early_pfn_to_nid(unsigned long pfn); |
41 | extern void numa_kva_reserve(void); | ||
42 | 36 | ||
43 | #else /* !CONFIG_NUMA */ | 37 | #else /* !CONFIG_NUMA */ |
44 | 38 | ||
45 | #define get_memcfg_numa get_memcfg_numa_flat | 39 | #define get_memcfg_numa get_memcfg_numa_flat |
46 | #define get_zholes_size(n) (0) | ||
47 | 40 | ||
48 | static inline void numa_kva_reserve(void) | ||
49 | { | ||
50 | } | ||
51 | #endif /* CONFIG_NUMA */ | 41 | #endif /* CONFIG_NUMA */ |
52 | 42 | ||
53 | #ifdef CONFIG_DISCONTIGMEM | 43 | #ifdef CONFIG_DISCONTIGMEM |
@@ -55,14 +45,14 @@ static inline void numa_kva_reserve(void) | |||
55 | /* | 45 | /* |
56 | * generic node memory support, the following assumptions apply: | 46 | * generic node memory support, the following assumptions apply: |
57 | * | 47 | * |
58 | * 1) memory comes in 256Mb contigious chunks which are either present or not | 48 | * 1) memory comes in 64Mb contigious chunks which are either present or not |
59 | * 2) we will not have more than 64Gb in total | 49 | * 2) we will not have more than 64Gb in total |
60 | * | 50 | * |
61 | * for now assume that 64Gb is max amount of RAM for whole system | 51 | * for now assume that 64Gb is max amount of RAM for whole system |
62 | * 64Gb / 4096bytes/page = 16777216 pages | 52 | * 64Gb / 4096bytes/page = 16777216 pages |
63 | */ | 53 | */ |
64 | #define MAX_NR_PAGES 16777216 | 54 | #define MAX_NR_PAGES 16777216 |
65 | #define MAX_ELEMENTS 256 | 55 | #define MAX_ELEMENTS 1024 |
66 | #define PAGES_PER_ELEMENT (MAX_NR_PAGES/MAX_ELEMENTS) | 56 | #define PAGES_PER_ELEMENT (MAX_NR_PAGES/MAX_ELEMENTS) |
67 | 57 | ||
68 | extern s8 physnode_map[]; | 58 | extern s8 physnode_map[]; |
@@ -87,9 +77,6 @@ static inline int pfn_to_nid(unsigned long pfn) | |||
87 | __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \ | 77 | __pgdat->node_start_pfn + __pgdat->node_spanned_pages; \ |
88 | }) | 78 | }) |
89 | 79 | ||
90 | #ifdef CONFIG_X86_NUMAQ /* we have contiguous memory on NUMA-Q */ | ||
91 | #define pfn_valid(pfn) ((pfn) < num_physpages) | ||
92 | #else | ||
93 | static inline int pfn_valid(int pfn) | 80 | static inline int pfn_valid(int pfn) |
94 | { | 81 | { |
95 | int nid = pfn_to_nid(pfn); | 82 | int nid = pfn_to_nid(pfn); |
@@ -98,7 +85,6 @@ static inline int pfn_valid(int pfn) | |||
98 | return (pfn < node_end_pfn(nid)); | 85 | return (pfn < node_end_pfn(nid)); |
99 | return 0; | 86 | return 0; |
100 | } | 87 | } |
101 | #endif /* CONFIG_X86_NUMAQ */ | ||
102 | 88 | ||
103 | #endif /* CONFIG_DISCONTIGMEM */ | 89 | #endif /* CONFIG_DISCONTIGMEM */ |
104 | 90 | ||
diff --git a/include/asm-x86/mpspec.h b/include/asm-x86/mpspec.h index 57a991b9c053..b6995e567fcc 100644 --- a/include/asm-x86/mpspec.h +++ b/include/asm-x86/mpspec.h | |||
@@ -13,6 +13,12 @@ extern int apic_version[MAX_APICS]; | |||
13 | extern u8 apicid_2_node[]; | 13 | extern u8 apicid_2_node[]; |
14 | extern int pic_mode; | 14 | extern int pic_mode; |
15 | 15 | ||
16 | #ifdef CONFIG_X86_NUMAQ | ||
17 | extern int mp_bus_id_to_node[MAX_MP_BUSSES]; | ||
18 | extern int mp_bus_id_to_local[MAX_MP_BUSSES]; | ||
19 | extern int quad_local_to_mp_bus_id [NR_CPUS/4][4]; | ||
20 | #endif | ||
21 | |||
16 | #define MAX_APICID 256 | 22 | #define MAX_APICID 256 |
17 | 23 | ||
18 | #else | 24 | #else |
@@ -21,26 +27,30 @@ extern int pic_mode; | |||
21 | /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ | 27 | /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ |
22 | #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) | 28 | #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) |
23 | 29 | ||
30 | #endif | ||
31 | |||
24 | extern void early_find_smp_config(void); | 32 | extern void early_find_smp_config(void); |
25 | extern void early_get_smp_config(void); | 33 | extern void early_get_smp_config(void); |
26 | 34 | ||
27 | #endif | ||
28 | |||
29 | #if defined(CONFIG_MCA) || defined(CONFIG_EISA) | 35 | #if defined(CONFIG_MCA) || defined(CONFIG_EISA) |
30 | extern int mp_bus_id_to_type[MAX_MP_BUSSES]; | 36 | extern int mp_bus_id_to_type[MAX_MP_BUSSES]; |
31 | #endif | 37 | #endif |
32 | 38 | ||
33 | extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); | 39 | extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); |
34 | 40 | ||
35 | extern int mp_bus_id_to_pci_bus[MAX_MP_BUSSES]; | ||
36 | |||
37 | extern unsigned int boot_cpu_physical_apicid; | 41 | extern unsigned int boot_cpu_physical_apicid; |
42 | extern unsigned int max_physical_apicid; | ||
38 | extern int smp_found_config; | 43 | extern int smp_found_config; |
39 | extern int mpc_default_type; | 44 | extern int mpc_default_type; |
40 | extern unsigned long mp_lapic_addr; | 45 | extern unsigned long mp_lapic_addr; |
41 | 46 | ||
42 | extern void find_smp_config(void); | 47 | extern void find_smp_config(void); |
43 | extern void get_smp_config(void); | 48 | extern void get_smp_config(void); |
49 | #ifdef CONFIG_X86_MPPARSE | ||
50 | extern void early_reserve_e820_mpc_new(void); | ||
51 | #else | ||
52 | static inline void early_reserve_e820_mpc_new(void) { } | ||
53 | #endif | ||
44 | 54 | ||
45 | void __cpuinit generic_processor_info(int apicid, int version); | 55 | void __cpuinit generic_processor_info(int apicid, int version); |
46 | #ifdef CONFIG_ACPI | 56 | #ifdef CONFIG_ACPI |
@@ -49,6 +59,17 @@ extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, | |||
49 | u32 gsi); | 59 | u32 gsi); |
50 | extern void mp_config_acpi_legacy_irqs(void); | 60 | extern void mp_config_acpi_legacy_irqs(void); |
51 | extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low); | 61 | extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low); |
62 | #ifdef CONFIG_X86_IO_APIC | ||
63 | extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, | ||
64 | u32 gsi, int triggering, int polarity); | ||
65 | #else | ||
66 | static inline int | ||
67 | mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, | ||
68 | u32 gsi, int triggering, int polarity) | ||
69 | { | ||
70 | return 0; | ||
71 | } | ||
72 | #endif | ||
52 | #endif /* CONFIG_ACPI */ | 73 | #endif /* CONFIG_ACPI */ |
53 | 74 | ||
54 | #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS) | 75 | #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS) |
@@ -101,6 +122,7 @@ typedef struct physid_mask physid_mask_t; | |||
101 | __physid_mask; \ | 122 | __physid_mask; \ |
102 | }) | 123 | }) |
103 | 124 | ||
125 | /* Note: will create very large stack frames if physid_mask_t is big */ | ||
104 | #define physid_mask_of_physid(physid) \ | 126 | #define physid_mask_of_physid(physid) \ |
105 | ({ \ | 127 | ({ \ |
106 | physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ | 128 | physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ |
@@ -108,6 +130,12 @@ typedef struct physid_mask physid_mask_t; | |||
108 | __physid_mask; \ | 130 | __physid_mask; \ |
109 | }) | 131 | }) |
110 | 132 | ||
133 | static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map) | ||
134 | { | ||
135 | physids_clear(*map); | ||
136 | physid_set(physid, *map); | ||
137 | } | ||
138 | |||
111 | #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } | 139 | #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } |
112 | #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } | 140 | #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } |
113 | 141 | ||
diff --git a/include/asm-x86/mpspec_def.h b/include/asm-x86/mpspec_def.h index dc6ef85e3624..38d1e73b49e4 100644 --- a/include/asm-x86/mpspec_def.h +++ b/include/asm-x86/mpspec_def.h | |||
@@ -17,10 +17,11 @@ | |||
17 | # define MAX_MPC_ENTRY 1024 | 17 | # define MAX_MPC_ENTRY 1024 |
18 | # define MAX_APICS 256 | 18 | # define MAX_APICS 256 |
19 | #else | 19 | #else |
20 | /* | 20 | # if NR_CPUS <= 255 |
21 | * A maximum of 255 APICs with the current APIC ID architecture. | 21 | # define MAX_APICS 255 |
22 | */ | 22 | # else |
23 | # define MAX_APICS 255 | 23 | # define MAX_APICS 32768 |
24 | # endif | ||
24 | #endif | 25 | #endif |
25 | 26 | ||
26 | struct intel_mp_floating { | 27 | struct intel_mp_floating { |
diff --git a/include/asm-x86/msr-index.h b/include/asm-x86/msr-index.h index 09413ad39d3c..44bce773012e 100644 --- a/include/asm-x86/msr-index.h +++ b/include/asm-x86/msr-index.h | |||
@@ -111,7 +111,9 @@ | |||
111 | #define MSR_K8_TOP_MEM2 0xc001001d | 111 | #define MSR_K8_TOP_MEM2 0xc001001d |
112 | #define MSR_K8_SYSCFG 0xc0010010 | 112 | #define MSR_K8_SYSCFG 0xc0010010 |
113 | #define MSR_K8_HWCR 0xc0010015 | 113 | #define MSR_K8_HWCR 0xc0010015 |
114 | #define MSR_K8_ENABLE_C1E 0xc0010055 | 114 | #define MSR_K8_INT_PENDING_MSG 0xc0010055 |
115 | /* C1E active bits in int pending message */ | ||
116 | #define K8_INTP_C1E_ACTIVE_MASK 0x18000000 | ||
115 | #define MSR_K8_TSEG_ADDR 0xc0010112 | 117 | #define MSR_K8_TSEG_ADDR 0xc0010112 |
116 | #define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000 /* MtrrFixDramEn bit */ | 118 | #define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000 /* MtrrFixDramEn bit */ |
117 | #define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000 /* MtrrFixDramModEn bit */ | 119 | #define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000 /* MtrrFixDramModEn bit */ |
diff --git a/include/asm-x86/msr.h b/include/asm-x86/msr.h index 2b5f2c91db25..ca110ee73f07 100644 --- a/include/asm-x86/msr.h +++ b/include/asm-x86/msr.h | |||
@@ -66,7 +66,7 @@ static inline unsigned long long native_read_msr_safe(unsigned int msr, | |||
66 | static inline void native_write_msr(unsigned int msr, | 66 | static inline void native_write_msr(unsigned int msr, |
67 | unsigned low, unsigned high) | 67 | unsigned low, unsigned high) |
68 | { | 68 | { |
69 | asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high)); | 69 | asm volatile("wrmsr" : : "c" (msr), "a"(low), "d" (high) : "memory"); |
70 | } | 70 | } |
71 | 71 | ||
72 | static inline int native_write_msr_safe(unsigned int msr, | 72 | static inline int native_write_msr_safe(unsigned int msr, |
@@ -81,7 +81,8 @@ static inline int native_write_msr_safe(unsigned int msr, | |||
81 | _ASM_EXTABLE(2b, 3b) | 81 | _ASM_EXTABLE(2b, 3b) |
82 | : "=a" (err) | 82 | : "=a" (err) |
83 | : "c" (msr), "0" (low), "d" (high), | 83 | : "c" (msr), "0" (low), "d" (high), |
84 | "i" (-EFAULT)); | 84 | "i" (-EFAULT) |
85 | : "memory"); | ||
85 | return err; | 86 | return err; |
86 | } | 87 | } |
87 | 88 | ||
diff --git a/include/asm-x86/nmi.h b/include/asm-x86/nmi.h index 1e363021e72f..21f8d0202a82 100644 --- a/include/asm-x86/nmi.h +++ b/include/asm-x86/nmi.h | |||
@@ -15,38 +15,13 @@ | |||
15 | */ | 15 | */ |
16 | int do_nmi_callback(struct pt_regs *regs, int cpu); | 16 | int do_nmi_callback(struct pt_regs *regs, int cpu); |
17 | 17 | ||
18 | #ifdef CONFIG_PM | ||
19 | |||
20 | /** Replace the PM callback routine for NMI. */ | ||
21 | struct pm_dev *set_nmi_pm_callback(pm_callback callback); | ||
22 | |||
23 | /** Unset the PM callback routine back to the default. */ | ||
24 | void unset_nmi_pm_callback(struct pm_dev *dev); | ||
25 | |||
26 | #else | ||
27 | |||
28 | static inline struct pm_dev *set_nmi_pm_callback(pm_callback callback) | ||
29 | { | ||
30 | return 0; | ||
31 | } | ||
32 | |||
33 | static inline void unset_nmi_pm_callback(struct pm_dev *dev) | ||
34 | { | ||
35 | } | ||
36 | |||
37 | #endif /* CONFIG_PM */ | ||
38 | |||
39 | #ifdef CONFIG_X86_64 | 18 | #ifdef CONFIG_X86_64 |
40 | extern void default_do_nmi(struct pt_regs *); | 19 | extern void default_do_nmi(struct pt_regs *); |
41 | extern void die_nmi(char *str, struct pt_regs *regs, int do_panic); | ||
42 | extern void nmi_watchdog_default(void); | ||
43 | #else | ||
44 | #define nmi_watchdog_default() do {} while (0) | ||
45 | #endif | 20 | #endif |
46 | 21 | ||
22 | extern void die_nmi(char *str, struct pt_regs *regs, int do_panic); | ||
47 | extern int check_nmi_watchdog(void); | 23 | extern int check_nmi_watchdog(void); |
48 | extern int nmi_watchdog_enabled; | 24 | extern int nmi_watchdog_enabled; |
49 | extern int unknown_nmi_panic; | ||
50 | extern int avail_to_resrv_perfctr_nmi_bit(unsigned int); | 25 | extern int avail_to_resrv_perfctr_nmi_bit(unsigned int); |
51 | extern int avail_to_resrv_perfctr_nmi(unsigned int); | 26 | extern int avail_to_resrv_perfctr_nmi(unsigned int); |
52 | extern int reserve_perfctr_nmi(unsigned int); | 27 | extern int reserve_perfctr_nmi(unsigned int); |
@@ -62,12 +37,10 @@ extern int nmi_watchdog_tick(struct pt_regs *regs, unsigned reason); | |||
62 | 37 | ||
63 | extern atomic_t nmi_active; | 38 | extern atomic_t nmi_active; |
64 | extern unsigned int nmi_watchdog; | 39 | extern unsigned int nmi_watchdog; |
65 | #define NMI_DISABLED -1 | ||
66 | #define NMI_NONE 0 | 40 | #define NMI_NONE 0 |
67 | #define NMI_IO_APIC 1 | 41 | #define NMI_IO_APIC 1 |
68 | #define NMI_LOCAL_APIC 2 | 42 | #define NMI_LOCAL_APIC 2 |
69 | #define NMI_INVALID 3 | 43 | #define NMI_INVALID 3 |
70 | #define NMI_DEFAULT NMI_DISABLED | ||
71 | 44 | ||
72 | struct ctl_table; | 45 | struct ctl_table; |
73 | struct file; | 46 | struct file; |
@@ -78,6 +51,24 @@ extern int unknown_nmi_panic; | |||
78 | void __trigger_all_cpu_backtrace(void); | 51 | void __trigger_all_cpu_backtrace(void); |
79 | #define trigger_all_cpu_backtrace() __trigger_all_cpu_backtrace() | 52 | #define trigger_all_cpu_backtrace() __trigger_all_cpu_backtrace() |
80 | 53 | ||
54 | static inline void localise_nmi_watchdog(void) | ||
55 | { | ||
56 | if (nmi_watchdog == NMI_IO_APIC) | ||
57 | nmi_watchdog = NMI_LOCAL_APIC; | ||
58 | } | ||
59 | |||
60 | /* check if nmi_watchdog is active (ie was specified at boot) */ | ||
61 | static inline int nmi_watchdog_active(void) | ||
62 | { | ||
63 | /* | ||
64 | * actually it should be: | ||
65 | * return (nmi_watchdog == NMI_LOCAL_APIC || | ||
66 | * nmi_watchdog == NMI_IO_APIC) | ||
67 | * but since they are power of two we could use a | ||
68 | * cheaper way --cvg | ||
69 | */ | ||
70 | return nmi_watchdog & 0x3; | ||
71 | } | ||
81 | #endif | 72 | #endif |
82 | 73 | ||
83 | void lapic_watchdog_stop(void); | 74 | void lapic_watchdog_stop(void); |
diff --git a/include/asm-x86/numa_32.h b/include/asm-x86/numa_32.h index 03d0f7a9bf02..220d7b7707a0 100644 --- a/include/asm-x86/numa_32.h +++ b/include/asm-x86/numa_32.h | |||
@@ -2,14 +2,10 @@ | |||
2 | #define _ASM_X86_32_NUMA_H 1 | 2 | #define _ASM_X86_32_NUMA_H 1 |
3 | 3 | ||
4 | extern int pxm_to_nid(int pxm); | 4 | extern int pxm_to_nid(int pxm); |
5 | extern void numa_remove_cpu(int cpu); | ||
5 | 6 | ||
6 | #ifdef CONFIG_NUMA | 7 | #ifdef CONFIG_NUMA |
7 | extern void __init remap_numa_kva(void); | 8 | extern void set_highmem_pages_init(void); |
8 | extern void set_highmem_pages_init(int); | ||
9 | #else | ||
10 | static inline void remap_numa_kva(void) | ||
11 | { | ||
12 | } | ||
13 | #endif | 9 | #endif |
14 | 10 | ||
15 | #endif /* _ASM_X86_32_NUMA_H */ | 11 | #endif /* _ASM_X86_32_NUMA_H */ |
diff --git a/include/asm-x86/numa_64.h b/include/asm-x86/numa_64.h index 22e87c9f6a80..3830094434a9 100644 --- a/include/asm-x86/numa_64.h +++ b/include/asm-x86/numa_64.h | |||
@@ -14,32 +14,30 @@ extern int compute_hash_shift(struct bootnode *nodes, int numblks, | |||
14 | 14 | ||
15 | #define ZONE_ALIGN (1UL << (MAX_ORDER+PAGE_SHIFT)) | 15 | #define ZONE_ALIGN (1UL << (MAX_ORDER+PAGE_SHIFT)) |
16 | 16 | ||
17 | extern void numa_add_cpu(int cpu); | ||
18 | extern void numa_init_array(void); | 17 | extern void numa_init_array(void); |
19 | extern int numa_off; | 18 | extern int numa_off; |
20 | 19 | ||
21 | extern void numa_set_node(int cpu, int node); | ||
22 | extern void srat_reserve_add_area(int nodeid); | 20 | extern void srat_reserve_add_area(int nodeid); |
23 | extern int hotadd_percent; | 21 | extern int hotadd_percent; |
24 | 22 | ||
25 | extern s16 apicid_to_node[MAX_LOCAL_APIC]; | 23 | extern s16 apicid_to_node[MAX_LOCAL_APIC]; |
26 | 24 | ||
27 | extern void numa_initmem_init(unsigned long start_pfn, unsigned long end_pfn); | ||
28 | extern unsigned long numa_free_all_bootmem(void); | 25 | extern unsigned long numa_free_all_bootmem(void); |
29 | extern void setup_node_bootmem(int nodeid, unsigned long start, | 26 | extern void setup_node_bootmem(int nodeid, unsigned long start, |
30 | unsigned long end); | 27 | unsigned long end); |
31 | 28 | ||
32 | #ifdef CONFIG_NUMA | 29 | #ifdef CONFIG_NUMA |
33 | extern void __init init_cpu_to_node(void); | 30 | extern void __init init_cpu_to_node(void); |
34 | 31 | extern void __cpuinit numa_set_node(int cpu, int node); | |
35 | static inline void clear_node_cpumask(int cpu) | 32 | extern void __cpuinit numa_clear_node(int cpu); |
36 | { | 33 | extern void __cpuinit numa_add_cpu(int cpu); |
37 | clear_bit(cpu, (unsigned long *)&node_to_cpumask_map[cpu_to_node(cpu)]); | 34 | extern void __cpuinit numa_remove_cpu(int cpu); |
38 | } | ||
39 | |||
40 | #else | 35 | #else |
41 | #define init_cpu_to_node() do {} while (0) | 36 | static inline void init_cpu_to_node(void) { } |
42 | #define clear_node_cpumask(cpu) do {} while (0) | 37 | static inline void numa_set_node(int cpu, int node) { } |
38 | static inline void numa_clear_node(int cpu) { } | ||
39 | static inline void numa_add_cpu(int cpu, int node) { } | ||
40 | static inline void numa_remove_cpu(int cpu) { } | ||
43 | #endif | 41 | #endif |
44 | 42 | ||
45 | #endif | 43 | #endif |
diff --git a/include/asm-x86/numaq.h b/include/asm-x86/numaq.h index 94b86c31239a..34b92d581fa3 100644 --- a/include/asm-x86/numaq.h +++ b/include/asm-x86/numaq.h | |||
@@ -28,6 +28,7 @@ | |||
28 | 28 | ||
29 | #ifdef CONFIG_X86_NUMAQ | 29 | #ifdef CONFIG_X86_NUMAQ |
30 | 30 | ||
31 | extern int found_numaq; | ||
31 | extern int get_memcfg_numaq(void); | 32 | extern int get_memcfg_numaq(void); |
32 | 33 | ||
33 | /* | 34 | /* |
@@ -156,9 +157,12 @@ struct sys_cfg_data { | |||
156 | struct eachquadmem eq[MAX_NUMNODES]; /* indexed by quad id */ | 157 | struct eachquadmem eq[MAX_NUMNODES]; /* indexed by quad id */ |
157 | }; | 158 | }; |
158 | 159 | ||
159 | static inline unsigned long *get_zholes_size(int nid) | 160 | void numaq_tsc_disable(void); |
161 | |||
162 | #else | ||
163 | static inline int get_memcfg_numaq(void) | ||
160 | { | 164 | { |
161 | return NULL; | 165 | return 0; |
162 | } | 166 | } |
163 | #endif /* CONFIG_X86_NUMAQ */ | 167 | #endif /* CONFIG_X86_NUMAQ */ |
164 | #endif /* NUMAQ_H */ | 168 | #endif /* NUMAQ_H */ |
diff --git a/include/asm-x86/page.h b/include/asm-x86/page.h index dc936dddf161..6c846228948d 100644 --- a/include/asm-x86/page.h +++ b/include/asm-x86/page.h | |||
@@ -18,8 +18,11 @@ | |||
18 | (ie, 32-bit PAE). */ | 18 | (ie, 32-bit PAE). */ |
19 | #define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK) | 19 | #define PHYSICAL_PAGE_MASK (((signed long)PAGE_MASK) & __PHYSICAL_MASK) |
20 | 20 | ||
21 | /* PTE_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */ | 21 | /* PTE_PFN_MASK extracts the PFN from a (pte|pmd|pud|pgd)val_t */ |
22 | #define PTE_MASK ((pteval_t)PHYSICAL_PAGE_MASK) | 22 | #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK) |
23 | |||
24 | /* PTE_FLAGS_MASK extracts the flags from a (pte|pmd|pud|pgd)val_t */ | ||
25 | #define PTE_FLAGS_MASK (~PTE_PFN_MASK) | ||
23 | 26 | ||
24 | #define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT) | 27 | #define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT) |
25 | #define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1)) | 28 | #define PMD_PAGE_MASK (~(PMD_PAGE_SIZE-1)) |
@@ -51,9 +54,17 @@ | |||
51 | 54 | ||
52 | #ifndef __ASSEMBLY__ | 55 | #ifndef __ASSEMBLY__ |
53 | 56 | ||
57 | typedef struct { pgdval_t pgd; } pgd_t; | ||
58 | typedef struct { pgprotval_t pgprot; } pgprot_t; | ||
59 | |||
54 | extern int page_is_ram(unsigned long pagenr); | 60 | extern int page_is_ram(unsigned long pagenr); |
55 | extern int devmem_is_allowed(unsigned long pagenr); | 61 | extern int devmem_is_allowed(unsigned long pagenr); |
62 | extern void map_devmem(unsigned long pfn, unsigned long size, | ||
63 | pgprot_t vma_prot); | ||
64 | extern void unmap_devmem(unsigned long pfn, unsigned long size, | ||
65 | pgprot_t vma_prot); | ||
56 | 66 | ||
67 | extern unsigned long max_low_pfn_mapped; | ||
57 | extern unsigned long max_pfn_mapped; | 68 | extern unsigned long max_pfn_mapped; |
58 | 69 | ||
59 | struct page; | 70 | struct page; |
@@ -74,9 +85,6 @@ static inline void copy_user_page(void *to, void *from, unsigned long vaddr, | |||
74 | alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) | 85 | alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) |
75 | #define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE | 86 | #define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE |
76 | 87 | ||
77 | typedef struct { pgdval_t pgd; } pgd_t; | ||
78 | typedef struct { pgprotval_t pgprot; } pgprot_t; | ||
79 | |||
80 | static inline pgd_t native_make_pgd(pgdval_t val) | 88 | static inline pgd_t native_make_pgd(pgdval_t val) |
81 | { | 89 | { |
82 | return (pgd_t) { val }; | 90 | return (pgd_t) { val }; |
@@ -139,6 +147,11 @@ static inline pteval_t native_pte_val(pte_t pte) | |||
139 | return pte.pte; | 147 | return pte.pte; |
140 | } | 148 | } |
141 | 149 | ||
150 | static inline pteval_t native_pte_flags(pte_t pte) | ||
151 | { | ||
152 | return native_pte_val(pte) & PTE_FLAGS_MASK; | ||
153 | } | ||
154 | |||
142 | #define pgprot_val(x) ((x).pgprot) | 155 | #define pgprot_val(x) ((x).pgprot) |
143 | #define __pgprot(x) ((pgprot_t) { (x) } ) | 156 | #define __pgprot(x) ((pgprot_t) { (x) } ) |
144 | 157 | ||
@@ -160,6 +173,7 @@ static inline pteval_t native_pte_val(pte_t pte) | |||
160 | #endif | 173 | #endif |
161 | 174 | ||
162 | #define pte_val(x) native_pte_val(x) | 175 | #define pte_val(x) native_pte_val(x) |
176 | #define pte_flags(x) native_pte_flags(x) | ||
163 | #define __pte(x) native_make_pte(x) | 177 | #define __pte(x) native_make_pte(x) |
164 | 178 | ||
165 | #endif /* CONFIG_PARAVIRT */ | 179 | #endif /* CONFIG_PARAVIRT */ |
diff --git a/include/asm-x86/page_32.h b/include/asm-x86/page_32.h index ccf0ba3c3aba..ab8528793f08 100644 --- a/include/asm-x86/page_32.h +++ b/include/asm-x86/page_32.h | |||
@@ -13,6 +13,14 @@ | |||
13 | */ | 13 | */ |
14 | #define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL) | 14 | #define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL) |
15 | 15 | ||
16 | #ifdef CONFIG_4KSTACKS | ||
17 | #define THREAD_ORDER 0 | ||
18 | #else | ||
19 | #define THREAD_ORDER 1 | ||
20 | #endif | ||
21 | #define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) | ||
22 | |||
23 | |||
16 | #ifdef CONFIG_X86_PAE | 24 | #ifdef CONFIG_X86_PAE |
17 | /* 44=32+12, the limit we can fit into an unsigned long pfn */ | 25 | /* 44=32+12, the limit we can fit into an unsigned long pfn */ |
18 | #define __PHYSICAL_MASK_SHIFT 44 | 26 | #define __PHYSICAL_MASK_SHIFT 44 |
@@ -84,6 +92,13 @@ extern int sysctl_legacy_va_layout; | |||
84 | #define VMALLOC_RESERVE ((unsigned long)__VMALLOC_RESERVE) | 92 | #define VMALLOC_RESERVE ((unsigned long)__VMALLOC_RESERVE) |
85 | #define MAXMEM (-__PAGE_OFFSET - __VMALLOC_RESERVE) | 93 | #define MAXMEM (-__PAGE_OFFSET - __VMALLOC_RESERVE) |
86 | 94 | ||
95 | extern void find_low_pfn_range(void); | ||
96 | extern unsigned long init_memory_mapping(unsigned long start, | ||
97 | unsigned long end); | ||
98 | extern void initmem_init(unsigned long, unsigned long); | ||
99 | extern void setup_bootmem_allocator(void); | ||
100 | |||
101 | |||
87 | #ifdef CONFIG_X86_USE_3DNOW | 102 | #ifdef CONFIG_X86_USE_3DNOW |
88 | #include <asm/mmx.h> | 103 | #include <asm/mmx.h> |
89 | 104 | ||
diff --git a/include/asm-x86/page_64.h b/include/asm-x86/page_64.h index 6ea72859c491..c6916c83e6b1 100644 --- a/include/asm-x86/page_64.h +++ b/include/asm-x86/page_64.h | |||
@@ -26,7 +26,13 @@ | |||
26 | #define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT) | 26 | #define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT) |
27 | #define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1)) | 27 | #define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1)) |
28 | 28 | ||
29 | #define __PAGE_OFFSET _AC(0xffff810000000000, UL) | 29 | /* |
30 | * Set __PAGE_OFFSET to the most negative possible address + | ||
31 | * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a | ||
32 | * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's | ||
33 | * what Xen requires. | ||
34 | */ | ||
35 | #define __PAGE_OFFSET _AC(0xffff880000000000, UL) | ||
30 | 36 | ||
31 | #define __PHYSICAL_START CONFIG_PHYSICAL_START | 37 | #define __PHYSICAL_START CONFIG_PHYSICAL_START |
32 | #define __KERNEL_ALIGN 0x200000 | 38 | #define __KERNEL_ALIGN 0x200000 |
@@ -58,7 +64,8 @@ | |||
58 | void clear_page(void *page); | 64 | void clear_page(void *page); |
59 | void copy_page(void *to, void *from); | 65 | void copy_page(void *to, void *from); |
60 | 66 | ||
61 | extern unsigned long end_pfn; | 67 | /* duplicated to the one in bootmem.h */ |
68 | extern unsigned long max_pfn; | ||
62 | extern unsigned long phys_base; | 69 | extern unsigned long phys_base; |
63 | 70 | ||
64 | extern unsigned long __phys_addr(unsigned long); | 71 | extern unsigned long __phys_addr(unsigned long); |
@@ -83,10 +90,15 @@ typedef struct { pteval_t pte; } pte_t; | |||
83 | extern unsigned long init_memory_mapping(unsigned long start, | 90 | extern unsigned long init_memory_mapping(unsigned long start, |
84 | unsigned long end); | 91 | unsigned long end); |
85 | 92 | ||
93 | extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn); | ||
94 | |||
95 | extern void init_extra_mapping_uc(unsigned long phys, unsigned long size); | ||
96 | extern void init_extra_mapping_wb(unsigned long phys, unsigned long size); | ||
97 | |||
86 | #endif /* !__ASSEMBLY__ */ | 98 | #endif /* !__ASSEMBLY__ */ |
87 | 99 | ||
88 | #ifdef CONFIG_FLATMEM | 100 | #ifdef CONFIG_FLATMEM |
89 | #define pfn_valid(pfn) ((pfn) < end_pfn) | 101 | #define pfn_valid(pfn) ((pfn) < max_pfn) |
90 | #endif | 102 | #endif |
91 | 103 | ||
92 | 104 | ||
diff --git a/include/asm-x86/paravirt.h b/include/asm-x86/paravirt.h index 0f13b945e240..fbbde93f12d6 100644 --- a/include/asm-x86/paravirt.h +++ b/include/asm-x86/paravirt.h | |||
@@ -84,7 +84,7 @@ struct pv_time_ops { | |||
84 | int (*set_wallclock)(unsigned long); | 84 | int (*set_wallclock)(unsigned long); |
85 | 85 | ||
86 | unsigned long long (*sched_clock)(void); | 86 | unsigned long long (*sched_clock)(void); |
87 | unsigned long (*get_cpu_khz)(void); | 87 | unsigned long (*get_tsc_khz)(void); |
88 | }; | 88 | }; |
89 | 89 | ||
90 | struct pv_cpu_ops { | 90 | struct pv_cpu_ops { |
@@ -115,6 +115,9 @@ struct pv_cpu_ops { | |||
115 | void (*set_ldt)(const void *desc, unsigned entries); | 115 | void (*set_ldt)(const void *desc, unsigned entries); |
116 | unsigned long (*store_tr)(void); | 116 | unsigned long (*store_tr)(void); |
117 | void (*load_tls)(struct thread_struct *t, unsigned int cpu); | 117 | void (*load_tls)(struct thread_struct *t, unsigned int cpu); |
118 | #ifdef CONFIG_X86_64 | ||
119 | void (*load_gs_index)(unsigned int idx); | ||
120 | #endif | ||
118 | void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, | 121 | void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, |
119 | const void *desc); | 122 | const void *desc); |
120 | void (*write_gdt_entry)(struct desc_struct *, | 123 | void (*write_gdt_entry)(struct desc_struct *, |
@@ -141,8 +144,32 @@ struct pv_cpu_ops { | |||
141 | u64 (*read_pmc)(int counter); | 144 | u64 (*read_pmc)(int counter); |
142 | unsigned long long (*read_tscp)(unsigned int *aux); | 145 | unsigned long long (*read_tscp)(unsigned int *aux); |
143 | 146 | ||
144 | /* These two are jmp to, not actually called. */ | 147 | /* |
145 | void (*irq_enable_syscall_ret)(void); | 148 | * Atomically enable interrupts and return to userspace. This |
149 | * is only ever used to return to 32-bit processes; in a | ||
150 | * 64-bit kernel, it's used for 32-on-64 compat processes, but | ||
151 | * never native 64-bit processes. (Jump, not call.) | ||
152 | */ | ||
153 | void (*irq_enable_sysexit)(void); | ||
154 | |||
155 | /* | ||
156 | * Switch to usermode gs and return to 64-bit usermode using | ||
157 | * sysret. Only used in 64-bit kernels to return to 64-bit | ||
158 | * processes. Usermode register state, including %rsp, must | ||
159 | * already be restored. | ||
160 | */ | ||
161 | void (*usergs_sysret64)(void); | ||
162 | |||
163 | /* | ||
164 | * Switch to usermode gs and return to 32-bit usermode using | ||
165 | * sysret. Used to return to 32-on-64 compat processes. | ||
166 | * Other usermode register state, including %esp, must already | ||
167 | * be restored. | ||
168 | */ | ||
169 | void (*usergs_sysret32)(void); | ||
170 | |||
171 | /* Normal iret. Jump to this with the standard iret stack | ||
172 | frame set up. */ | ||
146 | void (*iret)(void); | 173 | void (*iret)(void); |
147 | 174 | ||
148 | void (*swapgs)(void); | 175 | void (*swapgs)(void); |
@@ -165,6 +192,10 @@ struct pv_irq_ops { | |||
165 | void (*irq_enable)(void); | 192 | void (*irq_enable)(void); |
166 | void (*safe_halt)(void); | 193 | void (*safe_halt)(void); |
167 | void (*halt)(void); | 194 | void (*halt)(void); |
195 | |||
196 | #ifdef CONFIG_X86_64 | ||
197 | void (*adjust_exception_frame)(void); | ||
198 | #endif | ||
168 | }; | 199 | }; |
169 | 200 | ||
170 | struct pv_apic_ops { | 201 | struct pv_apic_ops { |
@@ -174,7 +205,6 @@ struct pv_apic_ops { | |||
174 | * these shouldn't be in this interface. | 205 | * these shouldn't be in this interface. |
175 | */ | 206 | */ |
176 | void (*apic_write)(unsigned long reg, u32 v); | 207 | void (*apic_write)(unsigned long reg, u32 v); |
177 | void (*apic_write_atomic)(unsigned long reg, u32 v); | ||
178 | u32 (*apic_read)(unsigned long reg); | 208 | u32 (*apic_read)(unsigned long reg); |
179 | void (*setup_boot_clock)(void); | 209 | void (*setup_boot_clock)(void); |
180 | void (*setup_secondary_clock)(void); | 210 | void (*setup_secondary_clock)(void); |
@@ -219,7 +249,14 @@ struct pv_mmu_ops { | |||
219 | void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm, | 249 | void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm, |
220 | unsigned long va); | 250 | unsigned long va); |
221 | 251 | ||
222 | /* Hooks for allocating/releasing pagetable pages */ | 252 | /* Hooks for allocating and freeing a pagetable top-level */ |
253 | int (*pgd_alloc)(struct mm_struct *mm); | ||
254 | void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd); | ||
255 | |||
256 | /* | ||
257 | * Hooks for allocating/releasing pagetable pages when they're | ||
258 | * attached to a pagetable | ||
259 | */ | ||
223 | void (*alloc_pte)(struct mm_struct *mm, u32 pfn); | 260 | void (*alloc_pte)(struct mm_struct *mm, u32 pfn); |
224 | void (*alloc_pmd)(struct mm_struct *mm, u32 pfn); | 261 | void (*alloc_pmd)(struct mm_struct *mm, u32 pfn); |
225 | void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count); | 262 | void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count); |
@@ -238,7 +275,13 @@ struct pv_mmu_ops { | |||
238 | void (*pte_update_defer)(struct mm_struct *mm, | 275 | void (*pte_update_defer)(struct mm_struct *mm, |
239 | unsigned long addr, pte_t *ptep); | 276 | unsigned long addr, pte_t *ptep); |
240 | 277 | ||
278 | pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr, | ||
279 | pte_t *ptep); | ||
280 | void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr, | ||
281 | pte_t *ptep, pte_t pte); | ||
282 | |||
241 | pteval_t (*pte_val)(pte_t); | 283 | pteval_t (*pte_val)(pte_t); |
284 | pteval_t (*pte_flags)(pte_t); | ||
242 | pte_t (*make_pte)(pteval_t pte); | 285 | pte_t (*make_pte)(pteval_t pte); |
243 | 286 | ||
244 | pgdval_t (*pgd_val)(pgd_t); | 287 | pgdval_t (*pgd_val)(pgd_t); |
@@ -273,6 +316,22 @@ struct pv_mmu_ops { | |||
273 | #endif | 316 | #endif |
274 | 317 | ||
275 | struct pv_lazy_ops lazy_mode; | 318 | struct pv_lazy_ops lazy_mode; |
319 | |||
320 | /* dom0 ops */ | ||
321 | |||
322 | /* Sometimes the physical address is a pfn, and sometimes its | ||
323 | an mfn. We can tell which is which from the index. */ | ||
324 | void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx, | ||
325 | unsigned long phys, pgprot_t flags); | ||
326 | }; | ||
327 | |||
328 | struct raw_spinlock; | ||
329 | struct pv_lock_ops { | ||
330 | int (*spin_is_locked)(struct raw_spinlock *lock); | ||
331 | int (*spin_is_contended)(struct raw_spinlock *lock); | ||
332 | void (*spin_lock)(struct raw_spinlock *lock); | ||
333 | int (*spin_trylock)(struct raw_spinlock *lock); | ||
334 | void (*spin_unlock)(struct raw_spinlock *lock); | ||
276 | }; | 335 | }; |
277 | 336 | ||
278 | /* This contains all the paravirt structures: we get a convenient | 337 | /* This contains all the paravirt structures: we get a convenient |
@@ -285,6 +344,7 @@ struct paravirt_patch_template { | |||
285 | struct pv_irq_ops pv_irq_ops; | 344 | struct pv_irq_ops pv_irq_ops; |
286 | struct pv_apic_ops pv_apic_ops; | 345 | struct pv_apic_ops pv_apic_ops; |
287 | struct pv_mmu_ops pv_mmu_ops; | 346 | struct pv_mmu_ops pv_mmu_ops; |
347 | struct pv_lock_ops pv_lock_ops; | ||
288 | }; | 348 | }; |
289 | 349 | ||
290 | extern struct pv_info pv_info; | 350 | extern struct pv_info pv_info; |
@@ -294,6 +354,7 @@ extern struct pv_cpu_ops pv_cpu_ops; | |||
294 | extern struct pv_irq_ops pv_irq_ops; | 354 | extern struct pv_irq_ops pv_irq_ops; |
295 | extern struct pv_apic_ops pv_apic_ops; | 355 | extern struct pv_apic_ops pv_apic_ops; |
296 | extern struct pv_mmu_ops pv_mmu_ops; | 356 | extern struct pv_mmu_ops pv_mmu_ops; |
357 | extern struct pv_lock_ops pv_lock_ops; | ||
297 | 358 | ||
298 | #define PARAVIRT_PATCH(x) \ | 359 | #define PARAVIRT_PATCH(x) \ |
299 | (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) | 360 | (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) |
@@ -439,10 +500,17 @@ int paravirt_disable_iospace(void); | |||
439 | #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" | 500 | #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" |
440 | #endif | 501 | #endif |
441 | 502 | ||
503 | #ifdef CONFIG_PARAVIRT_DEBUG | ||
504 | #define PVOP_TEST_NULL(op) BUG_ON(op == NULL) | ||
505 | #else | ||
506 | #define PVOP_TEST_NULL(op) ((void)op) | ||
507 | #endif | ||
508 | |||
442 | #define __PVOP_CALL(rettype, op, pre, post, ...) \ | 509 | #define __PVOP_CALL(rettype, op, pre, post, ...) \ |
443 | ({ \ | 510 | ({ \ |
444 | rettype __ret; \ | 511 | rettype __ret; \ |
445 | PVOP_CALL_ARGS; \ | 512 | PVOP_CALL_ARGS; \ |
513 | PVOP_TEST_NULL(op); \ | ||
446 | /* This is 32-bit specific, but is okay in 64-bit */ \ | 514 | /* This is 32-bit specific, but is okay in 64-bit */ \ |
447 | /* since this condition will never hold */ \ | 515 | /* since this condition will never hold */ \ |
448 | if (sizeof(rettype) > sizeof(unsigned long)) { \ | 516 | if (sizeof(rettype) > sizeof(unsigned long)) { \ |
@@ -471,6 +539,7 @@ int paravirt_disable_iospace(void); | |||
471 | #define __PVOP_VCALL(op, pre, post, ...) \ | 539 | #define __PVOP_VCALL(op, pre, post, ...) \ |
472 | ({ \ | 540 | ({ \ |
473 | PVOP_VCALL_ARGS; \ | 541 | PVOP_VCALL_ARGS; \ |
542 | PVOP_TEST_NULL(op); \ | ||
474 | asm volatile(pre \ | 543 | asm volatile(pre \ |
475 | paravirt_alt(PARAVIRT_CALL) \ | 544 | paravirt_alt(PARAVIRT_CALL) \ |
476 | post \ | 545 | post \ |
@@ -720,7 +789,7 @@ static inline unsigned long long paravirt_sched_clock(void) | |||
720 | { | 789 | { |
721 | return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock); | 790 | return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock); |
722 | } | 791 | } |
723 | #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz()) | 792 | #define calibrate_tsc() (pv_time_ops.get_tsc_khz()) |
724 | 793 | ||
725 | static inline unsigned long long paravirt_read_pmc(int counter) | 794 | static inline unsigned long long paravirt_read_pmc(int counter) |
726 | { | 795 | { |
@@ -789,6 +858,13 @@ static inline void load_TLS(struct thread_struct *t, unsigned cpu) | |||
789 | PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu); | 858 | PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu); |
790 | } | 859 | } |
791 | 860 | ||
861 | #ifdef CONFIG_X86_64 | ||
862 | static inline void load_gs_index(unsigned int gs) | ||
863 | { | ||
864 | PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs); | ||
865 | } | ||
866 | #endif | ||
867 | |||
792 | static inline void write_ldt_entry(struct desc_struct *dt, int entry, | 868 | static inline void write_ldt_entry(struct desc_struct *dt, int entry, |
793 | const void *desc) | 869 | const void *desc) |
794 | { | 870 | { |
@@ -830,11 +906,6 @@ static inline void apic_write(unsigned long reg, u32 v) | |||
830 | PVOP_VCALL2(pv_apic_ops.apic_write, reg, v); | 906 | PVOP_VCALL2(pv_apic_ops.apic_write, reg, v); |
831 | } | 907 | } |
832 | 908 | ||
833 | static inline void apic_write_atomic(unsigned long reg, u32 v) | ||
834 | { | ||
835 | PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v); | ||
836 | } | ||
837 | |||
838 | static inline u32 apic_read(unsigned long reg) | 909 | static inline u32 apic_read(unsigned long reg) |
839 | { | 910 | { |
840 | return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg); | 911 | return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg); |
@@ -912,6 +983,16 @@ static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, | |||
912 | PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va); | 983 | PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va); |
913 | } | 984 | } |
914 | 985 | ||
986 | static inline int paravirt_pgd_alloc(struct mm_struct *mm) | ||
987 | { | ||
988 | return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm); | ||
989 | } | ||
990 | |||
991 | static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd) | ||
992 | { | ||
993 | PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd); | ||
994 | } | ||
995 | |||
915 | static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn) | 996 | static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn) |
916 | { | 997 | { |
917 | PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn); | 998 | PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn); |
@@ -996,6 +1077,23 @@ static inline pteval_t pte_val(pte_t pte) | |||
996 | return ret; | 1077 | return ret; |
997 | } | 1078 | } |
998 | 1079 | ||
1080 | static inline pteval_t pte_flags(pte_t pte) | ||
1081 | { | ||
1082 | pteval_t ret; | ||
1083 | |||
1084 | if (sizeof(pteval_t) > sizeof(long)) | ||
1085 | ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags, | ||
1086 | pte.pte, (u64)pte.pte >> 32); | ||
1087 | else | ||
1088 | ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags, | ||
1089 | pte.pte); | ||
1090 | |||
1091 | #ifdef CONFIG_PARAVIRT_DEBUG | ||
1092 | BUG_ON(ret & PTE_PFN_MASK); | ||
1093 | #endif | ||
1094 | return ret; | ||
1095 | } | ||
1096 | |||
999 | static inline pgd_t __pgd(pgdval_t val) | 1097 | static inline pgd_t __pgd(pgdval_t val) |
1000 | { | 1098 | { |
1001 | pgdval_t ret; | 1099 | pgdval_t ret; |
@@ -1024,6 +1122,29 @@ static inline pgdval_t pgd_val(pgd_t pgd) | |||
1024 | return ret; | 1122 | return ret; |
1025 | } | 1123 | } |
1026 | 1124 | ||
1125 | #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION | ||
1126 | static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, | ||
1127 | pte_t *ptep) | ||
1128 | { | ||
1129 | pteval_t ret; | ||
1130 | |||
1131 | ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start, | ||
1132 | mm, addr, ptep); | ||
1133 | |||
1134 | return (pte_t) { .pte = ret }; | ||
1135 | } | ||
1136 | |||
1137 | static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, | ||
1138 | pte_t *ptep, pte_t pte) | ||
1139 | { | ||
1140 | if (sizeof(pteval_t) > sizeof(long)) | ||
1141 | /* 5 arg words */ | ||
1142 | pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte); | ||
1143 | else | ||
1144 | PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit, | ||
1145 | mm, addr, ptep, pte.pte); | ||
1146 | } | ||
1147 | |||
1027 | static inline void set_pte(pte_t *ptep, pte_t pte) | 1148 | static inline void set_pte(pte_t *ptep, pte_t pte) |
1028 | { | 1149 | { |
1029 | if (sizeof(pteval_t) > sizeof(long)) | 1150 | if (sizeof(pteval_t) > sizeof(long)) |
@@ -1252,9 +1373,46 @@ static inline void arch_flush_lazy_mmu_mode(void) | |||
1252 | } | 1373 | } |
1253 | } | 1374 | } |
1254 | 1375 | ||
1376 | static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, | ||
1377 | unsigned long phys, pgprot_t flags) | ||
1378 | { | ||
1379 | pv_mmu_ops.set_fixmap(idx, phys, flags); | ||
1380 | } | ||
1381 | |||
1255 | void _paravirt_nop(void); | 1382 | void _paravirt_nop(void); |
1256 | #define paravirt_nop ((void *)_paravirt_nop) | 1383 | #define paravirt_nop ((void *)_paravirt_nop) |
1257 | 1384 | ||
1385 | void paravirt_use_bytelocks(void); | ||
1386 | |||
1387 | #ifdef CONFIG_SMP | ||
1388 | |||
1389 | static inline int __raw_spin_is_locked(struct raw_spinlock *lock) | ||
1390 | { | ||
1391 | return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock); | ||
1392 | } | ||
1393 | |||
1394 | static inline int __raw_spin_is_contended(struct raw_spinlock *lock) | ||
1395 | { | ||
1396 | return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock); | ||
1397 | } | ||
1398 | |||
1399 | static __always_inline void __raw_spin_lock(struct raw_spinlock *lock) | ||
1400 | { | ||
1401 | PVOP_VCALL1(pv_lock_ops.spin_lock, lock); | ||
1402 | } | ||
1403 | |||
1404 | static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock) | ||
1405 | { | ||
1406 | return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock); | ||
1407 | } | ||
1408 | |||
1409 | static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock) | ||
1410 | { | ||
1411 | PVOP_VCALL1(pv_lock_ops.spin_unlock, lock); | ||
1412 | } | ||
1413 | |||
1414 | #endif | ||
1415 | |||
1258 | /* These all sit in the .parainstructions section to tell us what to patch. */ | 1416 | /* These all sit in the .parainstructions section to tell us what to patch. */ |
1259 | struct paravirt_patch_site { | 1417 | struct paravirt_patch_site { |
1260 | u8 *instr; /* original instructions */ | 1418 | u8 *instr; /* original instructions */ |
@@ -1277,8 +1435,8 @@ extern struct paravirt_patch_site __parainstructions[], | |||
1277 | * caller saved registers but the argument parameter */ | 1435 | * caller saved registers but the argument parameter */ |
1278 | #define PV_SAVE_REGS "pushq %%rdi;" | 1436 | #define PV_SAVE_REGS "pushq %%rdi;" |
1279 | #define PV_RESTORE_REGS "popq %%rdi;" | 1437 | #define PV_RESTORE_REGS "popq %%rdi;" |
1280 | #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx" | 1438 | #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi" |
1281 | #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx" | 1439 | #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi" |
1282 | #define PV_FLAGS_ARG "D" | 1440 | #define PV_FLAGS_ARG "D" |
1283 | #endif | 1441 | #endif |
1284 | 1442 | ||
@@ -1339,6 +1497,7 @@ static inline unsigned long __raw_local_irq_save(void) | |||
1339 | return f; | 1497 | return f; |
1340 | } | 1498 | } |
1341 | 1499 | ||
1500 | |||
1342 | /* Make sure as little as possible of this mess escapes. */ | 1501 | /* Make sure as little as possible of this mess escapes. */ |
1343 | #undef PARAVIRT_CALL | 1502 | #undef PARAVIRT_CALL |
1344 | #undef __PVOP_CALL | 1503 | #undef __PVOP_CALL |
@@ -1370,58 +1529,108 @@ static inline unsigned long __raw_local_irq_save(void) | |||
1370 | 1529 | ||
1371 | 1530 | ||
1372 | #ifdef CONFIG_X86_64 | 1531 | #ifdef CONFIG_X86_64 |
1373 | #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx | 1532 | #define PV_SAVE_REGS \ |
1374 | #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax | 1533 | push %rax; \ |
1534 | push %rcx; \ | ||
1535 | push %rdx; \ | ||
1536 | push %rsi; \ | ||
1537 | push %rdi; \ | ||
1538 | push %r8; \ | ||
1539 | push %r9; \ | ||
1540 | push %r10; \ | ||
1541 | push %r11 | ||
1542 | #define PV_RESTORE_REGS \ | ||
1543 | pop %r11; \ | ||
1544 | pop %r10; \ | ||
1545 | pop %r9; \ | ||
1546 | pop %r8; \ | ||
1547 | pop %rdi; \ | ||
1548 | pop %rsi; \ | ||
1549 | pop %rdx; \ | ||
1550 | pop %rcx; \ | ||
1551 | pop %rax | ||
1375 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8) | 1552 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8) |
1376 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8) | 1553 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8) |
1554 | #define PARA_INDIRECT(addr) *addr(%rip) | ||
1377 | #else | 1555 | #else |
1378 | #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx | 1556 | #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx |
1379 | #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax | 1557 | #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax |
1380 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4) | 1558 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4) |
1381 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4) | 1559 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4) |
1560 | #define PARA_INDIRECT(addr) *%cs:addr | ||
1382 | #endif | 1561 | #endif |
1383 | 1562 | ||
1384 | #define INTERRUPT_RETURN \ | 1563 | #define INTERRUPT_RETURN \ |
1385 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \ | 1564 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \ |
1386 | jmp *%cs:pv_cpu_ops+PV_CPU_iret) | 1565 | jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret)) |
1387 | 1566 | ||
1388 | #define DISABLE_INTERRUPTS(clobbers) \ | 1567 | #define DISABLE_INTERRUPTS(clobbers) \ |
1389 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \ | 1568 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \ |
1390 | PV_SAVE_REGS; \ | 1569 | PV_SAVE_REGS; \ |
1391 | call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \ | 1570 | call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable); \ |
1392 | PV_RESTORE_REGS;) \ | 1571 | PV_RESTORE_REGS;) \ |
1393 | 1572 | ||
1394 | #define ENABLE_INTERRUPTS(clobbers) \ | 1573 | #define ENABLE_INTERRUPTS(clobbers) \ |
1395 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \ | 1574 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \ |
1396 | PV_SAVE_REGS; \ | 1575 | PV_SAVE_REGS; \ |
1397 | call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \ | 1576 | call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable); \ |
1398 | PV_RESTORE_REGS;) | 1577 | PV_RESTORE_REGS;) |
1399 | 1578 | ||
1400 | #define ENABLE_INTERRUPTS_SYSCALL_RET \ | 1579 | #define USERGS_SYSRET32 \ |
1401 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\ | 1580 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32), \ |
1402 | CLBR_NONE, \ | 1581 | CLBR_NONE, \ |
1403 | jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret) | 1582 | jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32)) |
1404 | |||
1405 | 1583 | ||
1406 | #ifdef CONFIG_X86_32 | 1584 | #ifdef CONFIG_X86_32 |
1407 | #define GET_CR0_INTO_EAX \ | 1585 | #define GET_CR0_INTO_EAX \ |
1408 | push %ecx; push %edx; \ | 1586 | push %ecx; push %edx; \ |
1409 | call *pv_cpu_ops+PV_CPU_read_cr0; \ | 1587 | call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \ |
1410 | pop %edx; pop %ecx | 1588 | pop %edx; pop %ecx |
1411 | #else | 1589 | |
1590 | #define ENABLE_INTERRUPTS_SYSEXIT \ | ||
1591 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \ | ||
1592 | CLBR_NONE, \ | ||
1593 | jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit)) | ||
1594 | |||
1595 | |||
1596 | #else /* !CONFIG_X86_32 */ | ||
1597 | |||
1598 | /* | ||
1599 | * If swapgs is used while the userspace stack is still current, | ||
1600 | * there's no way to call a pvop. The PV replacement *must* be | ||
1601 | * inlined, or the swapgs instruction must be trapped and emulated. | ||
1602 | */ | ||
1603 | #define SWAPGS_UNSAFE_STACK \ | ||
1604 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \ | ||
1605 | swapgs) | ||
1606 | |||
1412 | #define SWAPGS \ | 1607 | #define SWAPGS \ |
1413 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \ | 1608 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \ |
1414 | PV_SAVE_REGS; \ | 1609 | PV_SAVE_REGS; \ |
1415 | call *pv_cpu_ops+PV_CPU_swapgs; \ | 1610 | call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs); \ |
1416 | PV_RESTORE_REGS \ | 1611 | PV_RESTORE_REGS \ |
1417 | ) | 1612 | ) |
1418 | 1613 | ||
1419 | #define GET_CR2_INTO_RCX \ | 1614 | #define GET_CR2_INTO_RCX \ |
1420 | call *pv_mmu_ops+PV_MMU_read_cr2; \ | 1615 | call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \ |
1421 | movq %rax, %rcx; \ | 1616 | movq %rax, %rcx; \ |
1422 | xorq %rax, %rax; | 1617 | xorq %rax, %rax; |
1423 | 1618 | ||
1424 | #endif | 1619 | #define PARAVIRT_ADJUST_EXCEPTION_FRAME \ |
1620 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \ | ||
1621 | CLBR_NONE, \ | ||
1622 | call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame)) | ||
1623 | |||
1624 | #define USERGS_SYSRET64 \ | ||
1625 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64), \ | ||
1626 | CLBR_NONE, \ | ||
1627 | jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64)) | ||
1628 | |||
1629 | #define ENABLE_INTERRUPTS_SYSEXIT32 \ | ||
1630 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit), \ | ||
1631 | CLBR_NONE, \ | ||
1632 | jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit)) | ||
1633 | #endif /* CONFIG_X86_32 */ | ||
1425 | 1634 | ||
1426 | #endif /* __ASSEMBLY__ */ | 1635 | #endif /* __ASSEMBLY__ */ |
1427 | #endif /* CONFIG_PARAVIRT */ | 1636 | #endif /* CONFIG_PARAVIRT */ |
diff --git a/include/asm-x86/pat.h b/include/asm-x86/pat.h index 88f60cc6a227..7edc47307217 100644 --- a/include/asm-x86/pat.h +++ b/include/asm-x86/pat.h | |||
@@ -1,14 +1,13 @@ | |||
1 | |||
2 | #ifndef _ASM_PAT_H | 1 | #ifndef _ASM_PAT_H |
3 | #define _ASM_PAT_H 1 | 2 | #define _ASM_PAT_H |
4 | 3 | ||
5 | #include <linux/types.h> | 4 | #include <linux/types.h> |
6 | 5 | ||
7 | #ifdef CONFIG_X86_PAT | 6 | #ifdef CONFIG_X86_PAT |
8 | extern int pat_wc_enabled; | 7 | extern int pat_enabled; |
9 | extern void validate_pat_support(struct cpuinfo_x86 *c); | 8 | extern void validate_pat_support(struct cpuinfo_x86 *c); |
10 | #else | 9 | #else |
11 | static const int pat_wc_enabled = 0; | 10 | static const int pat_enabled; |
12 | static inline void validate_pat_support(struct cpuinfo_x86 *c) { } | 11 | static inline void validate_pat_support(struct cpuinfo_x86 *c) { } |
13 | #endif | 12 | #endif |
14 | 13 | ||
@@ -21,4 +20,3 @@ extern int free_memtype(u64 start, u64 end); | |||
21 | extern void pat_disable(char *reason); | 20 | extern void pat_disable(char *reason); |
22 | 21 | ||
23 | #endif | 22 | #endif |
24 | |||
diff --git a/include/asm-x86/pci-direct.h b/include/asm-x86/pci-direct.h index 5b21485be573..80c775d9fe20 100644 --- a/include/asm-x86/pci-direct.h +++ b/include/asm-x86/pci-direct.h | |||
@@ -11,7 +11,11 @@ extern u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset); | |||
11 | extern u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset); | 11 | extern u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset); |
12 | extern void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val); | 12 | extern void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val); |
13 | extern void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val); | 13 | extern void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val); |
14 | extern void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val); | ||
14 | 15 | ||
15 | extern int early_pci_allowed(void); | 16 | extern int early_pci_allowed(void); |
16 | 17 | ||
18 | extern unsigned int pci_early_dump_regs; | ||
19 | extern void early_dump_pci_device(u8 bus, u8 slot, u8 func); | ||
20 | extern void early_dump_pci_devices(void); | ||
17 | #endif | 21 | #endif |
diff --git a/include/asm-x86/pci.h b/include/asm-x86/pci.h index 30bbde0cb34b..2db14cf17db8 100644 --- a/include/asm-x86/pci.h +++ b/include/asm-x86/pci.h | |||
@@ -18,6 +18,8 @@ struct pci_sysdata { | |||
18 | #endif | 18 | #endif |
19 | }; | 19 | }; |
20 | 20 | ||
21 | extern int pci_routeirq; | ||
22 | |||
21 | /* scan a bus after allocating a pci_sysdata for it */ | 23 | /* scan a bus after allocating a pci_sysdata for it */ |
22 | extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, | 24 | extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, |
23 | int node); | 25 | int node); |
diff --git a/include/asm-x86/pci_32.h b/include/asm-x86/pci_32.h index 8c4c3a0368e2..a50d46851285 100644 --- a/include/asm-x86/pci_32.h +++ b/include/asm-x86/pci_32.h | |||
@@ -18,12 +18,14 @@ struct pci_dev; | |||
18 | #define PCI_DMA_BUS_IS_PHYS (1) | 18 | #define PCI_DMA_BUS_IS_PHYS (1) |
19 | 19 | ||
20 | /* pci_unmap_{page,single} is a nop so... */ | 20 | /* pci_unmap_{page,single} is a nop so... */ |
21 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) | 21 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME[0]; |
22 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) | 22 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) unsigned LEN_NAME[0]; |
23 | #define pci_unmap_addr(PTR, ADDR_NAME) (0) | 23 | #define pci_unmap_addr(PTR, ADDR_NAME) sizeof((PTR)->ADDR_NAME) |
24 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) | 24 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ |
25 | #define pci_unmap_len(PTR, LEN_NAME) (0) | 25 | do { break; } while (pci_unmap_addr(PTR, ADDR_NAME)) |
26 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) | 26 | #define pci_unmap_len(PTR, LEN_NAME) sizeof((PTR)->LEN_NAME) |
27 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | ||
28 | do { break; } while (pci_unmap_len(PTR, LEN_NAME)) | ||
27 | 29 | ||
28 | 30 | ||
29 | #endif /* __KERNEL__ */ | 31 | #endif /* __KERNEL__ */ |
diff --git a/include/asm-x86/pda.h b/include/asm-x86/pda.h index 101fb9e11954..b34e9a7cc80b 100644 --- a/include/asm-x86/pda.h +++ b/include/asm-x86/pda.h | |||
@@ -22,6 +22,8 @@ struct x8664_pda { | |||
22 | offset 40!!! */ | 22 | offset 40!!! */ |
23 | #endif | 23 | #endif |
24 | char *irqstackptr; | 24 | char *irqstackptr; |
25 | short nodenumber; /* number of current node (32k max) */ | ||
26 | short in_bootmem; /* pda lives in bootmem */ | ||
25 | unsigned int __softirq_pending; | 27 | unsigned int __softirq_pending; |
26 | unsigned int __nmi_count; /* number of NMI on this CPUs */ | 28 | unsigned int __nmi_count; /* number of NMI on this CPUs */ |
27 | short mmu_state; | 29 | short mmu_state; |
@@ -37,8 +39,7 @@ struct x8664_pda { | |||
37 | unsigned irq_spurious_count; | 39 | unsigned irq_spurious_count; |
38 | } ____cacheline_aligned_in_smp; | 40 | } ____cacheline_aligned_in_smp; |
39 | 41 | ||
40 | extern struct x8664_pda *_cpu_pda[]; | 42 | extern struct x8664_pda **_cpu_pda; |
41 | extern struct x8664_pda boot_cpu_pda[]; | ||
42 | extern void pda_init(int); | 43 | extern void pda_init(int); |
43 | 44 | ||
44 | #define cpu_pda(i) (_cpu_pda[i]) | 45 | #define cpu_pda(i) (_cpu_pda[i]) |
diff --git a/include/asm-x86/percpu.h b/include/asm-x86/percpu.h index 736fc3bb8e1e..4e91ee1e37aa 100644 --- a/include/asm-x86/percpu.h +++ b/include/asm-x86/percpu.h | |||
@@ -22,6 +22,32 @@ | |||
22 | 22 | ||
23 | DECLARE_PER_CPU(struct x8664_pda, pda); | 23 | DECLARE_PER_CPU(struct x8664_pda, pda); |
24 | 24 | ||
25 | /* | ||
26 | * These are supposed to be implemented as a single instruction which | ||
27 | * operates on the per-cpu data base segment. x86-64 doesn't have | ||
28 | * that yet, so this is a fairly inefficient workaround for the | ||
29 | * meantime. The single instruction is atomic with respect to | ||
30 | * preemption and interrupts, so we need to explicitly disable | ||
31 | * interrupts here to achieve the same effect. However, because it | ||
32 | * can be used from within interrupt-disable/enable, we can't actually | ||
33 | * disable interrupts; disabling preemption is enough. | ||
34 | */ | ||
35 | #define x86_read_percpu(var) \ | ||
36 | ({ \ | ||
37 | typeof(per_cpu_var(var)) __tmp; \ | ||
38 | preempt_disable(); \ | ||
39 | __tmp = __get_cpu_var(var); \ | ||
40 | preempt_enable(); \ | ||
41 | __tmp; \ | ||
42 | }) | ||
43 | |||
44 | #define x86_write_percpu(var, val) \ | ||
45 | do { \ | ||
46 | preempt_disable(); \ | ||
47 | __get_cpu_var(var) = (val); \ | ||
48 | preempt_enable(); \ | ||
49 | } while(0) | ||
50 | |||
25 | #else /* CONFIG_X86_64 */ | 51 | #else /* CONFIG_X86_64 */ |
26 | 52 | ||
27 | #ifdef __ASSEMBLY__ | 53 | #ifdef __ASSEMBLY__ |
@@ -143,4 +169,50 @@ do { \ | |||
143 | #define x86_or_percpu(var, val) percpu_to_op("or", per_cpu__##var, val) | 169 | #define x86_or_percpu(var, val) percpu_to_op("or", per_cpu__##var, val) |
144 | #endif /* !__ASSEMBLY__ */ | 170 | #endif /* !__ASSEMBLY__ */ |
145 | #endif /* !CONFIG_X86_64 */ | 171 | #endif /* !CONFIG_X86_64 */ |
172 | |||
173 | #ifdef CONFIG_SMP | ||
174 | |||
175 | /* | ||
176 | * Define the "EARLY_PER_CPU" macros. These are used for some per_cpu | ||
177 | * variables that are initialized and accessed before there are per_cpu | ||
178 | * areas allocated. | ||
179 | */ | ||
180 | |||
181 | #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ | ||
182 | DEFINE_PER_CPU(_type, _name) = _initvalue; \ | ||
183 | __typeof__(_type) _name##_early_map[NR_CPUS] __initdata = \ | ||
184 | { [0 ... NR_CPUS-1] = _initvalue }; \ | ||
185 | __typeof__(_type) *_name##_early_ptr = _name##_early_map | ||
186 | |||
187 | #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \ | ||
188 | EXPORT_PER_CPU_SYMBOL(_name) | ||
189 | |||
190 | #define DECLARE_EARLY_PER_CPU(_type, _name) \ | ||
191 | DECLARE_PER_CPU(_type, _name); \ | ||
192 | extern __typeof__(_type) *_name##_early_ptr; \ | ||
193 | extern __typeof__(_type) _name##_early_map[] | ||
194 | |||
195 | #define early_per_cpu_ptr(_name) (_name##_early_ptr) | ||
196 | #define early_per_cpu_map(_name, _idx) (_name##_early_map[_idx]) | ||
197 | #define early_per_cpu(_name, _cpu) \ | ||
198 | (early_per_cpu_ptr(_name) ? \ | ||
199 | early_per_cpu_ptr(_name)[_cpu] : \ | ||
200 | per_cpu(_name, _cpu)) | ||
201 | |||
202 | #else /* !CONFIG_SMP */ | ||
203 | #define DEFINE_EARLY_PER_CPU(_type, _name, _initvalue) \ | ||
204 | DEFINE_PER_CPU(_type, _name) = _initvalue | ||
205 | |||
206 | #define EXPORT_EARLY_PER_CPU_SYMBOL(_name) \ | ||
207 | EXPORT_PER_CPU_SYMBOL(_name) | ||
208 | |||
209 | #define DECLARE_EARLY_PER_CPU(_type, _name) \ | ||
210 | DECLARE_PER_CPU(_type, _name) | ||
211 | |||
212 | #define early_per_cpu(_name, _cpu) per_cpu(_name, _cpu) | ||
213 | #define early_per_cpu_ptr(_name) NULL | ||
214 | /* no early_per_cpu_map() */ | ||
215 | |||
216 | #endif /* !CONFIG_SMP */ | ||
217 | |||
146 | #endif /* _ASM_X86_PERCPU_H_ */ | 218 | #endif /* _ASM_X86_PERCPU_H_ */ |
diff --git a/include/asm-x86/pgalloc.h b/include/asm-x86/pgalloc.h index 91e4641f3f31..d63ea431cb3b 100644 --- a/include/asm-x86/pgalloc.h +++ b/include/asm-x86/pgalloc.h | |||
@@ -5,9 +5,13 @@ | |||
5 | #include <linux/mm.h> /* for struct page */ | 5 | #include <linux/mm.h> /* for struct page */ |
6 | #include <linux/pagemap.h> | 6 | #include <linux/pagemap.h> |
7 | 7 | ||
8 | static inline int __paravirt_pgd_alloc(struct mm_struct *mm) { return 0; } | ||
9 | |||
8 | #ifdef CONFIG_PARAVIRT | 10 | #ifdef CONFIG_PARAVIRT |
9 | #include <asm/paravirt.h> | 11 | #include <asm/paravirt.h> |
10 | #else | 12 | #else |
13 | #define paravirt_pgd_alloc(mm) __paravirt_pgd_alloc(mm) | ||
14 | static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd) {} | ||
11 | static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn) {} | 15 | static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn) {} |
12 | static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn) {} | 16 | static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn) {} |
13 | static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn, | 17 | static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn, |
diff --git a/include/asm-x86/pgtable-3level.h b/include/asm-x86/pgtable-3level.h index c93dbb6c2624..105057f34032 100644 --- a/include/asm-x86/pgtable-3level.h +++ b/include/asm-x86/pgtable-3level.h | |||
@@ -25,7 +25,7 @@ static inline int pud_none(pud_t pud) | |||
25 | 25 | ||
26 | static inline int pud_bad(pud_t pud) | 26 | static inline int pud_bad(pud_t pud) |
27 | { | 27 | { |
28 | return (pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0; | 28 | return (pud_val(pud) & ~(PTE_PFN_MASK | _KERNPG_TABLE | _PAGE_USER)) != 0; |
29 | } | 29 | } |
30 | 30 | ||
31 | static inline int pud_present(pud_t pud) | 31 | static inline int pud_present(pud_t pud) |
@@ -120,9 +120,9 @@ static inline void pud_clear(pud_t *pudp) | |||
120 | write_cr3(pgd); | 120 | write_cr3(pgd); |
121 | } | 121 | } |
122 | 122 | ||
123 | #define pud_page(pud) ((struct page *) __va(pud_val(pud) & PTE_MASK)) | 123 | #define pud_page(pud) ((struct page *) __va(pud_val(pud) & PTE_PFN_MASK)) |
124 | 124 | ||
125 | #define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PTE_MASK)) | 125 | #define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & PTE_PFN_MASK)) |
126 | 126 | ||
127 | 127 | ||
128 | /* Find an entry in the second-level page table.. */ | 128 | /* Find an entry in the second-level page table.. */ |
@@ -160,7 +160,7 @@ static inline int pte_none(pte_t pte) | |||
160 | 160 | ||
161 | static inline unsigned long pte_pfn(pte_t pte) | 161 | static inline unsigned long pte_pfn(pte_t pte) |
162 | { | 162 | { |
163 | return (pte_val(pte) & PTE_MASK) >> PAGE_SHIFT; | 163 | return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; |
164 | } | 164 | } |
165 | 165 | ||
166 | /* | 166 | /* |
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h index 97c271b2910b..3e5dbc4195f4 100644 --- a/include/asm-x86/pgtable.h +++ b/include/asm-x86/pgtable.h | |||
@@ -20,30 +20,25 @@ | |||
20 | #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */ | 20 | #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */ |
21 | #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ | 21 | #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ |
22 | 22 | ||
23 | /* | 23 | #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) |
24 | * Note: we use _AC(1, L) instead of _AC(1, UL) so that we get a | 24 | #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW) |
25 | * sign-extended value on 32-bit with all 1's in the upper word, | 25 | #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER) |
26 | * which preserves the upper pte values on 64-bit ptes: | 26 | #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT) |
27 | */ | 27 | #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD) |
28 | #define _PAGE_PRESENT (_AC(1, L)<<_PAGE_BIT_PRESENT) | 28 | #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED) |
29 | #define _PAGE_RW (_AC(1, L)<<_PAGE_BIT_RW) | 29 | #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY) |
30 | #define _PAGE_USER (_AC(1, L)<<_PAGE_BIT_USER) | 30 | #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE) |
31 | #define _PAGE_PWT (_AC(1, L)<<_PAGE_BIT_PWT) | 31 | #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL) |
32 | #define _PAGE_PCD (_AC(1, L)<<_PAGE_BIT_PCD) | 32 | #define _PAGE_UNUSED1 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED1) |
33 | #define _PAGE_ACCESSED (_AC(1, L)<<_PAGE_BIT_ACCESSED) | 33 | #define _PAGE_UNUSED2 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED2) |
34 | #define _PAGE_DIRTY (_AC(1, L)<<_PAGE_BIT_DIRTY) | 34 | #define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3) |
35 | #define _PAGE_PSE (_AC(1, L)<<_PAGE_BIT_PSE) /* 2MB page */ | 35 | #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT) |
36 | #define _PAGE_GLOBAL (_AC(1, L)<<_PAGE_BIT_GLOBAL) /* Global TLB entry */ | 36 | #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE) |
37 | #define _PAGE_UNUSED1 (_AC(1, L)<<_PAGE_BIT_UNUSED1) | ||
38 | #define _PAGE_UNUSED2 (_AC(1, L)<<_PAGE_BIT_UNUSED2) | ||
39 | #define _PAGE_UNUSED3 (_AC(1, L)<<_PAGE_BIT_UNUSED3) | ||
40 | #define _PAGE_PAT (_AC(1, L)<<_PAGE_BIT_PAT) | ||
41 | #define _PAGE_PAT_LARGE (_AC(1, L)<<_PAGE_BIT_PAT_LARGE) | ||
42 | 37 | ||
43 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) | 38 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) |
44 | #define _PAGE_NX (_AC(1, ULL) << _PAGE_BIT_NX) | 39 | #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX) |
45 | #else | 40 | #else |
46 | #define _PAGE_NX 0 | 41 | #define _PAGE_NX (_AT(pteval_t, 0)) |
47 | #endif | 42 | #endif |
48 | 43 | ||
49 | /* If _PAGE_PRESENT is clear, we use these: */ | 44 | /* If _PAGE_PRESENT is clear, we use these: */ |
@@ -58,7 +53,7 @@ | |||
58 | _PAGE_DIRTY) | 53 | _PAGE_DIRTY) |
59 | 54 | ||
60 | /* Set of bits not changed in pte_modify */ | 55 | /* Set of bits not changed in pte_modify */ |
61 | #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_PCD | _PAGE_PWT | \ | 56 | #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \ |
62 | _PAGE_ACCESSED | _PAGE_DIRTY) | 57 | _PAGE_ACCESSED | _PAGE_DIRTY) |
63 | 58 | ||
64 | #define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT) | 59 | #define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT) |
@@ -83,19 +78,9 @@ | |||
83 | #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ | 78 | #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \ |
84 | _PAGE_ACCESSED) | 79 | _PAGE_ACCESSED) |
85 | 80 | ||
86 | #ifdef CONFIG_X86_32 | ||
87 | #define _PAGE_KERNEL_EXEC \ | ||
88 | (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED) | ||
89 | #define _PAGE_KERNEL (_PAGE_KERNEL_EXEC | _PAGE_NX) | ||
90 | |||
91 | #ifndef __ASSEMBLY__ | ||
92 | extern pteval_t __PAGE_KERNEL, __PAGE_KERNEL_EXEC; | ||
93 | #endif /* __ASSEMBLY__ */ | ||
94 | #else | ||
95 | #define __PAGE_KERNEL_EXEC \ | 81 | #define __PAGE_KERNEL_EXEC \ |
96 | (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED) | 82 | (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL) |
97 | #define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX) | 83 | #define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX) |
98 | #endif | ||
99 | 84 | ||
100 | #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW) | 85 | #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW) |
101 | #define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW) | 86 | #define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW) |
@@ -106,26 +91,22 @@ extern pteval_t __PAGE_KERNEL, __PAGE_KERNEL_EXEC; | |||
106 | #define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER) | 91 | #define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER) |
107 | #define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT) | 92 | #define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT) |
108 | #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE) | 93 | #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE) |
94 | #define __PAGE_KERNEL_LARGE_NOCACHE (__PAGE_KERNEL | _PAGE_CACHE_UC | _PAGE_PSE) | ||
109 | #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE) | 95 | #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE) |
110 | 96 | ||
111 | #ifdef CONFIG_X86_32 | 97 | #define PAGE_KERNEL __pgprot(__PAGE_KERNEL) |
112 | # define MAKE_GLOBAL(x) __pgprot((x)) | 98 | #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO) |
113 | #else | 99 | #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC) |
114 | # define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL) | 100 | #define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX) |
115 | #endif | 101 | #define PAGE_KERNEL_WC __pgprot(__PAGE_KERNEL_WC) |
116 | 102 | #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE) | |
117 | #define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL) | 103 | #define PAGE_KERNEL_UC_MINUS __pgprot(__PAGE_KERNEL_UC_MINUS) |
118 | #define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO) | 104 | #define PAGE_KERNEL_EXEC_NOCACHE __pgprot(__PAGE_KERNEL_EXEC_NOCACHE) |
119 | #define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC) | 105 | #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE) |
120 | #define PAGE_KERNEL_RX MAKE_GLOBAL(__PAGE_KERNEL_RX) | 106 | #define PAGE_KERNEL_LARGE_NOCACHE __pgprot(__PAGE_KERNEL_LARGE_NOCACHE) |
121 | #define PAGE_KERNEL_WC MAKE_GLOBAL(__PAGE_KERNEL_WC) | 107 | #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC) |
122 | #define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE) | 108 | #define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL) |
123 | #define PAGE_KERNEL_UC_MINUS MAKE_GLOBAL(__PAGE_KERNEL_UC_MINUS) | 109 | #define PAGE_KERNEL_VSYSCALL_NOCACHE __pgprot(__PAGE_KERNEL_VSYSCALL_NOCACHE) |
124 | #define PAGE_KERNEL_EXEC_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_EXEC_NOCACHE) | ||
125 | #define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE) | ||
126 | #define PAGE_KERNEL_LARGE_EXEC MAKE_GLOBAL(__PAGE_KERNEL_LARGE_EXEC) | ||
127 | #define PAGE_KERNEL_VSYSCALL MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL) | ||
128 | #define PAGE_KERNEL_VSYSCALL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_VSYSCALL_NOCACHE) | ||
129 | 110 | ||
130 | /* xwr */ | 111 | /* xwr */ |
131 | #define __P000 PAGE_NONE | 112 | #define __P000 PAGE_NONE |
@@ -164,37 +145,37 @@ extern struct list_head pgd_list; | |||
164 | */ | 145 | */ |
165 | static inline int pte_dirty(pte_t pte) | 146 | static inline int pte_dirty(pte_t pte) |
166 | { | 147 | { |
167 | return pte_val(pte) & _PAGE_DIRTY; | 148 | return pte_flags(pte) & _PAGE_DIRTY; |
168 | } | 149 | } |
169 | 150 | ||
170 | static inline int pte_young(pte_t pte) | 151 | static inline int pte_young(pte_t pte) |
171 | { | 152 | { |
172 | return pte_val(pte) & _PAGE_ACCESSED; | 153 | return pte_flags(pte) & _PAGE_ACCESSED; |
173 | } | 154 | } |
174 | 155 | ||
175 | static inline int pte_write(pte_t pte) | 156 | static inline int pte_write(pte_t pte) |
176 | { | 157 | { |
177 | return pte_val(pte) & _PAGE_RW; | 158 | return pte_flags(pte) & _PAGE_RW; |
178 | } | 159 | } |
179 | 160 | ||
180 | static inline int pte_file(pte_t pte) | 161 | static inline int pte_file(pte_t pte) |
181 | { | 162 | { |
182 | return pte_val(pte) & _PAGE_FILE; | 163 | return pte_flags(pte) & _PAGE_FILE; |
183 | } | 164 | } |
184 | 165 | ||
185 | static inline int pte_huge(pte_t pte) | 166 | static inline int pte_huge(pte_t pte) |
186 | { | 167 | { |
187 | return pte_val(pte) & _PAGE_PSE; | 168 | return pte_flags(pte) & _PAGE_PSE; |
188 | } | 169 | } |
189 | 170 | ||
190 | static inline int pte_global(pte_t pte) | 171 | static inline int pte_global(pte_t pte) |
191 | { | 172 | { |
192 | return pte_val(pte) & _PAGE_GLOBAL; | 173 | return pte_flags(pte) & _PAGE_GLOBAL; |
193 | } | 174 | } |
194 | 175 | ||
195 | static inline int pte_exec(pte_t pte) | 176 | static inline int pte_exec(pte_t pte) |
196 | { | 177 | { |
197 | return !(pte_val(pte) & _PAGE_NX); | 178 | return !(pte_flags(pte) & _PAGE_NX); |
198 | } | 179 | } |
199 | 180 | ||
200 | static inline int pte_special(pte_t pte) | 181 | static inline int pte_special(pte_t pte) |
@@ -210,22 +191,22 @@ static inline int pmd_large(pmd_t pte) | |||
210 | 191 | ||
211 | static inline pte_t pte_mkclean(pte_t pte) | 192 | static inline pte_t pte_mkclean(pte_t pte) |
212 | { | 193 | { |
213 | return __pte(pte_val(pte) & ~(pteval_t)_PAGE_DIRTY); | 194 | return __pte(pte_val(pte) & ~_PAGE_DIRTY); |
214 | } | 195 | } |
215 | 196 | ||
216 | static inline pte_t pte_mkold(pte_t pte) | 197 | static inline pte_t pte_mkold(pte_t pte) |
217 | { | 198 | { |
218 | return __pte(pte_val(pte) & ~(pteval_t)_PAGE_ACCESSED); | 199 | return __pte(pte_val(pte) & ~_PAGE_ACCESSED); |
219 | } | 200 | } |
220 | 201 | ||
221 | static inline pte_t pte_wrprotect(pte_t pte) | 202 | static inline pte_t pte_wrprotect(pte_t pte) |
222 | { | 203 | { |
223 | return __pte(pte_val(pte) & ~(pteval_t)_PAGE_RW); | 204 | return __pte(pte_val(pte) & ~_PAGE_RW); |
224 | } | 205 | } |
225 | 206 | ||
226 | static inline pte_t pte_mkexec(pte_t pte) | 207 | static inline pte_t pte_mkexec(pte_t pte) |
227 | { | 208 | { |
228 | return __pte(pte_val(pte) & ~(pteval_t)_PAGE_NX); | 209 | return __pte(pte_val(pte) & ~_PAGE_NX); |
229 | } | 210 | } |
230 | 211 | ||
231 | static inline pte_t pte_mkdirty(pte_t pte) | 212 | static inline pte_t pte_mkdirty(pte_t pte) |
@@ -250,7 +231,7 @@ static inline pte_t pte_mkhuge(pte_t pte) | |||
250 | 231 | ||
251 | static inline pte_t pte_clrhuge(pte_t pte) | 232 | static inline pte_t pte_clrhuge(pte_t pte) |
252 | { | 233 | { |
253 | return __pte(pte_val(pte) & ~(pteval_t)_PAGE_PSE); | 234 | return __pte(pte_val(pte) & ~_PAGE_PSE); |
254 | } | 235 | } |
255 | 236 | ||
256 | static inline pte_t pte_mkglobal(pte_t pte) | 237 | static inline pte_t pte_mkglobal(pte_t pte) |
@@ -260,7 +241,7 @@ static inline pte_t pte_mkglobal(pte_t pte) | |||
260 | 241 | ||
261 | static inline pte_t pte_clrglobal(pte_t pte) | 242 | static inline pte_t pte_clrglobal(pte_t pte) |
262 | { | 243 | { |
263 | return __pte(pte_val(pte) & ~(pteval_t)_PAGE_GLOBAL); | 244 | return __pte(pte_val(pte) & ~_PAGE_GLOBAL); |
264 | } | 245 | } |
265 | 246 | ||
266 | static inline pte_t pte_mkspecial(pte_t pte) | 247 | static inline pte_t pte_mkspecial(pte_t pte) |
@@ -305,7 +286,7 @@ static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |||
305 | return __pgprot(preservebits | addbits); | 286 | return __pgprot(preservebits | addbits); |
306 | } | 287 | } |
307 | 288 | ||
308 | #define pte_pgprot(x) __pgprot(pte_val(x) & ~PTE_MASK) | 289 | #define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK) |
309 | 290 | ||
310 | #define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask) | 291 | #define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask) |
311 | 292 | ||
@@ -318,6 +299,17 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, | |||
318 | unsigned long size, pgprot_t *vma_prot); | 299 | unsigned long size, pgprot_t *vma_prot); |
319 | #endif | 300 | #endif |
320 | 301 | ||
302 | /* Install a pte for a particular vaddr in kernel space. */ | ||
303 | void set_pte_vaddr(unsigned long vaddr, pte_t pte); | ||
304 | |||
305 | #ifdef CONFIG_X86_32 | ||
306 | extern void native_pagetable_setup_start(pgd_t *base); | ||
307 | extern void native_pagetable_setup_done(pgd_t *base); | ||
308 | #else | ||
309 | static inline void native_pagetable_setup_start(pgd_t *base) {} | ||
310 | static inline void native_pagetable_setup_done(pgd_t *base) {} | ||
311 | #endif | ||
312 | |||
321 | #ifdef CONFIG_PARAVIRT | 313 | #ifdef CONFIG_PARAVIRT |
322 | #include <asm/paravirt.h> | 314 | #include <asm/paravirt.h> |
323 | #else /* !CONFIG_PARAVIRT */ | 315 | #else /* !CONFIG_PARAVIRT */ |
@@ -349,6 +341,16 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, | |||
349 | 341 | ||
350 | #define pte_update(mm, addr, ptep) do { } while (0) | 342 | #define pte_update(mm, addr, ptep) do { } while (0) |
351 | #define pte_update_defer(mm, addr, ptep) do { } while (0) | 343 | #define pte_update_defer(mm, addr, ptep) do { } while (0) |
344 | |||
345 | static inline void __init paravirt_pagetable_setup_start(pgd_t *base) | ||
346 | { | ||
347 | native_pagetable_setup_start(base); | ||
348 | } | ||
349 | |||
350 | static inline void __init paravirt_pagetable_setup_done(pgd_t *base) | ||
351 | { | ||
352 | native_pagetable_setup_done(base); | ||
353 | } | ||
352 | #endif /* CONFIG_PARAVIRT */ | 354 | #endif /* CONFIG_PARAVIRT */ |
353 | 355 | ||
354 | #endif /* __ASSEMBLY__ */ | 356 | #endif /* __ASSEMBLY__ */ |
@@ -359,6 +361,26 @@ int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, | |||
359 | # include "pgtable_64.h" | 361 | # include "pgtable_64.h" |
360 | #endif | 362 | #endif |
361 | 363 | ||
364 | /* | ||
365 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] | ||
366 | * | ||
367 | * this macro returns the index of the entry in the pgd page which would | ||
368 | * control the given virtual address | ||
369 | */ | ||
370 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | ||
371 | |||
372 | /* | ||
373 | * pgd_offset() returns a (pgd_t *) | ||
374 | * pgd_index() is used get the offset into the pgd page's array of pgd_t's; | ||
375 | */ | ||
376 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | ||
377 | /* | ||
378 | * a shortcut which implies the use of the kernel's pgd, instead | ||
379 | * of a process's | ||
380 | */ | ||
381 | #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) | ||
382 | |||
383 | |||
362 | #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) | 384 | #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) |
363 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) | 385 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) |
364 | 386 | ||
@@ -369,8 +391,15 @@ enum { | |||
369 | PG_LEVEL_4K, | 391 | PG_LEVEL_4K, |
370 | PG_LEVEL_2M, | 392 | PG_LEVEL_2M, |
371 | PG_LEVEL_1G, | 393 | PG_LEVEL_1G, |
394 | PG_LEVEL_NUM | ||
372 | }; | 395 | }; |
373 | 396 | ||
397 | #ifdef CONFIG_PROC_FS | ||
398 | extern void update_page_count(int level, unsigned long pages); | ||
399 | #else | ||
400 | static inline void update_page_count(int level, unsigned long pages) { } | ||
401 | #endif | ||
402 | |||
374 | /* | 403 | /* |
375 | * Helper function that returns the kernel pagetable entry controlling | 404 | * Helper function that returns the kernel pagetable entry controlling |
376 | * the virtual address 'address'. NULL means no pagetable entry present. | 405 | * the virtual address 'address'. NULL means no pagetable entry present. |
@@ -420,6 +449,8 @@ static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, | |||
420 | * race with other CPU's that might be updating the dirty | 449 | * race with other CPU's that might be updating the dirty |
421 | * bit at the same time. | 450 | * bit at the same time. |
422 | */ | 451 | */ |
452 | struct vm_area_struct; | ||
453 | |||
423 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS | 454 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
424 | extern int ptep_set_access_flags(struct vm_area_struct *vma, | 455 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
425 | unsigned long address, pte_t *ptep, | 456 | unsigned long address, pte_t *ptep, |
diff --git a/include/asm-x86/pgtable_32.h b/include/asm-x86/pgtable_32.h index 32ca03109a4c..5c3b26567a95 100644 --- a/include/asm-x86/pgtable_32.h +++ b/include/asm-x86/pgtable_32.h | |||
@@ -88,7 +88,7 @@ extern unsigned long pg0[]; | |||
88 | /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */ | 88 | /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */ |
89 | #define pmd_none(x) (!(unsigned long)pmd_val((x))) | 89 | #define pmd_none(x) (!(unsigned long)pmd_val((x))) |
90 | #define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT) | 90 | #define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT) |
91 | #define pmd_bad(x) ((pmd_val(x) & (~PTE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) | 91 | #define pmd_bad(x) ((pmd_val(x) & (PTE_FLAGS_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) |
92 | 92 | ||
93 | #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) | 93 | #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) |
94 | 94 | ||
@@ -113,26 +113,6 @@ extern unsigned long pg0[]; | |||
113 | */ | 113 | */ |
114 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | 114 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) |
115 | 115 | ||
116 | /* | ||
117 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] | ||
118 | * | ||
119 | * this macro returns the index of the entry in the pgd page which would | ||
120 | * control the given virtual address | ||
121 | */ | ||
122 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | ||
123 | #define pgd_index_k(addr) pgd_index((addr)) | ||
124 | |||
125 | /* | ||
126 | * pgd_offset() returns a (pgd_t *) | ||
127 | * pgd_index() is used get the offset into the pgd page's array of pgd_t's; | ||
128 | */ | ||
129 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | ||
130 | |||
131 | /* | ||
132 | * a shortcut which implies the use of the kernel's pgd, instead | ||
133 | * of a process's | ||
134 | */ | ||
135 | #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) | ||
136 | 116 | ||
137 | static inline int pud_large(pud_t pud) { return 0; } | 117 | static inline int pud_large(pud_t pud) { return 0; } |
138 | 118 | ||
@@ -159,7 +139,7 @@ static inline int pud_large(pud_t pud) { return 0; } | |||
159 | #define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT)) | 139 | #define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT)) |
160 | 140 | ||
161 | #define pmd_page_vaddr(pmd) \ | 141 | #define pmd_page_vaddr(pmd) \ |
162 | ((unsigned long)__va(pmd_val((pmd)) & PTE_MASK)) | 142 | ((unsigned long)__va(pmd_val((pmd)) & PTE_PFN_MASK)) |
163 | 143 | ||
164 | #if defined(CONFIG_HIGHPTE) | 144 | #if defined(CONFIG_HIGHPTE) |
165 | #define pte_offset_map(dir, address) \ | 145 | #define pte_offset_map(dir, address) \ |
@@ -191,21 +171,6 @@ do { \ | |||
191 | */ | 171 | */ |
192 | #define update_mmu_cache(vma, address, pte) do { } while (0) | 172 | #define update_mmu_cache(vma, address, pte) do { } while (0) |
193 | 173 | ||
194 | extern void native_pagetable_setup_start(pgd_t *base); | ||
195 | extern void native_pagetable_setup_done(pgd_t *base); | ||
196 | |||
197 | #ifndef CONFIG_PARAVIRT | ||
198 | static inline void __init paravirt_pagetable_setup_start(pgd_t *base) | ||
199 | { | ||
200 | native_pagetable_setup_start(base); | ||
201 | } | ||
202 | |||
203 | static inline void __init paravirt_pagetable_setup_done(pgd_t *base) | ||
204 | { | ||
205 | native_pagetable_setup_done(base); | ||
206 | } | ||
207 | #endif /* !CONFIG_PARAVIRT */ | ||
208 | |||
209 | #endif /* !__ASSEMBLY__ */ | 174 | #endif /* !__ASSEMBLY__ */ |
210 | 175 | ||
211 | /* | 176 | /* |
diff --git a/include/asm-x86/pgtable_64.h b/include/asm-x86/pgtable_64.h index 1cc50d22d735..ac5fff4cc58a 100644 --- a/include/asm-x86/pgtable_64.h +++ b/include/asm-x86/pgtable_64.h | |||
@@ -16,6 +16,8 @@ | |||
16 | extern pud_t level3_kernel_pgt[512]; | 16 | extern pud_t level3_kernel_pgt[512]; |
17 | extern pud_t level3_ident_pgt[512]; | 17 | extern pud_t level3_ident_pgt[512]; |
18 | extern pmd_t level2_kernel_pgt[512]; | 18 | extern pmd_t level2_kernel_pgt[512]; |
19 | extern pmd_t level2_fixmap_pgt[512]; | ||
20 | extern pmd_t level2_ident_pgt[512]; | ||
19 | extern pgd_t init_level4_pgt[]; | 21 | extern pgd_t init_level4_pgt[]; |
20 | 22 | ||
21 | #define swapper_pg_dir init_level4_pgt | 23 | #define swapper_pg_dir init_level4_pgt |
@@ -70,6 +72,9 @@ extern void paging_init(void); | |||
70 | 72 | ||
71 | struct mm_struct; | 73 | struct mm_struct; |
72 | 74 | ||
75 | void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte); | ||
76 | |||
77 | |||
73 | static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, | 78 | static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr, |
74 | pte_t *ptep) | 79 | pte_t *ptep) |
75 | { | 80 | { |
@@ -153,17 +158,17 @@ static inline void native_pgd_clear(pgd_t *pgd) | |||
153 | 158 | ||
154 | static inline int pgd_bad(pgd_t pgd) | 159 | static inline int pgd_bad(pgd_t pgd) |
155 | { | 160 | { |
156 | return (pgd_val(pgd) & ~(PTE_MASK | _PAGE_USER)) != _KERNPG_TABLE; | 161 | return (pgd_val(pgd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE; |
157 | } | 162 | } |
158 | 163 | ||
159 | static inline int pud_bad(pud_t pud) | 164 | static inline int pud_bad(pud_t pud) |
160 | { | 165 | { |
161 | return (pud_val(pud) & ~(PTE_MASK | _PAGE_USER)) != _KERNPG_TABLE; | 166 | return (pud_val(pud) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE; |
162 | } | 167 | } |
163 | 168 | ||
164 | static inline int pmd_bad(pmd_t pmd) | 169 | static inline int pmd_bad(pmd_t pmd) |
165 | { | 170 | { |
166 | return (pmd_val(pmd) & ~(PTE_MASK | _PAGE_USER)) != _KERNPG_TABLE; | 171 | return (pmd_val(pmd) & ~(PTE_PFN_MASK | _PAGE_USER)) != _KERNPG_TABLE; |
167 | } | 172 | } |
168 | 173 | ||
169 | #define pte_none(x) (!pte_val((x))) | 174 | #define pte_none(x) (!pte_val((x))) |
@@ -188,14 +193,11 @@ static inline int pmd_bad(pmd_t pmd) | |||
188 | * Level 4 access. | 193 | * Level 4 access. |
189 | */ | 194 | */ |
190 | #define pgd_page_vaddr(pgd) \ | 195 | #define pgd_page_vaddr(pgd) \ |
191 | ((unsigned long)__va((unsigned long)pgd_val((pgd)) & PTE_MASK)) | 196 | ((unsigned long)__va((unsigned long)pgd_val((pgd)) & PTE_PFN_MASK)) |
192 | #define pgd_page(pgd) (pfn_to_page(pgd_val((pgd)) >> PAGE_SHIFT)) | 197 | #define pgd_page(pgd) (pfn_to_page(pgd_val((pgd)) >> PAGE_SHIFT)) |
193 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | ||
194 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | ||
195 | #define pgd_offset_k(address) (init_level4_pgt + pgd_index((address))) | ||
196 | #define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT) | 198 | #define pgd_present(pgd) (pgd_val(pgd) & _PAGE_PRESENT) |
197 | static inline int pgd_large(pgd_t pgd) { return 0; } | 199 | static inline int pgd_large(pgd_t pgd) { return 0; } |
198 | #define mk_kernel_pgd(address) ((pgd_t){ (address) | _KERNPG_TABLE }) | 200 | #define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE) |
199 | 201 | ||
200 | /* PUD - Level3 access */ | 202 | /* PUD - Level3 access */ |
201 | /* to find an entry in a page-table-directory. */ | 203 | /* to find an entry in a page-table-directory. */ |
@@ -214,7 +216,7 @@ static inline int pud_large(pud_t pte) | |||
214 | } | 216 | } |
215 | 217 | ||
216 | /* PMD - Level 2 access */ | 218 | /* PMD - Level 2 access */ |
217 | #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val((pmd)) & PTE_MASK)) | 219 | #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val((pmd)) & PTE_PFN_MASK)) |
218 | #define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT)) | 220 | #define pmd_page(pmd) (pfn_to_page(pmd_val((pmd)) >> PAGE_SHIFT)) |
219 | 221 | ||
220 | #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) | 222 | #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)) |
diff --git a/include/asm-x86/processor-flags.h b/include/asm-x86/processor-flags.h index 199cab107d85..092b39b3a7e6 100644 --- a/include/asm-x86/processor-flags.h +++ b/include/asm-x86/processor-flags.h | |||
@@ -88,4 +88,10 @@ | |||
88 | #define CX86_ARR_BASE 0xc4 | 88 | #define CX86_ARR_BASE 0xc4 |
89 | #define CX86_RCR_BASE 0xdc | 89 | #define CX86_RCR_BASE 0xdc |
90 | 90 | ||
91 | #ifdef CONFIG_VM86 | ||
92 | #define X86_VM_MASK X86_EFLAGS_VM | ||
93 | #else | ||
94 | #define X86_VM_MASK 0 /* No VM86 support */ | ||
95 | #endif | ||
96 | |||
91 | #endif /* __ASM_I386_PROCESSOR_FLAGS_H */ | 97 | #endif /* __ASM_I386_PROCESSOR_FLAGS_H */ |
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h index 559105220a47..5f58da401b43 100644 --- a/include/asm-x86/processor.h +++ b/include/asm-x86/processor.h | |||
@@ -134,7 +134,7 @@ extern __u32 cleared_cpu_caps[NCAPINTS]; | |||
134 | #ifdef CONFIG_SMP | 134 | #ifdef CONFIG_SMP |
135 | DECLARE_PER_CPU(struct cpuinfo_x86, cpu_info); | 135 | DECLARE_PER_CPU(struct cpuinfo_x86, cpu_info); |
136 | #define cpu_data(cpu) per_cpu(cpu_info, cpu) | 136 | #define cpu_data(cpu) per_cpu(cpu_info, cpu) |
137 | #define current_cpu_data cpu_data(smp_processor_id()) | 137 | #define current_cpu_data __get_cpu_var(cpu_info) |
138 | #else | 138 | #else |
139 | #define cpu_data(cpu) boot_cpu_data | 139 | #define cpu_data(cpu) boot_cpu_data |
140 | #define current_cpu_data boot_cpu_data | 140 | #define current_cpu_data boot_cpu_data |
@@ -153,7 +153,7 @@ static inline int hlt_works(int cpu) | |||
153 | 153 | ||
154 | extern void cpu_detect(struct cpuinfo_x86 *c); | 154 | extern void cpu_detect(struct cpuinfo_x86 *c); |
155 | 155 | ||
156 | extern void identify_cpu(struct cpuinfo_x86 *); | 156 | extern void early_cpu_init(void); |
157 | extern void identify_boot_cpu(void); | 157 | extern void identify_boot_cpu(void); |
158 | extern void identify_secondary_cpu(struct cpuinfo_x86 *); | 158 | extern void identify_secondary_cpu(struct cpuinfo_x86 *); |
159 | extern void print_cpu_info(struct cpuinfo_x86 *); | 159 | extern void print_cpu_info(struct cpuinfo_x86 *); |
@@ -263,15 +263,11 @@ struct tss_struct { | |||
263 | struct thread_struct *io_bitmap_owner; | 263 | struct thread_struct *io_bitmap_owner; |
264 | 264 | ||
265 | /* | 265 | /* |
266 | * Pad the TSS to be cacheline-aligned (size is 0x100): | ||
267 | */ | ||
268 | unsigned long __cacheline_filler[35]; | ||
269 | /* | ||
270 | * .. and then another 0x100 bytes for the emergency kernel stack: | 266 | * .. and then another 0x100 bytes for the emergency kernel stack: |
271 | */ | 267 | */ |
272 | unsigned long stack[64]; | 268 | unsigned long stack[64]; |
273 | 269 | ||
274 | } __attribute__((packed)); | 270 | } ____cacheline_aligned; |
275 | 271 | ||
276 | DECLARE_PER_CPU(struct tss_struct, init_tss); | 272 | DECLARE_PER_CPU(struct tss_struct, init_tss); |
277 | 273 | ||
@@ -535,7 +531,6 @@ static inline void load_sp0(struct tss_struct *tss, | |||
535 | } | 531 | } |
536 | 532 | ||
537 | #define set_iopl_mask native_set_iopl_mask | 533 | #define set_iopl_mask native_set_iopl_mask |
538 | #define SWAPGS swapgs | ||
539 | #endif /* CONFIG_PARAVIRT */ | 534 | #endif /* CONFIG_PARAVIRT */ |
540 | 535 | ||
541 | /* | 536 | /* |
@@ -727,11 +722,11 @@ static inline void __sti_mwait(unsigned long eax, unsigned long ecx) | |||
727 | 722 | ||
728 | extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx); | 723 | extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx); |
729 | 724 | ||
730 | extern int force_mwait; | ||
731 | |||
732 | extern void select_idle_routine(const struct cpuinfo_x86 *c); | 725 | extern void select_idle_routine(const struct cpuinfo_x86 *c); |
733 | 726 | ||
734 | extern unsigned long boot_option_idle_override; | 727 | extern unsigned long boot_option_idle_override; |
728 | extern unsigned long idle_halt; | ||
729 | extern unsigned long idle_nomwait; | ||
735 | 730 | ||
736 | extern void enable_sep_cpu(void); | 731 | extern void enable_sep_cpu(void); |
737 | extern int sysenter_setup(void); | 732 | extern int sysenter_setup(void); |
diff --git a/include/asm-x86/proto.h b/include/asm-x86/proto.h index 6c8b41b03f6d..3dd458c385c0 100644 --- a/include/asm-x86/proto.h +++ b/include/asm-x86/proto.h | |||
@@ -14,8 +14,6 @@ extern void ia32_syscall(void); | |||
14 | extern void ia32_cstar_target(void); | 14 | extern void ia32_cstar_target(void); |
15 | extern void ia32_sysenter_target(void); | 15 | extern void ia32_sysenter_target(void); |
16 | 16 | ||
17 | extern void reserve_bootmem_generic(unsigned long phys, unsigned len); | ||
18 | |||
19 | extern void syscall32_cpu_init(void); | 17 | extern void syscall32_cpu_init(void); |
20 | 18 | ||
21 | extern void check_efer(void); | 19 | extern void check_efer(void); |
diff --git a/include/asm-x86/ptrace-abi.h b/include/asm-x86/ptrace-abi.h index f224eb3c3157..72e7b9db29bb 100644 --- a/include/asm-x86/ptrace-abi.h +++ b/include/asm-x86/ptrace-abi.h | |||
@@ -73,11 +73,11 @@ | |||
73 | 73 | ||
74 | #ifdef __x86_64__ | 74 | #ifdef __x86_64__ |
75 | # define PTRACE_ARCH_PRCTL 30 | 75 | # define PTRACE_ARCH_PRCTL 30 |
76 | #else | ||
77 | # define PTRACE_SYSEMU 31 | ||
78 | # define PTRACE_SYSEMU_SINGLESTEP 32 | ||
79 | #endif | 76 | #endif |
80 | 77 | ||
78 | #define PTRACE_SYSEMU 31 | ||
79 | #define PTRACE_SYSEMU_SINGLESTEP 32 | ||
80 | |||
81 | #define PTRACE_SINGLEBLOCK 33 /* resume execution until next branch */ | 81 | #define PTRACE_SINGLEBLOCK 33 /* resume execution until next branch */ |
82 | 82 | ||
83 | #ifndef __ASSEMBLY__ | 83 | #ifndef __ASSEMBLY__ |
diff --git a/include/asm-x86/ptrace.h b/include/asm-x86/ptrace.h index 9f922b0b95d6..8a71db803da6 100644 --- a/include/asm-x86/ptrace.h +++ b/include/asm-x86/ptrace.h | |||
@@ -3,7 +3,12 @@ | |||
3 | 3 | ||
4 | #include <linux/compiler.h> /* For __user */ | 4 | #include <linux/compiler.h> /* For __user */ |
5 | #include <asm/ptrace-abi.h> | 5 | #include <asm/ptrace-abi.h> |
6 | #include <asm/processor-flags.h> | ||
6 | 7 | ||
8 | #ifdef __KERNEL__ | ||
9 | #include <asm/ds.h> /* the DS BTS struct is used for ptrace too */ | ||
10 | #include <asm/segment.h> | ||
11 | #endif | ||
7 | 12 | ||
8 | #ifndef __ASSEMBLY__ | 13 | #ifndef __ASSEMBLY__ |
9 | 14 | ||
@@ -55,9 +60,6 @@ struct pt_regs { | |||
55 | unsigned long ss; | 60 | unsigned long ss; |
56 | }; | 61 | }; |
57 | 62 | ||
58 | #include <asm/vm86.h> | ||
59 | #include <asm/segment.h> | ||
60 | |||
61 | #endif /* __KERNEL__ */ | 63 | #endif /* __KERNEL__ */ |
62 | 64 | ||
63 | #else /* __i386__ */ | 65 | #else /* __i386__ */ |
diff --git a/include/asm-x86/reboot.h b/include/asm-x86/reboot.h index e63741f19392..206f355786dc 100644 --- a/include/asm-x86/reboot.h +++ b/include/asm-x86/reboot.h | |||
@@ -14,8 +14,8 @@ struct machine_ops { | |||
14 | 14 | ||
15 | extern struct machine_ops machine_ops; | 15 | extern struct machine_ops machine_ops; |
16 | 16 | ||
17 | void machine_real_restart(unsigned char *code, int length); | ||
18 | void native_machine_crash_shutdown(struct pt_regs *regs); | 17 | void native_machine_crash_shutdown(struct pt_regs *regs); |
19 | void native_machine_shutdown(void); | 18 | void native_machine_shutdown(void); |
19 | void machine_real_restart(const unsigned char *code, int length); | ||
20 | 20 | ||
21 | #endif /* _ASM_REBOOT_H */ | 21 | #endif /* _ASM_REBOOT_H */ |
diff --git a/include/asm-x86/required-features.h b/include/asm-x86/required-features.h index 7400d3ad75c6..adec887dd7cd 100644 --- a/include/asm-x86/required-features.h +++ b/include/asm-x86/required-features.h | |||
@@ -19,9 +19,13 @@ | |||
19 | 19 | ||
20 | #if defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64) | 20 | #if defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64) |
21 | # define NEED_PAE (1<<(X86_FEATURE_PAE & 31)) | 21 | # define NEED_PAE (1<<(X86_FEATURE_PAE & 31)) |
22 | # define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31)) | ||
23 | #else | 22 | #else |
24 | # define NEED_PAE 0 | 23 | # define NEED_PAE 0 |
24 | #endif | ||
25 | |||
26 | #ifdef CONFIG_X86_CMPXCHG64 | ||
27 | # define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31)) | ||
28 | #else | ||
25 | # define NEED_CX8 0 | 29 | # define NEED_CX8 0 |
26 | #endif | 30 | #endif |
27 | 31 | ||
@@ -38,7 +42,7 @@ | |||
38 | #endif | 42 | #endif |
39 | 43 | ||
40 | #ifdef CONFIG_X86_64 | 44 | #ifdef CONFIG_X86_64 |
41 | #define NEED_PSE (1<<(X86_FEATURE_PSE & 31)) | 45 | #define NEED_PSE 0 |
42 | #define NEED_MSR (1<<(X86_FEATURE_MSR & 31)) | 46 | #define NEED_MSR (1<<(X86_FEATURE_MSR & 31)) |
43 | #define NEED_PGE (1<<(X86_FEATURE_PGE & 31)) | 47 | #define NEED_PGE (1<<(X86_FEATURE_PGE & 31)) |
44 | #define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31)) | 48 | #define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31)) |
diff --git a/include/asm-x86/resume-trace.h b/include/asm-x86/resume-trace.h index 2557514d7ef6..8d9f0b41ee86 100644 --- a/include/asm-x86/resume-trace.h +++ b/include/asm-x86/resume-trace.h | |||
@@ -6,7 +6,7 @@ | |||
6 | #define TRACE_RESUME(user) \ | 6 | #define TRACE_RESUME(user) \ |
7 | do { \ | 7 | do { \ |
8 | if (pm_trace_enabled) { \ | 8 | if (pm_trace_enabled) { \ |
9 | void *tracedata; \ | 9 | const void *tracedata; \ |
10 | asm volatile(_ASM_MOV_UL " $1f,%0\n" \ | 10 | asm volatile(_ASM_MOV_UL " $1f,%0\n" \ |
11 | ".section .tracedata,\"a\"\n" \ | 11 | ".section .tracedata,\"a\"\n" \ |
12 | "1:\t.word %c1\n\t" \ | 12 | "1:\t.word %c1\n\t" \ |
diff --git a/include/asm-x86/seccomp_32.h b/include/asm-x86/seccomp_32.h index 18da19e89bff..36e71c5f306f 100644 --- a/include/asm-x86/seccomp_32.h +++ b/include/asm-x86/seccomp_32.h | |||
@@ -1,4 +1,5 @@ | |||
1 | #ifndef _ASM_SECCOMP_H | 1 | #ifndef _ASM_SECCOMP_H |
2 | #define _ASM_SECCOMP_H | ||
2 | 3 | ||
3 | #include <linux/thread_info.h> | 4 | #include <linux/thread_info.h> |
4 | 5 | ||
diff --git a/include/asm-x86/seccomp_64.h b/include/asm-x86/seccomp_64.h index 553af65a2287..76cfe69aa63c 100644 --- a/include/asm-x86/seccomp_64.h +++ b/include/asm-x86/seccomp_64.h | |||
@@ -1,4 +1,5 @@ | |||
1 | #ifndef _ASM_SECCOMP_H | 1 | #ifndef _ASM_SECCOMP_H |
2 | #define _ASM_SECCOMP_H | ||
2 | 3 | ||
3 | #include <linux/thread_info.h> | 4 | #include <linux/thread_info.h> |
4 | 5 | ||
diff --git a/include/asm-x86/segment.h b/include/asm-x86/segment.h index ed5131dd7d92..646452ea9ea3 100644 --- a/include/asm-x86/segment.h +++ b/include/asm-x86/segment.h | |||
@@ -1,6 +1,15 @@ | |||
1 | #ifndef _ASM_X86_SEGMENT_H_ | 1 | #ifndef _ASM_X86_SEGMENT_H_ |
2 | #define _ASM_X86_SEGMENT_H_ | 2 | #define _ASM_X86_SEGMENT_H_ |
3 | 3 | ||
4 | /* Constructor for a conventional segment GDT (or LDT) entry */ | ||
5 | /* This is a macro so it can be used in initializers */ | ||
6 | #define GDT_ENTRY(flags, base, limit) \ | ||
7 | ((((base) & 0xff000000ULL) << (56-24)) | \ | ||
8 | (((flags) & 0x0000f0ffULL) << 40) | \ | ||
9 | (((limit) & 0x000f0000ULL) << (48-16)) | \ | ||
10 | (((base) & 0x00ffffffULL) << 16) | \ | ||
11 | (((limit) & 0x0000ffffULL))) | ||
12 | |||
4 | /* Simple and small GDT entries for booting only */ | 13 | /* Simple and small GDT entries for booting only */ |
5 | 14 | ||
6 | #define GDT_ENTRY_BOOT_CS 2 | 15 | #define GDT_ENTRY_BOOT_CS 2 |
@@ -61,18 +70,14 @@ | |||
61 | #define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1) | 70 | #define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1) |
62 | 71 | ||
63 | #define GDT_ENTRY_DEFAULT_USER_CS 14 | 72 | #define GDT_ENTRY_DEFAULT_USER_CS 14 |
64 | #define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS * 8 + 3) | ||
65 | 73 | ||
66 | #define GDT_ENTRY_DEFAULT_USER_DS 15 | 74 | #define GDT_ENTRY_DEFAULT_USER_DS 15 |
67 | #define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS * 8 + 3) | ||
68 | 75 | ||
69 | #define GDT_ENTRY_KERNEL_BASE 12 | 76 | #define GDT_ENTRY_KERNEL_BASE 12 |
70 | 77 | ||
71 | #define GDT_ENTRY_KERNEL_CS (GDT_ENTRY_KERNEL_BASE + 0) | 78 | #define GDT_ENTRY_KERNEL_CS (GDT_ENTRY_KERNEL_BASE + 0) |
72 | #define __KERNEL_CS (GDT_ENTRY_KERNEL_CS * 8) | ||
73 | 79 | ||
74 | #define GDT_ENTRY_KERNEL_DS (GDT_ENTRY_KERNEL_BASE + 1) | 80 | #define GDT_ENTRY_KERNEL_DS (GDT_ENTRY_KERNEL_BASE + 1) |
75 | #define __KERNEL_DS (GDT_ENTRY_KERNEL_DS * 8) | ||
76 | 81 | ||
77 | #define GDT_ENTRY_TSS (GDT_ENTRY_KERNEL_BASE + 4) | 82 | #define GDT_ENTRY_TSS (GDT_ENTRY_KERNEL_BASE + 4) |
78 | #define GDT_ENTRY_LDT (GDT_ENTRY_KERNEL_BASE + 5) | 83 | #define GDT_ENTRY_LDT (GDT_ENTRY_KERNEL_BASE + 5) |
@@ -139,10 +144,11 @@ | |||
139 | #else | 144 | #else |
140 | #include <asm/cache.h> | 145 | #include <asm/cache.h> |
141 | 146 | ||
142 | #define __KERNEL_CS 0x10 | 147 | #define GDT_ENTRY_KERNEL32_CS 1 |
143 | #define __KERNEL_DS 0x18 | 148 | #define GDT_ENTRY_KERNEL_CS 2 |
149 | #define GDT_ENTRY_KERNEL_DS 3 | ||
144 | 150 | ||
145 | #define __KERNEL32_CS 0x08 | 151 | #define __KERNEL32_CS (GDT_ENTRY_KERNEL32_CS * 8) |
146 | 152 | ||
147 | /* | 153 | /* |
148 | * we cannot use the same code segment descriptor for user and kernel | 154 | * we cannot use the same code segment descriptor for user and kernel |
@@ -150,10 +156,10 @@ | |||
150 | * The segment offset needs to contain a RPL. Grr. -AK | 156 | * The segment offset needs to contain a RPL. Grr. -AK |
151 | * GDT layout to get 64bit syscall right (sysret hardcodes gdt offsets) | 157 | * GDT layout to get 64bit syscall right (sysret hardcodes gdt offsets) |
152 | */ | 158 | */ |
153 | 159 | #define GDT_ENTRY_DEFAULT_USER32_CS 4 | |
154 | #define __USER32_CS 0x23 /* 4*8+3 */ | 160 | #define GDT_ENTRY_DEFAULT_USER_DS 5 |
155 | #define __USER_DS 0x2b /* 5*8+3 */ | 161 | #define GDT_ENTRY_DEFAULT_USER_CS 6 |
156 | #define __USER_CS 0x33 /* 6*8+3 */ | 162 | #define __USER32_CS (GDT_ENTRY_DEFAULT_USER32_CS * 8 + 3) |
157 | #define __USER32_DS __USER_DS | 163 | #define __USER32_DS __USER_DS |
158 | 164 | ||
159 | #define GDT_ENTRY_TSS 8 /* needs two entries */ | 165 | #define GDT_ENTRY_TSS 8 /* needs two entries */ |
@@ -175,6 +181,10 @@ | |||
175 | 181 | ||
176 | #endif | 182 | #endif |
177 | 183 | ||
184 | #define __KERNEL_CS (GDT_ENTRY_KERNEL_CS * 8) | ||
185 | #define __KERNEL_DS (GDT_ENTRY_KERNEL_DS * 8) | ||
186 | #define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS* 8 + 3) | ||
187 | #define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS* 8 + 3) | ||
178 | #ifndef CONFIG_PARAVIRT | 188 | #ifndef CONFIG_PARAVIRT |
179 | #define get_kernel_rpl() 0 | 189 | #define get_kernel_rpl() 0 |
180 | #endif | 190 | #endif |
diff --git a/include/asm-x86/setup.h b/include/asm-x86/setup.h index fa6763af8d26..a07c6f1c01e1 100644 --- a/include/asm-x86/setup.h +++ b/include/asm-x86/setup.h | |||
@@ -8,7 +8,40 @@ | |||
8 | /* Interrupt control for vSMPowered x86_64 systems */ | 8 | /* Interrupt control for vSMPowered x86_64 systems */ |
9 | void vsmp_init(void); | 9 | void vsmp_init(void); |
10 | 10 | ||
11 | char *machine_specific_memory_setup(void); | 11 | #ifdef CONFIG_X86_VISWS |
12 | extern void visws_early_detect(void); | ||
13 | extern int is_visws_box(void); | ||
14 | #else | ||
15 | static inline void visws_early_detect(void) { } | ||
16 | static inline int is_visws_box(void) { return 0; } | ||
17 | #endif | ||
18 | |||
19 | /* | ||
20 | * Any setup quirks to be performed? | ||
21 | */ | ||
22 | struct mpc_config_processor; | ||
23 | struct mpc_config_bus; | ||
24 | struct mp_config_oemtable; | ||
25 | struct x86_quirks { | ||
26 | int (*arch_pre_time_init)(void); | ||
27 | int (*arch_time_init)(void); | ||
28 | int (*arch_pre_intr_init)(void); | ||
29 | int (*arch_intr_init)(void); | ||
30 | int (*arch_trap_init)(void); | ||
31 | char * (*arch_memory_setup)(void); | ||
32 | int (*mach_get_smp_config)(unsigned int early); | ||
33 | int (*mach_find_smp_config)(unsigned int reserve); | ||
34 | |||
35 | int *mpc_record; | ||
36 | int (*mpc_apic_id)(struct mpc_config_processor *m); | ||
37 | void (*mpc_oem_bus_info)(struct mpc_config_bus *m, char *name); | ||
38 | void (*mpc_oem_pci_bus)(struct mpc_config_bus *m); | ||
39 | void (*smp_read_mpc_oem)(struct mp_config_oemtable *oemtable, | ||
40 | unsigned short oemsize); | ||
41 | }; | ||
42 | |||
43 | extern struct x86_quirks *x86_quirks; | ||
44 | |||
12 | #ifndef CONFIG_PARAVIRT | 45 | #ifndef CONFIG_PARAVIRT |
13 | #define paravirt_post_allocator_init() do {} while (0) | 46 | #define paravirt_post_allocator_init() do {} while (0) |
14 | #endif | 47 | #endif |
@@ -43,26 +76,24 @@ char *machine_specific_memory_setup(void); | |||
43 | */ | 76 | */ |
44 | extern struct boot_params boot_params; | 77 | extern struct boot_params boot_params; |
45 | 78 | ||
46 | #ifdef __i386__ | ||
47 | /* | 79 | /* |
48 | * Do NOT EVER look at the BIOS memory size location. | 80 | * Do NOT EVER look at the BIOS memory size location. |
49 | * It does not work on many machines. | 81 | * It does not work on many machines. |
50 | */ | 82 | */ |
51 | #define LOWMEMSIZE() (0x9f000) | 83 | #define LOWMEMSIZE() (0x9f000) |
52 | 84 | ||
53 | struct e820entry; | 85 | #ifdef __i386__ |
54 | |||
55 | char * __init machine_specific_memory_setup(void); | ||
56 | char *memory_setup(void); | ||
57 | 86 | ||
58 | int __init copy_e820_map(struct e820entry *biosmap, int nr_map); | 87 | void __init i386_start_kernel(void); |
59 | int __init sanitize_e820_map(struct e820entry *biosmap, char *pnr_map); | 88 | extern void probe_roms(void); |
60 | void __init add_memory_region(unsigned long long start, | ||
61 | unsigned long long size, int type); | ||
62 | 89 | ||
90 | extern unsigned long init_pg_tables_start; | ||
63 | extern unsigned long init_pg_tables_end; | 91 | extern unsigned long init_pg_tables_end; |
64 | 92 | ||
65 | 93 | #else | |
94 | void __init x86_64_init_pda(void); | ||
95 | void __init x86_64_start_kernel(char *real_mode); | ||
96 | void __init x86_64_start_reservations(char *real_mode_data); | ||
66 | 97 | ||
67 | #endif /* __i386__ */ | 98 | #endif /* __i386__ */ |
68 | #endif /* _SETUP */ | 99 | #endif /* _SETUP */ |
diff --git a/include/asm-x86/signal.h b/include/asm-x86/signal.h index f15186d39c69..6dac49364e95 100644 --- a/include/asm-x86/signal.h +++ b/include/asm-x86/signal.h | |||
@@ -181,12 +181,12 @@ typedef struct sigaltstack { | |||
181 | #ifdef __KERNEL__ | 181 | #ifdef __KERNEL__ |
182 | #include <asm/sigcontext.h> | 182 | #include <asm/sigcontext.h> |
183 | 183 | ||
184 | #ifdef __386__ | 184 | #ifdef __i386__ |
185 | 185 | ||
186 | #define __HAVE_ARCH_SIG_BITOPS | 186 | #define __HAVE_ARCH_SIG_BITOPS |
187 | 187 | ||
188 | #define sigaddset(set,sig) \ | 188 | #define sigaddset(set,sig) \ |
189 | (__builtin_constantp(sig) \ | 189 | (__builtin_constant_p(sig) \ |
190 | ? __const_sigaddset((set), (sig)) \ | 190 | ? __const_sigaddset((set), (sig)) \ |
191 | : __gen_sigaddset((set), (sig))) | 191 | : __gen_sigaddset((set), (sig))) |
192 | 192 | ||
diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h index 1ebaa5cd3112..3c877f74f279 100644 --- a/include/asm-x86/smp.h +++ b/include/asm-x86/smp.h | |||
@@ -25,25 +25,18 @@ extern cpumask_t cpu_callin_map; | |||
25 | extern void (*mtrr_hook)(void); | 25 | extern void (*mtrr_hook)(void); |
26 | extern void zap_low_mappings(void); | 26 | extern void zap_low_mappings(void); |
27 | 27 | ||
28 | extern int __cpuinit get_local_pda(int cpu); | ||
29 | |||
28 | extern int smp_num_siblings; | 30 | extern int smp_num_siblings; |
29 | extern unsigned int num_processors; | 31 | extern unsigned int num_processors; |
30 | extern cpumask_t cpu_initialized; | 32 | extern cpumask_t cpu_initialized; |
31 | 33 | ||
32 | #ifdef CONFIG_SMP | ||
33 | extern u16 x86_cpu_to_apicid_init[]; | ||
34 | extern u16 x86_bios_cpu_apicid_init[]; | ||
35 | extern void *x86_cpu_to_apicid_early_ptr; | ||
36 | extern void *x86_bios_cpu_apicid_early_ptr; | ||
37 | #else | ||
38 | #define x86_cpu_to_apicid_early_ptr NULL | ||
39 | #define x86_bios_cpu_apicid_early_ptr NULL | ||
40 | #endif | ||
41 | |||
42 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); | 34 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); |
43 | DECLARE_PER_CPU(cpumask_t, cpu_core_map); | 35 | DECLARE_PER_CPU(cpumask_t, cpu_core_map); |
44 | DECLARE_PER_CPU(u16, cpu_llc_id); | 36 | DECLARE_PER_CPU(u16, cpu_llc_id); |
45 | DECLARE_PER_CPU(u16, x86_cpu_to_apicid); | 37 | |
46 | DECLARE_PER_CPU(u16, x86_bios_cpu_apicid); | 38 | DECLARE_EARLY_PER_CPU(u16, x86_cpu_to_apicid); |
39 | DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid); | ||
47 | 40 | ||
48 | /* Static state in head.S used to set up a CPU */ | 41 | /* Static state in head.S used to set up a CPU */ |
49 | extern struct { | 42 | extern struct { |
@@ -59,9 +52,9 @@ struct smp_ops { | |||
59 | 52 | ||
60 | void (*smp_send_stop)(void); | 53 | void (*smp_send_stop)(void); |
61 | void (*smp_send_reschedule)(int cpu); | 54 | void (*smp_send_reschedule)(int cpu); |
62 | int (*smp_call_function_mask)(cpumask_t mask, | 55 | |
63 | void (*func)(void *info), void *info, | 56 | void (*send_call_func_ipi)(cpumask_t mask); |
64 | int wait); | 57 | void (*send_call_func_single_ipi)(int cpu); |
65 | }; | 58 | }; |
66 | 59 | ||
67 | /* Globals due to paravirt */ | 60 | /* Globals due to paravirt */ |
@@ -103,23 +96,26 @@ static inline void smp_send_reschedule(int cpu) | |||
103 | smp_ops.smp_send_reschedule(cpu); | 96 | smp_ops.smp_send_reschedule(cpu); |
104 | } | 97 | } |
105 | 98 | ||
106 | static inline int smp_call_function_mask(cpumask_t mask, | 99 | static inline void arch_send_call_function_single_ipi(int cpu) |
107 | void (*func) (void *info), void *info, | 100 | { |
108 | int wait) | 101 | smp_ops.send_call_func_single_ipi(cpu); |
102 | } | ||
103 | |||
104 | static inline void arch_send_call_function_ipi(cpumask_t mask) | ||
109 | { | 105 | { |
110 | return smp_ops.smp_call_function_mask(mask, func, info, wait); | 106 | smp_ops.send_call_func_ipi(mask); |
111 | } | 107 | } |
112 | 108 | ||
113 | void native_smp_prepare_boot_cpu(void); | 109 | void native_smp_prepare_boot_cpu(void); |
114 | void native_smp_prepare_cpus(unsigned int max_cpus); | 110 | void native_smp_prepare_cpus(unsigned int max_cpus); |
115 | void native_smp_cpus_done(unsigned int max_cpus); | 111 | void native_smp_cpus_done(unsigned int max_cpus); |
116 | int native_cpu_up(unsigned int cpunum); | 112 | int native_cpu_up(unsigned int cpunum); |
113 | void native_send_call_func_ipi(cpumask_t mask); | ||
114 | void native_send_call_func_single_ipi(int cpu); | ||
117 | 115 | ||
118 | extern int __cpu_disable(void); | 116 | extern int __cpu_disable(void); |
119 | extern void __cpu_die(unsigned int cpu); | 117 | extern void __cpu_die(unsigned int cpu); |
120 | 118 | ||
121 | extern void prefill_possible_map(void); | ||
122 | |||
123 | void smp_store_cpu_info(int id); | 119 | void smp_store_cpu_info(int id); |
124 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) | 120 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) |
125 | 121 | ||
@@ -130,6 +126,14 @@ static inline int num_booting_cpus(void) | |||
130 | } | 126 | } |
131 | #endif /* CONFIG_SMP */ | 127 | #endif /* CONFIG_SMP */ |
132 | 128 | ||
129 | #if defined(CONFIG_SMP) && defined(CONFIG_HOTPLUG_CPU) | ||
130 | extern void prefill_possible_map(void); | ||
131 | #else | ||
132 | static inline void prefill_possible_map(void) | ||
133 | { | ||
134 | } | ||
135 | #endif | ||
136 | |||
133 | extern unsigned disabled_cpus __cpuinitdata; | 137 | extern unsigned disabled_cpus __cpuinitdata; |
134 | 138 | ||
135 | #ifdef CONFIG_X86_32_SMP | 139 | #ifdef CONFIG_X86_32_SMP |
@@ -197,12 +201,8 @@ static inline int hard_smp_processor_id(void) | |||
197 | #endif /* CONFIG_X86_LOCAL_APIC */ | 201 | #endif /* CONFIG_X86_LOCAL_APIC */ |
198 | 202 | ||
199 | #ifdef CONFIG_HOTPLUG_CPU | 203 | #ifdef CONFIG_HOTPLUG_CPU |
200 | extern void cpu_exit_clear(void); | ||
201 | extern void cpu_uninit(void); | 204 | extern void cpu_uninit(void); |
202 | #endif | 205 | #endif |
203 | 206 | ||
204 | extern void smp_alloc_memory(void); | ||
205 | extern void lock_ipi_call_lock(void); | ||
206 | extern void unlock_ipi_call_lock(void); | ||
207 | #endif /* __ASSEMBLY__ */ | 207 | #endif /* __ASSEMBLY__ */ |
208 | #endif | 208 | #endif |
diff --git a/include/asm-x86/spinlock.h b/include/asm-x86/spinlock.h index 21e89bf92f1c..4f9a9861799a 100644 --- a/include/asm-x86/spinlock.h +++ b/include/asm-x86/spinlock.h | |||
@@ -6,7 +6,7 @@ | |||
6 | #include <asm/page.h> | 6 | #include <asm/page.h> |
7 | #include <asm/processor.h> | 7 | #include <asm/processor.h> |
8 | #include <linux/compiler.h> | 8 | #include <linux/compiler.h> |
9 | 9 | #include <asm/paravirt.h> | |
10 | /* | 10 | /* |
11 | * Your basic SMP spinlocks, allowing only a single CPU anywhere | 11 | * Your basic SMP spinlocks, allowing only a single CPU anywhere |
12 | * | 12 | * |
@@ -54,21 +54,21 @@ | |||
54 | * much between them in performance though, especially as locks are out of line. | 54 | * much between them in performance though, especially as locks are out of line. |
55 | */ | 55 | */ |
56 | #if (NR_CPUS < 256) | 56 | #if (NR_CPUS < 256) |
57 | static inline int __raw_spin_is_locked(raw_spinlock_t *lock) | 57 | static inline int __ticket_spin_is_locked(raw_spinlock_t *lock) |
58 | { | 58 | { |
59 | int tmp = ACCESS_ONCE(lock->slock); | 59 | int tmp = ACCESS_ONCE(lock->slock); |
60 | 60 | ||
61 | return (((tmp >> 8) & 0xff) != (tmp & 0xff)); | 61 | return (((tmp >> 8) & 0xff) != (tmp & 0xff)); |
62 | } | 62 | } |
63 | 63 | ||
64 | static inline int __raw_spin_is_contended(raw_spinlock_t *lock) | 64 | static inline int __ticket_spin_is_contended(raw_spinlock_t *lock) |
65 | { | 65 | { |
66 | int tmp = ACCESS_ONCE(lock->slock); | 66 | int tmp = ACCESS_ONCE(lock->slock); |
67 | 67 | ||
68 | return (((tmp >> 8) & 0xff) - (tmp & 0xff)) > 1; | 68 | return (((tmp >> 8) & 0xff) - (tmp & 0xff)) > 1; |
69 | } | 69 | } |
70 | 70 | ||
71 | static __always_inline void __raw_spin_lock(raw_spinlock_t *lock) | 71 | static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock) |
72 | { | 72 | { |
73 | short inc = 0x0100; | 73 | short inc = 0x0100; |
74 | 74 | ||
@@ -87,9 +87,7 @@ static __always_inline void __raw_spin_lock(raw_spinlock_t *lock) | |||
87 | : "memory", "cc"); | 87 | : "memory", "cc"); |
88 | } | 88 | } |
89 | 89 | ||
90 | #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) | 90 | static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock) |
91 | |||
92 | static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock) | ||
93 | { | 91 | { |
94 | int tmp; | 92 | int tmp; |
95 | short new; | 93 | short new; |
@@ -110,7 +108,7 @@ static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock) | |||
110 | return tmp; | 108 | return tmp; |
111 | } | 109 | } |
112 | 110 | ||
113 | static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock) | 111 | static __always_inline void __ticket_spin_unlock(raw_spinlock_t *lock) |
114 | { | 112 | { |
115 | asm volatile(UNLOCK_LOCK_PREFIX "incb %0" | 113 | asm volatile(UNLOCK_LOCK_PREFIX "incb %0" |
116 | : "+m" (lock->slock) | 114 | : "+m" (lock->slock) |
@@ -118,21 +116,21 @@ static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock) | |||
118 | : "memory", "cc"); | 116 | : "memory", "cc"); |
119 | } | 117 | } |
120 | #else | 118 | #else |
121 | static inline int __raw_spin_is_locked(raw_spinlock_t *lock) | 119 | static inline int __ticket_spin_is_locked(raw_spinlock_t *lock) |
122 | { | 120 | { |
123 | int tmp = ACCESS_ONCE(lock->slock); | 121 | int tmp = ACCESS_ONCE(lock->slock); |
124 | 122 | ||
125 | return (((tmp >> 16) & 0xffff) != (tmp & 0xffff)); | 123 | return (((tmp >> 16) & 0xffff) != (tmp & 0xffff)); |
126 | } | 124 | } |
127 | 125 | ||
128 | static inline int __raw_spin_is_contended(raw_spinlock_t *lock) | 126 | static inline int __ticket_spin_is_contended(raw_spinlock_t *lock) |
129 | { | 127 | { |
130 | int tmp = ACCESS_ONCE(lock->slock); | 128 | int tmp = ACCESS_ONCE(lock->slock); |
131 | 129 | ||
132 | return (((tmp >> 16) & 0xffff) - (tmp & 0xffff)) > 1; | 130 | return (((tmp >> 16) & 0xffff) - (tmp & 0xffff)) > 1; |
133 | } | 131 | } |
134 | 132 | ||
135 | static __always_inline void __raw_spin_lock(raw_spinlock_t *lock) | 133 | static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock) |
136 | { | 134 | { |
137 | int inc = 0x00010000; | 135 | int inc = 0x00010000; |
138 | int tmp; | 136 | int tmp; |
@@ -153,9 +151,7 @@ static __always_inline void __raw_spin_lock(raw_spinlock_t *lock) | |||
153 | : "memory", "cc"); | 151 | : "memory", "cc"); |
154 | } | 152 | } |
155 | 153 | ||
156 | #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) | 154 | static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock) |
157 | |||
158 | static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock) | ||
159 | { | 155 | { |
160 | int tmp; | 156 | int tmp; |
161 | int new; | 157 | int new; |
@@ -177,7 +173,7 @@ static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock) | |||
177 | return tmp; | 173 | return tmp; |
178 | } | 174 | } |
179 | 175 | ||
180 | static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock) | 176 | static __always_inline void __ticket_spin_unlock(raw_spinlock_t *lock) |
181 | { | 177 | { |
182 | asm volatile(UNLOCK_LOCK_PREFIX "incw %0" | 178 | asm volatile(UNLOCK_LOCK_PREFIX "incw %0" |
183 | : "+m" (lock->slock) | 179 | : "+m" (lock->slock) |
@@ -186,6 +182,98 @@ static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock) | |||
186 | } | 182 | } |
187 | #endif | 183 | #endif |
188 | 184 | ||
185 | #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) | ||
186 | |||
187 | #ifdef CONFIG_PARAVIRT | ||
188 | /* | ||
189 | * Define virtualization-friendly old-style lock byte lock, for use in | ||
190 | * pv_lock_ops if desired. | ||
191 | * | ||
192 | * This differs from the pre-2.6.24 spinlock by always using xchgb | ||
193 | * rather than decb to take the lock; this allows it to use a | ||
194 | * zero-initialized lock structure. It also maintains a 1-byte | ||
195 | * contention counter, so that we can implement | ||
196 | * __byte_spin_is_contended. | ||
197 | */ | ||
198 | struct __byte_spinlock { | ||
199 | s8 lock; | ||
200 | s8 spinners; | ||
201 | }; | ||
202 | |||
203 | static inline int __byte_spin_is_locked(raw_spinlock_t *lock) | ||
204 | { | ||
205 | struct __byte_spinlock *bl = (struct __byte_spinlock *)lock; | ||
206 | return bl->lock != 0; | ||
207 | } | ||
208 | |||
209 | static inline int __byte_spin_is_contended(raw_spinlock_t *lock) | ||
210 | { | ||
211 | struct __byte_spinlock *bl = (struct __byte_spinlock *)lock; | ||
212 | return bl->spinners != 0; | ||
213 | } | ||
214 | |||
215 | static inline void __byte_spin_lock(raw_spinlock_t *lock) | ||
216 | { | ||
217 | struct __byte_spinlock *bl = (struct __byte_spinlock *)lock; | ||
218 | s8 val = 1; | ||
219 | |||
220 | asm("1: xchgb %1, %0\n" | ||
221 | " test %1,%1\n" | ||
222 | " jz 3f\n" | ||
223 | " " LOCK_PREFIX "incb %2\n" | ||
224 | "2: rep;nop\n" | ||
225 | " cmpb $1, %0\n" | ||
226 | " je 2b\n" | ||
227 | " " LOCK_PREFIX "decb %2\n" | ||
228 | " jmp 1b\n" | ||
229 | "3:" | ||
230 | : "+m" (bl->lock), "+q" (val), "+m" (bl->spinners): : "memory"); | ||
231 | } | ||
232 | |||
233 | static inline int __byte_spin_trylock(raw_spinlock_t *lock) | ||
234 | { | ||
235 | struct __byte_spinlock *bl = (struct __byte_spinlock *)lock; | ||
236 | u8 old = 1; | ||
237 | |||
238 | asm("xchgb %1,%0" | ||
239 | : "+m" (bl->lock), "+q" (old) : : "memory"); | ||
240 | |||
241 | return old == 0; | ||
242 | } | ||
243 | |||
244 | static inline void __byte_spin_unlock(raw_spinlock_t *lock) | ||
245 | { | ||
246 | struct __byte_spinlock *bl = (struct __byte_spinlock *)lock; | ||
247 | smp_wmb(); | ||
248 | bl->lock = 0; | ||
249 | } | ||
250 | #else /* !CONFIG_PARAVIRT */ | ||
251 | static inline int __raw_spin_is_locked(raw_spinlock_t *lock) | ||
252 | { | ||
253 | return __ticket_spin_is_locked(lock); | ||
254 | } | ||
255 | |||
256 | static inline int __raw_spin_is_contended(raw_spinlock_t *lock) | ||
257 | { | ||
258 | return __ticket_spin_is_contended(lock); | ||
259 | } | ||
260 | |||
261 | static __always_inline void __raw_spin_lock(raw_spinlock_t *lock) | ||
262 | { | ||
263 | __ticket_spin_lock(lock); | ||
264 | } | ||
265 | |||
266 | static __always_inline int __raw_spin_trylock(raw_spinlock_t *lock) | ||
267 | { | ||
268 | return __ticket_spin_trylock(lock); | ||
269 | } | ||
270 | |||
271 | static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock) | ||
272 | { | ||
273 | __ticket_spin_unlock(lock); | ||
274 | } | ||
275 | #endif /* CONFIG_PARAVIRT */ | ||
276 | |||
189 | static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock) | 277 | static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock) |
190 | { | 278 | { |
191 | while (__raw_spin_is_locked(lock)) | 279 | while (__raw_spin_is_locked(lock)) |
diff --git a/include/asm-x86/spinlock_types.h b/include/asm-x86/spinlock_types.h index 9029cf78cf5d..06c071c9eee9 100644 --- a/include/asm-x86/spinlock_types.h +++ b/include/asm-x86/spinlock_types.h | |||
@@ -5,7 +5,7 @@ | |||
5 | # error "please don't include this file directly" | 5 | # error "please don't include this file directly" |
6 | #endif | 6 | #endif |
7 | 7 | ||
8 | typedef struct { | 8 | typedef struct raw_spinlock { |
9 | unsigned int slock; | 9 | unsigned int slock; |
10 | } raw_spinlock_t; | 10 | } raw_spinlock_t; |
11 | 11 | ||
diff --git a/include/asm-x86/srat.h b/include/asm-x86/srat.h index f4bba131d068..774c919dc232 100644 --- a/include/asm-x86/srat.h +++ b/include/asm-x86/srat.h | |||
@@ -27,11 +27,13 @@ | |||
27 | #ifndef _ASM_SRAT_H_ | 27 | #ifndef _ASM_SRAT_H_ |
28 | #define _ASM_SRAT_H_ | 28 | #define _ASM_SRAT_H_ |
29 | 29 | ||
30 | #ifndef CONFIG_ACPI_SRAT | 30 | #ifdef CONFIG_ACPI_NUMA |
31 | #error CONFIG_ACPI_SRAT not defined, and srat.h header has been included | ||
32 | #endif | ||
33 | |||
34 | extern int get_memcfg_from_srat(void); | 31 | extern int get_memcfg_from_srat(void); |
35 | extern unsigned long *get_zholes_size(int); | 32 | #else |
33 | static inline int get_memcfg_from_srat(void) | ||
34 | { | ||
35 | return 0; | ||
36 | } | ||
37 | #endif | ||
36 | 38 | ||
37 | #endif /* _ASM_SRAT_H_ */ | 39 | #endif /* _ASM_SRAT_H_ */ |
diff --git a/include/asm-x86/string_32.h b/include/asm-x86/string_32.h index b49369ad9a61..193578cd1fd9 100644 --- a/include/asm-x86/string_32.h +++ b/include/asm-x86/string_32.h | |||
@@ -29,81 +29,116 @@ extern char *strchr(const char *s, int c); | |||
29 | #define __HAVE_ARCH_STRLEN | 29 | #define __HAVE_ARCH_STRLEN |
30 | extern size_t strlen(const char *s); | 30 | extern size_t strlen(const char *s); |
31 | 31 | ||
32 | static __always_inline void * __memcpy(void * to, const void * from, size_t n) | 32 | static __always_inline void *__memcpy(void *to, const void *from, size_t n) |
33 | { | 33 | { |
34 | int d0, d1, d2; | 34 | int d0, d1, d2; |
35 | __asm__ __volatile__( | 35 | asm volatile("rep ; movsl\n\t" |
36 | "rep ; movsl\n\t" | 36 | "movl %4,%%ecx\n\t" |
37 | "movl %4,%%ecx\n\t" | 37 | "andl $3,%%ecx\n\t" |
38 | "andl $3,%%ecx\n\t" | 38 | "jz 1f\n\t" |
39 | "jz 1f\n\t" | 39 | "rep ; movsb\n\t" |
40 | "rep ; movsb\n\t" | 40 | "1:" |
41 | "1:" | 41 | : "=&c" (d0), "=&D" (d1), "=&S" (d2) |
42 | : "=&c" (d0), "=&D" (d1), "=&S" (d2) | 42 | : "0" (n / 4), "g" (n), "1" ((long)to), "2" ((long)from) |
43 | : "0" (n/4), "g" (n), "1" ((long) to), "2" ((long) from) | 43 | : "memory"); |
44 | : "memory"); | 44 | return to; |
45 | return (to); | ||
46 | } | 45 | } |
47 | 46 | ||
48 | /* | 47 | /* |
49 | * This looks ugly, but the compiler can optimize it totally, | 48 | * This looks ugly, but the compiler can optimize it totally, |
50 | * as the count is constant. | 49 | * as the count is constant. |
51 | */ | 50 | */ |
52 | static __always_inline void * __constant_memcpy(void * to, const void * from, size_t n) | 51 | static __always_inline void *__constant_memcpy(void *to, const void *from, |
52 | size_t n) | ||
53 | { | 53 | { |
54 | long esi, edi; | 54 | long esi, edi; |
55 | if (!n) return to; | 55 | if (!n) |
56 | #if 1 /* want to do small copies with non-string ops? */ | 56 | return to; |
57 | |||
57 | switch (n) { | 58 | switch (n) { |
58 | case 1: *(char*)to = *(char*)from; return to; | 59 | case 1: |
59 | case 2: *(short*)to = *(short*)from; return to; | 60 | *(char *)to = *(char *)from; |
60 | case 4: *(int*)to = *(int*)from; return to; | 61 | return to; |
61 | #if 1 /* including those doable with two moves? */ | 62 | case 2: |
62 | case 3: *(short*)to = *(short*)from; | 63 | *(short *)to = *(short *)from; |
63 | *((char*)to+2) = *((char*)from+2); return to; | 64 | return to; |
64 | case 5: *(int*)to = *(int*)from; | 65 | case 4: |
65 | *((char*)to+4) = *((char*)from+4); return to; | 66 | *(int *)to = *(int *)from; |
66 | case 6: *(int*)to = *(int*)from; | 67 | return to; |
67 | *((short*)to+2) = *((short*)from+2); return to; | 68 | |
68 | case 8: *(int*)to = *(int*)from; | 69 | case 3: |
69 | *((int*)to+1) = *((int*)from+1); return to; | 70 | *(short *)to = *(short *)from; |
70 | #endif | 71 | *((char *)to + 2) = *((char *)from + 2); |
72 | return to; | ||
73 | case 5: | ||
74 | *(int *)to = *(int *)from; | ||
75 | *((char *)to + 4) = *((char *)from + 4); | ||
76 | return to; | ||
77 | case 6: | ||
78 | *(int *)to = *(int *)from; | ||
79 | *((short *)to + 2) = *((short *)from + 2); | ||
80 | return to; | ||
81 | case 8: | ||
82 | *(int *)to = *(int *)from; | ||
83 | *((int *)to + 1) = *((int *)from + 1); | ||
84 | return to; | ||
71 | } | 85 | } |
72 | #endif | 86 | |
73 | esi = (long) from; | 87 | esi = (long)from; |
74 | edi = (long) to; | 88 | edi = (long)to; |
75 | if (n >= 5*4) { | 89 | if (n >= 5 * 4) { |
76 | /* large block: use rep prefix */ | 90 | /* large block: use rep prefix */ |
77 | int ecx; | 91 | int ecx; |
78 | __asm__ __volatile__( | 92 | asm volatile("rep ; movsl" |
79 | "rep ; movsl" | 93 | : "=&c" (ecx), "=&D" (edi), "=&S" (esi) |
80 | : "=&c" (ecx), "=&D" (edi), "=&S" (esi) | 94 | : "0" (n / 4), "1" (edi), "2" (esi) |
81 | : "0" (n/4), "1" (edi),"2" (esi) | 95 | : "memory" |
82 | : "memory" | ||
83 | ); | 96 | ); |
84 | } else { | 97 | } else { |
85 | /* small block: don't clobber ecx + smaller code */ | 98 | /* small block: don't clobber ecx + smaller code */ |
86 | if (n >= 4*4) __asm__ __volatile__("movsl" | 99 | if (n >= 4 * 4) |
87 | :"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory"); | 100 | asm volatile("movsl" |
88 | if (n >= 3*4) __asm__ __volatile__("movsl" | 101 | : "=&D"(edi), "=&S"(esi) |
89 | :"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory"); | 102 | : "0"(edi), "1"(esi) |
90 | if (n >= 2*4) __asm__ __volatile__("movsl" | 103 | : "memory"); |
91 | :"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory"); | 104 | if (n >= 3 * 4) |
92 | if (n >= 1*4) __asm__ __volatile__("movsl" | 105 | asm volatile("movsl" |
93 | :"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory"); | 106 | : "=&D"(edi), "=&S"(esi) |
107 | : "0"(edi), "1"(esi) | ||
108 | : "memory"); | ||
109 | if (n >= 2 * 4) | ||
110 | asm volatile("movsl" | ||
111 | : "=&D"(edi), "=&S"(esi) | ||
112 | : "0"(edi), "1"(esi) | ||
113 | : "memory"); | ||
114 | if (n >= 1 * 4) | ||
115 | asm volatile("movsl" | ||
116 | : "=&D"(edi), "=&S"(esi) | ||
117 | : "0"(edi), "1"(esi) | ||
118 | : "memory"); | ||
94 | } | 119 | } |
95 | switch (n % 4) { | 120 | switch (n % 4) { |
96 | /* tail */ | 121 | /* tail */ |
97 | case 0: return to; | 122 | case 0: |
98 | case 1: __asm__ __volatile__("movsb" | 123 | return to; |
99 | :"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory"); | 124 | case 1: |
100 | return to; | 125 | asm volatile("movsb" |
101 | case 2: __asm__ __volatile__("movsw" | 126 | : "=&D"(edi), "=&S"(esi) |
102 | :"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory"); | 127 | : "0"(edi), "1"(esi) |
103 | return to; | 128 | : "memory"); |
104 | default: __asm__ __volatile__("movsw\n\tmovsb" | 129 | return to; |
105 | :"=&D"(edi),"=&S"(esi):"0"(edi),"1"(esi):"memory"); | 130 | case 2: |
106 | return to; | 131 | asm volatile("movsw" |
132 | : "=&D"(edi), "=&S"(esi) | ||
133 | : "0"(edi), "1"(esi) | ||
134 | : "memory"); | ||
135 | return to; | ||
136 | default: | ||
137 | asm volatile("movsw\n\tmovsb" | ||
138 | : "=&D"(edi), "=&S"(esi) | ||
139 | : "0"(edi), "1"(esi) | ||
140 | : "memory"); | ||
141 | return to; | ||
107 | } | 142 | } |
108 | } | 143 | } |
109 | 144 | ||
@@ -117,87 +152,86 @@ static __always_inline void * __constant_memcpy(void * to, const void * from, si | |||
117 | * This CPU favours 3DNow strongly (eg AMD Athlon) | 152 | * This CPU favours 3DNow strongly (eg AMD Athlon) |
118 | */ | 153 | */ |
119 | 154 | ||
120 | static inline void * __constant_memcpy3d(void * to, const void * from, size_t len) | 155 | static inline void *__constant_memcpy3d(void *to, const void *from, size_t len) |
121 | { | 156 | { |
122 | if (len < 512) | 157 | if (len < 512) |
123 | return __constant_memcpy(to, from, len); | 158 | return __constant_memcpy(to, from, len); |
124 | return _mmx_memcpy(to, from, len); | 159 | return _mmx_memcpy(to, from, len); |
125 | } | 160 | } |
126 | 161 | ||
127 | static __inline__ void *__memcpy3d(void *to, const void *from, size_t len) | 162 | static inline void *__memcpy3d(void *to, const void *from, size_t len) |
128 | { | 163 | { |
129 | if (len < 512) | 164 | if (len < 512) |
130 | return __memcpy(to, from, len); | 165 | return __memcpy(to, from, len); |
131 | return _mmx_memcpy(to, from, len); | 166 | return _mmx_memcpy(to, from, len); |
132 | } | 167 | } |
133 | 168 | ||
134 | #define memcpy(t, f, n) \ | 169 | #define memcpy(t, f, n) \ |
135 | (__builtin_constant_p(n) ? \ | 170 | (__builtin_constant_p((n)) \ |
136 | __constant_memcpy3d((t),(f),(n)) : \ | 171 | ? __constant_memcpy3d((t), (f), (n)) \ |
137 | __memcpy3d((t),(f),(n))) | 172 | : __memcpy3d((t), (f), (n))) |
138 | 173 | ||
139 | #else | 174 | #else |
140 | 175 | ||
141 | /* | 176 | /* |
142 | * No 3D Now! | 177 | * No 3D Now! |
143 | */ | 178 | */ |
144 | 179 | ||
145 | #define memcpy(t, f, n) \ | 180 | #define memcpy(t, f, n) \ |
146 | (__builtin_constant_p(n) ? \ | 181 | (__builtin_constant_p((n)) \ |
147 | __constant_memcpy((t),(f),(n)) : \ | 182 | ? __constant_memcpy((t), (f), (n)) \ |
148 | __memcpy((t),(f),(n))) | 183 | : __memcpy((t), (f), (n))) |
149 | 184 | ||
150 | #endif | 185 | #endif |
151 | 186 | ||
152 | #define __HAVE_ARCH_MEMMOVE | 187 | #define __HAVE_ARCH_MEMMOVE |
153 | void *memmove(void * dest,const void * src, size_t n); | 188 | void *memmove(void *dest, const void *src, size_t n); |
154 | 189 | ||
155 | #define memcmp __builtin_memcmp | 190 | #define memcmp __builtin_memcmp |
156 | 191 | ||
157 | #define __HAVE_ARCH_MEMCHR | 192 | #define __HAVE_ARCH_MEMCHR |
158 | extern void *memchr(const void * cs,int c,size_t count); | 193 | extern void *memchr(const void *cs, int c, size_t count); |
159 | 194 | ||
160 | static inline void * __memset_generic(void * s, char c,size_t count) | 195 | static inline void *__memset_generic(void *s, char c, size_t count) |
161 | { | 196 | { |
162 | int d0, d1; | 197 | int d0, d1; |
163 | __asm__ __volatile__( | 198 | asm volatile("rep\n\t" |
164 | "rep\n\t" | 199 | "stosb" |
165 | "stosb" | 200 | : "=&c" (d0), "=&D" (d1) |
166 | : "=&c" (d0), "=&D" (d1) | 201 | : "a" (c), "1" (s), "0" (count) |
167 | :"a" (c),"1" (s),"0" (count) | 202 | : "memory"); |
168 | :"memory"); | 203 | return s; |
169 | return s; | ||
170 | } | 204 | } |
171 | 205 | ||
172 | /* we might want to write optimized versions of these later */ | 206 | /* we might want to write optimized versions of these later */ |
173 | #define __constant_count_memset(s,c,count) __memset_generic((s),(c),(count)) | 207 | #define __constant_count_memset(s, c, count) __memset_generic((s), (c), (count)) |
174 | 208 | ||
175 | /* | 209 | /* |
176 | * memset(x,0,y) is a reasonably common thing to do, so we want to fill | 210 | * memset(x, 0, y) is a reasonably common thing to do, so we want to fill |
177 | * things 32 bits at a time even when we don't know the size of the | 211 | * things 32 bits at a time even when we don't know the size of the |
178 | * area at compile-time.. | 212 | * area at compile-time.. |
179 | */ | 213 | */ |
180 | static __always_inline void * __constant_c_memset(void * s, unsigned long c, size_t count) | 214 | static __always_inline |
215 | void *__constant_c_memset(void *s, unsigned long c, size_t count) | ||
181 | { | 216 | { |
182 | int d0, d1; | 217 | int d0, d1; |
183 | __asm__ __volatile__( | 218 | asm volatile("rep ; stosl\n\t" |
184 | "rep ; stosl\n\t" | 219 | "testb $2,%b3\n\t" |
185 | "testb $2,%b3\n\t" | 220 | "je 1f\n\t" |
186 | "je 1f\n\t" | 221 | "stosw\n" |
187 | "stosw\n" | 222 | "1:\ttestb $1,%b3\n\t" |
188 | "1:\ttestb $1,%b3\n\t" | 223 | "je 2f\n\t" |
189 | "je 2f\n\t" | 224 | "stosb\n" |
190 | "stosb\n" | 225 | "2:" |
191 | "2:" | 226 | : "=&c" (d0), "=&D" (d1) |
192 | :"=&c" (d0), "=&D" (d1) | 227 | : "a" (c), "q" (count), "0" (count/4), "1" ((long)s) |
193 | :"a" (c), "q" (count), "0" (count/4), "1" ((long) s) | 228 | : "memory"); |
194 | :"memory"); | 229 | return s; |
195 | return (s); | ||
196 | } | 230 | } |
197 | 231 | ||
198 | /* Added by Gertjan van Wingerde to make minix and sysv module work */ | 232 | /* Added by Gertjan van Wingerde to make minix and sysv module work */ |
199 | #define __HAVE_ARCH_STRNLEN | 233 | #define __HAVE_ARCH_STRNLEN |
200 | extern size_t strnlen(const char * s, size_t count); | 234 | extern size_t strnlen(const char *s, size_t count); |
201 | /* end of additional stuff */ | 235 | /* end of additional stuff */ |
202 | 236 | ||
203 | #define __HAVE_ARCH_STRSTR | 237 | #define __HAVE_ARCH_STRSTR |
@@ -207,66 +241,85 @@ extern char *strstr(const char *cs, const char *ct); | |||
207 | * This looks horribly ugly, but the compiler can optimize it totally, | 241 | * This looks horribly ugly, but the compiler can optimize it totally, |
208 | * as we by now know that both pattern and count is constant.. | 242 | * as we by now know that both pattern and count is constant.. |
209 | */ | 243 | */ |
210 | static __always_inline void * __constant_c_and_count_memset(void * s, unsigned long pattern, size_t count) | 244 | static __always_inline |
245 | void *__constant_c_and_count_memset(void *s, unsigned long pattern, | ||
246 | size_t count) | ||
211 | { | 247 | { |
212 | switch (count) { | 248 | switch (count) { |
249 | case 0: | ||
250 | return s; | ||
251 | case 1: | ||
252 | *(unsigned char *)s = pattern & 0xff; | ||
253 | return s; | ||
254 | case 2: | ||
255 | *(unsigned short *)s = pattern & 0xffff; | ||
256 | return s; | ||
257 | case 3: | ||
258 | *(unsigned short *)s = pattern & 0xffff; | ||
259 | *((unsigned char *)s + 2) = pattern & 0xff; | ||
260 | return s; | ||
261 | case 4: | ||
262 | *(unsigned long *)s = pattern; | ||
263 | return s; | ||
264 | } | ||
265 | |||
266 | #define COMMON(x) \ | ||
267 | asm volatile("rep ; stosl" \ | ||
268 | x \ | ||
269 | : "=&c" (d0), "=&D" (d1) \ | ||
270 | : "a" (eax), "0" (count/4), "1" ((long)s) \ | ||
271 | : "memory") | ||
272 | |||
273 | { | ||
274 | int d0, d1; | ||
275 | #if __GNUC__ == 4 && __GNUC_MINOR__ == 0 | ||
276 | /* Workaround for broken gcc 4.0 */ | ||
277 | register unsigned long eax asm("%eax") = pattern; | ||
278 | #else | ||
279 | unsigned long eax = pattern; | ||
280 | #endif | ||
281 | |||
282 | switch (count % 4) { | ||
213 | case 0: | 283 | case 0: |
284 | COMMON(""); | ||
214 | return s; | 285 | return s; |
215 | case 1: | 286 | case 1: |
216 | *(unsigned char *)s = pattern & 0xff; | 287 | COMMON("\n\tstosb"); |
217 | return s; | 288 | return s; |
218 | case 2: | 289 | case 2: |
219 | *(unsigned short *)s = pattern & 0xffff; | 290 | COMMON("\n\tstosw"); |
220 | return s; | 291 | return s; |
221 | case 3: | 292 | default: |
222 | *(unsigned short *)s = pattern & 0xffff; | 293 | COMMON("\n\tstosw\n\tstosb"); |
223 | *(2+(unsigned char *)s) = pattern & 0xff; | ||
224 | return s; | ||
225 | case 4: | ||
226 | *(unsigned long *)s = pattern; | ||
227 | return s; | 294 | return s; |
295 | } | ||
228 | } | 296 | } |
229 | #define COMMON(x) \ | 297 | |
230 | __asm__ __volatile__( \ | ||
231 | "rep ; stosl" \ | ||
232 | x \ | ||
233 | : "=&c" (d0), "=&D" (d1) \ | ||
234 | : "a" (pattern),"0" (count/4),"1" ((long) s) \ | ||
235 | : "memory") | ||
236 | { | ||
237 | int d0, d1; | ||
238 | switch (count % 4) { | ||
239 | case 0: COMMON(""); return s; | ||
240 | case 1: COMMON("\n\tstosb"); return s; | ||
241 | case 2: COMMON("\n\tstosw"); return s; | ||
242 | default: COMMON("\n\tstosw\n\tstosb"); return s; | ||
243 | } | ||
244 | } | ||
245 | |||
246 | #undef COMMON | 298 | #undef COMMON |
247 | } | 299 | } |
248 | 300 | ||
249 | #define __constant_c_x_memset(s, c, count) \ | 301 | #define __constant_c_x_memset(s, c, count) \ |
250 | (__builtin_constant_p(count) ? \ | 302 | (__builtin_constant_p(count) \ |
251 | __constant_c_and_count_memset((s),(c),(count)) : \ | 303 | ? __constant_c_and_count_memset((s), (c), (count)) \ |
252 | __constant_c_memset((s),(c),(count))) | 304 | : __constant_c_memset((s), (c), (count))) |
253 | 305 | ||
254 | #define __memset(s, c, count) \ | 306 | #define __memset(s, c, count) \ |
255 | (__builtin_constant_p(count) ? \ | 307 | (__builtin_constant_p(count) \ |
256 | __constant_count_memset((s),(c),(count)) : \ | 308 | ? __constant_count_memset((s), (c), (count)) \ |
257 | __memset_generic((s),(c),(count))) | 309 | : __memset_generic((s), (c), (count))) |
258 | 310 | ||
259 | #define __HAVE_ARCH_MEMSET | 311 | #define __HAVE_ARCH_MEMSET |
260 | #define memset(s, c, count) \ | 312 | #define memset(s, c, count) \ |
261 | (__builtin_constant_p(c) ? \ | 313 | (__builtin_constant_p(c) \ |
262 | __constant_c_x_memset((s),(0x01010101UL*(unsigned char)(c)),(count)) : \ | 314 | ? __constant_c_x_memset((s), (0x01010101UL * (unsigned char)(c)), \ |
263 | __memset((s),(c),(count))) | 315 | (count)) \ |
316 | : __memset((s), (c), (count))) | ||
264 | 317 | ||
265 | /* | 318 | /* |
266 | * find the first occurrence of byte 'c', or 1 past the area if none | 319 | * find the first occurrence of byte 'c', or 1 past the area if none |
267 | */ | 320 | */ |
268 | #define __HAVE_ARCH_MEMSCAN | 321 | #define __HAVE_ARCH_MEMSCAN |
269 | extern void *memscan(void * addr, int c, size_t size); | 322 | extern void *memscan(void *addr, int c, size_t size); |
270 | 323 | ||
271 | #endif /* __KERNEL__ */ | 324 | #endif /* __KERNEL__ */ |
272 | 325 | ||
diff --git a/include/asm-x86/suspend_32.h b/include/asm-x86/suspend_32.h index 24e1c080aa8a..8675c6782a7d 100644 --- a/include/asm-x86/suspend_32.h +++ b/include/asm-x86/suspend_32.h | |||
@@ -3,6 +3,9 @@ | |||
3 | * Based on code | 3 | * Based on code |
4 | * Copyright 2001 Patrick Mochel <mochel@osdl.org> | 4 | * Copyright 2001 Patrick Mochel <mochel@osdl.org> |
5 | */ | 5 | */ |
6 | #ifndef __ASM_X86_32_SUSPEND_H | ||
7 | #define __ASM_X86_32_SUSPEND_H | ||
8 | |||
6 | #include <asm/desc.h> | 9 | #include <asm/desc.h> |
7 | #include <asm/i387.h> | 10 | #include <asm/i387.h> |
8 | 11 | ||
@@ -44,3 +47,5 @@ static inline void acpi_save_register_state(unsigned long return_point) | |||
44 | /* routines for saving/restoring kernel state */ | 47 | /* routines for saving/restoring kernel state */ |
45 | extern int acpi_save_state_mem(void); | 48 | extern int acpi_save_state_mem(void); |
46 | #endif | 49 | #endif |
50 | |||
51 | #endif /* __ASM_X86_32_SUSPEND_H */ | ||
diff --git a/include/asm-x86/swiotlb.h b/include/asm-x86/swiotlb.h index f5d9e74b1e4a..c706a7442633 100644 --- a/include/asm-x86/swiotlb.h +++ b/include/asm-x86/swiotlb.h | |||
@@ -45,12 +45,14 @@ extern int swiotlb_force; | |||
45 | 45 | ||
46 | #ifdef CONFIG_SWIOTLB | 46 | #ifdef CONFIG_SWIOTLB |
47 | extern int swiotlb; | 47 | extern int swiotlb; |
48 | extern void pci_swiotlb_init(void); | ||
48 | #else | 49 | #else |
49 | #define swiotlb 0 | 50 | #define swiotlb 0 |
51 | static inline void pci_swiotlb_init(void) | ||
52 | { | ||
53 | } | ||
50 | #endif | 54 | #endif |
51 | 55 | ||
52 | extern void pci_swiotlb_init(void); | ||
53 | |||
54 | static inline void dma_mark_clean(void *addr, size_t size) {} | 56 | static inline void dma_mark_clean(void *addr, size_t size) {} |
55 | 57 | ||
56 | #endif /* _ASM_SWIOTLB_H */ | 58 | #endif /* _ASM_SWIOTLB_H */ |
diff --git a/include/asm-x86/system.h b/include/asm-x86/system.h index a2f04cd79b29..983ce37c491f 100644 --- a/include/asm-x86/system.h +++ b/include/asm-x86/system.h | |||
@@ -136,7 +136,7 @@ __asm__ __volatile__ ("movw %%dx,%1\n\t" \ | |||
136 | #define set_base(ldt, base) _set_base(((char *)&(ldt)) , (base)) | 136 | #define set_base(ldt, base) _set_base(((char *)&(ldt)) , (base)) |
137 | #define set_limit(ldt, limit) _set_limit(((char *)&(ldt)) , ((limit)-1)) | 137 | #define set_limit(ldt, limit) _set_limit(((char *)&(ldt)) , ((limit)-1)) |
138 | 138 | ||
139 | extern void load_gs_index(unsigned); | 139 | extern void native_load_gs_index(unsigned); |
140 | 140 | ||
141 | /* | 141 | /* |
142 | * Load a segment. Fall back on loading the zero | 142 | * Load a segment. Fall back on loading the zero |
@@ -153,14 +153,14 @@ extern void load_gs_index(unsigned); | |||
153 | "jmp 2b\n" \ | 153 | "jmp 2b\n" \ |
154 | ".previous\n" \ | 154 | ".previous\n" \ |
155 | _ASM_EXTABLE(1b,3b) \ | 155 | _ASM_EXTABLE(1b,3b) \ |
156 | : :"r" (value), "r" (0)) | 156 | : :"r" (value), "r" (0) : "memory") |
157 | 157 | ||
158 | 158 | ||
159 | /* | 159 | /* |
160 | * Save a segment register away | 160 | * Save a segment register away |
161 | */ | 161 | */ |
162 | #define savesegment(seg, value) \ | 162 | #define savesegment(seg, value) \ |
163 | asm volatile("mov %%" #seg ",%0":"=rm" (value)) | 163 | asm("mov %%" #seg ",%0":"=r" (value) : : "memory") |
164 | 164 | ||
165 | static inline unsigned long get_limit(unsigned long segment) | 165 | static inline unsigned long get_limit(unsigned long segment) |
166 | { | 166 | { |
@@ -282,6 +282,7 @@ static inline void native_wbinvd(void) | |||
282 | #ifdef CONFIG_X86_64 | 282 | #ifdef CONFIG_X86_64 |
283 | #define read_cr8() (native_read_cr8()) | 283 | #define read_cr8() (native_read_cr8()) |
284 | #define write_cr8(x) (native_write_cr8(x)) | 284 | #define write_cr8(x) (native_write_cr8(x)) |
285 | #define load_gs_index native_load_gs_index | ||
285 | #endif | 286 | #endif |
286 | 287 | ||
287 | /* Clear the 'TS' bit */ | 288 | /* Clear the 'TS' bit */ |
@@ -289,7 +290,7 @@ static inline void native_wbinvd(void) | |||
289 | 290 | ||
290 | #endif/* CONFIG_PARAVIRT */ | 291 | #endif/* CONFIG_PARAVIRT */ |
291 | 292 | ||
292 | #define stts() write_cr0(8 | read_cr0()) | 293 | #define stts() write_cr0(read_cr0() | X86_CR0_TS) |
293 | 294 | ||
294 | #endif /* __KERNEL__ */ | 295 | #endif /* __KERNEL__ */ |
295 | 296 | ||
@@ -303,7 +304,6 @@ static inline void clflush(volatile void *__p) | |||
303 | void disable_hlt(void); | 304 | void disable_hlt(void); |
304 | void enable_hlt(void); | 305 | void enable_hlt(void); |
305 | 306 | ||
306 | extern int es7000_plat; | ||
307 | void cpu_idle_wait(void); | 307 | void cpu_idle_wait(void); |
308 | 308 | ||
309 | extern unsigned long arch_align_stack(unsigned long sp); | 309 | extern unsigned long arch_align_stack(unsigned long sp); |
diff --git a/include/asm-x86/thread_info.h b/include/asm-x86/thread_info.h index 77244f17993f..3f2de1050988 100644 --- a/include/asm-x86/thread_info.h +++ b/include/asm-x86/thread_info.h | |||
@@ -1,10 +1,255 @@ | |||
1 | /* thread_info.h: low-level thread information | ||
2 | * | ||
3 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) | ||
4 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller | ||
5 | */ | ||
6 | |||
1 | #ifndef _ASM_X86_THREAD_INFO_H | 7 | #ifndef _ASM_X86_THREAD_INFO_H |
8 | #define _ASM_X86_THREAD_INFO_H | ||
9 | |||
10 | #include <linux/compiler.h> | ||
11 | #include <asm/page.h> | ||
12 | #include <asm/types.h> | ||
13 | |||
14 | /* | ||
15 | * low level task data that entry.S needs immediate access to | ||
16 | * - this struct should fit entirely inside of one cache line | ||
17 | * - this struct shares the supervisor stack pages | ||
18 | */ | ||
19 | #ifndef __ASSEMBLY__ | ||
20 | struct task_struct; | ||
21 | struct exec_domain; | ||
22 | #include <asm/processor.h> | ||
23 | |||
24 | struct thread_info { | ||
25 | struct task_struct *task; /* main task structure */ | ||
26 | struct exec_domain *exec_domain; /* execution domain */ | ||
27 | unsigned long flags; /* low level flags */ | ||
28 | __u32 status; /* thread synchronous flags */ | ||
29 | __u32 cpu; /* current CPU */ | ||
30 | int preempt_count; /* 0 => preemptable, | ||
31 | <0 => BUG */ | ||
32 | mm_segment_t addr_limit; | ||
33 | struct restart_block restart_block; | ||
34 | void __user *sysenter_return; | ||
2 | #ifdef CONFIG_X86_32 | 35 | #ifdef CONFIG_X86_32 |
3 | # include "thread_info_32.h" | 36 | unsigned long previous_esp; /* ESP of the previous stack in |
37 | case of nested (IRQ) stacks | ||
38 | */ | ||
39 | __u8 supervisor_stack[0]; | ||
40 | #endif | ||
41 | }; | ||
42 | |||
43 | #define INIT_THREAD_INFO(tsk) \ | ||
44 | { \ | ||
45 | .task = &tsk, \ | ||
46 | .exec_domain = &default_exec_domain, \ | ||
47 | .flags = 0, \ | ||
48 | .cpu = 0, \ | ||
49 | .preempt_count = 1, \ | ||
50 | .addr_limit = KERNEL_DS, \ | ||
51 | .restart_block = { \ | ||
52 | .fn = do_no_restart_syscall, \ | ||
53 | }, \ | ||
54 | } | ||
55 | |||
56 | #define init_thread_info (init_thread_union.thread_info) | ||
57 | #define init_stack (init_thread_union.stack) | ||
58 | |||
59 | #else /* !__ASSEMBLY__ */ | ||
60 | |||
61 | #include <asm/asm-offsets.h> | ||
62 | |||
63 | #endif | ||
64 | |||
65 | /* | ||
66 | * thread information flags | ||
67 | * - these are process state flags that various assembly files | ||
68 | * may need to access | ||
69 | * - pending work-to-be-done flags are in LSW | ||
70 | * - other flags in MSW | ||
71 | * Warning: layout of LSW is hardcoded in entry.S | ||
72 | */ | ||
73 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
74 | #define TIF_SIGPENDING 2 /* signal pending */ | ||
75 | #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ | ||
76 | #define TIF_SINGLESTEP 4 /* reenable singlestep on user return*/ | ||
77 | #define TIF_IRET 5 /* force IRET */ | ||
78 | #define TIF_SYSCALL_EMU 6 /* syscall emulation active */ | ||
79 | #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ | ||
80 | #define TIF_SECCOMP 8 /* secure computing */ | ||
81 | #define TIF_MCE_NOTIFY 10 /* notify userspace of an MCE */ | ||
82 | #define TIF_NOTSC 16 /* TSC is not accessible in userland */ | ||
83 | #define TIF_IA32 17 /* 32bit process */ | ||
84 | #define TIF_FORK 18 /* ret_from_fork */ | ||
85 | #define TIF_ABI_PENDING 19 | ||
86 | #define TIF_MEMDIE 20 | ||
87 | #define TIF_DEBUG 21 /* uses debug registers */ | ||
88 | #define TIF_IO_BITMAP 22 /* uses I/O bitmap */ | ||
89 | #define TIF_FREEZE 23 /* is freezing for suspend */ | ||
90 | #define TIF_FORCED_TF 24 /* true if TF in eflags artificially */ | ||
91 | #define TIF_DEBUGCTLMSR 25 /* uses thread_struct.debugctlmsr */ | ||
92 | #define TIF_DS_AREA_MSR 26 /* uses thread_struct.ds_area_msr */ | ||
93 | #define TIF_BTS_TRACE_TS 27 /* record scheduling event timestamps */ | ||
94 | |||
95 | #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) | ||
96 | #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) | ||
97 | #define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) | ||
98 | #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) | ||
99 | #define _TIF_IRET (1 << TIF_IRET) | ||
100 | #define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU) | ||
101 | #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) | ||
102 | #define _TIF_SECCOMP (1 << TIF_SECCOMP) | ||
103 | #define _TIF_MCE_NOTIFY (1 << TIF_MCE_NOTIFY) | ||
104 | #define _TIF_NOTSC (1 << TIF_NOTSC) | ||
105 | #define _TIF_IA32 (1 << TIF_IA32) | ||
106 | #define _TIF_FORK (1 << TIF_FORK) | ||
107 | #define _TIF_ABI_PENDING (1 << TIF_ABI_PENDING) | ||
108 | #define _TIF_DEBUG (1 << TIF_DEBUG) | ||
109 | #define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP) | ||
110 | #define _TIF_FREEZE (1 << TIF_FREEZE) | ||
111 | #define _TIF_FORCED_TF (1 << TIF_FORCED_TF) | ||
112 | #define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR) | ||
113 | #define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR) | ||
114 | #define _TIF_BTS_TRACE_TS (1 << TIF_BTS_TRACE_TS) | ||
115 | |||
116 | /* work to do in syscall_trace_enter() */ | ||
117 | #define _TIF_WORK_SYSCALL_ENTRY \ | ||
118 | (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_EMU | \ | ||
119 | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | _TIF_SINGLESTEP) | ||
120 | |||
121 | /* work to do in syscall_trace_leave() */ | ||
122 | #define _TIF_WORK_SYSCALL_EXIT \ | ||
123 | (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SINGLESTEP) | ||
124 | |||
125 | /* work to do on interrupt/exception return */ | ||
126 | #define _TIF_WORK_MASK \ | ||
127 | (0x0000FFFF & \ | ||
128 | ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT| \ | ||
129 | _TIF_SINGLESTEP|_TIF_SECCOMP|_TIF_SYSCALL_EMU)) | ||
130 | |||
131 | /* work to do on any return to user space */ | ||
132 | #define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP) | ||
133 | |||
134 | /* Only used for 64 bit */ | ||
135 | #define _TIF_DO_NOTIFY_MASK \ | ||
136 | (_TIF_SIGPENDING|_TIF_MCE_NOTIFY) | ||
137 | |||
138 | /* flags to check in __switch_to() */ | ||
139 | #define _TIF_WORK_CTXSW \ | ||
140 | (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_BTS_TRACE_TS| \ | ||
141 | _TIF_NOTSC) | ||
142 | |||
143 | #define _TIF_WORK_CTXSW_PREV _TIF_WORK_CTXSW | ||
144 | #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW|_TIF_DEBUG) | ||
145 | |||
146 | #define PREEMPT_ACTIVE 0x10000000 | ||
147 | |||
148 | /* thread information allocation */ | ||
149 | #ifdef CONFIG_DEBUG_STACK_USAGE | ||
150 | #define THREAD_FLAGS (GFP_KERNEL | __GFP_ZERO) | ||
4 | #else | 151 | #else |
5 | # include "thread_info_64.h" | 152 | #define THREAD_FLAGS GFP_KERNEL |
153 | #endif | ||
154 | |||
155 | #define alloc_thread_info(tsk) \ | ||
156 | ((struct thread_info *)__get_free_pages(THREAD_FLAGS, THREAD_ORDER)) | ||
157 | |||
158 | #ifdef CONFIG_X86_32 | ||
159 | |||
160 | #define STACK_WARN (THREAD_SIZE/8) | ||
161 | /* | ||
162 | * macros/functions for gaining access to the thread information structure | ||
163 | * | ||
164 | * preempt_count needs to be 1 initially, until the scheduler is functional. | ||
165 | */ | ||
166 | #ifndef __ASSEMBLY__ | ||
167 | |||
168 | |||
169 | /* how to get the current stack pointer from C */ | ||
170 | register unsigned long current_stack_pointer asm("esp") __used; | ||
171 | |||
172 | /* how to get the thread information struct from C */ | ||
173 | static inline struct thread_info *current_thread_info(void) | ||
174 | { | ||
175 | return (struct thread_info *) | ||
176 | (current_stack_pointer & ~(THREAD_SIZE - 1)); | ||
177 | } | ||
178 | |||
179 | #else /* !__ASSEMBLY__ */ | ||
180 | |||
181 | /* how to get the thread information struct from ASM */ | ||
182 | #define GET_THREAD_INFO(reg) \ | ||
183 | movl $-THREAD_SIZE, reg; \ | ||
184 | andl %esp, reg | ||
185 | |||
186 | /* use this one if reg already contains %esp */ | ||
187 | #define GET_THREAD_INFO_WITH_ESP(reg) \ | ||
188 | andl $-THREAD_SIZE, reg | ||
189 | |||
6 | #endif | 190 | #endif |
7 | 191 | ||
192 | #else /* X86_32 */ | ||
193 | |||
194 | #include <asm/pda.h> | ||
195 | |||
196 | /* | ||
197 | * macros/functions for gaining access to the thread information structure | ||
198 | * preempt_count needs to be 1 initially, until the scheduler is functional. | ||
199 | */ | ||
200 | #ifndef __ASSEMBLY__ | ||
201 | static inline struct thread_info *current_thread_info(void) | ||
202 | { | ||
203 | struct thread_info *ti; | ||
204 | ti = (void *)(read_pda(kernelstack) + PDA_STACKOFFSET - THREAD_SIZE); | ||
205 | return ti; | ||
206 | } | ||
207 | |||
208 | /* do not use in interrupt context */ | ||
209 | static inline struct thread_info *stack_thread_info(void) | ||
210 | { | ||
211 | struct thread_info *ti; | ||
212 | asm("andq %%rsp,%0; " : "=r" (ti) : "0" (~(THREAD_SIZE - 1))); | ||
213 | return ti; | ||
214 | } | ||
215 | |||
216 | #else /* !__ASSEMBLY__ */ | ||
217 | |||
218 | /* how to get the thread information struct from ASM */ | ||
219 | #define GET_THREAD_INFO(reg) \ | ||
220 | movq %gs:pda_kernelstack,reg ; \ | ||
221 | subq $(THREAD_SIZE-PDA_STACKOFFSET),reg | ||
222 | |||
223 | #endif | ||
224 | |||
225 | #endif /* !X86_32 */ | ||
226 | |||
227 | /* | ||
228 | * Thread-synchronous status. | ||
229 | * | ||
230 | * This is different from the flags in that nobody else | ||
231 | * ever touches our thread-synchronous status, so we don't | ||
232 | * have to worry about atomic accesses. | ||
233 | */ | ||
234 | #define TS_USEDFPU 0x0001 /* FPU was used by this task | ||
235 | this quantum (SMP) */ | ||
236 | #define TS_COMPAT 0x0002 /* 32bit syscall active (64BIT)*/ | ||
237 | #define TS_POLLING 0x0004 /* true if in idle loop | ||
238 | and not sleeping */ | ||
239 | #define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */ | ||
240 | |||
241 | #define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) | ||
242 | |||
243 | #ifndef __ASSEMBLY__ | ||
244 | #define HAVE_SET_RESTORE_SIGMASK 1 | ||
245 | static inline void set_restore_sigmask(void) | ||
246 | { | ||
247 | struct thread_info *ti = current_thread_info(); | ||
248 | ti->status |= TS_RESTORE_SIGMASK; | ||
249 | set_bit(TIF_SIGPENDING, (unsigned long *)&ti->flags); | ||
250 | } | ||
251 | #endif /* !__ASSEMBLY__ */ | ||
252 | |||
8 | #ifndef __ASSEMBLY__ | 253 | #ifndef __ASSEMBLY__ |
9 | extern void arch_task_cache_init(void); | 254 | extern void arch_task_cache_init(void); |
10 | extern void free_thread_info(struct thread_info *ti); | 255 | extern void free_thread_info(struct thread_info *ti); |
diff --git a/include/asm-x86/thread_info_32.h b/include/asm-x86/thread_info_32.h deleted file mode 100644 index b6338829d1a8..000000000000 --- a/include/asm-x86/thread_info_32.h +++ /dev/null | |||
@@ -1,205 +0,0 @@ | |||
1 | /* thread_info.h: i386 low-level thread information | ||
2 | * | ||
3 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) | ||
4 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller | ||
5 | */ | ||
6 | |||
7 | #ifndef _ASM_THREAD_INFO_H | ||
8 | #define _ASM_THREAD_INFO_H | ||
9 | |||
10 | #ifdef __KERNEL__ | ||
11 | |||
12 | #include <linux/compiler.h> | ||
13 | #include <asm/page.h> | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | #include <asm/processor.h> | ||
17 | #endif | ||
18 | |||
19 | /* | ||
20 | * low level task data that entry.S needs immediate access to | ||
21 | * - this struct should fit entirely inside of one cache line | ||
22 | * - this struct shares the supervisor stack pages | ||
23 | * - if the contents of this structure are changed, | ||
24 | * the assembly constants must also be changed | ||
25 | */ | ||
26 | #ifndef __ASSEMBLY__ | ||
27 | |||
28 | struct thread_info { | ||
29 | struct task_struct *task; /* main task structure */ | ||
30 | struct exec_domain *exec_domain; /* execution domain */ | ||
31 | unsigned long flags; /* low level flags */ | ||
32 | unsigned long status; /* thread-synchronous flags */ | ||
33 | __u32 cpu; /* current CPU */ | ||
34 | int preempt_count; /* 0 => preemptable, | ||
35 | <0 => BUG */ | ||
36 | mm_segment_t addr_limit; /* thread address space: | ||
37 | 0-0xBFFFFFFF user-thread | ||
38 | 0-0xFFFFFFFF kernel-thread | ||
39 | */ | ||
40 | void *sysenter_return; | ||
41 | struct restart_block restart_block; | ||
42 | unsigned long previous_esp; /* ESP of the previous stack in | ||
43 | case of nested (IRQ) stacks | ||
44 | */ | ||
45 | __u8 supervisor_stack[0]; | ||
46 | }; | ||
47 | |||
48 | #else /* !__ASSEMBLY__ */ | ||
49 | |||
50 | #include <asm/asm-offsets.h> | ||
51 | |||
52 | #endif | ||
53 | |||
54 | #define PREEMPT_ACTIVE 0x10000000 | ||
55 | #ifdef CONFIG_4KSTACKS | ||
56 | #define THREAD_SIZE (4096) | ||
57 | #else | ||
58 | #define THREAD_SIZE (8192) | ||
59 | #endif | ||
60 | |||
61 | #define STACK_WARN (THREAD_SIZE/8) | ||
62 | /* | ||
63 | * macros/functions for gaining access to the thread information structure | ||
64 | * | ||
65 | * preempt_count needs to be 1 initially, until the scheduler is functional. | ||
66 | */ | ||
67 | #ifndef __ASSEMBLY__ | ||
68 | |||
69 | #define INIT_THREAD_INFO(tsk) \ | ||
70 | { \ | ||
71 | .task = &tsk, \ | ||
72 | .exec_domain = &default_exec_domain, \ | ||
73 | .flags = 0, \ | ||
74 | .cpu = 0, \ | ||
75 | .preempt_count = 1, \ | ||
76 | .addr_limit = KERNEL_DS, \ | ||
77 | .restart_block = { \ | ||
78 | .fn = do_no_restart_syscall, \ | ||
79 | }, \ | ||
80 | } | ||
81 | |||
82 | #define init_thread_info (init_thread_union.thread_info) | ||
83 | #define init_stack (init_thread_union.stack) | ||
84 | |||
85 | |||
86 | /* how to get the current stack pointer from C */ | ||
87 | register unsigned long current_stack_pointer asm("esp") __used; | ||
88 | |||
89 | /* how to get the thread information struct from C */ | ||
90 | static inline struct thread_info *current_thread_info(void) | ||
91 | { | ||
92 | return (struct thread_info *) | ||
93 | (current_stack_pointer & ~(THREAD_SIZE - 1)); | ||
94 | } | ||
95 | |||
96 | /* thread information allocation */ | ||
97 | #ifdef CONFIG_DEBUG_STACK_USAGE | ||
98 | #define alloc_thread_info(tsk) ((struct thread_info *) \ | ||
99 | __get_free_pages(GFP_KERNEL | __GFP_ZERO, get_order(THREAD_SIZE))) | ||
100 | #else | ||
101 | #define alloc_thread_info(tsk) ((struct thread_info *) \ | ||
102 | __get_free_pages(GFP_KERNEL, get_order(THREAD_SIZE))) | ||
103 | #endif | ||
104 | |||
105 | #else /* !__ASSEMBLY__ */ | ||
106 | |||
107 | /* how to get the thread information struct from ASM */ | ||
108 | #define GET_THREAD_INFO(reg) \ | ||
109 | movl $-THREAD_SIZE, reg; \ | ||
110 | andl %esp, reg | ||
111 | |||
112 | /* use this one if reg already contains %esp */ | ||
113 | #define GET_THREAD_INFO_WITH_ESP(reg) \ | ||
114 | andl $-THREAD_SIZE, reg | ||
115 | |||
116 | #endif | ||
117 | |||
118 | /* | ||
119 | * thread information flags | ||
120 | * - these are process state flags that various | ||
121 | * assembly files may need to access | ||
122 | * - pending work-to-be-done flags are in LSW | ||
123 | * - other flags in MSW | ||
124 | */ | ||
125 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
126 | #define TIF_SIGPENDING 1 /* signal pending */ | ||
127 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ | ||
128 | #define TIF_SINGLESTEP 3 /* restore singlestep on return to | ||
129 | user mode */ | ||
130 | #define TIF_IRET 4 /* return with iret */ | ||
131 | #define TIF_SYSCALL_EMU 5 /* syscall emulation active */ | ||
132 | #define TIF_SYSCALL_AUDIT 6 /* syscall auditing active */ | ||
133 | #define TIF_SECCOMP 7 /* secure computing */ | ||
134 | #define TIF_HRTICK_RESCHED 9 /* reprogram hrtick timer */ | ||
135 | #define TIF_MEMDIE 16 | ||
136 | #define TIF_DEBUG 17 /* uses debug registers */ | ||
137 | #define TIF_IO_BITMAP 18 /* uses I/O bitmap */ | ||
138 | #define TIF_FREEZE 19 /* is freezing for suspend */ | ||
139 | #define TIF_NOTSC 20 /* TSC is not accessible in userland */ | ||
140 | #define TIF_FORCED_TF 21 /* true if TF in eflags artificially */ | ||
141 | #define TIF_DEBUGCTLMSR 22 /* uses thread_struct.debugctlmsr */ | ||
142 | #define TIF_DS_AREA_MSR 23 /* uses thread_struct.ds_area_msr */ | ||
143 | #define TIF_BTS_TRACE_TS 24 /* record scheduling event timestamps */ | ||
144 | |||
145 | #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) | ||
146 | #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) | ||
147 | #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) | ||
148 | #define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) | ||
149 | #define _TIF_IRET (1 << TIF_IRET) | ||
150 | #define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU) | ||
151 | #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) | ||
152 | #define _TIF_SECCOMP (1 << TIF_SECCOMP) | ||
153 | #define _TIF_HRTICK_RESCHED (1 << TIF_HRTICK_RESCHED) | ||
154 | #define _TIF_DEBUG (1 << TIF_DEBUG) | ||
155 | #define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP) | ||
156 | #define _TIF_FREEZE (1 << TIF_FREEZE) | ||
157 | #define _TIF_NOTSC (1 << TIF_NOTSC) | ||
158 | #define _TIF_FORCED_TF (1 << TIF_FORCED_TF) | ||
159 | #define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR) | ||
160 | #define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR) | ||
161 | #define _TIF_BTS_TRACE_TS (1 << TIF_BTS_TRACE_TS) | ||
162 | |||
163 | /* work to do on interrupt/exception return */ | ||
164 | #define _TIF_WORK_MASK \ | ||
165 | (0x0000FFFF & ~(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ | ||
166 | _TIF_SECCOMP | _TIF_SYSCALL_EMU)) | ||
167 | /* work to do on any return to u-space */ | ||
168 | #define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP) | ||
169 | |||
170 | /* flags to check in __switch_to() */ | ||
171 | #define _TIF_WORK_CTXSW \ | ||
172 | (_TIF_IO_BITMAP | _TIF_NOTSC | _TIF_DEBUGCTLMSR | \ | ||
173 | _TIF_DS_AREA_MSR | _TIF_BTS_TRACE_TS) | ||
174 | #define _TIF_WORK_CTXSW_PREV _TIF_WORK_CTXSW | ||
175 | #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW | _TIF_DEBUG) | ||
176 | |||
177 | |||
178 | /* | ||
179 | * Thread-synchronous status. | ||
180 | * | ||
181 | * This is different from the flags in that nobody else | ||
182 | * ever touches our thread-synchronous status, so we don't | ||
183 | * have to worry about atomic accesses. | ||
184 | */ | ||
185 | #define TS_USEDFPU 0x0001 /* FPU was used by this task | ||
186 | this quantum (SMP) */ | ||
187 | #define TS_POLLING 0x0002 /* True if in idle loop | ||
188 | and not sleeping */ | ||
189 | #define TS_RESTORE_SIGMASK 0x0004 /* restore signal mask in do_signal() */ | ||
190 | |||
191 | #define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) | ||
192 | |||
193 | #ifndef __ASSEMBLY__ | ||
194 | #define HAVE_SET_RESTORE_SIGMASK 1 | ||
195 | static inline void set_restore_sigmask(void) | ||
196 | { | ||
197 | struct thread_info *ti = current_thread_info(); | ||
198 | ti->status |= TS_RESTORE_SIGMASK; | ||
199 | set_bit(TIF_SIGPENDING, &ti->flags); | ||
200 | } | ||
201 | #endif /* !__ASSEMBLY__ */ | ||
202 | |||
203 | #endif /* __KERNEL__ */ | ||
204 | |||
205 | #endif /* _ASM_THREAD_INFO_H */ | ||
diff --git a/include/asm-x86/thread_info_64.h b/include/asm-x86/thread_info_64.h deleted file mode 100644 index cb69f70abba1..000000000000 --- a/include/asm-x86/thread_info_64.h +++ /dev/null | |||
@@ -1,195 +0,0 @@ | |||
1 | /* thread_info.h: x86_64 low-level thread information | ||
2 | * | ||
3 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) | ||
4 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller | ||
5 | */ | ||
6 | |||
7 | #ifndef _ASM_THREAD_INFO_H | ||
8 | #define _ASM_THREAD_INFO_H | ||
9 | |||
10 | #ifdef __KERNEL__ | ||
11 | |||
12 | #include <asm/page.h> | ||
13 | #include <asm/types.h> | ||
14 | #include <asm/pda.h> | ||
15 | |||
16 | /* | ||
17 | * low level task data that entry.S needs immediate access to | ||
18 | * - this struct should fit entirely inside of one cache line | ||
19 | * - this struct shares the supervisor stack pages | ||
20 | */ | ||
21 | #ifndef __ASSEMBLY__ | ||
22 | struct task_struct; | ||
23 | struct exec_domain; | ||
24 | #include <asm/processor.h> | ||
25 | |||
26 | struct thread_info { | ||
27 | struct task_struct *task; /* main task structure */ | ||
28 | struct exec_domain *exec_domain; /* execution domain */ | ||
29 | __u32 flags; /* low level flags */ | ||
30 | __u32 status; /* thread synchronous flags */ | ||
31 | __u32 cpu; /* current CPU */ | ||
32 | int preempt_count; /* 0 => preemptable, | ||
33 | <0 => BUG */ | ||
34 | mm_segment_t addr_limit; | ||
35 | struct restart_block restart_block; | ||
36 | #ifdef CONFIG_IA32_EMULATION | ||
37 | void __user *sysenter_return; | ||
38 | #endif | ||
39 | }; | ||
40 | #endif | ||
41 | |||
42 | /* | ||
43 | * macros/functions for gaining access to the thread information structure | ||
44 | * preempt_count needs to be 1 initially, until the scheduler is functional. | ||
45 | */ | ||
46 | #ifndef __ASSEMBLY__ | ||
47 | #define INIT_THREAD_INFO(tsk) \ | ||
48 | { \ | ||
49 | .task = &tsk, \ | ||
50 | .exec_domain = &default_exec_domain, \ | ||
51 | .flags = 0, \ | ||
52 | .cpu = 0, \ | ||
53 | .preempt_count = 1, \ | ||
54 | .addr_limit = KERNEL_DS, \ | ||
55 | .restart_block = { \ | ||
56 | .fn = do_no_restart_syscall, \ | ||
57 | }, \ | ||
58 | } | ||
59 | |||
60 | #define init_thread_info (init_thread_union.thread_info) | ||
61 | #define init_stack (init_thread_union.stack) | ||
62 | |||
63 | static inline struct thread_info *current_thread_info(void) | ||
64 | { | ||
65 | struct thread_info *ti; | ||
66 | ti = (void *)(read_pda(kernelstack) + PDA_STACKOFFSET - THREAD_SIZE); | ||
67 | return ti; | ||
68 | } | ||
69 | |||
70 | /* do not use in interrupt context */ | ||
71 | static inline struct thread_info *stack_thread_info(void) | ||
72 | { | ||
73 | struct thread_info *ti; | ||
74 | asm("andq %%rsp,%0; " : "=r" (ti) : "0" (~(THREAD_SIZE - 1))); | ||
75 | return ti; | ||
76 | } | ||
77 | |||
78 | /* thread information allocation */ | ||
79 | #ifdef CONFIG_DEBUG_STACK_USAGE | ||
80 | #define THREAD_FLAGS (GFP_KERNEL | __GFP_ZERO) | ||
81 | #else | ||
82 | #define THREAD_FLAGS GFP_KERNEL | ||
83 | #endif | ||
84 | |||
85 | #define alloc_thread_info(tsk) \ | ||
86 | ((struct thread_info *)__get_free_pages(THREAD_FLAGS, THREAD_ORDER)) | ||
87 | |||
88 | #else /* !__ASSEMBLY__ */ | ||
89 | |||
90 | /* how to get the thread information struct from ASM */ | ||
91 | #define GET_THREAD_INFO(reg) \ | ||
92 | movq %gs:pda_kernelstack,reg ; \ | ||
93 | subq $(THREAD_SIZE-PDA_STACKOFFSET),reg | ||
94 | |||
95 | #endif | ||
96 | |||
97 | /* | ||
98 | * thread information flags | ||
99 | * - these are process state flags that various assembly files | ||
100 | * may need to access | ||
101 | * - pending work-to-be-done flags are in LSW | ||
102 | * - other flags in MSW | ||
103 | * Warning: layout of LSW is hardcoded in entry.S | ||
104 | */ | ||
105 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
106 | #define TIF_SIGPENDING 2 /* signal pending */ | ||
107 | #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ | ||
108 | #define TIF_SINGLESTEP 4 /* reenable singlestep on user return*/ | ||
109 | #define TIF_IRET 5 /* force IRET */ | ||
110 | #define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ | ||
111 | #define TIF_SECCOMP 8 /* secure computing */ | ||
112 | #define TIF_MCE_NOTIFY 10 /* notify userspace of an MCE */ | ||
113 | #define TIF_HRTICK_RESCHED 11 /* reprogram hrtick timer */ | ||
114 | /* 16 free */ | ||
115 | #define TIF_IA32 17 /* 32bit process */ | ||
116 | #define TIF_FORK 18 /* ret_from_fork */ | ||
117 | #define TIF_ABI_PENDING 19 | ||
118 | #define TIF_MEMDIE 20 | ||
119 | #define TIF_DEBUG 21 /* uses debug registers */ | ||
120 | #define TIF_IO_BITMAP 22 /* uses I/O bitmap */ | ||
121 | #define TIF_FREEZE 23 /* is freezing for suspend */ | ||
122 | #define TIF_FORCED_TF 24 /* true if TF in eflags artificially */ | ||
123 | #define TIF_DEBUGCTLMSR 25 /* uses thread_struct.debugctlmsr */ | ||
124 | #define TIF_DS_AREA_MSR 26 /* uses thread_struct.ds_area_msr */ | ||
125 | #define TIF_BTS_TRACE_TS 27 /* record scheduling event timestamps */ | ||
126 | #define TIF_NOTSC 28 /* TSC is not accessible in userland */ | ||
127 | |||
128 | #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) | ||
129 | #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) | ||
130 | #define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) | ||
131 | #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) | ||
132 | #define _TIF_IRET (1 << TIF_IRET) | ||
133 | #define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) | ||
134 | #define _TIF_SECCOMP (1 << TIF_SECCOMP) | ||
135 | #define _TIF_MCE_NOTIFY (1 << TIF_MCE_NOTIFY) | ||
136 | #define _TIF_HRTICK_RESCHED (1 << TIF_HRTICK_RESCHED) | ||
137 | #define _TIF_IA32 (1 << TIF_IA32) | ||
138 | #define _TIF_FORK (1 << TIF_FORK) | ||
139 | #define _TIF_ABI_PENDING (1 << TIF_ABI_PENDING) | ||
140 | #define _TIF_DEBUG (1 << TIF_DEBUG) | ||
141 | #define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP) | ||
142 | #define _TIF_FREEZE (1 << TIF_FREEZE) | ||
143 | #define _TIF_FORCED_TF (1 << TIF_FORCED_TF) | ||
144 | #define _TIF_DEBUGCTLMSR (1 << TIF_DEBUGCTLMSR) | ||
145 | #define _TIF_DS_AREA_MSR (1 << TIF_DS_AREA_MSR) | ||
146 | #define _TIF_BTS_TRACE_TS (1 << TIF_BTS_TRACE_TS) | ||
147 | #define _TIF_NOTSC (1 << TIF_NOTSC) | ||
148 | |||
149 | /* work to do on interrupt/exception return */ | ||
150 | #define _TIF_WORK_MASK \ | ||
151 | (0x0000FFFF & \ | ||
152 | ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP|_TIF_SECCOMP)) | ||
153 | /* work to do on any return to user space */ | ||
154 | #define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP) | ||
155 | |||
156 | #define _TIF_DO_NOTIFY_MASK \ | ||
157 | (_TIF_SIGPENDING|_TIF_SINGLESTEP|_TIF_MCE_NOTIFY|_TIF_HRTICK_RESCHED) | ||
158 | |||
159 | /* flags to check in __switch_to() */ | ||
160 | #define _TIF_WORK_CTXSW \ | ||
161 | (_TIF_IO_BITMAP|_TIF_DEBUGCTLMSR|_TIF_DS_AREA_MSR|_TIF_BTS_TRACE_TS|_TIF_NOTSC) | ||
162 | #define _TIF_WORK_CTXSW_PREV _TIF_WORK_CTXSW | ||
163 | #define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW|_TIF_DEBUG) | ||
164 | |||
165 | #define PREEMPT_ACTIVE 0x10000000 | ||
166 | |||
167 | /* | ||
168 | * Thread-synchronous status. | ||
169 | * | ||
170 | * This is different from the flags in that nobody else | ||
171 | * ever touches our thread-synchronous status, so we don't | ||
172 | * have to worry about atomic accesses. | ||
173 | */ | ||
174 | #define TS_USEDFPU 0x0001 /* FPU was used by this task | ||
175 | this quantum (SMP) */ | ||
176 | #define TS_COMPAT 0x0002 /* 32bit syscall active */ | ||
177 | #define TS_POLLING 0x0004 /* true if in idle loop | ||
178 | and not sleeping */ | ||
179 | #define TS_RESTORE_SIGMASK 0x0008 /* restore signal mask in do_signal() */ | ||
180 | |||
181 | #define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) | ||
182 | |||
183 | #ifndef __ASSEMBLY__ | ||
184 | #define HAVE_SET_RESTORE_SIGMASK 1 | ||
185 | static inline void set_restore_sigmask(void) | ||
186 | { | ||
187 | struct thread_info *ti = current_thread_info(); | ||
188 | ti->status |= TS_RESTORE_SIGMASK; | ||
189 | set_bit(TIF_SIGPENDING, &ti->flags); | ||
190 | } | ||
191 | #endif /* !__ASSEMBLY__ */ | ||
192 | |||
193 | #endif /* __KERNEL__ */ | ||
194 | |||
195 | #endif /* _ASM_THREAD_INFO_H */ | ||
diff --git a/include/asm-x86/time.h b/include/asm-x86/time.h index bce72d7a958c..a17fa473e91d 100644 --- a/include/asm-x86/time.h +++ b/include/asm-x86/time.h | |||
@@ -56,4 +56,6 @@ static inline int native_set_wallclock(unsigned long nowtime) | |||
56 | 56 | ||
57 | #endif /* CONFIG_PARAVIRT */ | 57 | #endif /* CONFIG_PARAVIRT */ |
58 | 58 | ||
59 | extern unsigned long __init calibrate_cpu(void); | ||
60 | |||
59 | #endif | 61 | #endif |
diff --git a/include/asm-x86/timer.h b/include/asm-x86/timer.h index 4f6fcb050c11..fb2a4ddddf3d 100644 --- a/include/asm-x86/timer.h +++ b/include/asm-x86/timer.h | |||
@@ -7,14 +7,14 @@ | |||
7 | #define TICK_SIZE (tick_nsec / 1000) | 7 | #define TICK_SIZE (tick_nsec / 1000) |
8 | 8 | ||
9 | unsigned long long native_sched_clock(void); | 9 | unsigned long long native_sched_clock(void); |
10 | unsigned long native_calculate_cpu_khz(void); | 10 | unsigned long native_calibrate_tsc(void); |
11 | 11 | ||
12 | extern int timer_ack; | 12 | extern int timer_ack; |
13 | extern int no_timer_check; | 13 | extern int no_timer_check; |
14 | extern int recalibrate_cpu_khz(void); | 14 | extern int recalibrate_cpu_khz(void); |
15 | 15 | ||
16 | #ifndef CONFIG_PARAVIRT | 16 | #ifndef CONFIG_PARAVIRT |
17 | #define calculate_cpu_khz() native_calculate_cpu_khz() | 17 | #define calibrate_tsc() native_calibrate_tsc() |
18 | #endif | 18 | #endif |
19 | 19 | ||
20 | /* Accelerators for sched_clock() | 20 | /* Accelerators for sched_clock() |
diff --git a/include/asm-x86/topology.h b/include/asm-x86/topology.h index dcf3f8131d6b..90ac7718469a 100644 --- a/include/asm-x86/topology.h +++ b/include/asm-x86/topology.h | |||
@@ -35,79 +35,93 @@ | |||
35 | # endif | 35 | # endif |
36 | #endif | 36 | #endif |
37 | 37 | ||
38 | /* Node not present */ | ||
39 | #define NUMA_NO_NODE (-1) | ||
40 | |||
38 | #ifdef CONFIG_NUMA | 41 | #ifdef CONFIG_NUMA |
39 | #include <linux/cpumask.h> | 42 | #include <linux/cpumask.h> |
40 | #include <asm/mpspec.h> | 43 | #include <asm/mpspec.h> |
41 | 44 | ||
42 | /* Mappings between logical cpu number and node number */ | ||
43 | #ifdef CONFIG_X86_32 | 45 | #ifdef CONFIG_X86_32 |
44 | extern int cpu_to_node_map[]; | ||
45 | #else | ||
46 | /* Returns the number of the current Node. */ | ||
47 | #define numa_node_id() (early_cpu_to_node(raw_smp_processor_id())) | ||
48 | #endif | ||
49 | |||
50 | DECLARE_PER_CPU(int, x86_cpu_to_node_map); | ||
51 | |||
52 | #ifdef CONFIG_SMP | ||
53 | extern int x86_cpu_to_node_map_init[]; | ||
54 | extern void *x86_cpu_to_node_map_early_ptr; | ||
55 | #else | ||
56 | #define x86_cpu_to_node_map_early_ptr NULL | ||
57 | #endif | ||
58 | 46 | ||
47 | /* Mappings between node number and cpus on that node. */ | ||
59 | extern cpumask_t node_to_cpumask_map[]; | 48 | extern cpumask_t node_to_cpumask_map[]; |
60 | 49 | ||
61 | #define NUMA_NO_NODE (-1) | 50 | /* Mappings between logical cpu number and node number */ |
51 | extern int cpu_to_node_map[]; | ||
62 | 52 | ||
63 | /* Returns the number of the node containing CPU 'cpu' */ | 53 | /* Returns the number of the node containing CPU 'cpu' */ |
64 | #ifdef CONFIG_X86_32 | ||
65 | #define early_cpu_to_node(cpu) cpu_to_node(cpu) | ||
66 | static inline int cpu_to_node(int cpu) | 54 | static inline int cpu_to_node(int cpu) |
67 | { | 55 | { |
68 | return cpu_to_node_map[cpu]; | 56 | return cpu_to_node_map[cpu]; |
69 | } | 57 | } |
58 | #define early_cpu_to_node(cpu) cpu_to_node(cpu) | ||
70 | 59 | ||
71 | #else /* CONFIG_X86_64 */ | 60 | /* Returns a bitmask of CPUs on Node 'node'. |
72 | 61 | * | |
73 | #ifdef CONFIG_SMP | 62 | * Side note: this function creates the returned cpumask on the stack |
74 | static inline int early_cpu_to_node(int cpu) | 63 | * so with a high NR_CPUS count, excessive stack space is used. The |
64 | * node_to_cpumask_ptr function should be used whenever possible. | ||
65 | */ | ||
66 | static inline cpumask_t node_to_cpumask(int node) | ||
75 | { | 67 | { |
76 | int *cpu_to_node_map = x86_cpu_to_node_map_early_ptr; | 68 | return node_to_cpumask_map[node]; |
77 | |||
78 | if (cpu_to_node_map) | ||
79 | return cpu_to_node_map[cpu]; | ||
80 | else if (per_cpu_offset(cpu)) | ||
81 | return per_cpu(x86_cpu_to_node_map, cpu); | ||
82 | else | ||
83 | return NUMA_NO_NODE; | ||
84 | } | 69 | } |
85 | #else | ||
86 | #define early_cpu_to_node(cpu) cpu_to_node(cpu) | ||
87 | #endif | ||
88 | 70 | ||
71 | #else /* CONFIG_X86_64 */ | ||
72 | |||
73 | /* Mappings between node number and cpus on that node. */ | ||
74 | extern cpumask_t *node_to_cpumask_map; | ||
75 | |||
76 | /* Mappings between logical cpu number and node number */ | ||
77 | DECLARE_EARLY_PER_CPU(int, x86_cpu_to_node_map); | ||
78 | |||
79 | /* Returns the number of the current Node. */ | ||
80 | #define numa_node_id() read_pda(nodenumber) | ||
81 | |||
82 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS | ||
83 | extern int cpu_to_node(int cpu); | ||
84 | extern int early_cpu_to_node(int cpu); | ||
85 | extern const cpumask_t *_node_to_cpumask_ptr(int node); | ||
86 | extern cpumask_t node_to_cpumask(int node); | ||
87 | |||
88 | #else /* !CONFIG_DEBUG_PER_CPU_MAPS */ | ||
89 | |||
90 | /* Returns the number of the node containing CPU 'cpu' */ | ||
89 | static inline int cpu_to_node(int cpu) | 91 | static inline int cpu_to_node(int cpu) |
90 | { | 92 | { |
91 | #ifdef CONFIG_DEBUG_PER_CPU_MAPS | ||
92 | if (x86_cpu_to_node_map_early_ptr) { | ||
93 | printk("KERN_NOTICE cpu_to_node(%d): usage too early!\n", | ||
94 | (int)cpu); | ||
95 | dump_stack(); | ||
96 | return ((int *)x86_cpu_to_node_map_early_ptr)[cpu]; | ||
97 | } | ||
98 | #endif | ||
99 | return per_cpu(x86_cpu_to_node_map, cpu); | 93 | return per_cpu(x86_cpu_to_node_map, cpu); |
100 | } | 94 | } |
101 | 95 | ||
102 | #ifdef CONFIG_NUMA | 96 | /* Same function but used if called before per_cpu areas are setup */ |
97 | static inline int early_cpu_to_node(int cpu) | ||
98 | { | ||
99 | if (early_per_cpu_ptr(x86_cpu_to_node_map)) | ||
100 | return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu]; | ||
101 | |||
102 | return per_cpu(x86_cpu_to_node_map, cpu); | ||
103 | } | ||
103 | 104 | ||
104 | /* Returns a pointer to the cpumask of CPUs on Node 'node'. */ | 105 | /* Returns a pointer to the cpumask of CPUs on Node 'node'. */ |
106 | static inline const cpumask_t *_node_to_cpumask_ptr(int node) | ||
107 | { | ||
108 | return &node_to_cpumask_map[node]; | ||
109 | } | ||
110 | |||
111 | /* Returns a bitmask of CPUs on Node 'node'. */ | ||
112 | static inline cpumask_t node_to_cpumask(int node) | ||
113 | { | ||
114 | return node_to_cpumask_map[node]; | ||
115 | } | ||
116 | |||
117 | #endif /* !CONFIG_DEBUG_PER_CPU_MAPS */ | ||
118 | |||
119 | /* Replace default node_to_cpumask_ptr with optimized version */ | ||
105 | #define node_to_cpumask_ptr(v, node) \ | 120 | #define node_to_cpumask_ptr(v, node) \ |
106 | cpumask_t *v = &(node_to_cpumask_map[node]) | 121 | const cpumask_t *v = _node_to_cpumask_ptr(node) |
107 | 122 | ||
108 | #define node_to_cpumask_ptr_next(v, node) \ | 123 | #define node_to_cpumask_ptr_next(v, node) \ |
109 | v = &(node_to_cpumask_map[node]) | 124 | v = _node_to_cpumask_ptr(node) |
110 | #endif | ||
111 | 125 | ||
112 | #endif /* CONFIG_X86_64 */ | 126 | #endif /* CONFIG_X86_64 */ |
113 | 127 | ||
@@ -117,20 +131,6 @@ static inline int cpu_to_node(int cpu) | |||
117 | */ | 131 | */ |
118 | #define parent_node(node) (node) | 132 | #define parent_node(node) (node) |
119 | 133 | ||
120 | /* Returns a bitmask of CPUs on Node 'node'. */ | ||
121 | static inline cpumask_t node_to_cpumask(int node) | ||
122 | { | ||
123 | return node_to_cpumask_map[node]; | ||
124 | } | ||
125 | |||
126 | /* Returns the number of the first CPU on Node 'node'. */ | ||
127 | static inline int node_to_first_cpu(int node) | ||
128 | { | ||
129 | cpumask_t mask = node_to_cpumask(node); | ||
130 | |||
131 | return first_cpu(mask); | ||
132 | } | ||
133 | |||
134 | #define pcibus_to_node(bus) __pcibus_to_node(bus) | 134 | #define pcibus_to_node(bus) __pcibus_to_node(bus) |
135 | #define pcibus_to_cpumask(bus) __pcibus_to_cpumask(bus) | 135 | #define pcibus_to_cpumask(bus) __pcibus_to_cpumask(bus) |
136 | 136 | ||
@@ -180,12 +180,44 @@ extern int __node_distance(int, int); | |||
180 | #define node_distance(a, b) __node_distance(a, b) | 180 | #define node_distance(a, b) __node_distance(a, b) |
181 | #endif | 181 | #endif |
182 | 182 | ||
183 | #else /* CONFIG_NUMA */ | 183 | #else /* !CONFIG_NUMA */ |
184 | 184 | ||
185 | #define numa_node_id() 0 | ||
186 | #define cpu_to_node(cpu) 0 | ||
187 | #define early_cpu_to_node(cpu) 0 | ||
188 | |||
189 | static inline const cpumask_t *_node_to_cpumask_ptr(int node) | ||
190 | { | ||
191 | return &cpu_online_map; | ||
192 | } | ||
193 | static inline cpumask_t node_to_cpumask(int node) | ||
194 | { | ||
195 | return cpu_online_map; | ||
196 | } | ||
197 | static inline int node_to_first_cpu(int node) | ||
198 | { | ||
199 | return first_cpu(cpu_online_map); | ||
200 | } | ||
201 | |||
202 | /* Replace default node_to_cpumask_ptr with optimized version */ | ||
203 | #define node_to_cpumask_ptr(v, node) \ | ||
204 | const cpumask_t *v = _node_to_cpumask_ptr(node) | ||
205 | |||
206 | #define node_to_cpumask_ptr_next(v, node) \ | ||
207 | v = _node_to_cpumask_ptr(node) | ||
185 | #endif | 208 | #endif |
186 | 209 | ||
187 | #include <asm-generic/topology.h> | 210 | #include <asm-generic/topology.h> |
188 | 211 | ||
212 | #ifdef CONFIG_NUMA | ||
213 | /* Returns the number of the first CPU on Node 'node'. */ | ||
214 | static inline int node_to_first_cpu(int node) | ||
215 | { | ||
216 | node_to_cpumask_ptr(mask, node); | ||
217 | return first_cpu(*mask); | ||
218 | } | ||
219 | #endif | ||
220 | |||
189 | extern cpumask_t cpu_coregroup_map(int cpu); | 221 | extern cpumask_t cpu_coregroup_map(int cpu); |
190 | 222 | ||
191 | #ifdef ENABLE_TOPO_DEFINES | 223 | #ifdef ENABLE_TOPO_DEFINES |
@@ -193,6 +225,9 @@ extern cpumask_t cpu_coregroup_map(int cpu); | |||
193 | #define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id) | 225 | #define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id) |
194 | #define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu)) | 226 | #define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu)) |
195 | #define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) | 227 | #define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) |
228 | |||
229 | /* indicates that pointers to the topology cpumask_t maps are valid */ | ||
230 | #define arch_provides_topology_pointers yes | ||
196 | #endif | 231 | #endif |
197 | 232 | ||
198 | static inline void arch_fix_phys_package_id(int num, u32 slot) | 233 | static inline void arch_fix_phys_package_id(int num, u32 slot) |
@@ -220,4 +255,4 @@ static inline void set_mp_bus_to_node(int busnum, int node) | |||
220 | } | 255 | } |
221 | #endif | 256 | #endif |
222 | 257 | ||
223 | #endif | 258 | #endif /* _ASM_X86_TOPOLOGY_H */ |
diff --git a/include/asm-x86/traps.h b/include/asm-x86/traps.h new file mode 100644 index 000000000000..a4b65a71bd66 --- /dev/null +++ b/include/asm-x86/traps.h | |||
@@ -0,0 +1,66 @@ | |||
1 | #ifndef _ASM_X86_TRAPS_H | ||
2 | #define _ASM_X86_TRAPS_H | ||
3 | |||
4 | /* Common in X86_32 and X86_64 */ | ||
5 | asmlinkage void divide_error(void); | ||
6 | asmlinkage void debug(void); | ||
7 | asmlinkage void nmi(void); | ||
8 | asmlinkage void int3(void); | ||
9 | asmlinkage void overflow(void); | ||
10 | asmlinkage void bounds(void); | ||
11 | asmlinkage void invalid_op(void); | ||
12 | asmlinkage void device_not_available(void); | ||
13 | asmlinkage void coprocessor_segment_overrun(void); | ||
14 | asmlinkage void invalid_TSS(void); | ||
15 | asmlinkage void segment_not_present(void); | ||
16 | asmlinkage void stack_segment(void); | ||
17 | asmlinkage void general_protection(void); | ||
18 | asmlinkage void page_fault(void); | ||
19 | asmlinkage void coprocessor_error(void); | ||
20 | asmlinkage void simd_coprocessor_error(void); | ||
21 | asmlinkage void alignment_check(void); | ||
22 | asmlinkage void spurious_interrupt_bug(void); | ||
23 | #ifdef CONFIG_X86_MCE | ||
24 | asmlinkage void machine_check(void); | ||
25 | #endif /* CONFIG_X86_MCE */ | ||
26 | |||
27 | void do_divide_error(struct pt_regs *, long); | ||
28 | void do_overflow(struct pt_regs *, long); | ||
29 | void do_bounds(struct pt_regs *, long); | ||
30 | void do_coprocessor_segment_overrun(struct pt_regs *, long); | ||
31 | void do_invalid_TSS(struct pt_regs *, long); | ||
32 | void do_segment_not_present(struct pt_regs *, long); | ||
33 | void do_stack_segment(struct pt_regs *, long); | ||
34 | void do_alignment_check(struct pt_regs *, long); | ||
35 | void do_invalid_op(struct pt_regs *, long); | ||
36 | void do_general_protection(struct pt_regs *, long); | ||
37 | void do_nmi(struct pt_regs *, long); | ||
38 | |||
39 | extern int panic_on_unrecovered_nmi; | ||
40 | extern int kstack_depth_to_print; | ||
41 | |||
42 | #ifdef CONFIG_X86_32 | ||
43 | |||
44 | void do_iret_error(struct pt_regs *, long); | ||
45 | void do_int3(struct pt_regs *, long); | ||
46 | void do_debug(struct pt_regs *, long); | ||
47 | void math_error(void __user *); | ||
48 | void do_coprocessor_error(struct pt_regs *, long); | ||
49 | void do_simd_coprocessor_error(struct pt_regs *, long); | ||
50 | void do_spurious_interrupt_bug(struct pt_regs *, long); | ||
51 | unsigned long patch_espfix_desc(unsigned long, unsigned long); | ||
52 | asmlinkage void math_emulate(long); | ||
53 | |||
54 | #else /* CONFIG_X86_32 */ | ||
55 | |||
56 | asmlinkage void double_fault(void); | ||
57 | |||
58 | asmlinkage void do_int3(struct pt_regs *, long); | ||
59 | asmlinkage void do_stack_segment(struct pt_regs *, long); | ||
60 | asmlinkage void do_debug(struct pt_regs *, unsigned long); | ||
61 | asmlinkage void do_coprocessor_error(struct pt_regs *); | ||
62 | asmlinkage void do_simd_coprocessor_error(struct pt_regs *); | ||
63 | asmlinkage void do_spurious_interrupt_bug(struct pt_regs *); | ||
64 | |||
65 | #endif /* CONFIG_X86_32 */ | ||
66 | #endif /* _ASM_X86_TRAPS_H */ | ||
diff --git a/include/asm-x86/tsc.h b/include/asm-x86/tsc.h index 548873ab5fc1..cb6f6ee45b8f 100644 --- a/include/asm-x86/tsc.h +++ b/include/asm-x86/tsc.h | |||
@@ -48,7 +48,6 @@ static __always_inline cycles_t vget_cycles(void) | |||
48 | extern void tsc_init(void); | 48 | extern void tsc_init(void); |
49 | extern void mark_tsc_unstable(char *reason); | 49 | extern void mark_tsc_unstable(char *reason); |
50 | extern int unsynchronized_tsc(void); | 50 | extern int unsynchronized_tsc(void); |
51 | extern void init_tsc_clocksource(void); | ||
52 | int check_tsc_unstable(void); | 51 | int check_tsc_unstable(void); |
53 | 52 | ||
54 | /* | 53 | /* |
@@ -58,7 +57,6 @@ int check_tsc_unstable(void); | |||
58 | extern void check_tsc_sync_source(int cpu); | 57 | extern void check_tsc_sync_source(int cpu); |
59 | extern void check_tsc_sync_target(void); | 58 | extern void check_tsc_sync_target(void); |
60 | 59 | ||
61 | extern void tsc_calibrate(void); | ||
62 | extern int notsc_setup(char *); | 60 | extern int notsc_setup(char *); |
63 | 61 | ||
64 | #endif | 62 | #endif |
diff --git a/include/asm-x86/uaccess.h b/include/asm-x86/uaccess.h index 9fefd2947e78..f6fa4d841bbc 100644 --- a/include/asm-x86/uaccess.h +++ b/include/asm-x86/uaccess.h | |||
@@ -1,5 +1,453 @@ | |||
1 | #ifndef _ASM_UACCES_H_ | ||
2 | #define _ASM_UACCES_H_ | ||
3 | /* | ||
4 | * User space memory access functions | ||
5 | */ | ||
6 | #include <linux/errno.h> | ||
7 | #include <linux/compiler.h> | ||
8 | #include <linux/thread_info.h> | ||
9 | #include <linux/prefetch.h> | ||
10 | #include <linux/string.h> | ||
11 | #include <asm/asm.h> | ||
12 | #include <asm/page.h> | ||
13 | |||
14 | #define VERIFY_READ 0 | ||
15 | #define VERIFY_WRITE 1 | ||
16 | |||
17 | /* | ||
18 | * The fs value determines whether argument validity checking should be | ||
19 | * performed or not. If get_fs() == USER_DS, checking is performed, with | ||
20 | * get_fs() == KERNEL_DS, checking is bypassed. | ||
21 | * | ||
22 | * For historical reasons, these macros are grossly misnamed. | ||
23 | */ | ||
24 | |||
25 | #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) | ||
26 | |||
27 | #define KERNEL_DS MAKE_MM_SEG(-1UL) | ||
28 | #define USER_DS MAKE_MM_SEG(PAGE_OFFSET) | ||
29 | |||
30 | #define get_ds() (KERNEL_DS) | ||
31 | #define get_fs() (current_thread_info()->addr_limit) | ||
32 | #define set_fs(x) (current_thread_info()->addr_limit = (x)) | ||
33 | |||
34 | #define segment_eq(a, b) ((a).seg == (b).seg) | ||
35 | |||
36 | #define __addr_ok(addr) \ | ||
37 | ((unsigned long __force)(addr) < \ | ||
38 | (current_thread_info()->addr_limit.seg)) | ||
39 | |||
40 | /* | ||
41 | * Test whether a block of memory is a valid user space address. | ||
42 | * Returns 0 if the range is valid, nonzero otherwise. | ||
43 | * | ||
44 | * This is equivalent to the following test: | ||
45 | * (u33)addr + (u33)size >= (u33)current->addr_limit.seg (u65 for x86_64) | ||
46 | * | ||
47 | * This needs 33-bit (65-bit for x86_64) arithmetic. We have a carry... | ||
48 | */ | ||
49 | |||
50 | #define __range_not_ok(addr, size) \ | ||
51 | ({ \ | ||
52 | unsigned long flag, roksum; \ | ||
53 | __chk_user_ptr(addr); \ | ||
54 | asm("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0" \ | ||
55 | : "=&r" (flag), "=r" (roksum) \ | ||
56 | : "1" (addr), "g" ((long)(size)), \ | ||
57 | "rm" (current_thread_info()->addr_limit.seg)); \ | ||
58 | flag; \ | ||
59 | }) | ||
60 | |||
61 | /** | ||
62 | * access_ok: - Checks if a user space pointer is valid | ||
63 | * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that | ||
64 | * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe | ||
65 | * to write to a block, it is always safe to read from it. | ||
66 | * @addr: User space pointer to start of block to check | ||
67 | * @size: Size of block to check | ||
68 | * | ||
69 | * Context: User context only. This function may sleep. | ||
70 | * | ||
71 | * Checks if a pointer to a block of memory in user space is valid. | ||
72 | * | ||
73 | * Returns true (nonzero) if the memory block may be valid, false (zero) | ||
74 | * if it is definitely invalid. | ||
75 | * | ||
76 | * Note that, depending on architecture, this function probably just | ||
77 | * checks that the pointer is in the user space range - after calling | ||
78 | * this function, memory access functions may still return -EFAULT. | ||
79 | */ | ||
80 | #define access_ok(type, addr, size) (likely(__range_not_ok(addr, size) == 0)) | ||
81 | |||
82 | /* | ||
83 | * The exception table consists of pairs of addresses: the first is the | ||
84 | * address of an instruction that is allowed to fault, and the second is | ||
85 | * the address at which the program should continue. No registers are | ||
86 | * modified, so it is entirely up to the continuation code to figure out | ||
87 | * what to do. | ||
88 | * | ||
89 | * All the routines below use bits of fixup code that are out of line | ||
90 | * with the main instruction path. This means when everything is well, | ||
91 | * we don't even have to jump over them. Further, they do not intrude | ||
92 | * on our cache or tlb entries. | ||
93 | */ | ||
94 | |||
95 | struct exception_table_entry { | ||
96 | unsigned long insn, fixup; | ||
97 | }; | ||
98 | |||
99 | extern int fixup_exception(struct pt_regs *regs); | ||
100 | |||
101 | /* | ||
102 | * These are the main single-value transfer routines. They automatically | ||
103 | * use the right size if we just have the right pointer type. | ||
104 | * | ||
105 | * This gets kind of ugly. We want to return _two_ values in "get_user()" | ||
106 | * and yet we don't want to do any pointers, because that is too much | ||
107 | * of a performance impact. Thus we have a few rather ugly macros here, | ||
108 | * and hide all the ugliness from the user. | ||
109 | * | ||
110 | * The "__xxx" versions of the user access functions are versions that | ||
111 | * do not verify the address space, that must have been done previously | ||
112 | * with a separate "access_ok()" call (this is used when we do multiple | ||
113 | * accesses to the same area of user memory). | ||
114 | */ | ||
115 | |||
116 | extern int __get_user_1(void); | ||
117 | extern int __get_user_2(void); | ||
118 | extern int __get_user_4(void); | ||
119 | extern int __get_user_8(void); | ||
120 | extern int __get_user_bad(void); | ||
121 | |||
122 | #define __get_user_x(size, ret, x, ptr) \ | ||
123 | asm volatile("call __get_user_" #size \ | ||
124 | : "=a" (ret),"=d" (x) \ | ||
125 | : "0" (ptr)) \ | ||
126 | |||
127 | /* Careful: we have to cast the result to the type of the pointer | ||
128 | * for sign reasons */ | ||
129 | |||
130 | /** | ||
131 | * get_user: - Get a simple variable from user space. | ||
132 | * @x: Variable to store result. | ||
133 | * @ptr: Source address, in user space. | ||
134 | * | ||
135 | * Context: User context only. This function may sleep. | ||
136 | * | ||
137 | * This macro copies a single simple variable from user space to kernel | ||
138 | * space. It supports simple types like char and int, but not larger | ||
139 | * data types like structures or arrays. | ||
140 | * | ||
141 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
142 | * dereferencing @ptr must be assignable to @x without a cast. | ||
143 | * | ||
144 | * Returns zero on success, or -EFAULT on error. | ||
145 | * On error, the variable @x is set to zero. | ||
146 | */ | ||
147 | #ifdef CONFIG_X86_32 | ||
148 | #define __get_user_8(__ret_gu, __val_gu, ptr) \ | ||
149 | __get_user_x(X, __ret_gu, __val_gu, ptr) | ||
150 | #else | ||
151 | #define __get_user_8(__ret_gu, __val_gu, ptr) \ | ||
152 | __get_user_x(8, __ret_gu, __val_gu, ptr) | ||
153 | #endif | ||
154 | |||
155 | #define get_user(x, ptr) \ | ||
156 | ({ \ | ||
157 | int __ret_gu; \ | ||
158 | unsigned long __val_gu; \ | ||
159 | __chk_user_ptr(ptr); \ | ||
160 | switch (sizeof(*(ptr))) { \ | ||
161 | case 1: \ | ||
162 | __get_user_x(1, __ret_gu, __val_gu, ptr); \ | ||
163 | break; \ | ||
164 | case 2: \ | ||
165 | __get_user_x(2, __ret_gu, __val_gu, ptr); \ | ||
166 | break; \ | ||
167 | case 4: \ | ||
168 | __get_user_x(4, __ret_gu, __val_gu, ptr); \ | ||
169 | break; \ | ||
170 | case 8: \ | ||
171 | __get_user_8(__ret_gu, __val_gu, ptr); \ | ||
172 | break; \ | ||
173 | default: \ | ||
174 | __get_user_x(X, __ret_gu, __val_gu, ptr); \ | ||
175 | break; \ | ||
176 | } \ | ||
177 | (x) = (__typeof__(*(ptr)))__val_gu; \ | ||
178 | __ret_gu; \ | ||
179 | }) | ||
180 | |||
181 | #define __put_user_x(size, x, ptr, __ret_pu) \ | ||
182 | asm volatile("call __put_user_" #size : "=a" (__ret_pu) \ | ||
183 | :"0" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx") | ||
184 | |||
185 | |||
186 | |||
187 | #ifdef CONFIG_X86_32 | ||
188 | #define __put_user_u64(x, addr, err) \ | ||
189 | asm volatile("1: movl %%eax,0(%2)\n" \ | ||
190 | "2: movl %%edx,4(%2)\n" \ | ||
191 | "3:\n" \ | ||
192 | ".section .fixup,\"ax\"\n" \ | ||
193 | "4: movl %3,%0\n" \ | ||
194 | " jmp 3b\n" \ | ||
195 | ".previous\n" \ | ||
196 | _ASM_EXTABLE(1b, 4b) \ | ||
197 | _ASM_EXTABLE(2b, 4b) \ | ||
198 | : "=r" (err) \ | ||
199 | : "A" (x), "r" (addr), "i" (-EFAULT), "0" (err)) | ||
200 | |||
201 | #define __put_user_x8(x, ptr, __ret_pu) \ | ||
202 | asm volatile("call __put_user_8" : "=a" (__ret_pu) \ | ||
203 | : "A" ((typeof(*(ptr)))(x)), "c" (ptr) : "ebx") | ||
204 | #else | ||
205 | #define __put_user_u64(x, ptr, retval) \ | ||
206 | __put_user_asm(x, ptr, retval, "q", "", "Zr", -EFAULT) | ||
207 | #define __put_user_x8(x, ptr, __ret_pu) __put_user_x(8, x, ptr, __ret_pu) | ||
208 | #endif | ||
209 | |||
210 | extern void __put_user_bad(void); | ||
211 | |||
212 | /* | ||
213 | * Strange magic calling convention: pointer in %ecx, | ||
214 | * value in %eax(:%edx), return value in %eax. clobbers %rbx | ||
215 | */ | ||
216 | extern void __put_user_1(void); | ||
217 | extern void __put_user_2(void); | ||
218 | extern void __put_user_4(void); | ||
219 | extern void __put_user_8(void); | ||
220 | |||
221 | #ifdef CONFIG_X86_WP_WORKS_OK | ||
222 | |||
223 | /** | ||
224 | * put_user: - Write a simple value into user space. | ||
225 | * @x: Value to copy to user space. | ||
226 | * @ptr: Destination address, in user space. | ||
227 | * | ||
228 | * Context: User context only. This function may sleep. | ||
229 | * | ||
230 | * This macro copies a single simple value from kernel space to user | ||
231 | * space. It supports simple types like char and int, but not larger | ||
232 | * data types like structures or arrays. | ||
233 | * | ||
234 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
235 | * to the result of dereferencing @ptr. | ||
236 | * | ||
237 | * Returns zero on success, or -EFAULT on error. | ||
238 | */ | ||
239 | #define put_user(x, ptr) \ | ||
240 | ({ \ | ||
241 | int __ret_pu; \ | ||
242 | __typeof__(*(ptr)) __pu_val; \ | ||
243 | __chk_user_ptr(ptr); \ | ||
244 | __pu_val = x; \ | ||
245 | switch (sizeof(*(ptr))) { \ | ||
246 | case 1: \ | ||
247 | __put_user_x(1, __pu_val, ptr, __ret_pu); \ | ||
248 | break; \ | ||
249 | case 2: \ | ||
250 | __put_user_x(2, __pu_val, ptr, __ret_pu); \ | ||
251 | break; \ | ||
252 | case 4: \ | ||
253 | __put_user_x(4, __pu_val, ptr, __ret_pu); \ | ||
254 | break; \ | ||
255 | case 8: \ | ||
256 | __put_user_x8(__pu_val, ptr, __ret_pu); \ | ||
257 | break; \ | ||
258 | default: \ | ||
259 | __put_user_x(X, __pu_val, ptr, __ret_pu); \ | ||
260 | break; \ | ||
261 | } \ | ||
262 | __ret_pu; \ | ||
263 | }) | ||
264 | |||
265 | #define __put_user_size(x, ptr, size, retval, errret) \ | ||
266 | do { \ | ||
267 | retval = 0; \ | ||
268 | __chk_user_ptr(ptr); \ | ||
269 | switch (size) { \ | ||
270 | case 1: \ | ||
271 | __put_user_asm(x, ptr, retval, "b", "b", "iq", errret); \ | ||
272 | break; \ | ||
273 | case 2: \ | ||
274 | __put_user_asm(x, ptr, retval, "w", "w", "ir", errret); \ | ||
275 | break; \ | ||
276 | case 4: \ | ||
277 | __put_user_asm(x, ptr, retval, "l", "k", "ir", errret);\ | ||
278 | break; \ | ||
279 | case 8: \ | ||
280 | __put_user_u64((__typeof__(*ptr))(x), ptr, retval); \ | ||
281 | break; \ | ||
282 | default: \ | ||
283 | __put_user_bad(); \ | ||
284 | } \ | ||
285 | } while (0) | ||
286 | |||
287 | #else | ||
288 | |||
289 | #define __put_user_size(x, ptr, size, retval, errret) \ | ||
290 | do { \ | ||
291 | __typeof__(*(ptr))__pus_tmp = x; \ | ||
292 | retval = 0; \ | ||
293 | \ | ||
294 | if (unlikely(__copy_to_user_ll(ptr, &__pus_tmp, size) != 0)) \ | ||
295 | retval = errret; \ | ||
296 | } while (0) | ||
297 | |||
298 | #define put_user(x, ptr) \ | ||
299 | ({ \ | ||
300 | int __ret_pu; \ | ||
301 | __typeof__(*(ptr))__pus_tmp = x; \ | ||
302 | __ret_pu = 0; \ | ||
303 | if (unlikely(__copy_to_user_ll(ptr, &__pus_tmp, \ | ||
304 | sizeof(*(ptr))) != 0)) \ | ||
305 | __ret_pu = -EFAULT; \ | ||
306 | __ret_pu; \ | ||
307 | }) | ||
308 | #endif | ||
309 | |||
310 | #ifdef CONFIG_X86_32 | ||
311 | #define __get_user_asm_u64(x, ptr, retval, errret) (x) = __get_user_bad() | ||
312 | #else | ||
313 | #define __get_user_asm_u64(x, ptr, retval, errret) \ | ||
314 | __get_user_asm(x, ptr, retval, "q", "", "=r", errret) | ||
315 | #endif | ||
316 | |||
317 | #define __get_user_size(x, ptr, size, retval, errret) \ | ||
318 | do { \ | ||
319 | retval = 0; \ | ||
320 | __chk_user_ptr(ptr); \ | ||
321 | switch (size) { \ | ||
322 | case 1: \ | ||
323 | __get_user_asm(x, ptr, retval, "b", "b", "=q", errret); \ | ||
324 | break; \ | ||
325 | case 2: \ | ||
326 | __get_user_asm(x, ptr, retval, "w", "w", "=r", errret); \ | ||
327 | break; \ | ||
328 | case 4: \ | ||
329 | __get_user_asm(x, ptr, retval, "l", "k", "=r", errret); \ | ||
330 | break; \ | ||
331 | case 8: \ | ||
332 | __get_user_asm_u64(x, ptr, retval, errret); \ | ||
333 | break; \ | ||
334 | default: \ | ||
335 | (x) = __get_user_bad(); \ | ||
336 | } \ | ||
337 | } while (0) | ||
338 | |||
339 | #define __get_user_asm(x, addr, err, itype, rtype, ltype, errret) \ | ||
340 | asm volatile("1: mov"itype" %2,%"rtype"1\n" \ | ||
341 | "2:\n" \ | ||
342 | ".section .fixup,\"ax\"\n" \ | ||
343 | "3: mov %3,%0\n" \ | ||
344 | " xor"itype" %"rtype"1,%"rtype"1\n" \ | ||
345 | " jmp 2b\n" \ | ||
346 | ".previous\n" \ | ||
347 | _ASM_EXTABLE(1b, 3b) \ | ||
348 | : "=r" (err), ltype(x) \ | ||
349 | : "m" (__m(addr)), "i" (errret), "0" (err)) | ||
350 | |||
351 | #define __put_user_nocheck(x, ptr, size) \ | ||
352 | ({ \ | ||
353 | long __pu_err; \ | ||
354 | __put_user_size((x), (ptr), (size), __pu_err, -EFAULT); \ | ||
355 | __pu_err; \ | ||
356 | }) | ||
357 | |||
358 | #define __get_user_nocheck(x, ptr, size) \ | ||
359 | ({ \ | ||
360 | long __gu_err; \ | ||
361 | unsigned long __gu_val; \ | ||
362 | __get_user_size(__gu_val, (ptr), (size), __gu_err, -EFAULT); \ | ||
363 | (x) = (__force __typeof__(*(ptr)))__gu_val; \ | ||
364 | __gu_err; \ | ||
365 | }) | ||
366 | |||
367 | /* FIXME: this hack is definitely wrong -AK */ | ||
368 | struct __large_struct { unsigned long buf[100]; }; | ||
369 | #define __m(x) (*(struct __large_struct __user *)(x)) | ||
370 | |||
371 | /* | ||
372 | * Tell gcc we read from memory instead of writing: this is because | ||
373 | * we do not write to any memory gcc knows about, so there are no | ||
374 | * aliasing issues. | ||
375 | */ | ||
376 | #define __put_user_asm(x, addr, err, itype, rtype, ltype, errret) \ | ||
377 | asm volatile("1: mov"itype" %"rtype"1,%2\n" \ | ||
378 | "2:\n" \ | ||
379 | ".section .fixup,\"ax\"\n" \ | ||
380 | "3: mov %3,%0\n" \ | ||
381 | " jmp 2b\n" \ | ||
382 | ".previous\n" \ | ||
383 | _ASM_EXTABLE(1b, 3b) \ | ||
384 | : "=r"(err) \ | ||
385 | : ltype(x), "m" (__m(addr)), "i" (errret), "0" (err)) | ||
386 | /** | ||
387 | * __get_user: - Get a simple variable from user space, with less checking. | ||
388 | * @x: Variable to store result. | ||
389 | * @ptr: Source address, in user space. | ||
390 | * | ||
391 | * Context: User context only. This function may sleep. | ||
392 | * | ||
393 | * This macro copies a single simple variable from user space to kernel | ||
394 | * space. It supports simple types like char and int, but not larger | ||
395 | * data types like structures or arrays. | ||
396 | * | ||
397 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
398 | * dereferencing @ptr must be assignable to @x without a cast. | ||
399 | * | ||
400 | * Caller must check the pointer with access_ok() before calling this | ||
401 | * function. | ||
402 | * | ||
403 | * Returns zero on success, or -EFAULT on error. | ||
404 | * On error, the variable @x is set to zero. | ||
405 | */ | ||
406 | |||
407 | #define __get_user(x, ptr) \ | ||
408 | __get_user_nocheck((x), (ptr), sizeof(*(ptr))) | ||
409 | /** | ||
410 | * __put_user: - Write a simple value into user space, with less checking. | ||
411 | * @x: Value to copy to user space. | ||
412 | * @ptr: Destination address, in user space. | ||
413 | * | ||
414 | * Context: User context only. This function may sleep. | ||
415 | * | ||
416 | * This macro copies a single simple value from kernel space to user | ||
417 | * space. It supports simple types like char and int, but not larger | ||
418 | * data types like structures or arrays. | ||
419 | * | ||
420 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
421 | * to the result of dereferencing @ptr. | ||
422 | * | ||
423 | * Caller must check the pointer with access_ok() before calling this | ||
424 | * function. | ||
425 | * | ||
426 | * Returns zero on success, or -EFAULT on error. | ||
427 | */ | ||
428 | |||
429 | #define __put_user(x, ptr) \ | ||
430 | __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) | ||
431 | |||
432 | #define __get_user_unaligned __get_user | ||
433 | #define __put_user_unaligned __put_user | ||
434 | |||
435 | /* | ||
436 | * movsl can be slow when source and dest are not both 8-byte aligned | ||
437 | */ | ||
438 | #ifdef CONFIG_X86_INTEL_USERCOPY | ||
439 | extern struct movsl_mask { | ||
440 | int mask; | ||
441 | } ____cacheline_aligned_in_smp movsl_mask; | ||
442 | #endif | ||
443 | |||
444 | #define ARCH_HAS_NOCACHE_UACCESS 1 | ||
445 | |||
1 | #ifdef CONFIG_X86_32 | 446 | #ifdef CONFIG_X86_32 |
2 | # include "uaccess_32.h" | 447 | # include "uaccess_32.h" |
3 | #else | 448 | #else |
449 | # define ARCH_HAS_SEARCH_EXTABLE | ||
4 | # include "uaccess_64.h" | 450 | # include "uaccess_64.h" |
5 | #endif | 451 | #endif |
452 | |||
453 | #endif | ||
diff --git a/include/asm-x86/uaccess_32.h b/include/asm-x86/uaccess_32.h index 8e7595c1f34e..6fdef39a0bcb 100644 --- a/include/asm-x86/uaccess_32.h +++ b/include/asm-x86/uaccess_32.h | |||
@@ -11,426 +11,6 @@ | |||
11 | #include <asm/asm.h> | 11 | #include <asm/asm.h> |
12 | #include <asm/page.h> | 12 | #include <asm/page.h> |
13 | 13 | ||
14 | #define VERIFY_READ 0 | ||
15 | #define VERIFY_WRITE 1 | ||
16 | |||
17 | /* | ||
18 | * The fs value determines whether argument validity checking should be | ||
19 | * performed or not. If get_fs() == USER_DS, checking is performed, with | ||
20 | * get_fs() == KERNEL_DS, checking is bypassed. | ||
21 | * | ||
22 | * For historical reasons, these macros are grossly misnamed. | ||
23 | */ | ||
24 | |||
25 | #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) | ||
26 | |||
27 | |||
28 | #define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL) | ||
29 | #define USER_DS MAKE_MM_SEG(PAGE_OFFSET) | ||
30 | |||
31 | #define get_ds() (KERNEL_DS) | ||
32 | #define get_fs() (current_thread_info()->addr_limit) | ||
33 | #define set_fs(x) (current_thread_info()->addr_limit = (x)) | ||
34 | |||
35 | #define segment_eq(a, b) ((a).seg == (b).seg) | ||
36 | |||
37 | /* | ||
38 | * movsl can be slow when source and dest are not both 8-byte aligned | ||
39 | */ | ||
40 | #ifdef CONFIG_X86_INTEL_USERCOPY | ||
41 | extern struct movsl_mask { | ||
42 | int mask; | ||
43 | } ____cacheline_aligned_in_smp movsl_mask; | ||
44 | #endif | ||
45 | |||
46 | #define __addr_ok(addr) \ | ||
47 | ((unsigned long __force)(addr) < \ | ||
48 | (current_thread_info()->addr_limit.seg)) | ||
49 | |||
50 | /* | ||
51 | * Test whether a block of memory is a valid user space address. | ||
52 | * Returns 0 if the range is valid, nonzero otherwise. | ||
53 | * | ||
54 | * This is equivalent to the following test: | ||
55 | * (u33)addr + (u33)size >= (u33)current->addr_limit.seg | ||
56 | * | ||
57 | * This needs 33-bit arithmetic. We have a carry... | ||
58 | */ | ||
59 | #define __range_ok(addr, size) \ | ||
60 | ({ \ | ||
61 | unsigned long flag, roksum; \ | ||
62 | __chk_user_ptr(addr); \ | ||
63 | asm("addl %3,%1 ; sbbl %0,%0; cmpl %1,%4; sbbl $0,%0" \ | ||
64 | :"=&r" (flag), "=r" (roksum) \ | ||
65 | :"1" (addr), "g" ((int)(size)), \ | ||
66 | "rm" (current_thread_info()->addr_limit.seg)); \ | ||
67 | flag; \ | ||
68 | }) | ||
69 | |||
70 | /** | ||
71 | * access_ok: - Checks if a user space pointer is valid | ||
72 | * @type: Type of access: %VERIFY_READ or %VERIFY_WRITE. Note that | ||
73 | * %VERIFY_WRITE is a superset of %VERIFY_READ - if it is safe | ||
74 | * to write to a block, it is always safe to read from it. | ||
75 | * @addr: User space pointer to start of block to check | ||
76 | * @size: Size of block to check | ||
77 | * | ||
78 | * Context: User context only. This function may sleep. | ||
79 | * | ||
80 | * Checks if a pointer to a block of memory in user space is valid. | ||
81 | * | ||
82 | * Returns true (nonzero) if the memory block may be valid, false (zero) | ||
83 | * if it is definitely invalid. | ||
84 | * | ||
85 | * Note that, depending on architecture, this function probably just | ||
86 | * checks that the pointer is in the user space range - after calling | ||
87 | * this function, memory access functions may still return -EFAULT. | ||
88 | */ | ||
89 | #define access_ok(type, addr, size) (likely(__range_ok(addr, size) == 0)) | ||
90 | |||
91 | /* | ||
92 | * The exception table consists of pairs of addresses: the first is the | ||
93 | * address of an instruction that is allowed to fault, and the second is | ||
94 | * the address at which the program should continue. No registers are | ||
95 | * modified, so it is entirely up to the continuation code to figure out | ||
96 | * what to do. | ||
97 | * | ||
98 | * All the routines below use bits of fixup code that are out of line | ||
99 | * with the main instruction path. This means when everything is well, | ||
100 | * we don't even have to jump over them. Further, they do not intrude | ||
101 | * on our cache or tlb entries. | ||
102 | */ | ||
103 | |||
104 | struct exception_table_entry { | ||
105 | unsigned long insn, fixup; | ||
106 | }; | ||
107 | |||
108 | extern int fixup_exception(struct pt_regs *regs); | ||
109 | |||
110 | /* | ||
111 | * These are the main single-value transfer routines. They automatically | ||
112 | * use the right size if we just have the right pointer type. | ||
113 | * | ||
114 | * This gets kind of ugly. We want to return _two_ values in "get_user()" | ||
115 | * and yet we don't want to do any pointers, because that is too much | ||
116 | * of a performance impact. Thus we have a few rather ugly macros here, | ||
117 | * and hide all the ugliness from the user. | ||
118 | * | ||
119 | * The "__xxx" versions of the user access functions are versions that | ||
120 | * do not verify the address space, that must have been done previously | ||
121 | * with a separate "access_ok()" call (this is used when we do multiple | ||
122 | * accesses to the same area of user memory). | ||
123 | */ | ||
124 | |||
125 | extern void __get_user_1(void); | ||
126 | extern void __get_user_2(void); | ||
127 | extern void __get_user_4(void); | ||
128 | |||
129 | #define __get_user_x(size, ret, x, ptr) \ | ||
130 | asm volatile("call __get_user_" #size \ | ||
131 | :"=a" (ret),"=d" (x) \ | ||
132 | :"0" (ptr)) | ||
133 | |||
134 | |||
135 | /* Careful: we have to cast the result to the type of the pointer | ||
136 | * for sign reasons */ | ||
137 | |||
138 | /** | ||
139 | * get_user: - Get a simple variable from user space. | ||
140 | * @x: Variable to store result. | ||
141 | * @ptr: Source address, in user space. | ||
142 | * | ||
143 | * Context: User context only. This function may sleep. | ||
144 | * | ||
145 | * This macro copies a single simple variable from user space to kernel | ||
146 | * space. It supports simple types like char and int, but not larger | ||
147 | * data types like structures or arrays. | ||
148 | * | ||
149 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
150 | * dereferencing @ptr must be assignable to @x without a cast. | ||
151 | * | ||
152 | * Returns zero on success, or -EFAULT on error. | ||
153 | * On error, the variable @x is set to zero. | ||
154 | */ | ||
155 | #define get_user(x, ptr) \ | ||
156 | ({ \ | ||
157 | int __ret_gu; \ | ||
158 | unsigned long __val_gu; \ | ||
159 | __chk_user_ptr(ptr); \ | ||
160 | switch (sizeof(*(ptr))) { \ | ||
161 | case 1: \ | ||
162 | __get_user_x(1, __ret_gu, __val_gu, ptr); \ | ||
163 | break; \ | ||
164 | case 2: \ | ||
165 | __get_user_x(2, __ret_gu, __val_gu, ptr); \ | ||
166 | break; \ | ||
167 | case 4: \ | ||
168 | __get_user_x(4, __ret_gu, __val_gu, ptr); \ | ||
169 | break; \ | ||
170 | default: \ | ||
171 | __get_user_x(X, __ret_gu, __val_gu, ptr); \ | ||
172 | break; \ | ||
173 | } \ | ||
174 | (x) = (__typeof__(*(ptr)))__val_gu; \ | ||
175 | __ret_gu; \ | ||
176 | }) | ||
177 | |||
178 | extern void __put_user_bad(void); | ||
179 | |||
180 | /* | ||
181 | * Strange magic calling convention: pointer in %ecx, | ||
182 | * value in %eax(:%edx), return value in %eax, no clobbers. | ||
183 | */ | ||
184 | extern void __put_user_1(void); | ||
185 | extern void __put_user_2(void); | ||
186 | extern void __put_user_4(void); | ||
187 | extern void __put_user_8(void); | ||
188 | |||
189 | #define __put_user_1(x, ptr) \ | ||
190 | asm volatile("call __put_user_1" : "=a" (__ret_pu) \ | ||
191 | : "0" ((typeof(*(ptr)))(x)), "c" (ptr)) | ||
192 | |||
193 | #define __put_user_2(x, ptr) \ | ||
194 | asm volatile("call __put_user_2" : "=a" (__ret_pu) \ | ||
195 | : "0" ((typeof(*(ptr)))(x)), "c" (ptr)) | ||
196 | |||
197 | #define __put_user_4(x, ptr) \ | ||
198 | asm volatile("call __put_user_4" : "=a" (__ret_pu) \ | ||
199 | : "0" ((typeof(*(ptr)))(x)), "c" (ptr)) | ||
200 | |||
201 | #define __put_user_8(x, ptr) \ | ||
202 | asm volatile("call __put_user_8" : "=a" (__ret_pu) \ | ||
203 | : "A" ((typeof(*(ptr)))(x)), "c" (ptr)) | ||
204 | |||
205 | #define __put_user_X(x, ptr) \ | ||
206 | asm volatile("call __put_user_X" : "=a" (__ret_pu) \ | ||
207 | : "c" (ptr)) | ||
208 | |||
209 | /** | ||
210 | * put_user: - Write a simple value into user space. | ||
211 | * @x: Value to copy to user space. | ||
212 | * @ptr: Destination address, in user space. | ||
213 | * | ||
214 | * Context: User context only. This function may sleep. | ||
215 | * | ||
216 | * This macro copies a single simple value from kernel space to user | ||
217 | * space. It supports simple types like char and int, but not larger | ||
218 | * data types like structures or arrays. | ||
219 | * | ||
220 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
221 | * to the result of dereferencing @ptr. | ||
222 | * | ||
223 | * Returns zero on success, or -EFAULT on error. | ||
224 | */ | ||
225 | #ifdef CONFIG_X86_WP_WORKS_OK | ||
226 | |||
227 | #define put_user(x, ptr) \ | ||
228 | ({ \ | ||
229 | int __ret_pu; \ | ||
230 | __typeof__(*(ptr)) __pu_val; \ | ||
231 | __chk_user_ptr(ptr); \ | ||
232 | __pu_val = x; \ | ||
233 | switch (sizeof(*(ptr))) { \ | ||
234 | case 1: \ | ||
235 | __put_user_1(__pu_val, ptr); \ | ||
236 | break; \ | ||
237 | case 2: \ | ||
238 | __put_user_2(__pu_val, ptr); \ | ||
239 | break; \ | ||
240 | case 4: \ | ||
241 | __put_user_4(__pu_val, ptr); \ | ||
242 | break; \ | ||
243 | case 8: \ | ||
244 | __put_user_8(__pu_val, ptr); \ | ||
245 | break; \ | ||
246 | default: \ | ||
247 | __put_user_X(__pu_val, ptr); \ | ||
248 | break; \ | ||
249 | } \ | ||
250 | __ret_pu; \ | ||
251 | }) | ||
252 | |||
253 | #else | ||
254 | #define put_user(x, ptr) \ | ||
255 | ({ \ | ||
256 | int __ret_pu; \ | ||
257 | __typeof__(*(ptr))__pus_tmp = x; \ | ||
258 | __ret_pu = 0; \ | ||
259 | if (unlikely(__copy_to_user_ll(ptr, &__pus_tmp, \ | ||
260 | sizeof(*(ptr))) != 0)) \ | ||
261 | __ret_pu = -EFAULT; \ | ||
262 | __ret_pu; \ | ||
263 | }) | ||
264 | |||
265 | |||
266 | #endif | ||
267 | |||
268 | /** | ||
269 | * __get_user: - Get a simple variable from user space, with less checking. | ||
270 | * @x: Variable to store result. | ||
271 | * @ptr: Source address, in user space. | ||
272 | * | ||
273 | * Context: User context only. This function may sleep. | ||
274 | * | ||
275 | * This macro copies a single simple variable from user space to kernel | ||
276 | * space. It supports simple types like char and int, but not larger | ||
277 | * data types like structures or arrays. | ||
278 | * | ||
279 | * @ptr must have pointer-to-simple-variable type, and the result of | ||
280 | * dereferencing @ptr must be assignable to @x without a cast. | ||
281 | * | ||
282 | * Caller must check the pointer with access_ok() before calling this | ||
283 | * function. | ||
284 | * | ||
285 | * Returns zero on success, or -EFAULT on error. | ||
286 | * On error, the variable @x is set to zero. | ||
287 | */ | ||
288 | #define __get_user(x, ptr) \ | ||
289 | __get_user_nocheck((x), (ptr), sizeof(*(ptr))) | ||
290 | |||
291 | |||
292 | /** | ||
293 | * __put_user: - Write a simple value into user space, with less checking. | ||
294 | * @x: Value to copy to user space. | ||
295 | * @ptr: Destination address, in user space. | ||
296 | * | ||
297 | * Context: User context only. This function may sleep. | ||
298 | * | ||
299 | * This macro copies a single simple value from kernel space to user | ||
300 | * space. It supports simple types like char and int, but not larger | ||
301 | * data types like structures or arrays. | ||
302 | * | ||
303 | * @ptr must have pointer-to-simple-variable type, and @x must be assignable | ||
304 | * to the result of dereferencing @ptr. | ||
305 | * | ||
306 | * Caller must check the pointer with access_ok() before calling this | ||
307 | * function. | ||
308 | * | ||
309 | * Returns zero on success, or -EFAULT on error. | ||
310 | */ | ||
311 | #define __put_user(x, ptr) \ | ||
312 | __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) | ||
313 | |||
314 | #define __put_user_nocheck(x, ptr, size) \ | ||
315 | ({ \ | ||
316 | long __pu_err; \ | ||
317 | __put_user_size((x), (ptr), (size), __pu_err, -EFAULT); \ | ||
318 | __pu_err; \ | ||
319 | }) | ||
320 | |||
321 | |||
322 | #define __put_user_u64(x, addr, err) \ | ||
323 | asm volatile("1: movl %%eax,0(%2)\n" \ | ||
324 | "2: movl %%edx,4(%2)\n" \ | ||
325 | "3:\n" \ | ||
326 | ".section .fixup,\"ax\"\n" \ | ||
327 | "4: movl %3,%0\n" \ | ||
328 | " jmp 3b\n" \ | ||
329 | ".previous\n" \ | ||
330 | _ASM_EXTABLE(1b, 4b) \ | ||
331 | _ASM_EXTABLE(2b, 4b) \ | ||
332 | : "=r" (err) \ | ||
333 | : "A" (x), "r" (addr), "i" (-EFAULT), "0" (err)) | ||
334 | |||
335 | #ifdef CONFIG_X86_WP_WORKS_OK | ||
336 | |||
337 | #define __put_user_size(x, ptr, size, retval, errret) \ | ||
338 | do { \ | ||
339 | retval = 0; \ | ||
340 | __chk_user_ptr(ptr); \ | ||
341 | switch (size) { \ | ||
342 | case 1: \ | ||
343 | __put_user_asm(x, ptr, retval, "b", "b", "iq", errret); \ | ||
344 | break; \ | ||
345 | case 2: \ | ||
346 | __put_user_asm(x, ptr, retval, "w", "w", "ir", errret); \ | ||
347 | break; \ | ||
348 | case 4: \ | ||
349 | __put_user_asm(x, ptr, retval, "l", "", "ir", errret); \ | ||
350 | break; \ | ||
351 | case 8: \ | ||
352 | __put_user_u64((__typeof__(*ptr))(x), ptr, retval); \ | ||
353 | break; \ | ||
354 | default: \ | ||
355 | __put_user_bad(); \ | ||
356 | } \ | ||
357 | } while (0) | ||
358 | |||
359 | #else | ||
360 | |||
361 | #define __put_user_size(x, ptr, size, retval, errret) \ | ||
362 | do { \ | ||
363 | __typeof__(*(ptr))__pus_tmp = x; \ | ||
364 | retval = 0; \ | ||
365 | \ | ||
366 | if (unlikely(__copy_to_user_ll(ptr, &__pus_tmp, size) != 0)) \ | ||
367 | retval = errret; \ | ||
368 | } while (0) | ||
369 | |||
370 | #endif | ||
371 | struct __large_struct { unsigned long buf[100]; }; | ||
372 | #define __m(x) (*(struct __large_struct __user *)(x)) | ||
373 | |||
374 | /* | ||
375 | * Tell gcc we read from memory instead of writing: this is because | ||
376 | * we do not write to any memory gcc knows about, so there are no | ||
377 | * aliasing issues. | ||
378 | */ | ||
379 | #define __put_user_asm(x, addr, err, itype, rtype, ltype, errret) \ | ||
380 | asm volatile("1: mov"itype" %"rtype"1,%2\n" \ | ||
381 | "2:\n" \ | ||
382 | ".section .fixup,\"ax\"\n" \ | ||
383 | "3: movl %3,%0\n" \ | ||
384 | " jmp 2b\n" \ | ||
385 | ".previous\n" \ | ||
386 | _ASM_EXTABLE(1b, 3b) \ | ||
387 | : "=r"(err) \ | ||
388 | : ltype (x), "m" (__m(addr)), "i" (errret), "0" (err)) | ||
389 | |||
390 | |||
391 | #define __get_user_nocheck(x, ptr, size) \ | ||
392 | ({ \ | ||
393 | long __gu_err; \ | ||
394 | unsigned long __gu_val; \ | ||
395 | __get_user_size(__gu_val, (ptr), (size), __gu_err, -EFAULT); \ | ||
396 | (x) = (__typeof__(*(ptr)))__gu_val; \ | ||
397 | __gu_err; \ | ||
398 | }) | ||
399 | |||
400 | extern long __get_user_bad(void); | ||
401 | |||
402 | #define __get_user_size(x, ptr, size, retval, errret) \ | ||
403 | do { \ | ||
404 | retval = 0; \ | ||
405 | __chk_user_ptr(ptr); \ | ||
406 | switch (size) { \ | ||
407 | case 1: \ | ||
408 | __get_user_asm(x, ptr, retval, "b", "b", "=q", errret); \ | ||
409 | break; \ | ||
410 | case 2: \ | ||
411 | __get_user_asm(x, ptr, retval, "w", "w", "=r", errret); \ | ||
412 | break; \ | ||
413 | case 4: \ | ||
414 | __get_user_asm(x, ptr, retval, "l", "", "=r", errret); \ | ||
415 | break; \ | ||
416 | default: \ | ||
417 | (x) = __get_user_bad(); \ | ||
418 | } \ | ||
419 | } while (0) | ||
420 | |||
421 | #define __get_user_asm(x, addr, err, itype, rtype, ltype, errret) \ | ||
422 | asm volatile("1: mov"itype" %2,%"rtype"1\n" \ | ||
423 | "2:\n" \ | ||
424 | ".section .fixup,\"ax\"\n" \ | ||
425 | "3: movl %3,%0\n" \ | ||
426 | " xor"itype" %"rtype"1,%"rtype"1\n" \ | ||
427 | " jmp 2b\n" \ | ||
428 | ".previous\n" \ | ||
429 | _ASM_EXTABLE(1b, 3b) \ | ||
430 | : "=r" (err), ltype (x) \ | ||
431 | : "m" (__m(addr)), "i" (errret), "0" (err)) | ||
432 | |||
433 | |||
434 | unsigned long __must_check __copy_to_user_ll | 14 | unsigned long __must_check __copy_to_user_ll |
435 | (void __user *to, const void *from, unsigned long n); | 15 | (void __user *to, const void *from, unsigned long n); |
436 | unsigned long __must_check __copy_from_user_ll | 16 | unsigned long __must_check __copy_from_user_ll |
@@ -576,8 +156,6 @@ __copy_from_user(void *to, const void __user *from, unsigned long n) | |||
576 | return __copy_from_user_ll(to, from, n); | 156 | return __copy_from_user_ll(to, from, n); |
577 | } | 157 | } |
578 | 158 | ||
579 | #define ARCH_HAS_NOCACHE_UACCESS | ||
580 | |||
581 | static __always_inline unsigned long __copy_from_user_nocache(void *to, | 159 | static __always_inline unsigned long __copy_from_user_nocache(void *to, |
582 | const void __user *from, unsigned long n) | 160 | const void __user *from, unsigned long n) |
583 | { | 161 | { |
diff --git a/include/asm-x86/uaccess_64.h b/include/asm-x86/uaccess_64.h index b8a2f4339903..515d4dce96b5 100644 --- a/include/asm-x86/uaccess_64.h +++ b/include/asm-x86/uaccess_64.h | |||
@@ -9,265 +9,6 @@ | |||
9 | #include <linux/prefetch.h> | 9 | #include <linux/prefetch.h> |
10 | #include <asm/page.h> | 10 | #include <asm/page.h> |
11 | 11 | ||
12 | #define VERIFY_READ 0 | ||
13 | #define VERIFY_WRITE 1 | ||
14 | |||
15 | /* | ||
16 | * The fs value determines whether argument validity checking should be | ||
17 | * performed or not. If get_fs() == USER_DS, checking is performed, with | ||
18 | * get_fs() == KERNEL_DS, checking is bypassed. | ||
19 | * | ||
20 | * For historical reasons, these macros are grossly misnamed. | ||
21 | */ | ||
22 | |||
23 | #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) | ||
24 | |||
25 | #define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFFFFFFFFFUL) | ||
26 | #define USER_DS MAKE_MM_SEG(PAGE_OFFSET) | ||
27 | |||
28 | #define get_ds() (KERNEL_DS) | ||
29 | #define get_fs() (current_thread_info()->addr_limit) | ||
30 | #define set_fs(x) (current_thread_info()->addr_limit = (x)) | ||
31 | |||
32 | #define segment_eq(a, b) ((a).seg == (b).seg) | ||
33 | |||
34 | #define __addr_ok(addr) (!((unsigned long)(addr) & \ | ||
35 | (current_thread_info()->addr_limit.seg))) | ||
36 | |||
37 | /* | ||
38 | * Uhhuh, this needs 65-bit arithmetic. We have a carry.. | ||
39 | */ | ||
40 | #define __range_not_ok(addr, size) \ | ||
41 | ({ \ | ||
42 | unsigned long flag, roksum; \ | ||
43 | __chk_user_ptr(addr); \ | ||
44 | asm("# range_ok\n\r" \ | ||
45 | "addq %3,%1 ; sbbq %0,%0 ; cmpq %1,%4 ; sbbq $0,%0" \ | ||
46 | : "=&r" (flag), "=r" (roksum) \ | ||
47 | : "1" (addr), "g" ((long)(size)), \ | ||
48 | "g" (current_thread_info()->addr_limit.seg)); \ | ||
49 | flag; \ | ||
50 | }) | ||
51 | |||
52 | #define access_ok(type, addr, size) (__range_not_ok(addr, size) == 0) | ||
53 | |||
54 | /* | ||
55 | * The exception table consists of pairs of addresses: the first is the | ||
56 | * address of an instruction that is allowed to fault, and the second is | ||
57 | * the address at which the program should continue. No registers are | ||
58 | * modified, so it is entirely up to the continuation code to figure out | ||
59 | * what to do. | ||
60 | * | ||
61 | * All the routines below use bits of fixup code that are out of line | ||
62 | * with the main instruction path. This means when everything is well, | ||
63 | * we don't even have to jump over them. Further, they do not intrude | ||
64 | * on our cache or tlb entries. | ||
65 | */ | ||
66 | |||
67 | struct exception_table_entry { | ||
68 | unsigned long insn, fixup; | ||
69 | }; | ||
70 | |||
71 | extern int fixup_exception(struct pt_regs *regs); | ||
72 | |||
73 | #define ARCH_HAS_SEARCH_EXTABLE | ||
74 | |||
75 | /* | ||
76 | * These are the main single-value transfer routines. They automatically | ||
77 | * use the right size if we just have the right pointer type. | ||
78 | * | ||
79 | * This gets kind of ugly. We want to return _two_ values in "get_user()" | ||
80 | * and yet we don't want to do any pointers, because that is too much | ||
81 | * of a performance impact. Thus we have a few rather ugly macros here, | ||
82 | * and hide all the ugliness from the user. | ||
83 | * | ||
84 | * The "__xxx" versions of the user access functions are versions that | ||
85 | * do not verify the address space, that must have been done previously | ||
86 | * with a separate "access_ok()" call (this is used when we do multiple | ||
87 | * accesses to the same area of user memory). | ||
88 | */ | ||
89 | |||
90 | #define __get_user_x(size, ret, x, ptr) \ | ||
91 | asm volatile("call __get_user_" #size \ | ||
92 | : "=a" (ret),"=d" (x) \ | ||
93 | : "c" (ptr) \ | ||
94 | : "r8") | ||
95 | |||
96 | /* Careful: we have to cast the result to the type of the pointer | ||
97 | * for sign reasons */ | ||
98 | |||
99 | #define get_user(x, ptr) \ | ||
100 | ({ \ | ||
101 | unsigned long __val_gu; \ | ||
102 | int __ret_gu; \ | ||
103 | __chk_user_ptr(ptr); \ | ||
104 | switch (sizeof(*(ptr))) { \ | ||
105 | case 1: \ | ||
106 | __get_user_x(1, __ret_gu, __val_gu, ptr); \ | ||
107 | break; \ | ||
108 | case 2: \ | ||
109 | __get_user_x(2, __ret_gu, __val_gu, ptr); \ | ||
110 | break; \ | ||
111 | case 4: \ | ||
112 | __get_user_x(4, __ret_gu, __val_gu, ptr); \ | ||
113 | break; \ | ||
114 | case 8: \ | ||
115 | __get_user_x(8, __ret_gu, __val_gu, ptr); \ | ||
116 | break; \ | ||
117 | default: \ | ||
118 | __get_user_bad(); \ | ||
119 | break; \ | ||
120 | } \ | ||
121 | (x) = (__force typeof(*(ptr)))__val_gu; \ | ||
122 | __ret_gu; \ | ||
123 | }) | ||
124 | |||
125 | extern void __put_user_1(void); | ||
126 | extern void __put_user_2(void); | ||
127 | extern void __put_user_4(void); | ||
128 | extern void __put_user_8(void); | ||
129 | extern void __put_user_bad(void); | ||
130 | |||
131 | #define __put_user_x(size, ret, x, ptr) \ | ||
132 | asm volatile("call __put_user_" #size \ | ||
133 | :"=a" (ret) \ | ||
134 | :"c" (ptr),"d" (x) \ | ||
135 | :"r8") | ||
136 | |||
137 | #define put_user(x, ptr) \ | ||
138 | __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) | ||
139 | |||
140 | #define __get_user(x, ptr) \ | ||
141 | __get_user_nocheck((x), (ptr), sizeof(*(ptr))) | ||
142 | #define __put_user(x, ptr) \ | ||
143 | __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) | ||
144 | |||
145 | #define __get_user_unaligned __get_user | ||
146 | #define __put_user_unaligned __put_user | ||
147 | |||
148 | #define __put_user_nocheck(x, ptr, size) \ | ||
149 | ({ \ | ||
150 | int __pu_err; \ | ||
151 | __put_user_size((x), (ptr), (size), __pu_err); \ | ||
152 | __pu_err; \ | ||
153 | }) | ||
154 | |||
155 | |||
156 | #define __put_user_check(x, ptr, size) \ | ||
157 | ({ \ | ||
158 | int __pu_err; \ | ||
159 | typeof(*(ptr)) __user *__pu_addr = (ptr); \ | ||
160 | switch (size) { \ | ||
161 | case 1: \ | ||
162 | __put_user_x(1, __pu_err, x, __pu_addr); \ | ||
163 | break; \ | ||
164 | case 2: \ | ||
165 | __put_user_x(2, __pu_err, x, __pu_addr); \ | ||
166 | break; \ | ||
167 | case 4: \ | ||
168 | __put_user_x(4, __pu_err, x, __pu_addr); \ | ||
169 | break; \ | ||
170 | case 8: \ | ||
171 | __put_user_x(8, __pu_err, x, __pu_addr); \ | ||
172 | break; \ | ||
173 | default: \ | ||
174 | __put_user_bad(); \ | ||
175 | } \ | ||
176 | __pu_err; \ | ||
177 | }) | ||
178 | |||
179 | #define __put_user_size(x, ptr, size, retval) \ | ||
180 | do { \ | ||
181 | retval = 0; \ | ||
182 | __chk_user_ptr(ptr); \ | ||
183 | switch (size) { \ | ||
184 | case 1: \ | ||
185 | __put_user_asm(x, ptr, retval, "b", "b", "iq", -EFAULT);\ | ||
186 | break; \ | ||
187 | case 2: \ | ||
188 | __put_user_asm(x, ptr, retval, "w", "w", "ir", -EFAULT);\ | ||
189 | break; \ | ||
190 | case 4: \ | ||
191 | __put_user_asm(x, ptr, retval, "l", "k", "ir", -EFAULT);\ | ||
192 | break; \ | ||
193 | case 8: \ | ||
194 | __put_user_asm(x, ptr, retval, "q", "", "Zr", -EFAULT); \ | ||
195 | break; \ | ||
196 | default: \ | ||
197 | __put_user_bad(); \ | ||
198 | } \ | ||
199 | } while (0) | ||
200 | |||
201 | /* FIXME: this hack is definitely wrong -AK */ | ||
202 | struct __large_struct { unsigned long buf[100]; }; | ||
203 | #define __m(x) (*(struct __large_struct __user *)(x)) | ||
204 | |||
205 | /* | ||
206 | * Tell gcc we read from memory instead of writing: this is because | ||
207 | * we do not write to any memory gcc knows about, so there are no | ||
208 | * aliasing issues. | ||
209 | */ | ||
210 | #define __put_user_asm(x, addr, err, itype, rtype, ltype, errno) \ | ||
211 | asm volatile("1: mov"itype" %"rtype"1,%2\n" \ | ||
212 | "2:\n" \ | ||
213 | ".section .fixup, \"ax\"\n" \ | ||
214 | "3: mov %3,%0\n" \ | ||
215 | " jmp 2b\n" \ | ||
216 | ".previous\n" \ | ||
217 | _ASM_EXTABLE(1b, 3b) \ | ||
218 | : "=r"(err) \ | ||
219 | : ltype (x), "m" (__m(addr)), "i" (errno), "0" (err)) | ||
220 | |||
221 | |||
222 | #define __get_user_nocheck(x, ptr, size) \ | ||
223 | ({ \ | ||
224 | int __gu_err; \ | ||
225 | unsigned long __gu_val; \ | ||
226 | __get_user_size(__gu_val, (ptr), (size), __gu_err); \ | ||
227 | (x) = (__force typeof(*(ptr)))__gu_val; \ | ||
228 | __gu_err; \ | ||
229 | }) | ||
230 | |||
231 | extern int __get_user_1(void); | ||
232 | extern int __get_user_2(void); | ||
233 | extern int __get_user_4(void); | ||
234 | extern int __get_user_8(void); | ||
235 | extern int __get_user_bad(void); | ||
236 | |||
237 | #define __get_user_size(x, ptr, size, retval) \ | ||
238 | do { \ | ||
239 | retval = 0; \ | ||
240 | __chk_user_ptr(ptr); \ | ||
241 | switch (size) { \ | ||
242 | case 1: \ | ||
243 | __get_user_asm(x, ptr, retval, "b", "b", "=q", -EFAULT);\ | ||
244 | break; \ | ||
245 | case 2: \ | ||
246 | __get_user_asm(x, ptr, retval, "w", "w", "=r", -EFAULT);\ | ||
247 | break; \ | ||
248 | case 4: \ | ||
249 | __get_user_asm(x, ptr, retval, "l", "k", "=r", -EFAULT);\ | ||
250 | break; \ | ||
251 | case 8: \ | ||
252 | __get_user_asm(x, ptr, retval, "q", "", "=r", -EFAULT); \ | ||
253 | break; \ | ||
254 | default: \ | ||
255 | (x) = __get_user_bad(); \ | ||
256 | } \ | ||
257 | } while (0) | ||
258 | |||
259 | #define __get_user_asm(x, addr, err, itype, rtype, ltype, errno) \ | ||
260 | asm volatile("1: mov"itype" %2,%"rtype"1\n" \ | ||
261 | "2:\n" \ | ||
262 | ".section .fixup, \"ax\"\n" \ | ||
263 | "3: mov %3,%0\n" \ | ||
264 | " xor"itype" %"rtype"1,%"rtype"1\n" \ | ||
265 | " jmp 2b\n" \ | ||
266 | ".previous\n" \ | ||
267 | _ASM_EXTABLE(1b, 3b) \ | ||
268 | : "=r" (err), ltype (x) \ | ||
269 | : "m" (__m(addr)), "i"(errno), "0"(err)) | ||
270 | |||
271 | /* | 12 | /* |
272 | * Copy To/From Userspace | 13 | * Copy To/From Userspace |
273 | */ | 14 | */ |
@@ -437,7 +178,6 @@ __copy_to_user_inatomic(void __user *dst, const void *src, unsigned size) | |||
437 | return copy_user_generic((__force void *)dst, src, size); | 178 | return copy_user_generic((__force void *)dst, src, size); |
438 | } | 179 | } |
439 | 180 | ||
440 | #define ARCH_HAS_NOCACHE_UACCESS 1 | ||
441 | extern long __copy_user_nocache(void *dst, const void __user *src, | 181 | extern long __copy_user_nocache(void *dst, const void __user *src, |
442 | unsigned size, int zerorest); | 182 | unsigned size, int zerorest); |
443 | 183 | ||
@@ -455,4 +195,7 @@ static inline int __copy_from_user_inatomic_nocache(void *dst, | |||
455 | return __copy_user_nocache(dst, src, size, 0); | 195 | return __copy_user_nocache(dst, src, size, 0); |
456 | } | 196 | } |
457 | 197 | ||
198 | unsigned long | ||
199 | copy_user_handle_tail(char *to, char *from, unsigned len, unsigned zerorest); | ||
200 | |||
458 | #endif /* __X86_64_UACCESS_H */ | 201 | #endif /* __X86_64_UACCESS_H */ |
diff --git a/include/asm-x86/unistd_64.h b/include/asm-x86/unistd_64.h index fe26e36d0f51..9c1a4a3470d9 100644 --- a/include/asm-x86/unistd_64.h +++ b/include/asm-x86/unistd_64.h | |||
@@ -290,7 +290,7 @@ __SYSCALL(__NR_rt_sigtimedwait, sys_rt_sigtimedwait) | |||
290 | #define __NR_rt_sigqueueinfo 129 | 290 | #define __NR_rt_sigqueueinfo 129 |
291 | __SYSCALL(__NR_rt_sigqueueinfo, sys_rt_sigqueueinfo) | 291 | __SYSCALL(__NR_rt_sigqueueinfo, sys_rt_sigqueueinfo) |
292 | #define __NR_rt_sigsuspend 130 | 292 | #define __NR_rt_sigsuspend 130 |
293 | __SYSCALL(__NR_rt_sigsuspend, stub_rt_sigsuspend) | 293 | __SYSCALL(__NR_rt_sigsuspend, sys_rt_sigsuspend) |
294 | #define __NR_sigaltstack 131 | 294 | #define __NR_sigaltstack 131 |
295 | __SYSCALL(__NR_sigaltstack, stub_sigaltstack) | 295 | __SYSCALL(__NR_sigaltstack, stub_sigaltstack) |
296 | #define __NR_utime 132 | 296 | #define __NR_utime 132 |
diff --git a/include/asm-x86/uv/bios.h b/include/asm-x86/uv/bios.h new file mode 100644 index 000000000000..aa73362ff5df --- /dev/null +++ b/include/asm-x86/uv/bios.h | |||
@@ -0,0 +1,68 @@ | |||
1 | #ifndef _ASM_X86_BIOS_H | ||
2 | #define _ASM_X86_BIOS_H | ||
3 | |||
4 | /* | ||
5 | * BIOS layer definitions. | ||
6 | * | ||
7 | * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #include <linux/rtc.h> | ||
25 | |||
26 | #define BIOS_FREQ_BASE 0x01000001 | ||
27 | |||
28 | enum { | ||
29 | BIOS_FREQ_BASE_PLATFORM = 0, | ||
30 | BIOS_FREQ_BASE_INTERVAL_TIMER = 1, | ||
31 | BIOS_FREQ_BASE_REALTIME_CLOCK = 2 | ||
32 | }; | ||
33 | |||
34 | # define BIOS_CALL(result, a0, a1, a2, a3, a4, a5, a6, a7) \ | ||
35 | do { \ | ||
36 | /* XXX - the real call goes here */ \ | ||
37 | result.status = BIOS_STATUS_UNIMPLEMENTED; \ | ||
38 | isrv.v0 = 0; \ | ||
39 | isrv.v1 = 0; \ | ||
40 | } while (0) | ||
41 | |||
42 | enum { | ||
43 | BIOS_STATUS_SUCCESS = 0, | ||
44 | BIOS_STATUS_UNIMPLEMENTED = -1, | ||
45 | BIOS_STATUS_EINVAL = -2, | ||
46 | BIOS_STATUS_ERROR = -3 | ||
47 | }; | ||
48 | |||
49 | struct uv_bios_retval { | ||
50 | /* | ||
51 | * A zero status value indicates call completed without error. | ||
52 | * A negative status value indicates reason of call failure. | ||
53 | * A positive status value indicates success but an | ||
54 | * informational value should be printed (e.g., "reboot for | ||
55 | * change to take effect"). | ||
56 | */ | ||
57 | s64 status; | ||
58 | u64 v0; | ||
59 | u64 v1; | ||
60 | u64 v2; | ||
61 | }; | ||
62 | |||
63 | extern long | ||
64 | x86_bios_freq_base(unsigned long which, unsigned long *ticks_per_second, | ||
65 | unsigned long *drift_info); | ||
66 | extern const char *x86_bios_strerror(long status); | ||
67 | |||
68 | #endif /* _ASM_X86_BIOS_H */ | ||
diff --git a/include/asm-x86/uv/uv_bau.h b/include/asm-x86/uv/uv_bau.h new file mode 100644 index 000000000000..91ac0dfb7588 --- /dev/null +++ b/include/asm-x86/uv/uv_bau.h | |||
@@ -0,0 +1,337 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * SGI UV Broadcast Assist Unit definitions | ||
7 | * | ||
8 | * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_X86_UV_BAU__ | ||
12 | #define __ASM_X86_UV_BAU__ | ||
13 | |||
14 | #include <linux/bitmap.h> | ||
15 | #define BITSPERBYTE 8 | ||
16 | |||
17 | /* | ||
18 | * Broadcast Assist Unit messaging structures | ||
19 | * | ||
20 | * Selective Broadcast activations are induced by software action | ||
21 | * specifying a particular 8-descriptor "set" via a 6-bit index written | ||
22 | * to an MMR. | ||
23 | * Thus there are 64 unique 512-byte sets of SB descriptors - one set for | ||
24 | * each 6-bit index value. These descriptor sets are mapped in sequence | ||
25 | * starting with set 0 located at the address specified in the | ||
26 | * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512, | ||
27 | * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on. | ||
28 | * | ||
29 | * We will use 31 sets, one for sending BAU messages from each of the 32 | ||
30 | * cpu's on the node. | ||
31 | * | ||
32 | * TLB shootdown will use the first of the 8 descriptors of each set. | ||
33 | * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set). | ||
34 | */ | ||
35 | |||
36 | #define UV_ITEMS_PER_DESCRIPTOR 8 | ||
37 | #define UV_CPUS_PER_ACT_STATUS 32 | ||
38 | #define UV_ACT_STATUS_MASK 0x3 | ||
39 | #define UV_ACT_STATUS_SIZE 2 | ||
40 | #define UV_ACTIVATION_DESCRIPTOR_SIZE 32 | ||
41 | #define UV_DISTRIBUTION_SIZE 256 | ||
42 | #define UV_SW_ACK_NPENDING 8 | ||
43 | #define UV_BAU_MESSAGE 200 | ||
44 | /* | ||
45 | * Messaging irq; see irq_64.h and include/asm-x86/hw_irq_64.h | ||
46 | * To be dynamically allocated in the future | ||
47 | */ | ||
48 | #define UV_NET_ENDPOINT_INTD 0x38 | ||
49 | #define UV_DESC_BASE_PNODE_SHIFT 49 | ||
50 | #define UV_PAYLOADQ_PNODE_SHIFT 49 | ||
51 | #define UV_PTC_BASENAME "sgi_uv/ptc_statistics" | ||
52 | #define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask)) | ||
53 | |||
54 | /* | ||
55 | * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1 | ||
56 | */ | ||
57 | #define DESC_STATUS_IDLE 0 | ||
58 | #define DESC_STATUS_ACTIVE 1 | ||
59 | #define DESC_STATUS_DESTINATION_TIMEOUT 2 | ||
60 | #define DESC_STATUS_SOURCE_TIMEOUT 3 | ||
61 | |||
62 | /* | ||
63 | * source side threshholds at which message retries print a warning | ||
64 | */ | ||
65 | #define SOURCE_TIMEOUT_LIMIT 20 | ||
66 | #define DESTINATION_TIMEOUT_LIMIT 20 | ||
67 | |||
68 | /* | ||
69 | * number of entries in the destination side payload queue | ||
70 | */ | ||
71 | #define DEST_Q_SIZE 17 | ||
72 | /* | ||
73 | * number of destination side software ack resources | ||
74 | */ | ||
75 | #define DEST_NUM_RESOURCES 8 | ||
76 | #define MAX_CPUS_PER_NODE 32 | ||
77 | /* | ||
78 | * completion statuses for sending a TLB flush message | ||
79 | */ | ||
80 | #define FLUSH_RETRY 1 | ||
81 | #define FLUSH_GIVEUP 2 | ||
82 | #define FLUSH_COMPLETE 3 | ||
83 | |||
84 | /* | ||
85 | * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor) | ||
86 | * If the 'multilevel' flag in the header portion of the descriptor | ||
87 | * has been set to 0, then endpoint multi-unicast mode is selected. | ||
88 | * The distribution specification (32 bytes) is interpreted as a 256-bit | ||
89 | * distribution vector. Adjacent bits correspond to consecutive even numbered | ||
90 | * nodeIDs. The result of adding the index of a given bit to the 15-bit | ||
91 | * 'base_dest_nodeid' field of the header corresponds to the | ||
92 | * destination nodeID associated with that specified bit. | ||
93 | */ | ||
94 | struct bau_target_nodemask { | ||
95 | unsigned long bits[BITS_TO_LONGS(256)]; | ||
96 | }; | ||
97 | |||
98 | /* | ||
99 | * mask of cpu's on a node | ||
100 | * (during initialization we need to check that unsigned long has | ||
101 | * enough bits for max. cpu's per node) | ||
102 | */ | ||
103 | struct bau_local_cpumask { | ||
104 | unsigned long bits; | ||
105 | }; | ||
106 | |||
107 | /* | ||
108 | * Payload: 16 bytes (128 bits) (bytes 0x20-0x2f of descriptor) | ||
109 | * only 12 bytes (96 bits) of the payload area are usable. | ||
110 | * An additional 3 bytes (bits 27:4) of the header address are carried | ||
111 | * to the next bytes of the destination payload queue. | ||
112 | * And an additional 2 bytes of the header Suppl_A field are also | ||
113 | * carried to the destination payload queue. | ||
114 | * But the first byte of the Suppl_A becomes bits 127:120 (the 16th byte) | ||
115 | * of the destination payload queue, which is written by the hardware | ||
116 | * with the s/w ack resource bit vector. | ||
117 | * [ effective message contents (16 bytes (128 bits) maximum), not counting | ||
118 | * the s/w ack bit vector ] | ||
119 | */ | ||
120 | |||
121 | /* | ||
122 | * The payload is software-defined for INTD transactions | ||
123 | */ | ||
124 | struct bau_msg_payload { | ||
125 | unsigned long address; /* signifies a page or all TLB's | ||
126 | of the cpu */ | ||
127 | /* 64 bits */ | ||
128 | unsigned short sending_cpu; /* filled in by sender */ | ||
129 | /* 16 bits */ | ||
130 | unsigned short acknowledge_count;/* filled in by destination */ | ||
131 | /* 16 bits */ | ||
132 | unsigned int reserved1:32; /* not usable */ | ||
133 | }; | ||
134 | |||
135 | |||
136 | /* | ||
137 | * Message header: 16 bytes (128 bits) (bytes 0x30-0x3f of descriptor) | ||
138 | * see table 4.2.3.0.1 in broacast_assist spec. | ||
139 | */ | ||
140 | struct bau_msg_header { | ||
141 | int dest_subnodeid:6; /* must be zero */ | ||
142 | /* bits 5:0 */ | ||
143 | int base_dest_nodeid:15; /* nasid>>1 (pnode) of first bit in node_map */ | ||
144 | /* bits 20:6 */ | ||
145 | int command:8; /* message type */ | ||
146 | /* bits 28:21 */ | ||
147 | /* 0x38: SN3net EndPoint Message */ | ||
148 | int rsvd_1:3; /* must be zero */ | ||
149 | /* bits 31:29 */ | ||
150 | /* int will align on 32 bits */ | ||
151 | int rsvd_2:9; /* must be zero */ | ||
152 | /* bits 40:32 */ | ||
153 | /* Suppl_A is 56-41 */ | ||
154 | int payload_2a:8; /* becomes byte 16 of msg */ | ||
155 | /* bits 48:41 */ /* not currently using */ | ||
156 | int payload_2b:8; /* becomes byte 17 of msg */ | ||
157 | /* bits 56:49 */ /* not currently using */ | ||
158 | /* Address field (96:57) is never used as an | ||
159 | address (these are address bits 42:3) */ | ||
160 | int rsvd_3:1; /* must be zero */ | ||
161 | /* bit 57 */ | ||
162 | /* address bits 27:4 are payload */ | ||
163 | /* these 24 bits become bytes 12-14 of msg */ | ||
164 | int replied_to:1; /* sent as 0 by the source to byte 12 */ | ||
165 | /* bit 58 */ | ||
166 | |||
167 | int payload_1a:5; /* not currently used */ | ||
168 | /* bits 63:59 */ | ||
169 | int payload_1b:8; /* not currently used */ | ||
170 | /* bits 71:64 */ | ||
171 | int payload_1c:8; /* not currently used */ | ||
172 | /* bits 79:72 */ | ||
173 | int payload_1d:2; /* not currently used */ | ||
174 | /* bits 81:80 */ | ||
175 | |||
176 | int rsvd_4:7; /* must be zero */ | ||
177 | /* bits 88:82 */ | ||
178 | int sw_ack_flag:1; /* software acknowledge flag */ | ||
179 | /* bit 89 */ | ||
180 | /* INTD trasactions at destination are to | ||
181 | wait for software acknowledge */ | ||
182 | int rsvd_5:6; /* must be zero */ | ||
183 | /* bits 95:90 */ | ||
184 | int rsvd_6:5; /* must be zero */ | ||
185 | /* bits 100:96 */ | ||
186 | int int_both:1; /* if 1, interrupt both sockets on the blade */ | ||
187 | /* bit 101*/ | ||
188 | int fairness:3; /* usually zero */ | ||
189 | /* bits 104:102 */ | ||
190 | int multilevel:1; /* multi-level multicast format */ | ||
191 | /* bit 105 */ | ||
192 | /* 0 for TLB: endpoint multi-unicast messages */ | ||
193 | int chaining:1; /* next descriptor is part of this activation*/ | ||
194 | /* bit 106 */ | ||
195 | int rsvd_7:21; /* must be zero */ | ||
196 | /* bits 127:107 */ | ||
197 | }; | ||
198 | |||
199 | /* | ||
200 | * The activation descriptor: | ||
201 | * The format of the message to send, plus all accompanying control | ||
202 | * Should be 64 bytes | ||
203 | */ | ||
204 | struct bau_desc { | ||
205 | struct bau_target_nodemask distribution; | ||
206 | /* | ||
207 | * message template, consisting of header and payload: | ||
208 | */ | ||
209 | struct bau_msg_header header; | ||
210 | struct bau_msg_payload payload; | ||
211 | }; | ||
212 | /* | ||
213 | * -payload-- ---------header------ | ||
214 | * bytes 0-11 bits 41-56 bits 58-81 | ||
215 | * A B (2) C (3) | ||
216 | * | ||
217 | * A/B/C are moved to: | ||
218 | * A C B | ||
219 | * bytes 0-11 bytes 12-14 bytes 16-17 (byte 15 filled in by hw as vector) | ||
220 | * ------------payload queue----------- | ||
221 | */ | ||
222 | |||
223 | /* | ||
224 | * The payload queue on the destination side is an array of these. | ||
225 | * With BAU_MISC_CONTROL set for software acknowledge mode, the messages | ||
226 | * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17 | ||
227 | * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120) | ||
228 | * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from | ||
229 | * sw_ack_vector and payload_2) | ||
230 | * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software | ||
231 | * Acknowledge Processing) also selects 32 byte (17 bytes usable) payload | ||
232 | * operation." | ||
233 | */ | ||
234 | struct bau_payload_queue_entry { | ||
235 | unsigned long address; /* signifies a page or all TLB's | ||
236 | of the cpu */ | ||
237 | /* 64 bits, bytes 0-7 */ | ||
238 | |||
239 | unsigned short sending_cpu; /* cpu that sent the message */ | ||
240 | /* 16 bits, bytes 8-9 */ | ||
241 | |||
242 | unsigned short acknowledge_count; /* filled in by destination */ | ||
243 | /* 16 bits, bytes 10-11 */ | ||
244 | |||
245 | unsigned short replied_to:1; /* sent as 0 by the source */ | ||
246 | /* 1 bit */ | ||
247 | unsigned short unused1:7; /* not currently using */ | ||
248 | /* 7 bits: byte 12) */ | ||
249 | |||
250 | unsigned char unused2[2]; /* not currently using */ | ||
251 | /* bytes 13-14 */ | ||
252 | |||
253 | unsigned char sw_ack_vector; /* filled in by the hardware */ | ||
254 | /* byte 15 (bits 127:120) */ | ||
255 | |||
256 | unsigned char unused4[3]; /* not currently using bytes 17-19 */ | ||
257 | /* bytes 17-19 */ | ||
258 | |||
259 | int number_of_cpus; /* filled in at destination */ | ||
260 | /* 32 bits, bytes 20-23 (aligned) */ | ||
261 | |||
262 | unsigned char unused5[8]; /* not using */ | ||
263 | /* bytes 24-31 */ | ||
264 | }; | ||
265 | |||
266 | /* | ||
267 | * one for every slot in the destination payload queue | ||
268 | */ | ||
269 | struct bau_msg_status { | ||
270 | struct bau_local_cpumask seen_by; /* map of cpu's */ | ||
271 | }; | ||
272 | |||
273 | /* | ||
274 | * one for every slot in the destination software ack resources | ||
275 | */ | ||
276 | struct bau_sw_ack_status { | ||
277 | struct bau_payload_queue_entry *msg; /* associated message */ | ||
278 | int watcher; /* cpu monitoring, or -1 */ | ||
279 | }; | ||
280 | |||
281 | /* | ||
282 | * one on every node and per-cpu; to locate the software tables | ||
283 | */ | ||
284 | struct bau_control { | ||
285 | struct bau_desc *descriptor_base; | ||
286 | struct bau_payload_queue_entry *bau_msg_head; | ||
287 | struct bau_payload_queue_entry *va_queue_first; | ||
288 | struct bau_payload_queue_entry *va_queue_last; | ||
289 | struct bau_msg_status *msg_statuses; | ||
290 | int *watching; /* pointer to array */ | ||
291 | }; | ||
292 | |||
293 | /* | ||
294 | * This structure is allocated per_cpu for UV TLB shootdown statistics. | ||
295 | */ | ||
296 | struct ptc_stats { | ||
297 | unsigned long ptc_i; /* number of IPI-style flushes */ | ||
298 | unsigned long requestor; /* number of nodes this cpu sent to */ | ||
299 | unsigned long requestee; /* times cpu was remotely requested */ | ||
300 | unsigned long alltlb; /* times all tlb's on this cpu were flushed */ | ||
301 | unsigned long onetlb; /* times just one tlb on this cpu was flushed */ | ||
302 | unsigned long s_retry; /* retries on source side timeouts */ | ||
303 | unsigned long d_retry; /* retries on destination side timeouts */ | ||
304 | unsigned long sflush; /* cycles spent in uv_flush_tlb_others */ | ||
305 | unsigned long dflush; /* cycles spent on destination side */ | ||
306 | unsigned long retriesok; /* successes on retries */ | ||
307 | unsigned long nomsg; /* interrupts with no message */ | ||
308 | unsigned long multmsg; /* interrupts with multiple messages */ | ||
309 | unsigned long ntargeted;/* nodes targeted */ | ||
310 | }; | ||
311 | |||
312 | static inline int bau_node_isset(int node, struct bau_target_nodemask *dstp) | ||
313 | { | ||
314 | return constant_test_bit(node, &dstp->bits[0]); | ||
315 | } | ||
316 | static inline void bau_node_set(int node, struct bau_target_nodemask *dstp) | ||
317 | { | ||
318 | __set_bit(node, &dstp->bits[0]); | ||
319 | } | ||
320 | static inline void bau_nodes_clear(struct bau_target_nodemask *dstp, int nbits) | ||
321 | { | ||
322 | bitmap_zero(&dstp->bits[0], nbits); | ||
323 | } | ||
324 | |||
325 | static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits) | ||
326 | { | ||
327 | bitmap_zero(&dstp->bits, nbits); | ||
328 | } | ||
329 | |||
330 | #define cpubit_isset(cpu, bau_local_cpumask) \ | ||
331 | test_bit((cpu), (bau_local_cpumask).bits) | ||
332 | |||
333 | extern int uv_flush_tlb_others(cpumask_t *, struct mm_struct *, unsigned long); | ||
334 | extern void uv_bau_message_intr1(void); | ||
335 | extern void uv_bau_timeout_intr1(void); | ||
336 | |||
337 | #endif /* __ASM_X86_UV_BAU__ */ | ||
diff --git a/include/asm-x86/uv/uv_hub.h b/include/asm-x86/uv/uv_hub.h index 26b9240d1e23..a4ef26e5850b 100644 --- a/include/asm-x86/uv/uv_hub.h +++ b/include/asm-x86/uv/uv_hub.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * SGI UV architectural definitions | 6 | * SGI UV architectural definitions |
7 | * | 7 | * |
8 | * Copyright (C) 2007 Silicon Graphics, Inc. All rights reserved. | 8 | * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef __ASM_X86_UV_HUB_H__ | 11 | #ifndef __ASM_X86_UV_HUB_H__ |
@@ -20,26 +20,49 @@ | |||
20 | /* | 20 | /* |
21 | * Addressing Terminology | 21 | * Addressing Terminology |
22 | * | 22 | * |
23 | * NASID - network ID of a router, Mbrick or Cbrick. Nasid values of | 23 | * M - The low M bits of a physical address represent the offset |
24 | * routers always have low bit of 1, C/MBricks have low bit | 24 | * into the blade local memory. RAM memory on a blade is physically |
25 | * equal to 0. Most addressing macros that target UV hub chips | 25 | * contiguous (although various IO spaces may punch holes in |
26 | * right shift the NASID by 1 to exclude the always-zero bit. | 26 | * it).. |
27 | * | 27 | * |
28 | * SNASID - NASID right shifted by 1 bit. | 28 | * N - Number of bits in the node portion of a socket physical |
29 | * address. | ||
30 | * | ||
31 | * NASID - network ID of a router, Mbrick or Cbrick. Nasid values of | ||
32 | * routers always have low bit of 1, C/MBricks have low bit | ||
33 | * equal to 0. Most addressing macros that target UV hub chips | ||
34 | * right shift the NASID by 1 to exclude the always-zero bit. | ||
35 | * NASIDs contain up to 15 bits. | ||
36 | * | ||
37 | * GNODE - NASID right shifted by 1 bit. Most mmrs contain gnodes instead | ||
38 | * of nasids. | ||
39 | * | ||
40 | * PNODE - the low N bits of the GNODE. The PNODE is the most useful variant | ||
41 | * of the nasid for socket usage. | ||
42 | * | ||
43 | * | ||
44 | * NumaLink Global Physical Address Format: | ||
45 | * +--------------------------------+---------------------+ | ||
46 | * |00..000| GNODE | NodeOffset | | ||
47 | * +--------------------------------+---------------------+ | ||
48 | * |<-------53 - M bits --->|<--------M bits -----> | ||
49 | * | ||
50 | * M - number of node offset bits (35 .. 40) | ||
29 | * | 51 | * |
30 | * | 52 | * |
31 | * Memory/UV-HUB Processor Socket Address Format: | 53 | * Memory/UV-HUB Processor Socket Address Format: |
32 | * +--------+---------------+---------------------+ | 54 | * +----------------+---------------+---------------------+ |
33 | * |00..0000| SNASID | NodeOffset | | 55 | * |00..000000000000| PNODE | NodeOffset | |
34 | * +--------+---------------+---------------------+ | 56 | * +----------------+---------------+---------------------+ |
35 | * <--- N bits --->|<--------M bits -----> | 57 | * <--- N bits --->|<--------M bits -----> |
36 | * | 58 | * |
37 | * M number of node offset bits (35 .. 40) | 59 | * M - number of node offset bits (35 .. 40) |
38 | * N number of SNASID bits (0 .. 10) | 60 | * N - number of PNODE bits (0 .. 10) |
39 | * | 61 | * |
40 | * Note: M + N cannot currently exceed 44 (x86_64) or 46 (IA64). | 62 | * Note: M + N cannot currently exceed 44 (x86_64) or 46 (IA64). |
41 | * The actual values are configuration dependent and are set at | 63 | * The actual values are configuration dependent and are set at |
42 | * boot time | 64 | * boot time. M & N values are set by the hardware/BIOS at boot. |
65 | * | ||
43 | * | 66 | * |
44 | * APICID format | 67 | * APICID format |
45 | * NOTE!!!!!! This is the current format of the APICID. However, code | 68 | * NOTE!!!!!! This is the current format of the APICID. However, code |
@@ -48,14 +71,14 @@ | |||
48 | * | 71 | * |
49 | * 1111110000000000 | 72 | * 1111110000000000 |
50 | * 5432109876543210 | 73 | * 5432109876543210 |
51 | * nnnnnnnnnnlc0cch | 74 | * pppppppppplc0cch |
52 | * sssssssssss | 75 | * sssssssssss |
53 | * | 76 | * |
54 | * n = snasid bits | 77 | * p = pnode bits |
55 | * l = socket number on board | 78 | * l = socket number on board |
56 | * c = core | 79 | * c = core |
57 | * h = hyperthread | 80 | * h = hyperthread |
58 | * s = bits that are in the socket CSR | 81 | * s = bits that are in the SOCKET_ID CSR |
59 | * | 82 | * |
60 | * Note: Processor only supports 12 bits in the APICID register. The ACPI | 83 | * Note: Processor only supports 12 bits in the APICID register. The ACPI |
61 | * tables hold all 16 bits. Software needs to be aware of this. | 84 | * tables hold all 16 bits. Software needs to be aware of this. |
@@ -74,7 +97,7 @@ | |||
74 | * This value is also the value of the maximum number of non-router NASIDs | 97 | * This value is also the value of the maximum number of non-router NASIDs |
75 | * in the numalink fabric. | 98 | * in the numalink fabric. |
76 | * | 99 | * |
77 | * NOTE: a brick may be 1 or 2 OS nodes. Don't get these confused. | 100 | * NOTE: a brick may contain 1 or 2 OS nodes. Don't get these confused. |
78 | */ | 101 | */ |
79 | #define UV_MAX_NUMALINK_BLADES 16384 | 102 | #define UV_MAX_NUMALINK_BLADES 16384 |
80 | 103 | ||
@@ -96,8 +119,12 @@ | |||
96 | */ | 119 | */ |
97 | struct uv_hub_info_s { | 120 | struct uv_hub_info_s { |
98 | unsigned long global_mmr_base; | 121 | unsigned long global_mmr_base; |
99 | unsigned short local_nasid; | 122 | unsigned long gpa_mask; |
100 | unsigned short gnode_upper; | 123 | unsigned long gnode_upper; |
124 | unsigned long lowmem_remap_top; | ||
125 | unsigned long lowmem_remap_base; | ||
126 | unsigned short pnode; | ||
127 | unsigned short pnode_mask; | ||
101 | unsigned short coherency_domain_number; | 128 | unsigned short coherency_domain_number; |
102 | unsigned short numa_blade_id; | 129 | unsigned short numa_blade_id; |
103 | unsigned char blade_processor_id; | 130 | unsigned char blade_processor_id; |
@@ -112,83 +139,126 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); | |||
112 | * Local & Global MMR space macros. | 139 | * Local & Global MMR space macros. |
113 | * Note: macros are intended to be used ONLY by inline functions | 140 | * Note: macros are intended to be used ONLY by inline functions |
114 | * in this file - not by other kernel code. | 141 | * in this file - not by other kernel code. |
142 | * n - NASID (full 15-bit global nasid) | ||
143 | * g - GNODE (full 15-bit global nasid, right shifted 1) | ||
144 | * p - PNODE (local part of nsids, right shifted 1) | ||
115 | */ | 145 | */ |
116 | #define UV_SNASID(n) ((n) >> 1) | 146 | #define UV_NASID_TO_PNODE(n) (((n) >> 1) & uv_hub_info->pnode_mask) |
117 | #define UV_NASID(n) ((n) << 1) | 147 | #define UV_PNODE_TO_NASID(p) (((p) << 1) | uv_hub_info->gnode_upper) |
118 | 148 | ||
119 | #define UV_LOCAL_MMR_BASE 0xf4000000UL | 149 | #define UV_LOCAL_MMR_BASE 0xf4000000UL |
120 | #define UV_GLOBAL_MMR32_BASE 0xf8000000UL | 150 | #define UV_GLOBAL_MMR32_BASE 0xf8000000UL |
121 | #define UV_GLOBAL_MMR64_BASE (uv_hub_info->global_mmr_base) | 151 | #define UV_GLOBAL_MMR64_BASE (uv_hub_info->global_mmr_base) |
152 | #define UV_LOCAL_MMR_SIZE (64UL * 1024 * 1024) | ||
153 | #define UV_GLOBAL_MMR32_SIZE (64UL * 1024 * 1024) | ||
122 | 154 | ||
123 | #define UV_GLOBAL_MMR32_SNASID_MASK 0x3ff | 155 | #define UV_GLOBAL_MMR32_PNODE_SHIFT 15 |
124 | #define UV_GLOBAL_MMR32_SNASID_SHIFT 15 | 156 | #define UV_GLOBAL_MMR64_PNODE_SHIFT 26 |
125 | #define UV_GLOBAL_MMR64_SNASID_SHIFT 26 | ||
126 | 157 | ||
127 | #define UV_GLOBAL_MMR32_NASID_BITS(n) \ | 158 | #define UV_GLOBAL_MMR32_PNODE_BITS(p) ((p) << (UV_GLOBAL_MMR32_PNODE_SHIFT)) |
128 | (((UV_SNASID(n) & UV_GLOBAL_MMR32_SNASID_MASK)) << \ | ||
129 | (UV_GLOBAL_MMR32_SNASID_SHIFT)) | ||
130 | 159 | ||
131 | #define UV_GLOBAL_MMR64_NASID_BITS(n) \ | 160 | #define UV_GLOBAL_MMR64_PNODE_BITS(p) \ |
132 | ((unsigned long)UV_SNASID(n) << UV_GLOBAL_MMR64_SNASID_SHIFT) | 161 | ((unsigned long)(p) << UV_GLOBAL_MMR64_PNODE_SHIFT) |
162 | |||
163 | #define UV_APIC_PNODE_SHIFT 6 | ||
164 | |||
165 | /* | ||
166 | * Macros for converting between kernel virtual addresses, socket local physical | ||
167 | * addresses, and UV global physical addresses. | ||
168 | * Note: use the standard __pa() & __va() macros for converting | ||
169 | * between socket virtual and socket physical addresses. | ||
170 | */ | ||
171 | |||
172 | /* socket phys RAM --> UV global physical address */ | ||
173 | static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr) | ||
174 | { | ||
175 | if (paddr < uv_hub_info->lowmem_remap_top) | ||
176 | paddr += uv_hub_info->lowmem_remap_base; | ||
177 | return paddr | uv_hub_info->gnode_upper; | ||
178 | } | ||
179 | |||
180 | |||
181 | /* socket virtual --> UV global physical address */ | ||
182 | static inline unsigned long uv_gpa(void *v) | ||
183 | { | ||
184 | return __pa(v) | uv_hub_info->gnode_upper; | ||
185 | } | ||
186 | |||
187 | /* socket virtual --> UV global physical address */ | ||
188 | static inline void *uv_vgpa(void *v) | ||
189 | { | ||
190 | return (void *)uv_gpa(v); | ||
191 | } | ||
192 | |||
193 | /* UV global physical address --> socket virtual */ | ||
194 | static inline void *uv_va(unsigned long gpa) | ||
195 | { | ||
196 | return __va(gpa & uv_hub_info->gpa_mask); | ||
197 | } | ||
198 | |||
199 | /* pnode, offset --> socket virtual */ | ||
200 | static inline void *uv_pnode_offset_to_vaddr(int pnode, unsigned long offset) | ||
201 | { | ||
202 | return __va(((unsigned long)pnode << uv_hub_info->m_val) | offset); | ||
203 | } | ||
133 | 204 | ||
134 | #define UV_APIC_NASID_SHIFT 6 | ||
135 | 205 | ||
136 | /* | 206 | /* |
137 | * Extract a NASID from an APICID (full apicid, not processor subset) | 207 | * Extract a PNODE from an APICID (full apicid, not processor subset) |
138 | */ | 208 | */ |
139 | static inline int uv_apicid_to_nasid(int apicid) | 209 | static inline int uv_apicid_to_pnode(int apicid) |
140 | { | 210 | { |
141 | return (UV_NASID(apicid >> UV_APIC_NASID_SHIFT)); | 211 | return (apicid >> UV_APIC_PNODE_SHIFT); |
142 | } | 212 | } |
143 | 213 | ||
144 | /* | 214 | /* |
145 | * Access global MMRs using the low memory MMR32 space. This region supports | 215 | * Access global MMRs using the low memory MMR32 space. This region supports |
146 | * faster MMR access but not all MMRs are accessible in this space. | 216 | * faster MMR access but not all MMRs are accessible in this space. |
147 | */ | 217 | */ |
148 | static inline unsigned long *uv_global_mmr32_address(int nasid, | 218 | static inline unsigned long *uv_global_mmr32_address(int pnode, |
149 | unsigned long offset) | 219 | unsigned long offset) |
150 | { | 220 | { |
151 | return __va(UV_GLOBAL_MMR32_BASE | | 221 | return __va(UV_GLOBAL_MMR32_BASE | |
152 | UV_GLOBAL_MMR32_NASID_BITS(nasid) | offset); | 222 | UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset); |
153 | } | 223 | } |
154 | 224 | ||
155 | static inline void uv_write_global_mmr32(int nasid, unsigned long offset, | 225 | static inline void uv_write_global_mmr32(int pnode, unsigned long offset, |
156 | unsigned long val) | 226 | unsigned long val) |
157 | { | 227 | { |
158 | *uv_global_mmr32_address(nasid, offset) = val; | 228 | *uv_global_mmr32_address(pnode, offset) = val; |
159 | } | 229 | } |
160 | 230 | ||
161 | static inline unsigned long uv_read_global_mmr32(int nasid, | 231 | static inline unsigned long uv_read_global_mmr32(int pnode, |
162 | unsigned long offset) | 232 | unsigned long offset) |
163 | { | 233 | { |
164 | return *uv_global_mmr32_address(nasid, offset); | 234 | return *uv_global_mmr32_address(pnode, offset); |
165 | } | 235 | } |
166 | 236 | ||
167 | /* | 237 | /* |
168 | * Access Global MMR space using the MMR space located at the top of physical | 238 | * Access Global MMR space using the MMR space located at the top of physical |
169 | * memory. | 239 | * memory. |
170 | */ | 240 | */ |
171 | static inline unsigned long *uv_global_mmr64_address(int nasid, | 241 | static inline unsigned long *uv_global_mmr64_address(int pnode, |
172 | unsigned long offset) | 242 | unsigned long offset) |
173 | { | 243 | { |
174 | return __va(UV_GLOBAL_MMR64_BASE | | 244 | return __va(UV_GLOBAL_MMR64_BASE | |
175 | UV_GLOBAL_MMR64_NASID_BITS(nasid) | offset); | 245 | UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset); |
176 | } | 246 | } |
177 | 247 | ||
178 | static inline void uv_write_global_mmr64(int nasid, unsigned long offset, | 248 | static inline void uv_write_global_mmr64(int pnode, unsigned long offset, |
179 | unsigned long val) | 249 | unsigned long val) |
180 | { | 250 | { |
181 | *uv_global_mmr64_address(nasid, offset) = val; | 251 | *uv_global_mmr64_address(pnode, offset) = val; |
182 | } | 252 | } |
183 | 253 | ||
184 | static inline unsigned long uv_read_global_mmr64(int nasid, | 254 | static inline unsigned long uv_read_global_mmr64(int pnode, |
185 | unsigned long offset) | 255 | unsigned long offset) |
186 | { | 256 | { |
187 | return *uv_global_mmr64_address(nasid, offset); | 257 | return *uv_global_mmr64_address(pnode, offset); |
188 | } | 258 | } |
189 | 259 | ||
190 | /* | 260 | /* |
191 | * Access node local MMRs. Faster than using global space but only local MMRs | 261 | * Access hub local MMRs. Faster than using global space but only local MMRs |
192 | * are accessible. | 262 | * are accessible. |
193 | */ | 263 | */ |
194 | static inline unsigned long *uv_local_mmr_address(unsigned long offset) | 264 | static inline unsigned long *uv_local_mmr_address(unsigned long offset) |
@@ -207,15 +277,15 @@ static inline void uv_write_local_mmr(unsigned long offset, unsigned long val) | |||
207 | } | 277 | } |
208 | 278 | ||
209 | /* | 279 | /* |
210 | * Structures and definitions for converting between cpu, node, and blade | 280 | * Structures and definitions for converting between cpu, node, pnode, and blade |
211 | * numbers. | 281 | * numbers. |
212 | */ | 282 | */ |
213 | struct uv_blade_info { | 283 | struct uv_blade_info { |
214 | unsigned short nr_posible_cpus; | 284 | unsigned short nr_possible_cpus; |
215 | unsigned short nr_online_cpus; | 285 | unsigned short nr_online_cpus; |
216 | unsigned short nasid; | 286 | unsigned short pnode; |
217 | }; | 287 | }; |
218 | struct uv_blade_info *uv_blade_info; | 288 | extern struct uv_blade_info *uv_blade_info; |
219 | extern short *uv_node_to_blade; | 289 | extern short *uv_node_to_blade; |
220 | extern short *uv_cpu_to_blade; | 290 | extern short *uv_cpu_to_blade; |
221 | extern short uv_possible_blades; | 291 | extern short uv_possible_blades; |
@@ -244,16 +314,16 @@ static inline int uv_node_to_blade_id(int nid) | |||
244 | return uv_node_to_blade[nid]; | 314 | return uv_node_to_blade[nid]; |
245 | } | 315 | } |
246 | 316 | ||
247 | /* Convert a blade id to the NASID of the blade */ | 317 | /* Convert a blade id to the PNODE of the blade */ |
248 | static inline int uv_blade_to_nasid(int bid) | 318 | static inline int uv_blade_to_pnode(int bid) |
249 | { | 319 | { |
250 | return uv_blade_info[bid].nasid; | 320 | return uv_blade_info[bid].pnode; |
251 | } | 321 | } |
252 | 322 | ||
253 | /* Determine the number of possible cpus on a blade */ | 323 | /* Determine the number of possible cpus on a blade */ |
254 | static inline int uv_blade_nr_possible_cpus(int bid) | 324 | static inline int uv_blade_nr_possible_cpus(int bid) |
255 | { | 325 | { |
256 | return uv_blade_info[bid].nr_posible_cpus; | 326 | return uv_blade_info[bid].nr_possible_cpus; |
257 | } | 327 | } |
258 | 328 | ||
259 | /* Determine the number of online cpus on a blade */ | 329 | /* Determine the number of online cpus on a blade */ |
@@ -262,16 +332,16 @@ static inline int uv_blade_nr_online_cpus(int bid) | |||
262 | return uv_blade_info[bid].nr_online_cpus; | 332 | return uv_blade_info[bid].nr_online_cpus; |
263 | } | 333 | } |
264 | 334 | ||
265 | /* Convert a cpu id to the NASID of the blade containing the cpu */ | 335 | /* Convert a cpu id to the PNODE of the blade containing the cpu */ |
266 | static inline int uv_cpu_to_nasid(int cpu) | 336 | static inline int uv_cpu_to_pnode(int cpu) |
267 | { | 337 | { |
268 | return uv_blade_info[uv_cpu_to_blade_id(cpu)].nasid; | 338 | return uv_blade_info[uv_cpu_to_blade_id(cpu)].pnode; |
269 | } | 339 | } |
270 | 340 | ||
271 | /* Convert a node number to the NASID of the blade */ | 341 | /* Convert a linux node number to the PNODE of the blade */ |
272 | static inline int uv_node_to_nasid(int nid) | 342 | static inline int uv_node_to_pnode(int nid) |
273 | { | 343 | { |
274 | return uv_blade_info[uv_node_to_blade_id(nid)].nasid; | 344 | return uv_blade_info[uv_node_to_blade_id(nid)].pnode; |
275 | } | 345 | } |
276 | 346 | ||
277 | /* Maximum possible number of blades */ | 347 | /* Maximum possible number of blades */ |
diff --git a/include/asm-x86/uv/uv_mmrs.h b/include/asm-x86/uv/uv_mmrs.h index 3b69fe6b6376..151fd7fcb809 100644 --- a/include/asm-x86/uv/uv_mmrs.h +++ b/include/asm-x86/uv/uv_mmrs.h | |||
@@ -11,17 +11,290 @@ | |||
11 | #ifndef __ASM_X86_UV_MMRS__ | 11 | #ifndef __ASM_X86_UV_MMRS__ |
12 | #define __ASM_X86_UV_MMRS__ | 12 | #define __ASM_X86_UV_MMRS__ |
13 | 13 | ||
14 | /* | 14 | #define UV_MMR_ENABLE (1UL << 63) |
15 | * AUTO GENERATED - Do not edit | 15 | |
16 | */ | 16 | /* ========================================================================= */ |
17 | /* UVH_BAU_DATA_CONFIG */ | ||
18 | /* ========================================================================= */ | ||
19 | #define UVH_BAU_DATA_CONFIG 0x61680UL | ||
20 | #define UVH_BAU_DATA_CONFIG_32 0x0438 | ||
21 | |||
22 | #define UVH_BAU_DATA_CONFIG_VECTOR_SHFT 0 | ||
23 | #define UVH_BAU_DATA_CONFIG_VECTOR_MASK 0x00000000000000ffUL | ||
24 | #define UVH_BAU_DATA_CONFIG_DM_SHFT 8 | ||
25 | #define UVH_BAU_DATA_CONFIG_DM_MASK 0x0000000000000700UL | ||
26 | #define UVH_BAU_DATA_CONFIG_DESTMODE_SHFT 11 | ||
27 | #define UVH_BAU_DATA_CONFIG_DESTMODE_MASK 0x0000000000000800UL | ||
28 | #define UVH_BAU_DATA_CONFIG_STATUS_SHFT 12 | ||
29 | #define UVH_BAU_DATA_CONFIG_STATUS_MASK 0x0000000000001000UL | ||
30 | #define UVH_BAU_DATA_CONFIG_P_SHFT 13 | ||
31 | #define UVH_BAU_DATA_CONFIG_P_MASK 0x0000000000002000UL | ||
32 | #define UVH_BAU_DATA_CONFIG_T_SHFT 15 | ||
33 | #define UVH_BAU_DATA_CONFIG_T_MASK 0x0000000000008000UL | ||
34 | #define UVH_BAU_DATA_CONFIG_M_SHFT 16 | ||
35 | #define UVH_BAU_DATA_CONFIG_M_MASK 0x0000000000010000UL | ||
36 | #define UVH_BAU_DATA_CONFIG_APIC_ID_SHFT 32 | ||
37 | #define UVH_BAU_DATA_CONFIG_APIC_ID_MASK 0xffffffff00000000UL | ||
38 | |||
39 | union uvh_bau_data_config_u { | ||
40 | unsigned long v; | ||
41 | struct uvh_bau_data_config_s { | ||
42 | unsigned long vector_ : 8; /* RW */ | ||
43 | unsigned long dm : 3; /* RW */ | ||
44 | unsigned long destmode : 1; /* RW */ | ||
45 | unsigned long status : 1; /* RO */ | ||
46 | unsigned long p : 1; /* RO */ | ||
47 | unsigned long rsvd_14 : 1; /* */ | ||
48 | unsigned long t : 1; /* RO */ | ||
49 | unsigned long m : 1; /* RW */ | ||
50 | unsigned long rsvd_17_31: 15; /* */ | ||
51 | unsigned long apic_id : 32; /* RW */ | ||
52 | } s; | ||
53 | }; | ||
54 | |||
55 | /* ========================================================================= */ | ||
56 | /* UVH_EVENT_OCCURRED0 */ | ||
57 | /* ========================================================================= */ | ||
58 | #define UVH_EVENT_OCCURRED0 0x70000UL | ||
59 | #define UVH_EVENT_OCCURRED0_32 0x005e8 | ||
60 | |||
61 | #define UVH_EVENT_OCCURRED0_LB_HCERR_SHFT 0 | ||
62 | #define UVH_EVENT_OCCURRED0_LB_HCERR_MASK 0x0000000000000001UL | ||
63 | #define UVH_EVENT_OCCURRED0_GR0_HCERR_SHFT 1 | ||
64 | #define UVH_EVENT_OCCURRED0_GR0_HCERR_MASK 0x0000000000000002UL | ||
65 | #define UVH_EVENT_OCCURRED0_GR1_HCERR_SHFT 2 | ||
66 | #define UVH_EVENT_OCCURRED0_GR1_HCERR_MASK 0x0000000000000004UL | ||
67 | #define UVH_EVENT_OCCURRED0_LH_HCERR_SHFT 3 | ||
68 | #define UVH_EVENT_OCCURRED0_LH_HCERR_MASK 0x0000000000000008UL | ||
69 | #define UVH_EVENT_OCCURRED0_RH_HCERR_SHFT 4 | ||
70 | #define UVH_EVENT_OCCURRED0_RH_HCERR_MASK 0x0000000000000010UL | ||
71 | #define UVH_EVENT_OCCURRED0_XN_HCERR_SHFT 5 | ||
72 | #define UVH_EVENT_OCCURRED0_XN_HCERR_MASK 0x0000000000000020UL | ||
73 | #define UVH_EVENT_OCCURRED0_SI_HCERR_SHFT 6 | ||
74 | #define UVH_EVENT_OCCURRED0_SI_HCERR_MASK 0x0000000000000040UL | ||
75 | #define UVH_EVENT_OCCURRED0_LB_AOERR0_SHFT 7 | ||
76 | #define UVH_EVENT_OCCURRED0_LB_AOERR0_MASK 0x0000000000000080UL | ||
77 | #define UVH_EVENT_OCCURRED0_GR0_AOERR0_SHFT 8 | ||
78 | #define UVH_EVENT_OCCURRED0_GR0_AOERR0_MASK 0x0000000000000100UL | ||
79 | #define UVH_EVENT_OCCURRED0_GR1_AOERR0_SHFT 9 | ||
80 | #define UVH_EVENT_OCCURRED0_GR1_AOERR0_MASK 0x0000000000000200UL | ||
81 | #define UVH_EVENT_OCCURRED0_LH_AOERR0_SHFT 10 | ||
82 | #define UVH_EVENT_OCCURRED0_LH_AOERR0_MASK 0x0000000000000400UL | ||
83 | #define UVH_EVENT_OCCURRED0_RH_AOERR0_SHFT 11 | ||
84 | #define UVH_EVENT_OCCURRED0_RH_AOERR0_MASK 0x0000000000000800UL | ||
85 | #define UVH_EVENT_OCCURRED0_XN_AOERR0_SHFT 12 | ||
86 | #define UVH_EVENT_OCCURRED0_XN_AOERR0_MASK 0x0000000000001000UL | ||
87 | #define UVH_EVENT_OCCURRED0_SI_AOERR0_SHFT 13 | ||
88 | #define UVH_EVENT_OCCURRED0_SI_AOERR0_MASK 0x0000000000002000UL | ||
89 | #define UVH_EVENT_OCCURRED0_LB_AOERR1_SHFT 14 | ||
90 | #define UVH_EVENT_OCCURRED0_LB_AOERR1_MASK 0x0000000000004000UL | ||
91 | #define UVH_EVENT_OCCURRED0_GR0_AOERR1_SHFT 15 | ||
92 | #define UVH_EVENT_OCCURRED0_GR0_AOERR1_MASK 0x0000000000008000UL | ||
93 | #define UVH_EVENT_OCCURRED0_GR1_AOERR1_SHFT 16 | ||
94 | #define UVH_EVENT_OCCURRED0_GR1_AOERR1_MASK 0x0000000000010000UL | ||
95 | #define UVH_EVENT_OCCURRED0_LH_AOERR1_SHFT 17 | ||
96 | #define UVH_EVENT_OCCURRED0_LH_AOERR1_MASK 0x0000000000020000UL | ||
97 | #define UVH_EVENT_OCCURRED0_RH_AOERR1_SHFT 18 | ||
98 | #define UVH_EVENT_OCCURRED0_RH_AOERR1_MASK 0x0000000000040000UL | ||
99 | #define UVH_EVENT_OCCURRED0_XN_AOERR1_SHFT 19 | ||
100 | #define UVH_EVENT_OCCURRED0_XN_AOERR1_MASK 0x0000000000080000UL | ||
101 | #define UVH_EVENT_OCCURRED0_SI_AOERR1_SHFT 20 | ||
102 | #define UVH_EVENT_OCCURRED0_SI_AOERR1_MASK 0x0000000000100000UL | ||
103 | #define UVH_EVENT_OCCURRED0_RH_VPI_INT_SHFT 21 | ||
104 | #define UVH_EVENT_OCCURRED0_RH_VPI_INT_MASK 0x0000000000200000UL | ||
105 | #define UVH_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_SHFT 22 | ||
106 | #define UVH_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000400000UL | ||
107 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_0_SHFT 23 | ||
108 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_0_MASK 0x0000000000800000UL | ||
109 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_1_SHFT 24 | ||
110 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_1_MASK 0x0000000001000000UL | ||
111 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_2_SHFT 25 | ||
112 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_2_MASK 0x0000000002000000UL | ||
113 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_3_SHFT 26 | ||
114 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_3_MASK 0x0000000004000000UL | ||
115 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_4_SHFT 27 | ||
116 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_4_MASK 0x0000000008000000UL | ||
117 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_5_SHFT 28 | ||
118 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_5_MASK 0x0000000010000000UL | ||
119 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_6_SHFT 29 | ||
120 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_6_MASK 0x0000000020000000UL | ||
121 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_7_SHFT 30 | ||
122 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_7_MASK 0x0000000040000000UL | ||
123 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_8_SHFT 31 | ||
124 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_8_MASK 0x0000000080000000UL | ||
125 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_9_SHFT 32 | ||
126 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_9_MASK 0x0000000100000000UL | ||
127 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_10_SHFT 33 | ||
128 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_10_MASK 0x0000000200000000UL | ||
129 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_11_SHFT 34 | ||
130 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_11_MASK 0x0000000400000000UL | ||
131 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_12_SHFT 35 | ||
132 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_12_MASK 0x0000000800000000UL | ||
133 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_13_SHFT 36 | ||
134 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_13_MASK 0x0000001000000000UL | ||
135 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_14_SHFT 37 | ||
136 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_14_MASK 0x0000002000000000UL | ||
137 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_15_SHFT 38 | ||
138 | #define UVH_EVENT_OCCURRED0_LB_IRQ_INT_15_MASK 0x0000004000000000UL | ||
139 | #define UVH_EVENT_OCCURRED0_L1_NMI_INT_SHFT 39 | ||
140 | #define UVH_EVENT_OCCURRED0_L1_NMI_INT_MASK 0x0000008000000000UL | ||
141 | #define UVH_EVENT_OCCURRED0_STOP_CLOCK_SHFT 40 | ||
142 | #define UVH_EVENT_OCCURRED0_STOP_CLOCK_MASK 0x0000010000000000UL | ||
143 | #define UVH_EVENT_OCCURRED0_ASIC_TO_L1_SHFT 41 | ||
144 | #define UVH_EVENT_OCCURRED0_ASIC_TO_L1_MASK 0x0000020000000000UL | ||
145 | #define UVH_EVENT_OCCURRED0_L1_TO_ASIC_SHFT 42 | ||
146 | #define UVH_EVENT_OCCURRED0_L1_TO_ASIC_MASK 0x0000040000000000UL | ||
147 | #define UVH_EVENT_OCCURRED0_LTC_INT_SHFT 43 | ||
148 | #define UVH_EVENT_OCCURRED0_LTC_INT_MASK 0x0000080000000000UL | ||
149 | #define UVH_EVENT_OCCURRED0_LA_SEQ_TRIGGER_SHFT 44 | ||
150 | #define UVH_EVENT_OCCURRED0_LA_SEQ_TRIGGER_MASK 0x0000100000000000UL | ||
151 | #define UVH_EVENT_OCCURRED0_IPI_INT_SHFT 45 | ||
152 | #define UVH_EVENT_OCCURRED0_IPI_INT_MASK 0x0000200000000000UL | ||
153 | #define UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT 46 | ||
154 | #define UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK 0x0000400000000000UL | ||
155 | #define UVH_EVENT_OCCURRED0_EXTIO_INT1_SHFT 47 | ||
156 | #define UVH_EVENT_OCCURRED0_EXTIO_INT1_MASK 0x0000800000000000UL | ||
157 | #define UVH_EVENT_OCCURRED0_EXTIO_INT2_SHFT 48 | ||
158 | #define UVH_EVENT_OCCURRED0_EXTIO_INT2_MASK 0x0001000000000000UL | ||
159 | #define UVH_EVENT_OCCURRED0_EXTIO_INT3_SHFT 49 | ||
160 | #define UVH_EVENT_OCCURRED0_EXTIO_INT3_MASK 0x0002000000000000UL | ||
161 | #define UVH_EVENT_OCCURRED0_PROFILE_INT_SHFT 50 | ||
162 | #define UVH_EVENT_OCCURRED0_PROFILE_INT_MASK 0x0004000000000000UL | ||
163 | #define UVH_EVENT_OCCURRED0_RTC0_SHFT 51 | ||
164 | #define UVH_EVENT_OCCURRED0_RTC0_MASK 0x0008000000000000UL | ||
165 | #define UVH_EVENT_OCCURRED0_RTC1_SHFT 52 | ||
166 | #define UVH_EVENT_OCCURRED0_RTC1_MASK 0x0010000000000000UL | ||
167 | #define UVH_EVENT_OCCURRED0_RTC2_SHFT 53 | ||
168 | #define UVH_EVENT_OCCURRED0_RTC2_MASK 0x0020000000000000UL | ||
169 | #define UVH_EVENT_OCCURRED0_RTC3_SHFT 54 | ||
170 | #define UVH_EVENT_OCCURRED0_RTC3_MASK 0x0040000000000000UL | ||
171 | #define UVH_EVENT_OCCURRED0_BAU_DATA_SHFT 55 | ||
172 | #define UVH_EVENT_OCCURRED0_BAU_DATA_MASK 0x0080000000000000UL | ||
173 | #define UVH_EVENT_OCCURRED0_POWER_MANAGEMENT_REQ_SHFT 56 | ||
174 | #define UVH_EVENT_OCCURRED0_POWER_MANAGEMENT_REQ_MASK 0x0100000000000000UL | ||
175 | union uvh_event_occurred0_u { | ||
176 | unsigned long v; | ||
177 | struct uvh_event_occurred0_s { | ||
178 | unsigned long lb_hcerr : 1; /* RW, W1C */ | ||
179 | unsigned long gr0_hcerr : 1; /* RW, W1C */ | ||
180 | unsigned long gr1_hcerr : 1; /* RW, W1C */ | ||
181 | unsigned long lh_hcerr : 1; /* RW, W1C */ | ||
182 | unsigned long rh_hcerr : 1; /* RW, W1C */ | ||
183 | unsigned long xn_hcerr : 1; /* RW, W1C */ | ||
184 | unsigned long si_hcerr : 1; /* RW, W1C */ | ||
185 | unsigned long lb_aoerr0 : 1; /* RW, W1C */ | ||
186 | unsigned long gr0_aoerr0 : 1; /* RW, W1C */ | ||
187 | unsigned long gr1_aoerr0 : 1; /* RW, W1C */ | ||
188 | unsigned long lh_aoerr0 : 1; /* RW, W1C */ | ||
189 | unsigned long rh_aoerr0 : 1; /* RW, W1C */ | ||
190 | unsigned long xn_aoerr0 : 1; /* RW, W1C */ | ||
191 | unsigned long si_aoerr0 : 1; /* RW, W1C */ | ||
192 | unsigned long lb_aoerr1 : 1; /* RW, W1C */ | ||
193 | unsigned long gr0_aoerr1 : 1; /* RW, W1C */ | ||
194 | unsigned long gr1_aoerr1 : 1; /* RW, W1C */ | ||
195 | unsigned long lh_aoerr1 : 1; /* RW, W1C */ | ||
196 | unsigned long rh_aoerr1 : 1; /* RW, W1C */ | ||
197 | unsigned long xn_aoerr1 : 1; /* RW, W1C */ | ||
198 | unsigned long si_aoerr1 : 1; /* RW, W1C */ | ||
199 | unsigned long rh_vpi_int : 1; /* RW, W1C */ | ||
200 | unsigned long system_shutdown_int : 1; /* RW, W1C */ | ||
201 | unsigned long lb_irq_int_0 : 1; /* RW, W1C */ | ||
202 | unsigned long lb_irq_int_1 : 1; /* RW, W1C */ | ||
203 | unsigned long lb_irq_int_2 : 1; /* RW, W1C */ | ||
204 | unsigned long lb_irq_int_3 : 1; /* RW, W1C */ | ||
205 | unsigned long lb_irq_int_4 : 1; /* RW, W1C */ | ||
206 | unsigned long lb_irq_int_5 : 1; /* RW, W1C */ | ||
207 | unsigned long lb_irq_int_6 : 1; /* RW, W1C */ | ||
208 | unsigned long lb_irq_int_7 : 1; /* RW, W1C */ | ||
209 | unsigned long lb_irq_int_8 : 1; /* RW, W1C */ | ||
210 | unsigned long lb_irq_int_9 : 1; /* RW, W1C */ | ||
211 | unsigned long lb_irq_int_10 : 1; /* RW, W1C */ | ||
212 | unsigned long lb_irq_int_11 : 1; /* RW, W1C */ | ||
213 | unsigned long lb_irq_int_12 : 1; /* RW, W1C */ | ||
214 | unsigned long lb_irq_int_13 : 1; /* RW, W1C */ | ||
215 | unsigned long lb_irq_int_14 : 1; /* RW, W1C */ | ||
216 | unsigned long lb_irq_int_15 : 1; /* RW, W1C */ | ||
217 | unsigned long l1_nmi_int : 1; /* RW, W1C */ | ||
218 | unsigned long stop_clock : 1; /* RW, W1C */ | ||
219 | unsigned long asic_to_l1 : 1; /* RW, W1C */ | ||
220 | unsigned long l1_to_asic : 1; /* RW, W1C */ | ||
221 | unsigned long ltc_int : 1; /* RW, W1C */ | ||
222 | unsigned long la_seq_trigger : 1; /* RW, W1C */ | ||
223 | unsigned long ipi_int : 1; /* RW, W1C */ | ||
224 | unsigned long extio_int0 : 1; /* RW, W1C */ | ||
225 | unsigned long extio_int1 : 1; /* RW, W1C */ | ||
226 | unsigned long extio_int2 : 1; /* RW, W1C */ | ||
227 | unsigned long extio_int3 : 1; /* RW, W1C */ | ||
228 | unsigned long profile_int : 1; /* RW, W1C */ | ||
229 | unsigned long rtc0 : 1; /* RW, W1C */ | ||
230 | unsigned long rtc1 : 1; /* RW, W1C */ | ||
231 | unsigned long rtc2 : 1; /* RW, W1C */ | ||
232 | unsigned long rtc3 : 1; /* RW, W1C */ | ||
233 | unsigned long bau_data : 1; /* RW, W1C */ | ||
234 | unsigned long power_management_req : 1; /* RW, W1C */ | ||
235 | unsigned long rsvd_57_63 : 7; /* */ | ||
236 | } s; | ||
237 | }; | ||
238 | |||
239 | /* ========================================================================= */ | ||
240 | /* UVH_EVENT_OCCURRED0_ALIAS */ | ||
241 | /* ========================================================================= */ | ||
242 | #define UVH_EVENT_OCCURRED0_ALIAS 0x0000000000070008UL | ||
243 | #define UVH_EVENT_OCCURRED0_ALIAS_32 0x005f0 | ||
244 | |||
245 | /* ========================================================================= */ | ||
246 | /* UVH_INT_CMPB */ | ||
247 | /* ========================================================================= */ | ||
248 | #define UVH_INT_CMPB 0x22080UL | ||
249 | |||
250 | #define UVH_INT_CMPB_REAL_TIME_CMPB_SHFT 0 | ||
251 | #define UVH_INT_CMPB_REAL_TIME_CMPB_MASK 0x00ffffffffffffffUL | ||
252 | |||
253 | union uvh_int_cmpb_u { | ||
254 | unsigned long v; | ||
255 | struct uvh_int_cmpb_s { | ||
256 | unsigned long real_time_cmpb : 56; /* RW */ | ||
257 | unsigned long rsvd_56_63 : 8; /* */ | ||
258 | } s; | ||
259 | }; | ||
260 | |||
261 | /* ========================================================================= */ | ||
262 | /* UVH_INT_CMPC */ | ||
263 | /* ========================================================================= */ | ||
264 | #define UVH_INT_CMPC 0x22100UL | ||
265 | |||
266 | #define UVH_INT_CMPC_REAL_TIME_CMPC_SHFT 0 | ||
267 | #define UVH_INT_CMPC_REAL_TIME_CMPC_MASK 0x00ffffffffffffffUL | ||
268 | |||
269 | union uvh_int_cmpc_u { | ||
270 | unsigned long v; | ||
271 | struct uvh_int_cmpc_s { | ||
272 | unsigned long real_time_cmpc : 56; /* RW */ | ||
273 | unsigned long rsvd_56_63 : 8; /* */ | ||
274 | } s; | ||
275 | }; | ||
276 | |||
277 | /* ========================================================================= */ | ||
278 | /* UVH_INT_CMPD */ | ||
279 | /* ========================================================================= */ | ||
280 | #define UVH_INT_CMPD 0x22180UL | ||
17 | 281 | ||
18 | #define UV_MMR_ENABLE (1UL << 63) | 282 | #define UVH_INT_CMPD_REAL_TIME_CMPD_SHFT 0 |
283 | #define UVH_INT_CMPD_REAL_TIME_CMPD_MASK 0x00ffffffffffffffUL | ||
284 | |||
285 | union uvh_int_cmpd_u { | ||
286 | unsigned long v; | ||
287 | struct uvh_int_cmpd_s { | ||
288 | unsigned long real_time_cmpd : 56; /* RW */ | ||
289 | unsigned long rsvd_56_63 : 8; /* */ | ||
290 | } s; | ||
291 | }; | ||
19 | 292 | ||
20 | /* ========================================================================= */ | 293 | /* ========================================================================= */ |
21 | /* UVH_IPI_INT */ | 294 | /* UVH_IPI_INT */ |
22 | /* ========================================================================= */ | 295 | /* ========================================================================= */ |
23 | #define UVH_IPI_INT 0x60500UL | 296 | #define UVH_IPI_INT 0x60500UL |
24 | #define UVH_IPI_INT_32 0x0360 | 297 | #define UVH_IPI_INT_32 0x0348 |
25 | 298 | ||
26 | #define UVH_IPI_INT_VECTOR_SHFT 0 | 299 | #define UVH_IPI_INT_VECTOR_SHFT 0 |
27 | #define UVH_IPI_INT_VECTOR_MASK 0x00000000000000ffUL | 300 | #define UVH_IPI_INT_VECTOR_MASK 0x00000000000000ffUL |
@@ -51,7 +324,7 @@ union uvh_ipi_int_u { | |||
51 | /* UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST */ | 324 | /* UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST */ |
52 | /* ========================================================================= */ | 325 | /* ========================================================================= */ |
53 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST 0x320050UL | 326 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST 0x320050UL |
54 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_32 0x009f0 | 327 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_32 0x009c0 |
55 | 328 | ||
56 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_ADDRESS_SHFT 4 | 329 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_ADDRESS_SHFT 4 |
57 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_ADDRESS_MASK 0x000007fffffffff0UL | 330 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST_ADDRESS_MASK 0x000007fffffffff0UL |
@@ -73,7 +346,7 @@ union uvh_lb_bau_intd_payload_queue_first_u { | |||
73 | /* UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST */ | 346 | /* UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST */ |
74 | /* ========================================================================= */ | 347 | /* ========================================================================= */ |
75 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST 0x320060UL | 348 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST 0x320060UL |
76 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST_32 0x009f8 | 349 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST_32 0x009c8 |
77 | 350 | ||
78 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST_ADDRESS_SHFT 4 | 351 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST_ADDRESS_SHFT 4 |
79 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST_ADDRESS_MASK 0x000007fffffffff0UL | 352 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST_ADDRESS_MASK 0x000007fffffffff0UL |
@@ -91,7 +364,7 @@ union uvh_lb_bau_intd_payload_queue_last_u { | |||
91 | /* UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL */ | 364 | /* UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL */ |
92 | /* ========================================================================= */ | 365 | /* ========================================================================= */ |
93 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL 0x320070UL | 366 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL 0x320070UL |
94 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL_32 0x00a00 | 367 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL_32 0x009d0 |
95 | 368 | ||
96 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL_ADDRESS_SHFT 4 | 369 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL_ADDRESS_SHFT 4 |
97 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL_ADDRESS_MASK 0x000007fffffffff0UL | 370 | #define UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL_ADDRESS_MASK 0x000007fffffffff0UL |
@@ -109,6 +382,7 @@ union uvh_lb_bau_intd_payload_queue_tail_u { | |||
109 | /* UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE */ | 382 | /* UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE */ |
110 | /* ========================================================================= */ | 383 | /* ========================================================================= */ |
111 | #define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE 0x320080UL | 384 | #define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE 0x320080UL |
385 | #define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_32 0x0a68 | ||
112 | 386 | ||
113 | #define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_0_SHFT 0 | 387 | #define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_0_SHFT 0 |
114 | #define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_0_MASK 0x0000000000000001UL | 388 | #define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_PENDING_0_MASK 0x0000000000000001UL |
@@ -169,12 +443,13 @@ union uvh_lb_bau_intd_software_acknowledge_u { | |||
169 | /* UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS */ | 443 | /* UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS */ |
170 | /* ========================================================================= */ | 444 | /* ========================================================================= */ |
171 | #define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS 0x0000000000320088UL | 445 | #define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS 0x0000000000320088UL |
446 | #define UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS_32 0x0a70 | ||
172 | 447 | ||
173 | /* ========================================================================= */ | 448 | /* ========================================================================= */ |
174 | /* UVH_LB_BAU_SB_ACTIVATION_CONTROL */ | 449 | /* UVH_LB_BAU_SB_ACTIVATION_CONTROL */ |
175 | /* ========================================================================= */ | 450 | /* ========================================================================= */ |
176 | #define UVH_LB_BAU_SB_ACTIVATION_CONTROL 0x320020UL | 451 | #define UVH_LB_BAU_SB_ACTIVATION_CONTROL 0x320020UL |
177 | #define UVH_LB_BAU_SB_ACTIVATION_CONTROL_32 0x009d8 | 452 | #define UVH_LB_BAU_SB_ACTIVATION_CONTROL_32 0x009a8 |
178 | 453 | ||
179 | #define UVH_LB_BAU_SB_ACTIVATION_CONTROL_INDEX_SHFT 0 | 454 | #define UVH_LB_BAU_SB_ACTIVATION_CONTROL_INDEX_SHFT 0 |
180 | #define UVH_LB_BAU_SB_ACTIVATION_CONTROL_INDEX_MASK 0x000000000000003fUL | 455 | #define UVH_LB_BAU_SB_ACTIVATION_CONTROL_INDEX_MASK 0x000000000000003fUL |
@@ -197,7 +472,7 @@ union uvh_lb_bau_sb_activation_control_u { | |||
197 | /* UVH_LB_BAU_SB_ACTIVATION_STATUS_0 */ | 472 | /* UVH_LB_BAU_SB_ACTIVATION_STATUS_0 */ |
198 | /* ========================================================================= */ | 473 | /* ========================================================================= */ |
199 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_0 0x320030UL | 474 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_0 0x320030UL |
200 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_0_32 0x009e0 | 475 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_0_32 0x009b0 |
201 | 476 | ||
202 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_0_STATUS_SHFT 0 | 477 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_0_STATUS_SHFT 0 |
203 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_0_STATUS_MASK 0xffffffffffffffffUL | 478 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_0_STATUS_MASK 0xffffffffffffffffUL |
@@ -213,7 +488,7 @@ union uvh_lb_bau_sb_activation_status_0_u { | |||
213 | /* UVH_LB_BAU_SB_ACTIVATION_STATUS_1 */ | 488 | /* UVH_LB_BAU_SB_ACTIVATION_STATUS_1 */ |
214 | /* ========================================================================= */ | 489 | /* ========================================================================= */ |
215 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_1 0x320040UL | 490 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_1 0x320040UL |
216 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_1_32 0x009e8 | 491 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_1_32 0x009b8 |
217 | 492 | ||
218 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_1_STATUS_SHFT 0 | 493 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_1_STATUS_SHFT 0 |
219 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_1_STATUS_MASK 0xffffffffffffffffUL | 494 | #define UVH_LB_BAU_SB_ACTIVATION_STATUS_1_STATUS_MASK 0xffffffffffffffffUL |
@@ -229,7 +504,7 @@ union uvh_lb_bau_sb_activation_status_1_u { | |||
229 | /* UVH_LB_BAU_SB_DESCRIPTOR_BASE */ | 504 | /* UVH_LB_BAU_SB_DESCRIPTOR_BASE */ |
230 | /* ========================================================================= */ | 505 | /* ========================================================================= */ |
231 | #define UVH_LB_BAU_SB_DESCRIPTOR_BASE 0x320010UL | 506 | #define UVH_LB_BAU_SB_DESCRIPTOR_BASE 0x320010UL |
232 | #define UVH_LB_BAU_SB_DESCRIPTOR_BASE_32 0x009d0 | 507 | #define UVH_LB_BAU_SB_DESCRIPTOR_BASE_32 0x009a0 |
233 | 508 | ||
234 | #define UVH_LB_BAU_SB_DESCRIPTOR_BASE_PAGE_ADDRESS_SHFT 12 | 509 | #define UVH_LB_BAU_SB_DESCRIPTOR_BASE_PAGE_ADDRESS_SHFT 12 |
235 | #define UVH_LB_BAU_SB_DESCRIPTOR_BASE_PAGE_ADDRESS_MASK 0x000007fffffff000UL | 510 | #define UVH_LB_BAU_SB_DESCRIPTOR_BASE_PAGE_ADDRESS_MASK 0x000007fffffff000UL |
@@ -248,6 +523,334 @@ union uvh_lb_bau_sb_descriptor_base_u { | |||
248 | }; | 523 | }; |
249 | 524 | ||
250 | /* ========================================================================= */ | 525 | /* ========================================================================= */ |
526 | /* UVH_LB_MCAST_AOERR0_RPT_ENABLE */ | ||
527 | /* ========================================================================= */ | ||
528 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE 0x50b20UL | ||
529 | |||
530 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_OBESE_MSG_SHFT 0 | ||
531 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_OBESE_MSG_MASK 0x0000000000000001UL | ||
532 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_DATA_SB_ERR_SHFT 1 | ||
533 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_DATA_SB_ERR_MASK 0x0000000000000002UL | ||
534 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_NACK_BUFF_PARITY_SHFT 2 | ||
535 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_NACK_BUFF_PARITY_MASK 0x0000000000000004UL | ||
536 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_TIMEOUT_SHFT 3 | ||
537 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_TIMEOUT_MASK 0x0000000000000008UL | ||
538 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_INACTIVE_REPLY_SHFT 4 | ||
539 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_INACTIVE_REPLY_MASK 0x0000000000000010UL | ||
540 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_UPGRADE_ERROR_SHFT 5 | ||
541 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_UPGRADE_ERROR_MASK 0x0000000000000020UL | ||
542 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REG_COUNT_UNDERFLOW_SHFT 6 | ||
543 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REG_COUNT_UNDERFLOW_MASK 0x0000000000000040UL | ||
544 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REP_OBESE_MSG_SHFT 7 | ||
545 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MCAST_REP_OBESE_MSG_MASK 0x0000000000000080UL | ||
546 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_RUNT_MSG_SHFT 8 | ||
547 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_RUNT_MSG_MASK 0x0000000000000100UL | ||
548 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_OBESE_MSG_SHFT 9 | ||
549 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_OBESE_MSG_MASK 0x0000000000000200UL | ||
550 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_DATA_SB_ERR_SHFT 10 | ||
551 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REQ_DATA_SB_ERR_MASK 0x0000000000000400UL | ||
552 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_RUNT_MSG_SHFT 11 | ||
553 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_RUNT_MSG_MASK 0x0000000000000800UL | ||
554 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_OBESE_MSG_SHFT 12 | ||
555 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_OBESE_MSG_MASK 0x0000000000001000UL | ||
556 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_DATA_SB_ERR_SHFT 13 | ||
557 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_DATA_SB_ERR_MASK 0x0000000000002000UL | ||
558 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_COMMAND_ERR_SHFT 14 | ||
559 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_REP_COMMAND_ERR_MASK 0x0000000000004000UL | ||
560 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_PEND_TIMEOUT_SHFT 15 | ||
561 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_UCACHE_PEND_TIMEOUT_MASK 0x0000000000008000UL | ||
562 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_RUNT_MSG_SHFT 16 | ||
563 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_RUNT_MSG_MASK 0x0000000000010000UL | ||
564 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_OBESE_MSG_SHFT 17 | ||
565 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_OBESE_MSG_MASK 0x0000000000020000UL | ||
566 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_DATA_SB_ERR_SHFT 18 | ||
567 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REQ_DATA_SB_ERR_MASK 0x0000000000040000UL | ||
568 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_RUNT_MSG_SHFT 19 | ||
569 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_RUNT_MSG_MASK 0x0000000000080000UL | ||
570 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_OBESE_MSG_SHFT 20 | ||
571 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_OBESE_MSG_MASK 0x0000000000100000UL | ||
572 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_DATA_SB_ERR_SHFT 21 | ||
573 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_REP_DATA_SB_ERR_MASK 0x0000000000200000UL | ||
574 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_AMO_TIMEOUT_SHFT 22 | ||
575 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_AMO_TIMEOUT_MASK 0x0000000000400000UL | ||
576 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_PUT_TIMEOUT_SHFT 23 | ||
577 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_PUT_TIMEOUT_MASK 0x0000000000800000UL | ||
578 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_SPURIOUS_EVENT_SHFT 24 | ||
579 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_MACC_SPURIOUS_EVENT_MASK 0x0000000001000000UL | ||
580 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IOH_DESTINATION_TABLE_PARITY_SHFT 25 | ||
581 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IOH_DESTINATION_TABLE_PARITY_MASK 0x0000000002000000UL | ||
582 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_HAD_ERROR_REPLY_SHFT 26 | ||
583 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_HAD_ERROR_REPLY_MASK 0x0000000004000000UL | ||
584 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_TIMEOUT_SHFT 27 | ||
585 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_GET_TIMEOUT_MASK 0x0000000008000000UL | ||
586 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_LOCK_MANAGER_HAD_ERROR_REPLY_SHFT 28 | ||
587 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_LOCK_MANAGER_HAD_ERROR_REPLY_MASK 0x0000000010000000UL | ||
588 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_HAD_ERROR_REPLY_SHFT 29 | ||
589 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_HAD_ERROR_REPLY_MASK 0x0000000020000000UL | ||
590 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_TIMEOUT_SHFT 30 | ||
591 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_PUT_TIMEOUT_MASK 0x0000000040000000UL | ||
592 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SB_ACTIVATION_OVERRUN_SHFT 31 | ||
593 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SB_ACTIVATION_OVERRUN_MASK 0x0000000080000000UL | ||
594 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_HAD_ERROR_REPLY_SHFT 32 | ||
595 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_HAD_ERROR_REPLY_MASK 0x0000000100000000UL | ||
596 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_TIMEOUT_SHFT 33 | ||
597 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_COMPLETED_GB_ACTIVATION_TIMEOUT_MASK 0x0000000200000000UL | ||
598 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_0_PARITY_SHFT 34 | ||
599 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_0_PARITY_MASK 0x0000000400000000UL | ||
600 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_1_PARITY_SHFT 35 | ||
601 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_DESCRIPTOR_BUFFER_1_PARITY_MASK 0x0000000800000000UL | ||
602 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SOCKET_DESTINATION_TABLE_PARITY_SHFT 36 | ||
603 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_SOCKET_DESTINATION_TABLE_PARITY_MASK 0x0000001000000000UL | ||
604 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_BAU_REPLY_PAYLOAD_CORRUPTION_SHFT 37 | ||
605 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_BAU_REPLY_PAYLOAD_CORRUPTION_MASK 0x0000002000000000UL | ||
606 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IO_PORT_DESTINATION_TABLE_PARITY_SHFT 38 | ||
607 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_IO_PORT_DESTINATION_TABLE_PARITY_MASK 0x0000004000000000UL | ||
608 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INTD_SOFT_ACK_TIMEOUT_SHFT 39 | ||
609 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INTD_SOFT_ACK_TIMEOUT_MASK 0x0000008000000000UL | ||
610 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_OBESE_MSG_SHFT 40 | ||
611 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_OBESE_MSG_MASK 0x0000010000000000UL | ||
612 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_COMMAND_ERR_SHFT 41 | ||
613 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_REP_COMMAND_ERR_MASK 0x0000020000000000UL | ||
614 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_TIMEOUT_SHFT 42 | ||
615 | #define UVH_LB_MCAST_AOERR0_RPT_ENABLE_INT_TIMEOUT_MASK 0x0000040000000000UL | ||
616 | |||
617 | union uvh_lb_mcast_aoerr0_rpt_enable_u { | ||
618 | unsigned long v; | ||
619 | struct uvh_lb_mcast_aoerr0_rpt_enable_s { | ||
620 | unsigned long mcast_obese_msg : 1; /* RW */ | ||
621 | unsigned long mcast_data_sb_err : 1; /* RW */ | ||
622 | unsigned long mcast_nack_buff_parity : 1; /* RW */ | ||
623 | unsigned long mcast_timeout : 1; /* RW */ | ||
624 | unsigned long mcast_inactive_reply : 1; /* RW */ | ||
625 | unsigned long mcast_upgrade_error : 1; /* RW */ | ||
626 | unsigned long mcast_reg_count_underflow : 1; /* RW */ | ||
627 | unsigned long mcast_rep_obese_msg : 1; /* RW */ | ||
628 | unsigned long ucache_req_runt_msg : 1; /* RW */ | ||
629 | unsigned long ucache_req_obese_msg : 1; /* RW */ | ||
630 | unsigned long ucache_req_data_sb_err : 1; /* RW */ | ||
631 | unsigned long ucache_rep_runt_msg : 1; /* RW */ | ||
632 | unsigned long ucache_rep_obese_msg : 1; /* RW */ | ||
633 | unsigned long ucache_rep_data_sb_err : 1; /* RW */ | ||
634 | unsigned long ucache_rep_command_err : 1; /* RW */ | ||
635 | unsigned long ucache_pend_timeout : 1; /* RW */ | ||
636 | unsigned long macc_req_runt_msg : 1; /* RW */ | ||
637 | unsigned long macc_req_obese_msg : 1; /* RW */ | ||
638 | unsigned long macc_req_data_sb_err : 1; /* RW */ | ||
639 | unsigned long macc_rep_runt_msg : 1; /* RW */ | ||
640 | unsigned long macc_rep_obese_msg : 1; /* RW */ | ||
641 | unsigned long macc_rep_data_sb_err : 1; /* RW */ | ||
642 | unsigned long macc_amo_timeout : 1; /* RW */ | ||
643 | unsigned long macc_put_timeout : 1; /* RW */ | ||
644 | unsigned long macc_spurious_event : 1; /* RW */ | ||
645 | unsigned long ioh_destination_table_parity : 1; /* RW */ | ||
646 | unsigned long get_had_error_reply : 1; /* RW */ | ||
647 | unsigned long get_timeout : 1; /* RW */ | ||
648 | unsigned long lock_manager_had_error_reply : 1; /* RW */ | ||
649 | unsigned long put_had_error_reply : 1; /* RW */ | ||
650 | unsigned long put_timeout : 1; /* RW */ | ||
651 | unsigned long sb_activation_overrun : 1; /* RW */ | ||
652 | unsigned long completed_gb_activation_had_error_reply : 1; /* RW */ | ||
653 | unsigned long completed_gb_activation_timeout : 1; /* RW */ | ||
654 | unsigned long descriptor_buffer_0_parity : 1; /* RW */ | ||
655 | unsigned long descriptor_buffer_1_parity : 1; /* RW */ | ||
656 | unsigned long socket_destination_table_parity : 1; /* RW */ | ||
657 | unsigned long bau_reply_payload_corruption : 1; /* RW */ | ||
658 | unsigned long io_port_destination_table_parity : 1; /* RW */ | ||
659 | unsigned long intd_soft_ack_timeout : 1; /* RW */ | ||
660 | unsigned long int_rep_obese_msg : 1; /* RW */ | ||
661 | unsigned long int_rep_command_err : 1; /* RW */ | ||
662 | unsigned long int_timeout : 1; /* RW */ | ||
663 | unsigned long rsvd_43_63 : 21; /* */ | ||
664 | } s; | ||
665 | }; | ||
666 | |||
667 | /* ========================================================================= */ | ||
668 | /* UVH_LOCAL_INT0_CONFIG */ | ||
669 | /* ========================================================================= */ | ||
670 | #define UVH_LOCAL_INT0_CONFIG 0x61000UL | ||
671 | |||
672 | #define UVH_LOCAL_INT0_CONFIG_VECTOR_SHFT 0 | ||
673 | #define UVH_LOCAL_INT0_CONFIG_VECTOR_MASK 0x00000000000000ffUL | ||
674 | #define UVH_LOCAL_INT0_CONFIG_DM_SHFT 8 | ||
675 | #define UVH_LOCAL_INT0_CONFIG_DM_MASK 0x0000000000000700UL | ||
676 | #define UVH_LOCAL_INT0_CONFIG_DESTMODE_SHFT 11 | ||
677 | #define UVH_LOCAL_INT0_CONFIG_DESTMODE_MASK 0x0000000000000800UL | ||
678 | #define UVH_LOCAL_INT0_CONFIG_STATUS_SHFT 12 | ||
679 | #define UVH_LOCAL_INT0_CONFIG_STATUS_MASK 0x0000000000001000UL | ||
680 | #define UVH_LOCAL_INT0_CONFIG_P_SHFT 13 | ||
681 | #define UVH_LOCAL_INT0_CONFIG_P_MASK 0x0000000000002000UL | ||
682 | #define UVH_LOCAL_INT0_CONFIG_T_SHFT 15 | ||
683 | #define UVH_LOCAL_INT0_CONFIG_T_MASK 0x0000000000008000UL | ||
684 | #define UVH_LOCAL_INT0_CONFIG_M_SHFT 16 | ||
685 | #define UVH_LOCAL_INT0_CONFIG_M_MASK 0x0000000000010000UL | ||
686 | #define UVH_LOCAL_INT0_CONFIG_APIC_ID_SHFT 32 | ||
687 | #define UVH_LOCAL_INT0_CONFIG_APIC_ID_MASK 0xffffffff00000000UL | ||
688 | |||
689 | union uvh_local_int0_config_u { | ||
690 | unsigned long v; | ||
691 | struct uvh_local_int0_config_s { | ||
692 | unsigned long vector_ : 8; /* RW */ | ||
693 | unsigned long dm : 3; /* RW */ | ||
694 | unsigned long destmode : 1; /* RW */ | ||
695 | unsigned long status : 1; /* RO */ | ||
696 | unsigned long p : 1; /* RO */ | ||
697 | unsigned long rsvd_14 : 1; /* */ | ||
698 | unsigned long t : 1; /* RO */ | ||
699 | unsigned long m : 1; /* RW */ | ||
700 | unsigned long rsvd_17_31: 15; /* */ | ||
701 | unsigned long apic_id : 32; /* RW */ | ||
702 | } s; | ||
703 | }; | ||
704 | |||
705 | /* ========================================================================= */ | ||
706 | /* UVH_LOCAL_INT0_ENABLE */ | ||
707 | /* ========================================================================= */ | ||
708 | #define UVH_LOCAL_INT0_ENABLE 0x65000UL | ||
709 | |||
710 | #define UVH_LOCAL_INT0_ENABLE_LB_HCERR_SHFT 0 | ||
711 | #define UVH_LOCAL_INT0_ENABLE_LB_HCERR_MASK 0x0000000000000001UL | ||
712 | #define UVH_LOCAL_INT0_ENABLE_GR0_HCERR_SHFT 1 | ||
713 | #define UVH_LOCAL_INT0_ENABLE_GR0_HCERR_MASK 0x0000000000000002UL | ||
714 | #define UVH_LOCAL_INT0_ENABLE_GR1_HCERR_SHFT 2 | ||
715 | #define UVH_LOCAL_INT0_ENABLE_GR1_HCERR_MASK 0x0000000000000004UL | ||
716 | #define UVH_LOCAL_INT0_ENABLE_LH_HCERR_SHFT 3 | ||
717 | #define UVH_LOCAL_INT0_ENABLE_LH_HCERR_MASK 0x0000000000000008UL | ||
718 | #define UVH_LOCAL_INT0_ENABLE_RH_HCERR_SHFT 4 | ||
719 | #define UVH_LOCAL_INT0_ENABLE_RH_HCERR_MASK 0x0000000000000010UL | ||
720 | #define UVH_LOCAL_INT0_ENABLE_XN_HCERR_SHFT 5 | ||
721 | #define UVH_LOCAL_INT0_ENABLE_XN_HCERR_MASK 0x0000000000000020UL | ||
722 | #define UVH_LOCAL_INT0_ENABLE_SI_HCERR_SHFT 6 | ||
723 | #define UVH_LOCAL_INT0_ENABLE_SI_HCERR_MASK 0x0000000000000040UL | ||
724 | #define UVH_LOCAL_INT0_ENABLE_LB_AOERR0_SHFT 7 | ||
725 | #define UVH_LOCAL_INT0_ENABLE_LB_AOERR0_MASK 0x0000000000000080UL | ||
726 | #define UVH_LOCAL_INT0_ENABLE_GR0_AOERR0_SHFT 8 | ||
727 | #define UVH_LOCAL_INT0_ENABLE_GR0_AOERR0_MASK 0x0000000000000100UL | ||
728 | #define UVH_LOCAL_INT0_ENABLE_GR1_AOERR0_SHFT 9 | ||
729 | #define UVH_LOCAL_INT0_ENABLE_GR1_AOERR0_MASK 0x0000000000000200UL | ||
730 | #define UVH_LOCAL_INT0_ENABLE_LH_AOERR0_SHFT 10 | ||
731 | #define UVH_LOCAL_INT0_ENABLE_LH_AOERR0_MASK 0x0000000000000400UL | ||
732 | #define UVH_LOCAL_INT0_ENABLE_RH_AOERR0_SHFT 11 | ||
733 | #define UVH_LOCAL_INT0_ENABLE_RH_AOERR0_MASK 0x0000000000000800UL | ||
734 | #define UVH_LOCAL_INT0_ENABLE_XN_AOERR0_SHFT 12 | ||
735 | #define UVH_LOCAL_INT0_ENABLE_XN_AOERR0_MASK 0x0000000000001000UL | ||
736 | #define UVH_LOCAL_INT0_ENABLE_SI_AOERR0_SHFT 13 | ||
737 | #define UVH_LOCAL_INT0_ENABLE_SI_AOERR0_MASK 0x0000000000002000UL | ||
738 | #define UVH_LOCAL_INT0_ENABLE_LB_AOERR1_SHFT 14 | ||
739 | #define UVH_LOCAL_INT0_ENABLE_LB_AOERR1_MASK 0x0000000000004000UL | ||
740 | #define UVH_LOCAL_INT0_ENABLE_GR0_AOERR1_SHFT 15 | ||
741 | #define UVH_LOCAL_INT0_ENABLE_GR0_AOERR1_MASK 0x0000000000008000UL | ||
742 | #define UVH_LOCAL_INT0_ENABLE_GR1_AOERR1_SHFT 16 | ||
743 | #define UVH_LOCAL_INT0_ENABLE_GR1_AOERR1_MASK 0x0000000000010000UL | ||
744 | #define UVH_LOCAL_INT0_ENABLE_LH_AOERR1_SHFT 17 | ||
745 | #define UVH_LOCAL_INT0_ENABLE_LH_AOERR1_MASK 0x0000000000020000UL | ||
746 | #define UVH_LOCAL_INT0_ENABLE_RH_AOERR1_SHFT 18 | ||
747 | #define UVH_LOCAL_INT0_ENABLE_RH_AOERR1_MASK 0x0000000000040000UL | ||
748 | #define UVH_LOCAL_INT0_ENABLE_XN_AOERR1_SHFT 19 | ||
749 | #define UVH_LOCAL_INT0_ENABLE_XN_AOERR1_MASK 0x0000000000080000UL | ||
750 | #define UVH_LOCAL_INT0_ENABLE_SI_AOERR1_SHFT 20 | ||
751 | #define UVH_LOCAL_INT0_ENABLE_SI_AOERR1_MASK 0x0000000000100000UL | ||
752 | #define UVH_LOCAL_INT0_ENABLE_RH_VPI_INT_SHFT 21 | ||
753 | #define UVH_LOCAL_INT0_ENABLE_RH_VPI_INT_MASK 0x0000000000200000UL | ||
754 | #define UVH_LOCAL_INT0_ENABLE_SYSTEM_SHUTDOWN_INT_SHFT 22 | ||
755 | #define UVH_LOCAL_INT0_ENABLE_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000400000UL | ||
756 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_0_SHFT 23 | ||
757 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_0_MASK 0x0000000000800000UL | ||
758 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_1_SHFT 24 | ||
759 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_1_MASK 0x0000000001000000UL | ||
760 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_2_SHFT 25 | ||
761 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_2_MASK 0x0000000002000000UL | ||
762 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_3_SHFT 26 | ||
763 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_3_MASK 0x0000000004000000UL | ||
764 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_4_SHFT 27 | ||
765 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_4_MASK 0x0000000008000000UL | ||
766 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_5_SHFT 28 | ||
767 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_5_MASK 0x0000000010000000UL | ||
768 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_6_SHFT 29 | ||
769 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_6_MASK 0x0000000020000000UL | ||
770 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_7_SHFT 30 | ||
771 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_7_MASK 0x0000000040000000UL | ||
772 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_8_SHFT 31 | ||
773 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_8_MASK 0x0000000080000000UL | ||
774 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_9_SHFT 32 | ||
775 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_9_MASK 0x0000000100000000UL | ||
776 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_10_SHFT 33 | ||
777 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_10_MASK 0x0000000200000000UL | ||
778 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_11_SHFT 34 | ||
779 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_11_MASK 0x0000000400000000UL | ||
780 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_12_SHFT 35 | ||
781 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_12_MASK 0x0000000800000000UL | ||
782 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_13_SHFT 36 | ||
783 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_13_MASK 0x0000001000000000UL | ||
784 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_14_SHFT 37 | ||
785 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_14_MASK 0x0000002000000000UL | ||
786 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_15_SHFT 38 | ||
787 | #define UVH_LOCAL_INT0_ENABLE_LB_IRQ_INT_15_MASK 0x0000004000000000UL | ||
788 | #define UVH_LOCAL_INT0_ENABLE_L1_NMI_INT_SHFT 39 | ||
789 | #define UVH_LOCAL_INT0_ENABLE_L1_NMI_INT_MASK 0x0000008000000000UL | ||
790 | #define UVH_LOCAL_INT0_ENABLE_STOP_CLOCK_SHFT 40 | ||
791 | #define UVH_LOCAL_INT0_ENABLE_STOP_CLOCK_MASK 0x0000010000000000UL | ||
792 | #define UVH_LOCAL_INT0_ENABLE_ASIC_TO_L1_SHFT 41 | ||
793 | #define UVH_LOCAL_INT0_ENABLE_ASIC_TO_L1_MASK 0x0000020000000000UL | ||
794 | #define UVH_LOCAL_INT0_ENABLE_L1_TO_ASIC_SHFT 42 | ||
795 | #define UVH_LOCAL_INT0_ENABLE_L1_TO_ASIC_MASK 0x0000040000000000UL | ||
796 | #define UVH_LOCAL_INT0_ENABLE_LTC_INT_SHFT 43 | ||
797 | #define UVH_LOCAL_INT0_ENABLE_LTC_INT_MASK 0x0000080000000000UL | ||
798 | #define UVH_LOCAL_INT0_ENABLE_LA_SEQ_TRIGGER_SHFT 44 | ||
799 | #define UVH_LOCAL_INT0_ENABLE_LA_SEQ_TRIGGER_MASK 0x0000100000000000UL | ||
800 | |||
801 | union uvh_local_int0_enable_u { | ||
802 | unsigned long v; | ||
803 | struct uvh_local_int0_enable_s { | ||
804 | unsigned long lb_hcerr : 1; /* RW */ | ||
805 | unsigned long gr0_hcerr : 1; /* RW */ | ||
806 | unsigned long gr1_hcerr : 1; /* RW */ | ||
807 | unsigned long lh_hcerr : 1; /* RW */ | ||
808 | unsigned long rh_hcerr : 1; /* RW */ | ||
809 | unsigned long xn_hcerr : 1; /* RW */ | ||
810 | unsigned long si_hcerr : 1; /* RW */ | ||
811 | unsigned long lb_aoerr0 : 1; /* RW */ | ||
812 | unsigned long gr0_aoerr0 : 1; /* RW */ | ||
813 | unsigned long gr1_aoerr0 : 1; /* RW */ | ||
814 | unsigned long lh_aoerr0 : 1; /* RW */ | ||
815 | unsigned long rh_aoerr0 : 1; /* RW */ | ||
816 | unsigned long xn_aoerr0 : 1; /* RW */ | ||
817 | unsigned long si_aoerr0 : 1; /* RW */ | ||
818 | unsigned long lb_aoerr1 : 1; /* RW */ | ||
819 | unsigned long gr0_aoerr1 : 1; /* RW */ | ||
820 | unsigned long gr1_aoerr1 : 1; /* RW */ | ||
821 | unsigned long lh_aoerr1 : 1; /* RW */ | ||
822 | unsigned long rh_aoerr1 : 1; /* RW */ | ||
823 | unsigned long xn_aoerr1 : 1; /* RW */ | ||
824 | unsigned long si_aoerr1 : 1; /* RW */ | ||
825 | unsigned long rh_vpi_int : 1; /* RW */ | ||
826 | unsigned long system_shutdown_int : 1; /* RW */ | ||
827 | unsigned long lb_irq_int_0 : 1; /* RW */ | ||
828 | unsigned long lb_irq_int_1 : 1; /* RW */ | ||
829 | unsigned long lb_irq_int_2 : 1; /* RW */ | ||
830 | unsigned long lb_irq_int_3 : 1; /* RW */ | ||
831 | unsigned long lb_irq_int_4 : 1; /* RW */ | ||
832 | unsigned long lb_irq_int_5 : 1; /* RW */ | ||
833 | unsigned long lb_irq_int_6 : 1; /* RW */ | ||
834 | unsigned long lb_irq_int_7 : 1; /* RW */ | ||
835 | unsigned long lb_irq_int_8 : 1; /* RW */ | ||
836 | unsigned long lb_irq_int_9 : 1; /* RW */ | ||
837 | unsigned long lb_irq_int_10 : 1; /* RW */ | ||
838 | unsigned long lb_irq_int_11 : 1; /* RW */ | ||
839 | unsigned long lb_irq_int_12 : 1; /* RW */ | ||
840 | unsigned long lb_irq_int_13 : 1; /* RW */ | ||
841 | unsigned long lb_irq_int_14 : 1; /* RW */ | ||
842 | unsigned long lb_irq_int_15 : 1; /* RW */ | ||
843 | unsigned long l1_nmi_int : 1; /* RW */ | ||
844 | unsigned long stop_clock : 1; /* RW */ | ||
845 | unsigned long asic_to_l1 : 1; /* RW */ | ||
846 | unsigned long l1_to_asic : 1; /* RW */ | ||
847 | unsigned long ltc_int : 1; /* RW */ | ||
848 | unsigned long la_seq_trigger : 1; /* RW */ | ||
849 | unsigned long rsvd_45_63 : 19; /* */ | ||
850 | } s; | ||
851 | }; | ||
852 | |||
853 | /* ========================================================================= */ | ||
251 | /* UVH_NODE_ID */ | 854 | /* UVH_NODE_ID */ |
252 | /* ========================================================================= */ | 855 | /* ========================================================================= */ |
253 | #define UVH_NODE_ID 0x0UL | 856 | #define UVH_NODE_ID 0x0UL |
@@ -284,14 +887,101 @@ union uvh_node_id_u { | |||
284 | }; | 887 | }; |
285 | 888 | ||
286 | /* ========================================================================= */ | 889 | /* ========================================================================= */ |
890 | /* UVH_NODE_PRESENT_TABLE */ | ||
891 | /* ========================================================================= */ | ||
892 | #define UVH_NODE_PRESENT_TABLE 0x1400UL | ||
893 | #define UVH_NODE_PRESENT_TABLE_DEPTH 16 | ||
894 | |||
895 | #define UVH_NODE_PRESENT_TABLE_NODES_SHFT 0 | ||
896 | #define UVH_NODE_PRESENT_TABLE_NODES_MASK 0xffffffffffffffffUL | ||
897 | |||
898 | union uvh_node_present_table_u { | ||
899 | unsigned long v; | ||
900 | struct uvh_node_present_table_s { | ||
901 | unsigned long nodes : 64; /* RW */ | ||
902 | } s; | ||
903 | }; | ||
904 | |||
905 | /* ========================================================================= */ | ||
906 | /* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR */ | ||
907 | /* ========================================================================= */ | ||
908 | #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR 0x16000d0UL | ||
909 | |||
910 | #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT 24 | ||
911 | #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_MASK 0x00003fffff000000UL | ||
912 | |||
913 | union uvh_rh_gam_alias210_redirect_config_0_mmr_u { | ||
914 | unsigned long v; | ||
915 | struct uvh_rh_gam_alias210_redirect_config_0_mmr_s { | ||
916 | unsigned long rsvd_0_23 : 24; /* */ | ||
917 | unsigned long dest_base : 22; /* RW */ | ||
918 | unsigned long rsvd_46_63: 18; /* */ | ||
919 | } s; | ||
920 | }; | ||
921 | |||
922 | /* ========================================================================= */ | ||
923 | /* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR */ | ||
924 | /* ========================================================================= */ | ||
925 | #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR 0x16000e0UL | ||
926 | |||
927 | #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR_DEST_BASE_SHFT 24 | ||
928 | #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR_DEST_BASE_MASK 0x00003fffff000000UL | ||
929 | |||
930 | union uvh_rh_gam_alias210_redirect_config_1_mmr_u { | ||
931 | unsigned long v; | ||
932 | struct uvh_rh_gam_alias210_redirect_config_1_mmr_s { | ||
933 | unsigned long rsvd_0_23 : 24; /* */ | ||
934 | unsigned long dest_base : 22; /* RW */ | ||
935 | unsigned long rsvd_46_63: 18; /* */ | ||
936 | } s; | ||
937 | }; | ||
938 | |||
939 | /* ========================================================================= */ | ||
940 | /* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR */ | ||
941 | /* ========================================================================= */ | ||
942 | #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR 0x16000f0UL | ||
943 | |||
944 | #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR_DEST_BASE_SHFT 24 | ||
945 | #define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR_DEST_BASE_MASK 0x00003fffff000000UL | ||
946 | |||
947 | union uvh_rh_gam_alias210_redirect_config_2_mmr_u { | ||
948 | unsigned long v; | ||
949 | struct uvh_rh_gam_alias210_redirect_config_2_mmr_s { | ||
950 | unsigned long rsvd_0_23 : 24; /* */ | ||
951 | unsigned long dest_base : 22; /* RW */ | ||
952 | unsigned long rsvd_46_63: 18; /* */ | ||
953 | } s; | ||
954 | }; | ||
955 | |||
956 | /* ========================================================================= */ | ||
957 | /* UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR */ | ||
958 | /* ========================================================================= */ | ||
959 | #define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR 0x1600020UL | ||
960 | |||
961 | #define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_BASE_SHFT 26 | ||
962 | #define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffffc000000UL | ||
963 | #define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63 | ||
964 | #define UVH_RH_GAM_CFG_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL | ||
965 | |||
966 | union uvh_rh_gam_cfg_overlay_config_mmr_u { | ||
967 | unsigned long v; | ||
968 | struct uvh_rh_gam_cfg_overlay_config_mmr_s { | ||
969 | unsigned long rsvd_0_25: 26; /* */ | ||
970 | unsigned long base : 20; /* RW */ | ||
971 | unsigned long rsvd_46_62: 17; /* */ | ||
972 | unsigned long enable : 1; /* RW */ | ||
973 | } s; | ||
974 | }; | ||
975 | |||
976 | /* ========================================================================= */ | ||
287 | /* UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR */ | 977 | /* UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR */ |
288 | /* ========================================================================= */ | 978 | /* ========================================================================= */ |
289 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR 0x1600010UL | 979 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR 0x1600010UL |
290 | 980 | ||
291 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT 28 | 981 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT 28 |
292 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffff0000000UL | 982 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffff0000000UL |
293 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_SHFT 46 | 983 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_SHFT 48 |
294 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_MASK 0x0000400000000000UL | 984 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_MASK 0x0001000000000000UL |
295 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_SHFT 52 | 985 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_SHFT 52 |
296 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_MASK 0x00f0000000000000UL | 986 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_MASK 0x00f0000000000000UL |
297 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63 | 987 | #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63 |
@@ -302,8 +992,9 @@ union uvh_rh_gam_gru_overlay_config_mmr_u { | |||
302 | struct uvh_rh_gam_gru_overlay_config_mmr_s { | 992 | struct uvh_rh_gam_gru_overlay_config_mmr_s { |
303 | unsigned long rsvd_0_27: 28; /* */ | 993 | unsigned long rsvd_0_27: 28; /* */ |
304 | unsigned long base : 18; /* RW */ | 994 | unsigned long base : 18; /* RW */ |
995 | unsigned long rsvd_46_47: 2; /* */ | ||
305 | unsigned long gr4 : 1; /* RW */ | 996 | unsigned long gr4 : 1; /* RW */ |
306 | unsigned long rsvd_47_51: 5; /* */ | 997 | unsigned long rsvd_49_51: 3; /* */ |
307 | unsigned long n_gru : 4; /* RW */ | 998 | unsigned long n_gru : 4; /* RW */ |
308 | unsigned long rsvd_56_62: 7; /* */ | 999 | unsigned long rsvd_56_62: 7; /* */ |
309 | unsigned long enable : 1; /* RW */ | 1000 | unsigned long enable : 1; /* RW */ |
@@ -311,6 +1002,32 @@ union uvh_rh_gam_gru_overlay_config_mmr_u { | |||
311 | }; | 1002 | }; |
312 | 1003 | ||
313 | /* ========================================================================= */ | 1004 | /* ========================================================================= */ |
1005 | /* UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR */ | ||
1006 | /* ========================================================================= */ | ||
1007 | #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR 0x1600030UL | ||
1008 | |||
1009 | #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_SHFT 30 | ||
1010 | #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003fffc0000000UL | ||
1011 | #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_M_IO_SHFT 46 | ||
1012 | #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_M_IO_MASK 0x000fc00000000000UL | ||
1013 | #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_N_IO_SHFT 52 | ||
1014 | #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_N_IO_MASK 0x00f0000000000000UL | ||
1015 | #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63 | ||
1016 | #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL | ||
1017 | |||
1018 | union uvh_rh_gam_mmioh_overlay_config_mmr_u { | ||
1019 | unsigned long v; | ||
1020 | struct uvh_rh_gam_mmioh_overlay_config_mmr_s { | ||
1021 | unsigned long rsvd_0_29: 30; /* */ | ||
1022 | unsigned long base : 16; /* RW */ | ||
1023 | unsigned long m_io : 6; /* RW */ | ||
1024 | unsigned long n_io : 4; /* RW */ | ||
1025 | unsigned long rsvd_56_62: 7; /* */ | ||
1026 | unsigned long enable : 1; /* RW */ | ||
1027 | } s; | ||
1028 | }; | ||
1029 | |||
1030 | /* ========================================================================= */ | ||
314 | /* UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR */ | 1031 | /* UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR */ |
315 | /* ========================================================================= */ | 1032 | /* ========================================================================= */ |
316 | #define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR 0x1600028UL | 1033 | #define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR 0x1600028UL |
@@ -336,7 +1053,7 @@ union uvh_rh_gam_mmr_overlay_config_mmr_u { | |||
336 | /* ========================================================================= */ | 1053 | /* ========================================================================= */ |
337 | /* UVH_RTC */ | 1054 | /* UVH_RTC */ |
338 | /* ========================================================================= */ | 1055 | /* ========================================================================= */ |
339 | #define UVH_RTC 0x28000UL | 1056 | #define UVH_RTC 0x340000UL |
340 | 1057 | ||
341 | #define UVH_RTC_REAL_TIME_CLOCK_SHFT 0 | 1058 | #define UVH_RTC_REAL_TIME_CLOCK_SHFT 0 |
342 | #define UVH_RTC_REAL_TIME_CLOCK_MASK 0x00ffffffffffffffUL | 1059 | #define UVH_RTC_REAL_TIME_CLOCK_MASK 0x00ffffffffffffffUL |
@@ -350,6 +1067,139 @@ union uvh_rtc_u { | |||
350 | }; | 1067 | }; |
351 | 1068 | ||
352 | /* ========================================================================= */ | 1069 | /* ========================================================================= */ |
1070 | /* UVH_RTC1_INT_CONFIG */ | ||
1071 | /* ========================================================================= */ | ||
1072 | #define UVH_RTC1_INT_CONFIG 0x615c0UL | ||
1073 | |||
1074 | #define UVH_RTC1_INT_CONFIG_VECTOR_SHFT 0 | ||
1075 | #define UVH_RTC1_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL | ||
1076 | #define UVH_RTC1_INT_CONFIG_DM_SHFT 8 | ||
1077 | #define UVH_RTC1_INT_CONFIG_DM_MASK 0x0000000000000700UL | ||
1078 | #define UVH_RTC1_INT_CONFIG_DESTMODE_SHFT 11 | ||
1079 | #define UVH_RTC1_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL | ||
1080 | #define UVH_RTC1_INT_CONFIG_STATUS_SHFT 12 | ||
1081 | #define UVH_RTC1_INT_CONFIG_STATUS_MASK 0x0000000000001000UL | ||
1082 | #define UVH_RTC1_INT_CONFIG_P_SHFT 13 | ||
1083 | #define UVH_RTC1_INT_CONFIG_P_MASK 0x0000000000002000UL | ||
1084 | #define UVH_RTC1_INT_CONFIG_T_SHFT 15 | ||
1085 | #define UVH_RTC1_INT_CONFIG_T_MASK 0x0000000000008000UL | ||
1086 | #define UVH_RTC1_INT_CONFIG_M_SHFT 16 | ||
1087 | #define UVH_RTC1_INT_CONFIG_M_MASK 0x0000000000010000UL | ||
1088 | #define UVH_RTC1_INT_CONFIG_APIC_ID_SHFT 32 | ||
1089 | #define UVH_RTC1_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL | ||
1090 | |||
1091 | union uvh_rtc1_int_config_u { | ||
1092 | unsigned long v; | ||
1093 | struct uvh_rtc1_int_config_s { | ||
1094 | unsigned long vector_ : 8; /* RW */ | ||
1095 | unsigned long dm : 3; /* RW */ | ||
1096 | unsigned long destmode : 1; /* RW */ | ||
1097 | unsigned long status : 1; /* RO */ | ||
1098 | unsigned long p : 1; /* RO */ | ||
1099 | unsigned long rsvd_14 : 1; /* */ | ||
1100 | unsigned long t : 1; /* RO */ | ||
1101 | unsigned long m : 1; /* RW */ | ||
1102 | unsigned long rsvd_17_31: 15; /* */ | ||
1103 | unsigned long apic_id : 32; /* RW */ | ||
1104 | } s; | ||
1105 | }; | ||
1106 | |||
1107 | /* ========================================================================= */ | ||
1108 | /* UVH_RTC2_INT_CONFIG */ | ||
1109 | /* ========================================================================= */ | ||
1110 | #define UVH_RTC2_INT_CONFIG 0x61600UL | ||
1111 | |||
1112 | #define UVH_RTC2_INT_CONFIG_VECTOR_SHFT 0 | ||
1113 | #define UVH_RTC2_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL | ||
1114 | #define UVH_RTC2_INT_CONFIG_DM_SHFT 8 | ||
1115 | #define UVH_RTC2_INT_CONFIG_DM_MASK 0x0000000000000700UL | ||
1116 | #define UVH_RTC2_INT_CONFIG_DESTMODE_SHFT 11 | ||
1117 | #define UVH_RTC2_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL | ||
1118 | #define UVH_RTC2_INT_CONFIG_STATUS_SHFT 12 | ||
1119 | #define UVH_RTC2_INT_CONFIG_STATUS_MASK 0x0000000000001000UL | ||
1120 | #define UVH_RTC2_INT_CONFIG_P_SHFT 13 | ||
1121 | #define UVH_RTC2_INT_CONFIG_P_MASK 0x0000000000002000UL | ||
1122 | #define UVH_RTC2_INT_CONFIG_T_SHFT 15 | ||
1123 | #define UVH_RTC2_INT_CONFIG_T_MASK 0x0000000000008000UL | ||
1124 | #define UVH_RTC2_INT_CONFIG_M_SHFT 16 | ||
1125 | #define UVH_RTC2_INT_CONFIG_M_MASK 0x0000000000010000UL | ||
1126 | #define UVH_RTC2_INT_CONFIG_APIC_ID_SHFT 32 | ||
1127 | #define UVH_RTC2_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL | ||
1128 | |||
1129 | union uvh_rtc2_int_config_u { | ||
1130 | unsigned long v; | ||
1131 | struct uvh_rtc2_int_config_s { | ||
1132 | unsigned long vector_ : 8; /* RW */ | ||
1133 | unsigned long dm : 3; /* RW */ | ||
1134 | unsigned long destmode : 1; /* RW */ | ||
1135 | unsigned long status : 1; /* RO */ | ||
1136 | unsigned long p : 1; /* RO */ | ||
1137 | unsigned long rsvd_14 : 1; /* */ | ||
1138 | unsigned long t : 1; /* RO */ | ||
1139 | unsigned long m : 1; /* RW */ | ||
1140 | unsigned long rsvd_17_31: 15; /* */ | ||
1141 | unsigned long apic_id : 32; /* RW */ | ||
1142 | } s; | ||
1143 | }; | ||
1144 | |||
1145 | /* ========================================================================= */ | ||
1146 | /* UVH_RTC3_INT_CONFIG */ | ||
1147 | /* ========================================================================= */ | ||
1148 | #define UVH_RTC3_INT_CONFIG 0x61640UL | ||
1149 | |||
1150 | #define UVH_RTC3_INT_CONFIG_VECTOR_SHFT 0 | ||
1151 | #define UVH_RTC3_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL | ||
1152 | #define UVH_RTC3_INT_CONFIG_DM_SHFT 8 | ||
1153 | #define UVH_RTC3_INT_CONFIG_DM_MASK 0x0000000000000700UL | ||
1154 | #define UVH_RTC3_INT_CONFIG_DESTMODE_SHFT 11 | ||
1155 | #define UVH_RTC3_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL | ||
1156 | #define UVH_RTC3_INT_CONFIG_STATUS_SHFT 12 | ||
1157 | #define UVH_RTC3_INT_CONFIG_STATUS_MASK 0x0000000000001000UL | ||
1158 | #define UVH_RTC3_INT_CONFIG_P_SHFT 13 | ||
1159 | #define UVH_RTC3_INT_CONFIG_P_MASK 0x0000000000002000UL | ||
1160 | #define UVH_RTC3_INT_CONFIG_T_SHFT 15 | ||
1161 | #define UVH_RTC3_INT_CONFIG_T_MASK 0x0000000000008000UL | ||
1162 | #define UVH_RTC3_INT_CONFIG_M_SHFT 16 | ||
1163 | #define UVH_RTC3_INT_CONFIG_M_MASK 0x0000000000010000UL | ||
1164 | #define UVH_RTC3_INT_CONFIG_APIC_ID_SHFT 32 | ||
1165 | #define UVH_RTC3_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL | ||
1166 | |||
1167 | union uvh_rtc3_int_config_u { | ||
1168 | unsigned long v; | ||
1169 | struct uvh_rtc3_int_config_s { | ||
1170 | unsigned long vector_ : 8; /* RW */ | ||
1171 | unsigned long dm : 3; /* RW */ | ||
1172 | unsigned long destmode : 1; /* RW */ | ||
1173 | unsigned long status : 1; /* RO */ | ||
1174 | unsigned long p : 1; /* RO */ | ||
1175 | unsigned long rsvd_14 : 1; /* */ | ||
1176 | unsigned long t : 1; /* RO */ | ||
1177 | unsigned long m : 1; /* RW */ | ||
1178 | unsigned long rsvd_17_31: 15; /* */ | ||
1179 | unsigned long apic_id : 32; /* RW */ | ||
1180 | } s; | ||
1181 | }; | ||
1182 | |||
1183 | /* ========================================================================= */ | ||
1184 | /* UVH_RTC_INC_RATIO */ | ||
1185 | /* ========================================================================= */ | ||
1186 | #define UVH_RTC_INC_RATIO 0x350000UL | ||
1187 | |||
1188 | #define UVH_RTC_INC_RATIO_FRACTION_SHFT 0 | ||
1189 | #define UVH_RTC_INC_RATIO_FRACTION_MASK 0x00000000000fffffUL | ||
1190 | #define UVH_RTC_INC_RATIO_RATIO_SHFT 20 | ||
1191 | #define UVH_RTC_INC_RATIO_RATIO_MASK 0x0000000000700000UL | ||
1192 | |||
1193 | union uvh_rtc_inc_ratio_u { | ||
1194 | unsigned long v; | ||
1195 | struct uvh_rtc_inc_ratio_s { | ||
1196 | unsigned long fraction : 20; /* RW */ | ||
1197 | unsigned long ratio : 3; /* RW */ | ||
1198 | unsigned long rsvd_23_63: 41; /* */ | ||
1199 | } s; | ||
1200 | }; | ||
1201 | |||
1202 | /* ========================================================================= */ | ||
353 | /* UVH_SI_ADDR_MAP_CONFIG */ | 1203 | /* UVH_SI_ADDR_MAP_CONFIG */ |
354 | /* ========================================================================= */ | 1204 | /* ========================================================================= */ |
355 | #define UVH_SI_ADDR_MAP_CONFIG 0xc80000UL | 1205 | #define UVH_SI_ADDR_MAP_CONFIG 0xc80000UL |
@@ -369,5 +1219,77 @@ union uvh_si_addr_map_config_u { | |||
369 | } s; | 1219 | } s; |
370 | }; | 1220 | }; |
371 | 1221 | ||
1222 | /* ========================================================================= */ | ||
1223 | /* UVH_SI_ALIAS0_OVERLAY_CONFIG */ | ||
1224 | /* ========================================================================= */ | ||
1225 | #define UVH_SI_ALIAS0_OVERLAY_CONFIG 0xc80008UL | ||
1226 | |||
1227 | #define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_SHFT 24 | ||
1228 | #define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL | ||
1229 | #define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_SHFT 48 | ||
1230 | #define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL | ||
1231 | #define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_SHFT 63 | ||
1232 | #define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL | ||
1233 | |||
1234 | union uvh_si_alias0_overlay_config_u { | ||
1235 | unsigned long v; | ||
1236 | struct uvh_si_alias0_overlay_config_s { | ||
1237 | unsigned long rsvd_0_23: 24; /* */ | ||
1238 | unsigned long base : 8; /* RW */ | ||
1239 | unsigned long rsvd_32_47: 16; /* */ | ||
1240 | unsigned long m_alias : 5; /* RW */ | ||
1241 | unsigned long rsvd_53_62: 10; /* */ | ||
1242 | unsigned long enable : 1; /* RW */ | ||
1243 | } s; | ||
1244 | }; | ||
1245 | |||
1246 | /* ========================================================================= */ | ||
1247 | /* UVH_SI_ALIAS1_OVERLAY_CONFIG */ | ||
1248 | /* ========================================================================= */ | ||
1249 | #define UVH_SI_ALIAS1_OVERLAY_CONFIG 0xc80010UL | ||
1250 | |||
1251 | #define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_SHFT 24 | ||
1252 | #define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL | ||
1253 | #define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_SHFT 48 | ||
1254 | #define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL | ||
1255 | #define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_SHFT 63 | ||
1256 | #define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL | ||
1257 | |||
1258 | union uvh_si_alias1_overlay_config_u { | ||
1259 | unsigned long v; | ||
1260 | struct uvh_si_alias1_overlay_config_s { | ||
1261 | unsigned long rsvd_0_23: 24; /* */ | ||
1262 | unsigned long base : 8; /* RW */ | ||
1263 | unsigned long rsvd_32_47: 16; /* */ | ||
1264 | unsigned long m_alias : 5; /* RW */ | ||
1265 | unsigned long rsvd_53_62: 10; /* */ | ||
1266 | unsigned long enable : 1; /* RW */ | ||
1267 | } s; | ||
1268 | }; | ||
1269 | |||
1270 | /* ========================================================================= */ | ||
1271 | /* UVH_SI_ALIAS2_OVERLAY_CONFIG */ | ||
1272 | /* ========================================================================= */ | ||
1273 | #define UVH_SI_ALIAS2_OVERLAY_CONFIG 0xc80018UL | ||
1274 | |||
1275 | #define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_SHFT 24 | ||
1276 | #define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL | ||
1277 | #define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_SHFT 48 | ||
1278 | #define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL | ||
1279 | #define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_SHFT 63 | ||
1280 | #define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL | ||
1281 | |||
1282 | union uvh_si_alias2_overlay_config_u { | ||
1283 | unsigned long v; | ||
1284 | struct uvh_si_alias2_overlay_config_s { | ||
1285 | unsigned long rsvd_0_23: 24; /* */ | ||
1286 | unsigned long base : 8; /* RW */ | ||
1287 | unsigned long rsvd_32_47: 16; /* */ | ||
1288 | unsigned long m_alias : 5; /* RW */ | ||
1289 | unsigned long rsvd_53_62: 10; /* */ | ||
1290 | unsigned long enable : 1; /* RW */ | ||
1291 | } s; | ||
1292 | }; | ||
1293 | |||
372 | 1294 | ||
373 | #endif /* __ASM_X86_UV_MMRS__ */ | 1295 | #endif /* __ASM_X86_UV_MMRS__ */ |
diff --git a/include/asm-x86/vdso.h b/include/asm-x86/vdso.h index 86e085e003d2..8e18fb80f5e6 100644 --- a/include/asm-x86/vdso.h +++ b/include/asm-x86/vdso.h | |||
@@ -36,4 +36,12 @@ extern const char VDSO32_PRELINK[]; | |||
36 | extern void __user __kernel_sigreturn; | 36 | extern void __user __kernel_sigreturn; |
37 | extern void __user __kernel_rt_sigreturn; | 37 | extern void __user __kernel_rt_sigreturn; |
38 | 38 | ||
39 | /* | ||
40 | * These symbols are defined by vdso32.S to mark the bounds | ||
41 | * of the ELF DSO images included therein. | ||
42 | */ | ||
43 | extern const char vdso32_int80_start, vdso32_int80_end; | ||
44 | extern const char vdso32_syscall_start, vdso32_syscall_end; | ||
45 | extern const char vdso32_sysenter_start, vdso32_sysenter_end; | ||
46 | |||
39 | #endif /* asm-x86/vdso.h */ | 47 | #endif /* asm-x86/vdso.h */ |
diff --git a/include/asm-x86/mach-visws/cobalt.h b/include/asm-x86/visws/cobalt.h index 995258831b7f..995258831b7f 100644 --- a/include/asm-x86/mach-visws/cobalt.h +++ b/include/asm-x86/visws/cobalt.h | |||
diff --git a/include/asm-x86/mach-visws/lithium.h b/include/asm-x86/visws/lithium.h index dfcd4f07ab85..dfcd4f07ab85 100644 --- a/include/asm-x86/mach-visws/lithium.h +++ b/include/asm-x86/visws/lithium.h | |||
diff --git a/include/asm-x86/mach-visws/piix4.h b/include/asm-x86/visws/piix4.h index 83ea4f46e419..83ea4f46e419 100644 --- a/include/asm-x86/mach-visws/piix4.h +++ b/include/asm-x86/visws/piix4.h | |||
diff --git a/include/asm-x86/visws/sgivw.h b/include/asm-x86/visws/sgivw.h new file mode 100644 index 000000000000..5fbf63e1003c --- /dev/null +++ b/include/asm-x86/visws/sgivw.h | |||
@@ -0,0 +1,5 @@ | |||
1 | /* | ||
2 | * Frame buffer position and size: | ||
3 | */ | ||
4 | extern unsigned long sgivwfb_mem_phys; | ||
5 | extern unsigned long sgivwfb_mem_size; | ||
diff --git a/include/asm-x86/vm86.h b/include/asm-x86/vm86.h index 074b357146df..5ce351325e01 100644 --- a/include/asm-x86/vm86.h +++ b/include/asm-x86/vm86.h | |||
@@ -14,12 +14,6 @@ | |||
14 | 14 | ||
15 | #include <asm/processor-flags.h> | 15 | #include <asm/processor-flags.h> |
16 | 16 | ||
17 | #ifdef CONFIG_VM86 | ||
18 | #define X86_VM_MASK X86_EFLAGS_VM | ||
19 | #else | ||
20 | #define X86_VM_MASK 0 /* No VM86 support */ | ||
21 | #endif | ||
22 | |||
23 | #define BIOSSEG 0x0f000 | 17 | #define BIOSSEG 0x0f000 |
24 | 18 | ||
25 | #define CPU_086 0 | 19 | #define CPU_086 0 |
@@ -121,7 +115,6 @@ struct vm86plus_info_struct { | |||
121 | unsigned long is_vm86pus:1; /* for vm86 internal use */ | 115 | unsigned long is_vm86pus:1; /* for vm86 internal use */ |
122 | unsigned char vm86dbg_intxxtab[32]; /* for debugger */ | 116 | unsigned char vm86dbg_intxxtab[32]; /* for debugger */ |
123 | }; | 117 | }; |
124 | |||
125 | struct vm86plus_struct { | 118 | struct vm86plus_struct { |
126 | struct vm86_regs regs; | 119 | struct vm86_regs regs; |
127 | unsigned long flags; | 120 | unsigned long flags; |
@@ -133,6 +126,9 @@ struct vm86plus_struct { | |||
133 | }; | 126 | }; |
134 | 127 | ||
135 | #ifdef __KERNEL__ | 128 | #ifdef __KERNEL__ |
129 | |||
130 | #include <asm/ptrace.h> | ||
131 | |||
136 | /* | 132 | /* |
137 | * This is the (kernel) stack-layout when we have done a "SAVE_ALL" from vm86 | 133 | * This is the (kernel) stack-layout when we have done a "SAVE_ALL" from vm86 |
138 | * mode - the main change is that the old segment descriptors aren't | 134 | * mode - the main change is that the old segment descriptors aren't |
@@ -141,7 +137,6 @@ struct vm86plus_struct { | |||
141 | * at the end of the structure. Look at ptrace.h to see the "normal" | 137 | * at the end of the structure. Look at ptrace.h to see the "normal" |
142 | * setup. For user space layout see 'struct vm86_regs' above. | 138 | * setup. For user space layout see 'struct vm86_regs' above. |
143 | */ | 139 | */ |
144 | #include <asm/ptrace.h> | ||
145 | 140 | ||
146 | struct kernel_vm86_regs { | 141 | struct kernel_vm86_regs { |
147 | /* | 142 | /* |
diff --git a/include/asm-x86/vmi_time.h b/include/asm-x86/vmi_time.h index 478188130328..c3118c385156 100644 --- a/include/asm-x86/vmi_time.h +++ b/include/asm-x86/vmi_time.h | |||
@@ -50,7 +50,7 @@ extern void __init vmi_time_init(void); | |||
50 | extern unsigned long vmi_get_wallclock(void); | 50 | extern unsigned long vmi_get_wallclock(void); |
51 | extern int vmi_set_wallclock(unsigned long now); | 51 | extern int vmi_set_wallclock(unsigned long now); |
52 | extern unsigned long long vmi_sched_clock(void); | 52 | extern unsigned long long vmi_sched_clock(void); |
53 | extern unsigned long vmi_cpu_khz(void); | 53 | extern unsigned long vmi_tsc_khz(void); |
54 | 54 | ||
55 | #ifdef CONFIG_X86_LOCAL_APIC | 55 | #ifdef CONFIG_X86_LOCAL_APIC |
56 | extern void __devinit vmi_time_bsp_init(void); | 56 | extern void __devinit vmi_time_bsp_init(void); |
diff --git a/include/asm-x86/vsyscall.h b/include/asm-x86/vsyscall.h index 17b3700949bf..6b66ff905af0 100644 --- a/include/asm-x86/vsyscall.h +++ b/include/asm-x86/vsyscall.h | |||
@@ -24,7 +24,8 @@ enum vsyscall_num { | |||
24 | ((unused, __section__ (".vsyscall_gtod_data"),aligned(16))) | 24 | ((unused, __section__ (".vsyscall_gtod_data"),aligned(16))) |
25 | #define __section_vsyscall_clock __attribute__ \ | 25 | #define __section_vsyscall_clock __attribute__ \ |
26 | ((unused, __section__ (".vsyscall_clock"),aligned(16))) | 26 | ((unused, __section__ (".vsyscall_clock"),aligned(16))) |
27 | #define __vsyscall_fn __attribute__ ((unused,__section__(".vsyscall_fn"))) | 27 | #define __vsyscall_fn \ |
28 | __attribute__ ((unused, __section__(".vsyscall_fn"))) notrace | ||
28 | 29 | ||
29 | #define VGETCPU_RDTSCP 1 | 30 | #define VGETCPU_RDTSCP 1 |
30 | #define VGETCPU_LSL 2 | 31 | #define VGETCPU_LSL 2 |
diff --git a/include/asm-x86/xen/events.h b/include/asm-x86/xen/events.h index 596312a7bfc9..8ded74720024 100644 --- a/include/asm-x86/xen/events.h +++ b/include/asm-x86/xen/events.h | |||
@@ -4,6 +4,8 @@ | |||
4 | enum ipi_vector { | 4 | enum ipi_vector { |
5 | XEN_RESCHEDULE_VECTOR, | 5 | XEN_RESCHEDULE_VECTOR, |
6 | XEN_CALL_FUNCTION_VECTOR, | 6 | XEN_CALL_FUNCTION_VECTOR, |
7 | XEN_CALL_FUNCTION_SINGLE_VECTOR, | ||
8 | XEN_SPIN_UNLOCK_VECTOR, | ||
7 | 9 | ||
8 | XEN_NR_IPIS, | 10 | XEN_NR_IPIS, |
9 | }; | 11 | }; |
diff --git a/include/asm-x86/xen/hypercall.h b/include/asm-x86/xen/hypercall.h index c2ccd997ed35..91cb7fd5c123 100644 --- a/include/asm-x86/xen/hypercall.h +++ b/include/asm-x86/xen/hypercall.h | |||
@@ -40,83 +40,157 @@ | |||
40 | #include <xen/interface/sched.h> | 40 | #include <xen/interface/sched.h> |
41 | #include <xen/interface/physdev.h> | 41 | #include <xen/interface/physdev.h> |
42 | 42 | ||
43 | /* | ||
44 | * The hypercall asms have to meet several constraints: | ||
45 | * - Work on 32- and 64-bit. | ||
46 | * The two architectures put their arguments in different sets of | ||
47 | * registers. | ||
48 | * | ||
49 | * - Work around asm syntax quirks | ||
50 | * It isn't possible to specify one of the rNN registers in a | ||
51 | * constraint, so we use explicit register variables to get the | ||
52 | * args into the right place. | ||
53 | * | ||
54 | * - Mark all registers as potentially clobbered | ||
55 | * Even unused parameters can be clobbered by the hypervisor, so we | ||
56 | * need to make sure gcc knows it. | ||
57 | * | ||
58 | * - Avoid compiler bugs. | ||
59 | * This is the tricky part. Because x86_32 has such a constrained | ||
60 | * register set, gcc versions below 4.3 have trouble generating | ||
61 | * code when all the arg registers and memory are trashed by the | ||
62 | * asm. There are syntactically simpler ways of achieving the | ||
63 | * semantics below, but they cause the compiler to crash. | ||
64 | * | ||
65 | * The only combination I found which works is: | ||
66 | * - assign the __argX variables first | ||
67 | * - list all actually used parameters as "+r" (__argX) | ||
68 | * - clobber the rest | ||
69 | * | ||
70 | * The result certainly isn't pretty, and it really shows up cpp's | ||
71 | * weakness as as macro language. Sorry. (But let's just give thanks | ||
72 | * there aren't more than 5 arguments...) | ||
73 | */ | ||
74 | |||
43 | extern struct { char _entry[32]; } hypercall_page[]; | 75 | extern struct { char _entry[32]; } hypercall_page[]; |
44 | 76 | ||
77 | #define __HYPERCALL "call hypercall_page+%c[offset]" | ||
78 | #define __HYPERCALL_ENTRY(x) \ | ||
79 | [offset] "i" (__HYPERVISOR_##x * sizeof(hypercall_page[0])) | ||
80 | |||
81 | #ifdef CONFIG_X86_32 | ||
82 | #define __HYPERCALL_RETREG "eax" | ||
83 | #define __HYPERCALL_ARG1REG "ebx" | ||
84 | #define __HYPERCALL_ARG2REG "ecx" | ||
85 | #define __HYPERCALL_ARG3REG "edx" | ||
86 | #define __HYPERCALL_ARG4REG "esi" | ||
87 | #define __HYPERCALL_ARG5REG "edi" | ||
88 | #else | ||
89 | #define __HYPERCALL_RETREG "rax" | ||
90 | #define __HYPERCALL_ARG1REG "rdi" | ||
91 | #define __HYPERCALL_ARG2REG "rsi" | ||
92 | #define __HYPERCALL_ARG3REG "rdx" | ||
93 | #define __HYPERCALL_ARG4REG "r10" | ||
94 | #define __HYPERCALL_ARG5REG "r8" | ||
95 | #endif | ||
96 | |||
97 | #define __HYPERCALL_DECLS \ | ||
98 | register unsigned long __res asm(__HYPERCALL_RETREG); \ | ||
99 | register unsigned long __arg1 asm(__HYPERCALL_ARG1REG) = __arg1; \ | ||
100 | register unsigned long __arg2 asm(__HYPERCALL_ARG2REG) = __arg2; \ | ||
101 | register unsigned long __arg3 asm(__HYPERCALL_ARG3REG) = __arg3; \ | ||
102 | register unsigned long __arg4 asm(__HYPERCALL_ARG4REG) = __arg4; \ | ||
103 | register unsigned long __arg5 asm(__HYPERCALL_ARG5REG) = __arg5; | ||
104 | |||
105 | #define __HYPERCALL_0PARAM "=r" (__res) | ||
106 | #define __HYPERCALL_1PARAM __HYPERCALL_0PARAM, "+r" (__arg1) | ||
107 | #define __HYPERCALL_2PARAM __HYPERCALL_1PARAM, "+r" (__arg2) | ||
108 | #define __HYPERCALL_3PARAM __HYPERCALL_2PARAM, "+r" (__arg3) | ||
109 | #define __HYPERCALL_4PARAM __HYPERCALL_3PARAM, "+r" (__arg4) | ||
110 | #define __HYPERCALL_5PARAM __HYPERCALL_4PARAM, "+r" (__arg5) | ||
111 | |||
112 | #define __HYPERCALL_0ARG() | ||
113 | #define __HYPERCALL_1ARG(a1) \ | ||
114 | __HYPERCALL_0ARG() __arg1 = (unsigned long)(a1); | ||
115 | #define __HYPERCALL_2ARG(a1,a2) \ | ||
116 | __HYPERCALL_1ARG(a1) __arg2 = (unsigned long)(a2); | ||
117 | #define __HYPERCALL_3ARG(a1,a2,a3) \ | ||
118 | __HYPERCALL_2ARG(a1,a2) __arg3 = (unsigned long)(a3); | ||
119 | #define __HYPERCALL_4ARG(a1,a2,a3,a4) \ | ||
120 | __HYPERCALL_3ARG(a1,a2,a3) __arg4 = (unsigned long)(a4); | ||
121 | #define __HYPERCALL_5ARG(a1,a2,a3,a4,a5) \ | ||
122 | __HYPERCALL_4ARG(a1,a2,a3,a4) __arg5 = (unsigned long)(a5); | ||
123 | |||
124 | #define __HYPERCALL_CLOBBER5 "memory" | ||
125 | #define __HYPERCALL_CLOBBER4 __HYPERCALL_CLOBBER5, __HYPERCALL_ARG5REG | ||
126 | #define __HYPERCALL_CLOBBER3 __HYPERCALL_CLOBBER4, __HYPERCALL_ARG4REG | ||
127 | #define __HYPERCALL_CLOBBER2 __HYPERCALL_CLOBBER3, __HYPERCALL_ARG3REG | ||
128 | #define __HYPERCALL_CLOBBER1 __HYPERCALL_CLOBBER2, __HYPERCALL_ARG2REG | ||
129 | #define __HYPERCALL_CLOBBER0 __HYPERCALL_CLOBBER1, __HYPERCALL_ARG1REG | ||
130 | |||
45 | #define _hypercall0(type, name) \ | 131 | #define _hypercall0(type, name) \ |
46 | ({ \ | 132 | ({ \ |
47 | long __res; \ | 133 | __HYPERCALL_DECLS; \ |
48 | asm volatile ( \ | 134 | __HYPERCALL_0ARG(); \ |
49 | "call %[call]" \ | 135 | asm volatile (__HYPERCALL \ |
50 | : "=a" (__res) \ | 136 | : __HYPERCALL_0PARAM \ |
51 | : [call] "m" (hypercall_page[__HYPERVISOR_##name]) \ | 137 | : __HYPERCALL_ENTRY(name) \ |
52 | : "memory" ); \ | 138 | : __HYPERCALL_CLOBBER0); \ |
53 | (type)__res; \ | 139 | (type)__res; \ |
54 | }) | 140 | }) |
55 | 141 | ||
56 | #define _hypercall1(type, name, a1) \ | 142 | #define _hypercall1(type, name, a1) \ |
57 | ({ \ | 143 | ({ \ |
58 | long __res, __ign1; \ | 144 | __HYPERCALL_DECLS; \ |
59 | asm volatile ( \ | 145 | __HYPERCALL_1ARG(a1); \ |
60 | "call %[call]" \ | 146 | asm volatile (__HYPERCALL \ |
61 | : "=a" (__res), "=b" (__ign1) \ | 147 | : __HYPERCALL_1PARAM \ |
62 | : "1" ((long)(a1)), \ | 148 | : __HYPERCALL_ENTRY(name) \ |
63 | [call] "m" (hypercall_page[__HYPERVISOR_##name]) \ | 149 | : __HYPERCALL_CLOBBER1); \ |
64 | : "memory" ); \ | ||
65 | (type)__res; \ | 150 | (type)__res; \ |
66 | }) | 151 | }) |
67 | 152 | ||
68 | #define _hypercall2(type, name, a1, a2) \ | 153 | #define _hypercall2(type, name, a1, a2) \ |
69 | ({ \ | 154 | ({ \ |
70 | long __res, __ign1, __ign2; \ | 155 | __HYPERCALL_DECLS; \ |
71 | asm volatile ( \ | 156 | __HYPERCALL_2ARG(a1, a2); \ |
72 | "call %[call]" \ | 157 | asm volatile (__HYPERCALL \ |
73 | : "=a" (__res), "=b" (__ign1), "=c" (__ign2) \ | 158 | : __HYPERCALL_2PARAM \ |
74 | : "1" ((long)(a1)), "2" ((long)(a2)), \ | 159 | : __HYPERCALL_ENTRY(name) \ |
75 | [call] "m" (hypercall_page[__HYPERVISOR_##name]) \ | 160 | : __HYPERCALL_CLOBBER2); \ |
76 | : "memory" ); \ | ||
77 | (type)__res; \ | 161 | (type)__res; \ |
78 | }) | 162 | }) |
79 | 163 | ||
80 | #define _hypercall3(type, name, a1, a2, a3) \ | 164 | #define _hypercall3(type, name, a1, a2, a3) \ |
81 | ({ \ | 165 | ({ \ |
82 | long __res, __ign1, __ign2, __ign3; \ | 166 | __HYPERCALL_DECLS; \ |
83 | asm volatile ( \ | 167 | __HYPERCALL_3ARG(a1, a2, a3); \ |
84 | "call %[call]" \ | 168 | asm volatile (__HYPERCALL \ |
85 | : "=a" (__res), "=b" (__ign1), "=c" (__ign2), \ | 169 | : __HYPERCALL_3PARAM \ |
86 | "=d" (__ign3) \ | 170 | : __HYPERCALL_ENTRY(name) \ |
87 | : "1" ((long)(a1)), "2" ((long)(a2)), \ | 171 | : __HYPERCALL_CLOBBER3); \ |
88 | "3" ((long)(a3)), \ | ||
89 | [call] "m" (hypercall_page[__HYPERVISOR_##name]) \ | ||
90 | : "memory" ); \ | ||
91 | (type)__res; \ | 172 | (type)__res; \ |
92 | }) | 173 | }) |
93 | 174 | ||
94 | #define _hypercall4(type, name, a1, a2, a3, a4) \ | 175 | #define _hypercall4(type, name, a1, a2, a3, a4) \ |
95 | ({ \ | 176 | ({ \ |
96 | long __res, __ign1, __ign2, __ign3, __ign4; \ | 177 | __HYPERCALL_DECLS; \ |
97 | asm volatile ( \ | 178 | __HYPERCALL_4ARG(a1, a2, a3, a4); \ |
98 | "call %[call]" \ | 179 | asm volatile (__HYPERCALL \ |
99 | : "=a" (__res), "=b" (__ign1), "=c" (__ign2), \ | 180 | : __HYPERCALL_4PARAM \ |
100 | "=d" (__ign3), "=S" (__ign4) \ | 181 | : __HYPERCALL_ENTRY(name) \ |
101 | : "1" ((long)(a1)), "2" ((long)(a2)), \ | 182 | : __HYPERCALL_CLOBBER4); \ |
102 | "3" ((long)(a3)), "4" ((long)(a4)), \ | ||
103 | [call] "m" (hypercall_page[__HYPERVISOR_##name]) \ | ||
104 | : "memory" ); \ | ||
105 | (type)__res; \ | 183 | (type)__res; \ |
106 | }) | 184 | }) |
107 | 185 | ||
108 | #define _hypercall5(type, name, a1, a2, a3, a4, a5) \ | 186 | #define _hypercall5(type, name, a1, a2, a3, a4, a5) \ |
109 | ({ \ | 187 | ({ \ |
110 | long __res, __ign1, __ign2, __ign3, __ign4, __ign5; \ | 188 | __HYPERCALL_DECLS; \ |
111 | asm volatile ( \ | 189 | __HYPERCALL_5ARG(a1, a2, a3, a4, a5); \ |
112 | "call %[call]" \ | 190 | asm volatile (__HYPERCALL \ |
113 | : "=a" (__res), "=b" (__ign1), "=c" (__ign2), \ | 191 | : __HYPERCALL_5PARAM \ |
114 | "=d" (__ign3), "=S" (__ign4), "=D" (__ign5) \ | 192 | : __HYPERCALL_ENTRY(name) \ |
115 | : "1" ((long)(a1)), "2" ((long)(a2)), \ | 193 | : __HYPERCALL_CLOBBER5); \ |
116 | "3" ((long)(a3)), "4" ((long)(a4)), \ | ||
117 | "5" ((long)(a5)), \ | ||
118 | [call] "m" (hypercall_page[__HYPERVISOR_##name]) \ | ||
119 | : "memory" ); \ | ||
120 | (type)__res; \ | 194 | (type)__res; \ |
121 | }) | 195 | }) |
122 | 196 | ||
@@ -152,6 +226,7 @@ HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp) | |||
152 | return _hypercall2(int, stack_switch, ss, esp); | 226 | return _hypercall2(int, stack_switch, ss, esp); |
153 | } | 227 | } |
154 | 228 | ||
229 | #ifdef CONFIG_X86_32 | ||
155 | static inline int | 230 | static inline int |
156 | HYPERVISOR_set_callbacks(unsigned long event_selector, | 231 | HYPERVISOR_set_callbacks(unsigned long event_selector, |
157 | unsigned long event_address, | 232 | unsigned long event_address, |
@@ -162,6 +237,17 @@ HYPERVISOR_set_callbacks(unsigned long event_selector, | |||
162 | event_selector, event_address, | 237 | event_selector, event_address, |
163 | failsafe_selector, failsafe_address); | 238 | failsafe_selector, failsafe_address); |
164 | } | 239 | } |
240 | #else /* CONFIG_X86_64 */ | ||
241 | static inline int | ||
242 | HYPERVISOR_set_callbacks(unsigned long event_address, | ||
243 | unsigned long failsafe_address, | ||
244 | unsigned long syscall_address) | ||
245 | { | ||
246 | return _hypercall3(int, set_callbacks, | ||
247 | event_address, failsafe_address, | ||
248 | syscall_address); | ||
249 | } | ||
250 | #endif /* CONFIG_X86_{32,64} */ | ||
165 | 251 | ||
166 | static inline int | 252 | static inline int |
167 | HYPERVISOR_callback_op(int cmd, void *arg) | 253 | HYPERVISOR_callback_op(int cmd, void *arg) |
@@ -176,9 +262,9 @@ HYPERVISOR_fpu_taskswitch(int set) | |||
176 | } | 262 | } |
177 | 263 | ||
178 | static inline int | 264 | static inline int |
179 | HYPERVISOR_sched_op(int cmd, unsigned long arg) | 265 | HYPERVISOR_sched_op(int cmd, void *arg) |
180 | { | 266 | { |
181 | return _hypercall2(int, sched_op, cmd, arg); | 267 | return _hypercall2(int, sched_op_new, cmd, arg); |
182 | } | 268 | } |
183 | 269 | ||
184 | static inline long | 270 | static inline long |
@@ -223,12 +309,12 @@ static inline int | |||
223 | HYPERVISOR_update_va_mapping(unsigned long va, pte_t new_val, | 309 | HYPERVISOR_update_va_mapping(unsigned long va, pte_t new_val, |
224 | unsigned long flags) | 310 | unsigned long flags) |
225 | { | 311 | { |
226 | unsigned long pte_hi = 0; | 312 | if (sizeof(new_val) == sizeof(long)) |
227 | #ifdef CONFIG_X86_PAE | 313 | return _hypercall3(int, update_va_mapping, va, |
228 | pte_hi = new_val.pte_high; | 314 | new_val.pte, flags); |
229 | #endif | 315 | else |
230 | return _hypercall4(int, update_va_mapping, va, | 316 | return _hypercall4(int, update_va_mapping, va, |
231 | new_val.pte_low, pte_hi, flags); | 317 | new_val.pte, new_val.pte >> 32, flags); |
232 | } | 318 | } |
233 | 319 | ||
234 | static inline int | 320 | static inline int |
@@ -281,12 +367,13 @@ static inline int | |||
281 | HYPERVISOR_update_va_mapping_otherdomain(unsigned long va, pte_t new_val, | 367 | HYPERVISOR_update_va_mapping_otherdomain(unsigned long va, pte_t new_val, |
282 | unsigned long flags, domid_t domid) | 368 | unsigned long flags, domid_t domid) |
283 | { | 369 | { |
284 | unsigned long pte_hi = 0; | 370 | if (sizeof(new_val) == sizeof(long)) |
285 | #ifdef CONFIG_X86_PAE | 371 | return _hypercall4(int, update_va_mapping_otherdomain, va, |
286 | pte_hi = new_val.pte_high; | 372 | new_val.pte, flags, domid); |
287 | #endif | 373 | else |
288 | return _hypercall5(int, update_va_mapping_otherdomain, va, | 374 | return _hypercall5(int, update_va_mapping_otherdomain, va, |
289 | new_val.pte_low, pte_hi, flags, domid); | 375 | new_val.pte, new_val.pte >> 32, |
376 | flags, domid); | ||
290 | } | 377 | } |
291 | 378 | ||
292 | static inline int | 379 | static inline int |
@@ -301,6 +388,14 @@ HYPERVISOR_vcpu_op(int cmd, int vcpuid, void *extra_args) | |||
301 | return _hypercall3(int, vcpu_op, cmd, vcpuid, extra_args); | 388 | return _hypercall3(int, vcpu_op, cmd, vcpuid, extra_args); |
302 | } | 389 | } |
303 | 390 | ||
391 | #ifdef CONFIG_X86_64 | ||
392 | static inline int | ||
393 | HYPERVISOR_set_segment_base(int reg, unsigned long value) | ||
394 | { | ||
395 | return _hypercall2(int, set_segment_base, reg, value); | ||
396 | } | ||
397 | #endif | ||
398 | |||
304 | static inline int | 399 | static inline int |
305 | HYPERVISOR_suspend(unsigned long srec) | 400 | HYPERVISOR_suspend(unsigned long srec) |
306 | { | 401 | { |
@@ -315,19 +410,26 @@ HYPERVISOR_nmi_op(unsigned long op, unsigned long arg) | |||
315 | } | 410 | } |
316 | 411 | ||
317 | static inline void | 412 | static inline void |
413 | MULTI_fpu_taskswitch(struct multicall_entry *mcl, int set) | ||
414 | { | ||
415 | mcl->op = __HYPERVISOR_fpu_taskswitch; | ||
416 | mcl->args[0] = set; | ||
417 | } | ||
418 | |||
419 | static inline void | ||
318 | MULTI_update_va_mapping(struct multicall_entry *mcl, unsigned long va, | 420 | MULTI_update_va_mapping(struct multicall_entry *mcl, unsigned long va, |
319 | pte_t new_val, unsigned long flags) | 421 | pte_t new_val, unsigned long flags) |
320 | { | 422 | { |
321 | mcl->op = __HYPERVISOR_update_va_mapping; | 423 | mcl->op = __HYPERVISOR_update_va_mapping; |
322 | mcl->args[0] = va; | 424 | mcl->args[0] = va; |
323 | #ifdef CONFIG_X86_PAE | 425 | if (sizeof(new_val) == sizeof(long)) { |
324 | mcl->args[1] = new_val.pte_low; | 426 | mcl->args[1] = new_val.pte; |
325 | mcl->args[2] = new_val.pte_high; | 427 | mcl->args[2] = flags; |
326 | #else | 428 | } else { |
327 | mcl->args[1] = new_val.pte_low; | 429 | mcl->args[1] = new_val.pte; |
328 | mcl->args[2] = 0; | 430 | mcl->args[2] = new_val.pte >> 32; |
329 | #endif | 431 | mcl->args[3] = flags; |
330 | mcl->args[3] = flags; | 432 | } |
331 | } | 433 | } |
332 | 434 | ||
333 | static inline void | 435 | static inline void |
@@ -347,15 +449,16 @@ MULTI_update_va_mapping_otherdomain(struct multicall_entry *mcl, unsigned long v | |||
347 | { | 449 | { |
348 | mcl->op = __HYPERVISOR_update_va_mapping_otherdomain; | 450 | mcl->op = __HYPERVISOR_update_va_mapping_otherdomain; |
349 | mcl->args[0] = va; | 451 | mcl->args[0] = va; |
350 | #ifdef CONFIG_X86_PAE | 452 | if (sizeof(new_val) == sizeof(long)) { |
351 | mcl->args[1] = new_val.pte_low; | 453 | mcl->args[1] = new_val.pte; |
352 | mcl->args[2] = new_val.pte_high; | 454 | mcl->args[2] = flags; |
353 | #else | 455 | mcl->args[3] = domid; |
354 | mcl->args[1] = new_val.pte_low; | 456 | } else { |
355 | mcl->args[2] = 0; | 457 | mcl->args[1] = new_val.pte; |
356 | #endif | 458 | mcl->args[2] = new_val.pte >> 32; |
357 | mcl->args[3] = flags; | 459 | mcl->args[3] = flags; |
358 | mcl->args[4] = domid; | 460 | mcl->args[4] = domid; |
461 | } | ||
359 | } | 462 | } |
360 | 463 | ||
361 | static inline void | 464 | static inline void |
@@ -363,10 +466,15 @@ MULTI_update_descriptor(struct multicall_entry *mcl, u64 maddr, | |||
363 | struct desc_struct desc) | 466 | struct desc_struct desc) |
364 | { | 467 | { |
365 | mcl->op = __HYPERVISOR_update_descriptor; | 468 | mcl->op = __HYPERVISOR_update_descriptor; |
366 | mcl->args[0] = maddr; | 469 | if (sizeof(maddr) == sizeof(long)) { |
367 | mcl->args[1] = maddr >> 32; | 470 | mcl->args[0] = maddr; |
368 | mcl->args[2] = desc.a; | 471 | mcl->args[1] = *(unsigned long *)&desc; |
369 | mcl->args[3] = desc.b; | 472 | } else { |
473 | mcl->args[0] = maddr; | ||
474 | mcl->args[1] = maddr >> 32; | ||
475 | mcl->args[2] = desc.a; | ||
476 | mcl->args[3] = desc.b; | ||
477 | } | ||
370 | } | 478 | } |
371 | 479 | ||
372 | static inline void | 480 | static inline void |
diff --git a/include/asm-x86/xen/interface.h b/include/asm-x86/xen/interface.h index 6227000a1e84..9d810f2538a2 100644 --- a/include/asm-x86/xen/interface.h +++ b/include/asm-x86/xen/interface.h | |||
@@ -1,13 +1,13 @@ | |||
1 | /****************************************************************************** | 1 | /****************************************************************************** |
2 | * arch-x86_32.h | 2 | * arch-x86_32.h |
3 | * | 3 | * |
4 | * Guest OS interface to x86 32-bit Xen. | 4 | * Guest OS interface to x86 Xen. |
5 | * | 5 | * |
6 | * Copyright (c) 2004, K A Fraser | 6 | * Copyright (c) 2004, K A Fraser |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #ifndef __XEN_PUBLIC_ARCH_X86_32_H__ | 9 | #ifndef __ASM_X86_XEN_INTERFACE_H |
10 | #define __XEN_PUBLIC_ARCH_X86_32_H__ | 10 | #define __ASM_X86_XEN_INTERFACE_H |
11 | 11 | ||
12 | #ifdef __XEN__ | 12 | #ifdef __XEN__ |
13 | #define __DEFINE_GUEST_HANDLE(name, type) \ | 13 | #define __DEFINE_GUEST_HANDLE(name, type) \ |
@@ -57,6 +57,17 @@ DEFINE_GUEST_HANDLE(long); | |||
57 | DEFINE_GUEST_HANDLE(void); | 57 | DEFINE_GUEST_HANDLE(void); |
58 | #endif | 58 | #endif |
59 | 59 | ||
60 | #ifndef HYPERVISOR_VIRT_START | ||
61 | #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) | ||
62 | #endif | ||
63 | |||
64 | #ifndef machine_to_phys_mapping | ||
65 | #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START) | ||
66 | #endif | ||
67 | |||
68 | /* Maximum number of virtual CPUs in multi-processor guests. */ | ||
69 | #define MAX_VIRT_CPUS 32 | ||
70 | |||
60 | /* | 71 | /* |
61 | * SEGMENT DESCRIPTOR TABLES | 72 | * SEGMENT DESCRIPTOR TABLES |
62 | */ | 73 | */ |
@@ -71,58 +82,21 @@ DEFINE_GUEST_HANDLE(void); | |||
71 | #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8) | 82 | #define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8) |
72 | 83 | ||
73 | /* | 84 | /* |
74 | * These flat segments are in the Xen-private section of every GDT. Since these | ||
75 | * are also present in the initial GDT, many OSes will be able to avoid | ||
76 | * installing their own GDT. | ||
77 | */ | ||
78 | #define FLAT_RING1_CS 0xe019 /* GDT index 259 */ | ||
79 | #define FLAT_RING1_DS 0xe021 /* GDT index 260 */ | ||
80 | #define FLAT_RING1_SS 0xe021 /* GDT index 260 */ | ||
81 | #define FLAT_RING3_CS 0xe02b /* GDT index 261 */ | ||
82 | #define FLAT_RING3_DS 0xe033 /* GDT index 262 */ | ||
83 | #define FLAT_RING3_SS 0xe033 /* GDT index 262 */ | ||
84 | |||
85 | #define FLAT_KERNEL_CS FLAT_RING1_CS | ||
86 | #define FLAT_KERNEL_DS FLAT_RING1_DS | ||
87 | #define FLAT_KERNEL_SS FLAT_RING1_SS | ||
88 | #define FLAT_USER_CS FLAT_RING3_CS | ||
89 | #define FLAT_USER_DS FLAT_RING3_DS | ||
90 | #define FLAT_USER_SS FLAT_RING3_SS | ||
91 | |||
92 | /* And the trap vector is... */ | ||
93 | #define TRAP_INSTR "int $0x82" | ||
94 | |||
95 | /* | ||
96 | * Virtual addresses beyond this are not modifiable by guest OSes. The | ||
97 | * machine->physical mapping table starts at this address, read-only. | ||
98 | */ | ||
99 | #ifdef CONFIG_X86_PAE | ||
100 | #define __HYPERVISOR_VIRT_START 0xF5800000 | ||
101 | #else | ||
102 | #define __HYPERVISOR_VIRT_START 0xFC000000 | ||
103 | #endif | ||
104 | |||
105 | #ifndef HYPERVISOR_VIRT_START | ||
106 | #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) | ||
107 | #endif | ||
108 | |||
109 | #ifndef machine_to_phys_mapping | ||
110 | #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START) | ||
111 | #endif | ||
112 | |||
113 | /* Maximum number of virtual CPUs in multi-processor guests. */ | ||
114 | #define MAX_VIRT_CPUS 32 | ||
115 | |||
116 | #ifndef __ASSEMBLY__ | ||
117 | |||
118 | /* | ||
119 | * Send an array of these to HYPERVISOR_set_trap_table() | 85 | * Send an array of these to HYPERVISOR_set_trap_table() |
86 | * The privilege level specifies which modes may enter a trap via a software | ||
87 | * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate | ||
88 | * privilege levels as follows: | ||
89 | * Level == 0: Noone may enter | ||
90 | * Level == 1: Kernel may enter | ||
91 | * Level == 2: Kernel may enter | ||
92 | * Level == 3: Everyone may enter | ||
120 | */ | 93 | */ |
121 | #define TI_GET_DPL(_ti) ((_ti)->flags & 3) | 94 | #define TI_GET_DPL(_ti) ((_ti)->flags & 3) |
122 | #define TI_GET_IF(_ti) ((_ti)->flags & 4) | 95 | #define TI_GET_IF(_ti) ((_ti)->flags & 4) |
123 | #define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl)) | 96 | #define TI_SET_DPL(_ti, _dpl) ((_ti)->flags |= (_dpl)) |
124 | #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2)) | 97 | #define TI_SET_IF(_ti, _if) ((_ti)->flags |= ((!!(_if))<<2)) |
125 | 98 | ||
99 | #ifndef __ASSEMBLY__ | ||
126 | struct trap_info { | 100 | struct trap_info { |
127 | uint8_t vector; /* exception vector */ | 101 | uint8_t vector; /* exception vector */ |
128 | uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */ | 102 | uint8_t flags; /* 0-3: privilege level; 4: clear event enable? */ |
@@ -131,32 +105,21 @@ struct trap_info { | |||
131 | }; | 105 | }; |
132 | DEFINE_GUEST_HANDLE_STRUCT(trap_info); | 106 | DEFINE_GUEST_HANDLE_STRUCT(trap_info); |
133 | 107 | ||
134 | struct cpu_user_regs { | 108 | struct arch_shared_info { |
135 | uint32_t ebx; | 109 | unsigned long max_pfn; /* max pfn that appears in table */ |
136 | uint32_t ecx; | 110 | /* Frame containing list of mfns containing list of mfns containing p2m. */ |
137 | uint32_t edx; | 111 | unsigned long pfn_to_mfn_frame_list_list; |
138 | uint32_t esi; | 112 | unsigned long nmi_reason; |
139 | uint32_t edi; | ||
140 | uint32_t ebp; | ||
141 | uint32_t eax; | ||
142 | uint16_t error_code; /* private */ | ||
143 | uint16_t entry_vector; /* private */ | ||
144 | uint32_t eip; | ||
145 | uint16_t cs; | ||
146 | uint8_t saved_upcall_mask; | ||
147 | uint8_t _pad0; | ||
148 | uint32_t eflags; /* eflags.IF == !saved_upcall_mask */ | ||
149 | uint32_t esp; | ||
150 | uint16_t ss, _pad1; | ||
151 | uint16_t es, _pad2; | ||
152 | uint16_t ds, _pad3; | ||
153 | uint16_t fs, _pad4; | ||
154 | uint16_t gs, _pad5; | ||
155 | }; | 113 | }; |
156 | DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs); | 114 | #endif /* !__ASSEMBLY__ */ |
157 | 115 | ||
158 | typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ | 116 | #ifdef CONFIG_X86_32 |
117 | #include "interface_32.h" | ||
118 | #else | ||
119 | #include "interface_64.h" | ||
120 | #endif | ||
159 | 121 | ||
122 | #ifndef __ASSEMBLY__ | ||
160 | /* | 123 | /* |
161 | * The following is all CPU context. Note that the fpu_ctxt block is filled | 124 | * The following is all CPU context. Note that the fpu_ctxt block is filled |
162 | * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. | 125 | * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. |
@@ -173,33 +136,29 @@ struct vcpu_guest_context { | |||
173 | unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */ | 136 | unsigned long ldt_base, ldt_ents; /* LDT (linear address, # ents) */ |
174 | unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */ | 137 | unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */ |
175 | unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */ | 138 | unsigned long kernel_ss, kernel_sp; /* Virtual TSS (only SS1/SP1) */ |
139 | /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */ | ||
176 | unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */ | 140 | unsigned long ctrlreg[8]; /* CR0-CR7 (control registers) */ |
177 | unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */ | 141 | unsigned long debugreg[8]; /* DB0-DB7 (debug registers) */ |
142 | #ifdef __i386__ | ||
178 | unsigned long event_callback_cs; /* CS:EIP of event callback */ | 143 | unsigned long event_callback_cs; /* CS:EIP of event callback */ |
179 | unsigned long event_callback_eip; | 144 | unsigned long event_callback_eip; |
180 | unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */ | 145 | unsigned long failsafe_callback_cs; /* CS:EIP of failsafe callback */ |
181 | unsigned long failsafe_callback_eip; | 146 | unsigned long failsafe_callback_eip; |
147 | #else | ||
148 | unsigned long event_callback_eip; | ||
149 | unsigned long failsafe_callback_eip; | ||
150 | unsigned long syscall_callback_eip; | ||
151 | #endif | ||
182 | unsigned long vm_assist; /* VMASST_TYPE_* bitmap */ | 152 | unsigned long vm_assist; /* VMASST_TYPE_* bitmap */ |
153 | #ifdef __x86_64__ | ||
154 | /* Segment base addresses. */ | ||
155 | uint64_t fs_base; | ||
156 | uint64_t gs_base_kernel; | ||
157 | uint64_t gs_base_user; | ||
158 | #endif | ||
183 | }; | 159 | }; |
184 | DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context); | 160 | DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context); |
185 | 161 | #endif /* !__ASSEMBLY__ */ | |
186 | struct arch_shared_info { | ||
187 | unsigned long max_pfn; /* max pfn that appears in table */ | ||
188 | /* Frame containing list of mfns containing list of mfns containing p2m. */ | ||
189 | unsigned long pfn_to_mfn_frame_list_list; | ||
190 | unsigned long nmi_reason; | ||
191 | }; | ||
192 | |||
193 | struct arch_vcpu_info { | ||
194 | unsigned long cr2; | ||
195 | unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */ | ||
196 | }; | ||
197 | |||
198 | struct xen_callback { | ||
199 | unsigned long cs; | ||
200 | unsigned long eip; | ||
201 | }; | ||
202 | #endif /* !__ASSEMBLY__ */ | ||
203 | 162 | ||
204 | /* | 163 | /* |
205 | * Prefix forces emulation of some non-trapping instructions. | 164 | * Prefix forces emulation of some non-trapping instructions. |
@@ -213,4 +172,4 @@ struct xen_callback { | |||
213 | #define XEN_CPUID XEN_EMULATE_PREFIX "cpuid" | 172 | #define XEN_CPUID XEN_EMULATE_PREFIX "cpuid" |
214 | #endif | 173 | #endif |
215 | 174 | ||
216 | #endif | 175 | #endif /* __ASM_X86_XEN_INTERFACE_H */ |
diff --git a/include/asm-x86/xen/interface_32.h b/include/asm-x86/xen/interface_32.h new file mode 100644 index 000000000000..d8ac41d5db86 --- /dev/null +++ b/include/asm-x86/xen/interface_32.h | |||
@@ -0,0 +1,97 @@ | |||
1 | /****************************************************************************** | ||
2 | * arch-x86_32.h | ||
3 | * | ||
4 | * Guest OS interface to x86 32-bit Xen. | ||
5 | * | ||
6 | * Copyright (c) 2004, K A Fraser | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_X86_XEN_INTERFACE_32_H | ||
10 | #define __ASM_X86_XEN_INTERFACE_32_H | ||
11 | |||
12 | |||
13 | /* | ||
14 | * These flat segments are in the Xen-private section of every GDT. Since these | ||
15 | * are also present in the initial GDT, many OSes will be able to avoid | ||
16 | * installing their own GDT. | ||
17 | */ | ||
18 | #define FLAT_RING1_CS 0xe019 /* GDT index 259 */ | ||
19 | #define FLAT_RING1_DS 0xe021 /* GDT index 260 */ | ||
20 | #define FLAT_RING1_SS 0xe021 /* GDT index 260 */ | ||
21 | #define FLAT_RING3_CS 0xe02b /* GDT index 261 */ | ||
22 | #define FLAT_RING3_DS 0xe033 /* GDT index 262 */ | ||
23 | #define FLAT_RING3_SS 0xe033 /* GDT index 262 */ | ||
24 | |||
25 | #define FLAT_KERNEL_CS FLAT_RING1_CS | ||
26 | #define FLAT_KERNEL_DS FLAT_RING1_DS | ||
27 | #define FLAT_KERNEL_SS FLAT_RING1_SS | ||
28 | #define FLAT_USER_CS FLAT_RING3_CS | ||
29 | #define FLAT_USER_DS FLAT_RING3_DS | ||
30 | #define FLAT_USER_SS FLAT_RING3_SS | ||
31 | |||
32 | /* And the trap vector is... */ | ||
33 | #define TRAP_INSTR "int $0x82" | ||
34 | |||
35 | /* | ||
36 | * Virtual addresses beyond this are not modifiable by guest OSes. The | ||
37 | * machine->physical mapping table starts at this address, read-only. | ||
38 | */ | ||
39 | #define __HYPERVISOR_VIRT_START 0xF5800000 | ||
40 | |||
41 | #ifndef __ASSEMBLY__ | ||
42 | |||
43 | struct cpu_user_regs { | ||
44 | uint32_t ebx; | ||
45 | uint32_t ecx; | ||
46 | uint32_t edx; | ||
47 | uint32_t esi; | ||
48 | uint32_t edi; | ||
49 | uint32_t ebp; | ||
50 | uint32_t eax; | ||
51 | uint16_t error_code; /* private */ | ||
52 | uint16_t entry_vector; /* private */ | ||
53 | uint32_t eip; | ||
54 | uint16_t cs; | ||
55 | uint8_t saved_upcall_mask; | ||
56 | uint8_t _pad0; | ||
57 | uint32_t eflags; /* eflags.IF == !saved_upcall_mask */ | ||
58 | uint32_t esp; | ||
59 | uint16_t ss, _pad1; | ||
60 | uint16_t es, _pad2; | ||
61 | uint16_t ds, _pad3; | ||
62 | uint16_t fs, _pad4; | ||
63 | uint16_t gs, _pad5; | ||
64 | }; | ||
65 | DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs); | ||
66 | |||
67 | typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ | ||
68 | |||
69 | struct arch_vcpu_info { | ||
70 | unsigned long cr2; | ||
71 | unsigned long pad[5]; /* sizeof(struct vcpu_info) == 64 */ | ||
72 | }; | ||
73 | |||
74 | struct xen_callback { | ||
75 | unsigned long cs; | ||
76 | unsigned long eip; | ||
77 | }; | ||
78 | typedef struct xen_callback xen_callback_t; | ||
79 | |||
80 | #define XEN_CALLBACK(__cs, __eip) \ | ||
81 | ((struct xen_callback){ .cs = (__cs), .eip = (unsigned long)(__eip) }) | ||
82 | #endif /* !__ASSEMBLY__ */ | ||
83 | |||
84 | |||
85 | /* | ||
86 | * Page-directory addresses above 4GB do not fit into architectural %cr3. | ||
87 | * When accessing %cr3, or equivalent field in vcpu_guest_context, guests | ||
88 | * must use the following accessor macros to pack/unpack valid MFNs. | ||
89 | * | ||
90 | * Note that Xen is using the fact that the pagetable base is always | ||
91 | * page-aligned, and putting the 12 MSB of the address into the 12 LSB | ||
92 | * of cr3. | ||
93 | */ | ||
94 | #define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20)) | ||
95 | #define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20)) | ||
96 | |||
97 | #endif /* __ASM_X86_XEN_INTERFACE_32_H */ | ||
diff --git a/include/asm-x86/xen/interface_64.h b/include/asm-x86/xen/interface_64.h new file mode 100644 index 000000000000..842266ce96e6 --- /dev/null +++ b/include/asm-x86/xen/interface_64.h | |||
@@ -0,0 +1,159 @@ | |||
1 | #ifndef __ASM_X86_XEN_INTERFACE_64_H | ||
2 | #define __ASM_X86_XEN_INTERFACE_64_H | ||
3 | |||
4 | /* | ||
5 | * 64-bit segment selectors | ||
6 | * These flat segments are in the Xen-private section of every GDT. Since these | ||
7 | * are also present in the initial GDT, many OSes will be able to avoid | ||
8 | * installing their own GDT. | ||
9 | */ | ||
10 | |||
11 | #define FLAT_RING3_CS32 0xe023 /* GDT index 260 */ | ||
12 | #define FLAT_RING3_CS64 0xe033 /* GDT index 261 */ | ||
13 | #define FLAT_RING3_DS32 0xe02b /* GDT index 262 */ | ||
14 | #define FLAT_RING3_DS64 0x0000 /* NULL selector */ | ||
15 | #define FLAT_RING3_SS32 0xe02b /* GDT index 262 */ | ||
16 | #define FLAT_RING3_SS64 0xe02b /* GDT index 262 */ | ||
17 | |||
18 | #define FLAT_KERNEL_DS64 FLAT_RING3_DS64 | ||
19 | #define FLAT_KERNEL_DS32 FLAT_RING3_DS32 | ||
20 | #define FLAT_KERNEL_DS FLAT_KERNEL_DS64 | ||
21 | #define FLAT_KERNEL_CS64 FLAT_RING3_CS64 | ||
22 | #define FLAT_KERNEL_CS32 FLAT_RING3_CS32 | ||
23 | #define FLAT_KERNEL_CS FLAT_KERNEL_CS64 | ||
24 | #define FLAT_KERNEL_SS64 FLAT_RING3_SS64 | ||
25 | #define FLAT_KERNEL_SS32 FLAT_RING3_SS32 | ||
26 | #define FLAT_KERNEL_SS FLAT_KERNEL_SS64 | ||
27 | |||
28 | #define FLAT_USER_DS64 FLAT_RING3_DS64 | ||
29 | #define FLAT_USER_DS32 FLAT_RING3_DS32 | ||
30 | #define FLAT_USER_DS FLAT_USER_DS64 | ||
31 | #define FLAT_USER_CS64 FLAT_RING3_CS64 | ||
32 | #define FLAT_USER_CS32 FLAT_RING3_CS32 | ||
33 | #define FLAT_USER_CS FLAT_USER_CS64 | ||
34 | #define FLAT_USER_SS64 FLAT_RING3_SS64 | ||
35 | #define FLAT_USER_SS32 FLAT_RING3_SS32 | ||
36 | #define FLAT_USER_SS FLAT_USER_SS64 | ||
37 | |||
38 | #define __HYPERVISOR_VIRT_START 0xFFFF800000000000 | ||
39 | #define __HYPERVISOR_VIRT_END 0xFFFF880000000000 | ||
40 | #define __MACH2PHYS_VIRT_START 0xFFFF800000000000 | ||
41 | #define __MACH2PHYS_VIRT_END 0xFFFF804000000000 | ||
42 | |||
43 | #ifndef HYPERVISOR_VIRT_START | ||
44 | #define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START) | ||
45 | #define HYPERVISOR_VIRT_END mk_unsigned_long(__HYPERVISOR_VIRT_END) | ||
46 | #endif | ||
47 | |||
48 | #define MACH2PHYS_VIRT_START mk_unsigned_long(__MACH2PHYS_VIRT_START) | ||
49 | #define MACH2PHYS_VIRT_END mk_unsigned_long(__MACH2PHYS_VIRT_END) | ||
50 | #define MACH2PHYS_NR_ENTRIES ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>3) | ||
51 | #ifndef machine_to_phys_mapping | ||
52 | #define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START) | ||
53 | #endif | ||
54 | |||
55 | /* | ||
56 | * int HYPERVISOR_set_segment_base(unsigned int which, unsigned long base) | ||
57 | * @which == SEGBASE_* ; @base == 64-bit base address | ||
58 | * Returns 0 on success. | ||
59 | */ | ||
60 | #define SEGBASE_FS 0 | ||
61 | #define SEGBASE_GS_USER 1 | ||
62 | #define SEGBASE_GS_KERNEL 2 | ||
63 | #define SEGBASE_GS_USER_SEL 3 /* Set user %gs specified in base[15:0] */ | ||
64 | |||
65 | /* | ||
66 | * int HYPERVISOR_iret(void) | ||
67 | * All arguments are on the kernel stack, in the following format. | ||
68 | * Never returns if successful. Current kernel context is lost. | ||
69 | * The saved CS is mapped as follows: | ||
70 | * RING0 -> RING3 kernel mode. | ||
71 | * RING1 -> RING3 kernel mode. | ||
72 | * RING2 -> RING3 kernel mode. | ||
73 | * RING3 -> RING3 user mode. | ||
74 | * However RING0 indicates that the guest kernel should return to iteself | ||
75 | * directly with | ||
76 | * orb $3,1*8(%rsp) | ||
77 | * iretq | ||
78 | * If flags contains VGCF_in_syscall: | ||
79 | * Restore RAX, RIP, RFLAGS, RSP. | ||
80 | * Discard R11, RCX, CS, SS. | ||
81 | * Otherwise: | ||
82 | * Restore RAX, R11, RCX, CS:RIP, RFLAGS, SS:RSP. | ||
83 | * All other registers are saved on hypercall entry and restored to user. | ||
84 | */ | ||
85 | /* Guest exited in SYSCALL context? Return to guest with SYSRET? */ | ||
86 | #define _VGCF_in_syscall 8 | ||
87 | #define VGCF_in_syscall (1<<_VGCF_in_syscall) | ||
88 | #define VGCF_IN_SYSCALL VGCF_in_syscall | ||
89 | |||
90 | #ifndef __ASSEMBLY__ | ||
91 | |||
92 | struct iret_context { | ||
93 | /* Top of stack (%rsp at point of hypercall). */ | ||
94 | uint64_t rax, r11, rcx, flags, rip, cs, rflags, rsp, ss; | ||
95 | /* Bottom of iret stack frame. */ | ||
96 | }; | ||
97 | |||
98 | #if defined(__GNUC__) && !defined(__STRICT_ANSI__) | ||
99 | /* Anonymous union includes both 32- and 64-bit names (e.g., eax/rax). */ | ||
100 | #define __DECL_REG(name) union { \ | ||
101 | uint64_t r ## name, e ## name; \ | ||
102 | uint32_t _e ## name; \ | ||
103 | } | ||
104 | #else | ||
105 | /* Non-gcc sources must always use the proper 64-bit name (e.g., rax). */ | ||
106 | #define __DECL_REG(name) uint64_t r ## name | ||
107 | #endif | ||
108 | |||
109 | struct cpu_user_regs { | ||
110 | uint64_t r15; | ||
111 | uint64_t r14; | ||
112 | uint64_t r13; | ||
113 | uint64_t r12; | ||
114 | __DECL_REG(bp); | ||
115 | __DECL_REG(bx); | ||
116 | uint64_t r11; | ||
117 | uint64_t r10; | ||
118 | uint64_t r9; | ||
119 | uint64_t r8; | ||
120 | __DECL_REG(ax); | ||
121 | __DECL_REG(cx); | ||
122 | __DECL_REG(dx); | ||
123 | __DECL_REG(si); | ||
124 | __DECL_REG(di); | ||
125 | uint32_t error_code; /* private */ | ||
126 | uint32_t entry_vector; /* private */ | ||
127 | __DECL_REG(ip); | ||
128 | uint16_t cs, _pad0[1]; | ||
129 | uint8_t saved_upcall_mask; | ||
130 | uint8_t _pad1[3]; | ||
131 | __DECL_REG(flags); /* rflags.IF == !saved_upcall_mask */ | ||
132 | __DECL_REG(sp); | ||
133 | uint16_t ss, _pad2[3]; | ||
134 | uint16_t es, _pad3[3]; | ||
135 | uint16_t ds, _pad4[3]; | ||
136 | uint16_t fs, _pad5[3]; /* Non-zero => takes precedence over fs_base. */ | ||
137 | uint16_t gs, _pad6[3]; /* Non-zero => takes precedence over gs_base_usr. */ | ||
138 | }; | ||
139 | DEFINE_GUEST_HANDLE_STRUCT(cpu_user_regs); | ||
140 | |||
141 | #undef __DECL_REG | ||
142 | |||
143 | #define xen_pfn_to_cr3(pfn) ((unsigned long)(pfn) << 12) | ||
144 | #define xen_cr3_to_pfn(cr3) ((unsigned long)(cr3) >> 12) | ||
145 | |||
146 | struct arch_vcpu_info { | ||
147 | unsigned long cr2; | ||
148 | unsigned long pad; /* sizeof(vcpu_info_t) == 64 */ | ||
149 | }; | ||
150 | |||
151 | typedef unsigned long xen_callback_t; | ||
152 | |||
153 | #define XEN_CALLBACK(__cs, __rip) \ | ||
154 | ((unsigned long)(__rip)) | ||
155 | |||
156 | #endif /* !__ASSEMBLY__ */ | ||
157 | |||
158 | |||
159 | #endif /* __ASM_X86_XEN_INTERFACE_64_H */ | ||
diff --git a/include/asm-x86/xen/page.h b/include/asm-x86/xen/page.h index e11f24038b1d..7b3835d3b77d 100644 --- a/include/asm-x86/xen/page.h +++ b/include/asm-x86/xen/page.h | |||
@@ -26,15 +26,20 @@ typedef struct xpaddr { | |||
26 | #define FOREIGN_FRAME_BIT (1UL<<31) | 26 | #define FOREIGN_FRAME_BIT (1UL<<31) |
27 | #define FOREIGN_FRAME(m) ((m) | FOREIGN_FRAME_BIT) | 27 | #define FOREIGN_FRAME(m) ((m) | FOREIGN_FRAME_BIT) |
28 | 28 | ||
29 | extern unsigned long *phys_to_machine_mapping; | 29 | /* Maximum amount of memory we can handle in a domain in pages */ |
30 | #define MAX_DOMAIN_PAGES \ | ||
31 | ((unsigned long)((u64)CONFIG_XEN_MAX_DOMAIN_MEMORY * 1024 * 1024 * 1024 / PAGE_SIZE)) | ||
32 | |||
33 | |||
34 | extern unsigned long get_phys_to_machine(unsigned long pfn); | ||
35 | extern void set_phys_to_machine(unsigned long pfn, unsigned long mfn); | ||
30 | 36 | ||
31 | static inline unsigned long pfn_to_mfn(unsigned long pfn) | 37 | static inline unsigned long pfn_to_mfn(unsigned long pfn) |
32 | { | 38 | { |
33 | if (xen_feature(XENFEAT_auto_translated_physmap)) | 39 | if (xen_feature(XENFEAT_auto_translated_physmap)) |
34 | return pfn; | 40 | return pfn; |
35 | 41 | ||
36 | return phys_to_machine_mapping[(unsigned int)(pfn)] & | 42 | return get_phys_to_machine(pfn) & ~FOREIGN_FRAME_BIT; |
37 | ~FOREIGN_FRAME_BIT; | ||
38 | } | 43 | } |
39 | 44 | ||
40 | static inline int phys_to_machine_mapping_valid(unsigned long pfn) | 45 | static inline int phys_to_machine_mapping_valid(unsigned long pfn) |
@@ -42,7 +47,7 @@ static inline int phys_to_machine_mapping_valid(unsigned long pfn) | |||
42 | if (xen_feature(XENFEAT_auto_translated_physmap)) | 47 | if (xen_feature(XENFEAT_auto_translated_physmap)) |
43 | return 1; | 48 | return 1; |
44 | 49 | ||
45 | return (phys_to_machine_mapping[pfn] != INVALID_P2M_ENTRY); | 50 | return get_phys_to_machine(pfn) != INVALID_P2M_ENTRY; |
46 | } | 51 | } |
47 | 52 | ||
48 | static inline unsigned long mfn_to_pfn(unsigned long mfn) | 53 | static inline unsigned long mfn_to_pfn(unsigned long mfn) |
@@ -106,20 +111,12 @@ static inline unsigned long mfn_to_local_pfn(unsigned long mfn) | |||
106 | unsigned long pfn = mfn_to_pfn(mfn); | 111 | unsigned long pfn = mfn_to_pfn(mfn); |
107 | if ((pfn < max_mapnr) | 112 | if ((pfn < max_mapnr) |
108 | && !xen_feature(XENFEAT_auto_translated_physmap) | 113 | && !xen_feature(XENFEAT_auto_translated_physmap) |
109 | && (phys_to_machine_mapping[pfn] != mfn)) | 114 | && (get_phys_to_machine(pfn) != mfn)) |
110 | return max_mapnr; /* force !pfn_valid() */ | 115 | return max_mapnr; /* force !pfn_valid() */ |
116 | /* XXX fixme; not true with sparsemem */ | ||
111 | return pfn; | 117 | return pfn; |
112 | } | 118 | } |
113 | 119 | ||
114 | static inline void set_phys_to_machine(unsigned long pfn, unsigned long mfn) | ||
115 | { | ||
116 | if (xen_feature(XENFEAT_auto_translated_physmap)) { | ||
117 | BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY); | ||
118 | return; | ||
119 | } | ||
120 | phys_to_machine_mapping[pfn] = mfn; | ||
121 | } | ||
122 | |||
123 | /* VIRT <-> MACHINE conversion */ | 120 | /* VIRT <-> MACHINE conversion */ |
124 | #define virt_to_machine(v) (phys_to_machine(XPADDR(__pa(v)))) | 121 | #define virt_to_machine(v) (phys_to_machine(XPADDR(__pa(v)))) |
125 | #define virt_to_mfn(v) (pfn_to_mfn(PFN_DOWN(__pa(v)))) | 122 | #define virt_to_mfn(v) (pfn_to_mfn(PFN_DOWN(__pa(v)))) |
@@ -127,7 +124,7 @@ static inline void set_phys_to_machine(unsigned long pfn, unsigned long mfn) | |||
127 | 124 | ||
128 | static inline unsigned long pte_mfn(pte_t pte) | 125 | static inline unsigned long pte_mfn(pte_t pte) |
129 | { | 126 | { |
130 | return (pte.pte & PTE_MASK) >> PAGE_SHIFT; | 127 | return (pte.pte & PTE_PFN_MASK) >> PAGE_SHIFT; |
131 | } | 128 | } |
132 | 129 | ||
133 | static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot) | 130 | static inline pte_t mfn_pte(unsigned long page_nr, pgprot_t pgprot) |
@@ -151,13 +148,17 @@ static inline pte_t __pte_ma(pteval_t x) | |||
151 | } | 148 | } |
152 | 149 | ||
153 | #define pmd_val_ma(v) ((v).pmd) | 150 | #define pmd_val_ma(v) ((v).pmd) |
151 | #ifdef __PAGETABLE_PUD_FOLDED | ||
154 | #define pud_val_ma(v) ((v).pgd.pgd) | 152 | #define pud_val_ma(v) ((v).pgd.pgd) |
153 | #else | ||
154 | #define pud_val_ma(v) ((v).pud) | ||
155 | #endif | ||
155 | #define __pmd_ma(x) ((pmd_t) { (x) } ) | 156 | #define __pmd_ma(x) ((pmd_t) { (x) } ) |
156 | 157 | ||
157 | #define pgd_val_ma(x) ((x).pgd) | 158 | #define pgd_val_ma(x) ((x).pgd) |
158 | 159 | ||
159 | 160 | ||
160 | xmaddr_t arbitrary_virt_to_machine(unsigned long address); | 161 | xmaddr_t arbitrary_virt_to_machine(void *address); |
161 | void make_lowmem_page_readonly(void *vaddr); | 162 | void make_lowmem_page_readonly(void *vaddr); |
162 | void make_lowmem_page_readwrite(void *vaddr); | 163 | void make_lowmem_page_readwrite(void *vaddr); |
163 | 164 | ||
diff --git a/include/asm-x86/xor_32.h b/include/asm-x86/xor_32.h index 067b5c1835a3..921b45840449 100644 --- a/include/asm-x86/xor_32.h +++ b/include/asm-x86/xor_32.h | |||
@@ -1,3 +1,6 @@ | |||
1 | #ifndef ASM_X86__XOR_32_H | ||
2 | #define ASM_X86__XOR_32_H | ||
3 | |||
1 | /* | 4 | /* |
2 | * Optimized RAID-5 checksumming functions for MMX and SSE. | 5 | * Optimized RAID-5 checksumming functions for MMX and SSE. |
3 | * | 6 | * |
@@ -881,3 +884,5 @@ do { \ | |||
881 | deals with a load to a line that is being prefetched. */ | 884 | deals with a load to a line that is being prefetched. */ |
882 | #define XOR_SELECT_TEMPLATE(FASTEST) \ | 885 | #define XOR_SELECT_TEMPLATE(FASTEST) \ |
883 | (cpu_has_xmm ? &xor_block_pIII_sse : FASTEST) | 886 | (cpu_has_xmm ? &xor_block_pIII_sse : FASTEST) |
887 | |||
888 | #endif /* ASM_X86__XOR_32_H */ | ||
diff --git a/include/asm-x86/xor_64.h b/include/asm-x86/xor_64.h index 24957e39ac8a..2d3a18de295b 100644 --- a/include/asm-x86/xor_64.h +++ b/include/asm-x86/xor_64.h | |||
@@ -1,3 +1,6 @@ | |||
1 | #ifndef ASM_X86__XOR_64_H | ||
2 | #define ASM_X86__XOR_64_H | ||
3 | |||
1 | /* | 4 | /* |
2 | * Optimized RAID-5 checksumming functions for MMX and SSE. | 5 | * Optimized RAID-5 checksumming functions for MMX and SSE. |
3 | * | 6 | * |
@@ -354,3 +357,5 @@ do { \ | |||
354 | We may also be able to load into the L1 only depending on how the cpu | 357 | We may also be able to load into the L1 only depending on how the cpu |
355 | deals with a load to a line that is being prefetched. */ | 358 | deals with a load to a line that is being prefetched. */ |
356 | #define XOR_SELECT_TEMPLATE(FASTEST) (&xor_block_sse) | 359 | #define XOR_SELECT_TEMPLATE(FASTEST) (&xor_block_sse) |
360 | |||
361 | #endif /* ASM_X86__XOR_64_H */ | ||