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-rw-r--r--include/asm-x86/8253pit.h5
-rw-r--r--include/asm-x86/8253pit_32.h12
-rw-r--r--include/asm-x86/8253pit_64.h10
-rw-r--r--include/asm-x86/apic_64.h8
-rw-r--r--include/asm-x86/cpufeature_64.h2
-rw-r--r--include/asm-x86/geode.h50
-rw-r--r--include/asm-x86/hardirq_32.h1
-rw-r--r--include/asm-x86/hpet.h96
-rw-r--r--include/asm-x86/hpet_32.h90
-rw-r--r--include/asm-x86/hpet_64.h18
-rw-r--r--include/asm-x86/i8253.h20
-rw-r--r--include/asm-x86/i8253_32.h17
-rw-r--r--include/asm-x86/i8253_64.h6
-rw-r--r--include/asm-x86/io_apic_32.h16
-rw-r--r--include/asm-x86/pci.h90
-rw-r--r--include/asm-x86/pci_32.h58
-rw-r--r--include/asm-x86/pci_64.h56
-rw-r--r--include/asm-x86/pda.h1
-rw-r--r--include/asm-x86/processor-flags.h2
-rw-r--r--include/asm-x86/proto.h7
-rw-r--r--include/asm-x86/system_32.h19
-rw-r--r--include/asm-x86/system_64.h10
-rw-r--r--include/asm-x86/timex.h19
-rw-r--r--include/asm-x86/timex_32.h22
-rw-r--r--include/asm-x86/timex_64.h31
-rw-r--r--include/asm-x86/tsc.h15
-rw-r--r--include/asm-x86/vsyscall.h3
27 files changed, 299 insertions, 385 deletions
diff --git a/include/asm-x86/8253pit.h b/include/asm-x86/8253pit.h
deleted file mode 100644
index d3c2b38a6618..000000000000
--- a/include/asm-x86/8253pit.h
+++ /dev/null
@@ -1,5 +0,0 @@
1#ifdef CONFIG_X86_32
2# include "8253pit_32.h"
3#else
4# include "8253pit_64.h"
5#endif
diff --git a/include/asm-x86/8253pit_32.h b/include/asm-x86/8253pit_32.h
deleted file mode 100644
index 96c7c3592daf..000000000000
--- a/include/asm-x86/8253pit_32.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/*
2 * 8253/8254 Programmable Interval Timer
3 */
4
5#ifndef _8253PIT_H
6#define _8253PIT_H
7
8#include <asm/timex.h>
9
10#define PIT_TICK_RATE CLOCK_TICK_RATE
11
12#endif
diff --git a/include/asm-x86/8253pit_64.h b/include/asm-x86/8253pit_64.h
deleted file mode 100644
index 285f78488ccb..000000000000
--- a/include/asm-x86/8253pit_64.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * 8253/8254 Programmable Interval Timer
3 */
4
5#ifndef _8253PIT_H
6#define _8253PIT_H
7
8#define PIT_TICK_RATE 1193182UL
9
10#endif
diff --git a/include/asm-x86/apic_64.h b/include/asm-x86/apic_64.h
index 85125ef3c414..3c8f21eef0be 100644
--- a/include/asm-x86/apic_64.h
+++ b/include/asm-x86/apic_64.h
@@ -19,7 +19,7 @@
19extern int apic_verbosity; 19extern int apic_verbosity;
20extern int apic_runs_main_timer; 20extern int apic_runs_main_timer;
21extern int ioapic_force; 21extern int ioapic_force;
22extern int apic_mapped; 22extern int disable_apic_timer;
23 23
24/* 24/*
25 * Define the default level of output to be very little 25 * Define the default level of output to be very little
@@ -79,8 +79,6 @@ extern void smp_local_timer_interrupt (void);
79extern void setup_boot_APIC_clock (void); 79extern void setup_boot_APIC_clock (void);
80extern void setup_secondary_APIC_clock (void); 80extern void setup_secondary_APIC_clock (void);
81extern int APIC_init_uniprocessor (void); 81extern int APIC_init_uniprocessor (void);
82extern void disable_APIC_timer(void);
83extern void enable_APIC_timer(void);
84extern void setup_apic_routing(void); 82extern void setup_apic_routing(void);
85 83
86extern void setup_APIC_extended_lvt(unsigned char lvt_off, unsigned char vector, 84extern void setup_APIC_extended_lvt(unsigned char lvt_off, unsigned char vector,
@@ -95,10 +93,6 @@ extern int apic_is_clustered_box(void);
95#define K8_APIC_EXT_INT_MSG_EXT 0x7 93#define K8_APIC_EXT_INT_MSG_EXT 0x7
96#define K8_APIC_EXT_LVT_ENTRY_THRESHOLD 0 94#define K8_APIC_EXT_LVT_ENTRY_THRESHOLD 0
97 95
98void smp_send_timer_broadcast_ipi(void);
99void switch_APIC_timer_to_ipi(void *cpumask);
100void switch_ipi_to_APIC_timer(void *cpumask);
101
102#define ARCH_APICTIMER_STOPS_ON_C3 1 96#define ARCH_APICTIMER_STOPS_ON_C3 1
103 97
104extern unsigned boot_cpu_id; 98extern unsigned boot_cpu_id;
diff --git a/include/asm-x86/cpufeature_64.h b/include/asm-x86/cpufeature_64.h
index 2983501e8b3e..e18496b7b850 100644
--- a/include/asm-x86/cpufeature_64.h
+++ b/include/asm-x86/cpufeature_64.h
@@ -7,7 +7,7 @@
7#ifndef __ASM_X8664_CPUFEATURE_H 7#ifndef __ASM_X8664_CPUFEATURE_H
8#define __ASM_X8664_CPUFEATURE_H 8#define __ASM_X8664_CPUFEATURE_H
9 9
10#include <asm/cpufeature_32.h> 10#include "cpufeature_32.h"
11 11
12#undef cpu_has_vme 12#undef cpu_has_vme
13#define cpu_has_vme 0 13#define cpu_has_vme 0
diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h
index 6da4bbbea3dc..d94898831bac 100644
--- a/include/asm-x86/geode.h
+++ b/include/asm-x86/geode.h
@@ -156,4 +156,54 @@ static inline int is_geode(void)
156 return (is_geode_gx() || is_geode_lx()); 156 return (is_geode_gx() || is_geode_lx());
157} 157}
158 158
159/* MFGPTs */
160
161#define MFGPT_MAX_TIMERS 8
162#define MFGPT_TIMER_ANY -1
163
164#define MFGPT_DOMAIN_WORKING 1
165#define MFGPT_DOMAIN_STANDBY 2
166#define MFGPT_DOMAIN_ANY (MFGPT_DOMAIN_WORKING | MFGPT_DOMAIN_STANDBY)
167
168#define MFGPT_CMP1 0
169#define MFGPT_CMP2 1
170
171#define MFGPT_EVENT_IRQ 0
172#define MFGPT_EVENT_NMI 1
173#define MFGPT_EVENT_RESET 3
174
175#define MFGPT_REG_CMP1 0
176#define MFGPT_REG_CMP2 2
177#define MFGPT_REG_COUNTER 4
178#define MFGPT_REG_SETUP 6
179
180#define MFGPT_SETUP_CNTEN (1 << 15)
181#define MFGPT_SETUP_CMP2 (1 << 14)
182#define MFGPT_SETUP_CMP1 (1 << 13)
183#define MFGPT_SETUP_SETUP (1 << 12)
184#define MFGPT_SETUP_STOPEN (1 << 11)
185#define MFGPT_SETUP_EXTEN (1 << 10)
186#define MFGPT_SETUP_REVEN (1 << 5)
187#define MFGPT_SETUP_CLKSEL (1 << 4)
188
189static inline void geode_mfgpt_write(int timer, u16 reg, u16 value)
190{
191 u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
192 outw(value, base + reg + (timer * 8));
193}
194
195static inline u16 geode_mfgpt_read(int timer, u16 reg)
196{
197 u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
198 return inw(base + reg + (timer * 8));
199}
200
201extern int __init geode_mfgpt_detect(void);
202extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable);
203extern int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable);
204extern int geode_mfgpt_alloc_timer(int timer, int domain, struct module *owner);
205
206#define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
207#define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0)
208
159#endif 209#endif
diff --git a/include/asm-x86/hardirq_32.h b/include/asm-x86/hardirq_32.h
index 0e358dc405f8..34649585bb59 100644
--- a/include/asm-x86/hardirq_32.h
+++ b/include/asm-x86/hardirq_32.h
@@ -9,6 +9,7 @@ typedef struct {
9 unsigned long idle_timestamp; 9 unsigned long idle_timestamp;
10 unsigned int __nmi_count; /* arch dependent */ 10 unsigned int __nmi_count; /* arch dependent */
11 unsigned int apic_timer_irqs; /* arch dependent */ 11 unsigned int apic_timer_irqs; /* arch dependent */
12 unsigned int irq0_irqs;
12} ____cacheline_aligned irq_cpustat_t; 13} ____cacheline_aligned irq_cpustat_t;
13 14
14DECLARE_PER_CPU(irq_cpustat_t, irq_stat); 15DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
diff --git a/include/asm-x86/hpet.h b/include/asm-x86/hpet.h
index 9eff48601254..d4ab6db050b6 100644
--- a/include/asm-x86/hpet.h
+++ b/include/asm-x86/hpet.h
@@ -1,5 +1,93 @@
1#ifdef CONFIG_X86_32 1#ifndef ASM_X86_HPET_H
2# include "hpet_32.h" 2#define ASM_X86_HPET_H
3
4#ifdef CONFIG_HPET_TIMER
5
6/*
7 * Documentation on HPET can be found at:
8 * http://www.intel.com/ial/home/sp/pcmmspec.htm
9 * ftp://download.intel.com/ial/home/sp/mmts098.pdf
10 */
11
12#define HPET_MMAP_SIZE 1024
13
14#define HPET_ID 0x000
15#define HPET_PERIOD 0x004
16#define HPET_CFG 0x010
17#define HPET_STATUS 0x020
18#define HPET_COUNTER 0x0f0
19#define HPET_T0_CFG 0x100
20#define HPET_T0_CMP 0x108
21#define HPET_T0_ROUTE 0x110
22#define HPET_T1_CFG 0x120
23#define HPET_T1_CMP 0x128
24#define HPET_T1_ROUTE 0x130
25#define HPET_T2_CFG 0x140
26#define HPET_T2_CMP 0x148
27#define HPET_T2_ROUTE 0x150
28
29#define HPET_ID_REV 0x000000ff
30#define HPET_ID_NUMBER 0x00001f00
31#define HPET_ID_64BIT 0x00002000
32#define HPET_ID_LEGSUP 0x00008000
33#define HPET_ID_VENDOR 0xffff0000
34#define HPET_ID_NUMBER_SHIFT 8
35#define HPET_ID_VENDOR_SHIFT 16
36
37#define HPET_ID_VENDOR_8086 0x8086
38
39#define HPET_CFG_ENABLE 0x001
40#define HPET_CFG_LEGACY 0x002
41#define HPET_LEGACY_8254 2
42#define HPET_LEGACY_RTC 8
43
44#define HPET_TN_LEVEL 0x0002
45#define HPET_TN_ENABLE 0x0004
46#define HPET_TN_PERIODIC 0x0008
47#define HPET_TN_PERIODIC_CAP 0x0010
48#define HPET_TN_64BIT_CAP 0x0020
49#define HPET_TN_SETVAL 0x0040
50#define HPET_TN_32BIT 0x0100
51#define HPET_TN_ROUTE 0x3e00
52#define HPET_TN_FSB 0x4000
53#define HPET_TN_FSB_CAP 0x8000
54#define HPET_TN_ROUTE_SHIFT 9
55
56/* Max HPET Period is 10^8 femto sec as in HPET spec */
57#define HPET_MAX_PERIOD 100000000UL
58/*
59 * Min HPET period is 10^5 femto sec just for safety. If it is less than this,
60 * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
61 */
62#define HPET_MIN_PERIOD 100000UL
63
64/* hpet memory map physical address */
65extern unsigned long hpet_address;
66extern unsigned long force_hpet_address;
67extern int is_hpet_enabled(void);
68extern int hpet_enable(void);
69extern unsigned long hpet_readl(unsigned long a);
70extern void force_hpet_resume(void);
71
72#ifdef CONFIG_HPET_EMULATE_RTC
73
74#include <linux/interrupt.h>
75
76extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
77extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
78extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
79 unsigned char sec);
80extern int hpet_set_periodic_freq(unsigned long freq);
81extern int hpet_rtc_dropped_irq(void);
82extern int hpet_rtc_timer_init(void);
83extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
84
85#endif /* CONFIG_HPET_EMULATE_RTC */
86
3#else 87#else
4# include "hpet_64.h" 88
5#endif 89static inline int hpet_enable(void) { return 0; }
90static inline unsigned long hpet_readl(unsigned long a) { return 0; }
91
92#endif /* CONFIG_HPET_TIMER */
93#endif /* ASM_X86_HPET_H */
diff --git a/include/asm-x86/hpet_32.h b/include/asm-x86/hpet_32.h
deleted file mode 100644
index c82dc7ed96b3..000000000000
--- a/include/asm-x86/hpet_32.h
+++ /dev/null
@@ -1,90 +0,0 @@
1
2#ifndef _I386_HPET_H
3#define _I386_HPET_H
4
5#ifdef CONFIG_HPET_TIMER
6
7/*
8 * Documentation on HPET can be found at:
9 * http://www.intel.com/ial/home/sp/pcmmspec.htm
10 * ftp://download.intel.com/ial/home/sp/mmts098.pdf
11 */
12
13#define HPET_MMAP_SIZE 1024
14
15#define HPET_ID 0x000
16#define HPET_PERIOD 0x004
17#define HPET_CFG 0x010
18#define HPET_STATUS 0x020
19#define HPET_COUNTER 0x0f0
20#define HPET_T0_CFG 0x100
21#define HPET_T0_CMP 0x108
22#define HPET_T0_ROUTE 0x110
23#define HPET_T1_CFG 0x120
24#define HPET_T1_CMP 0x128
25#define HPET_T1_ROUTE 0x130
26#define HPET_T2_CFG 0x140
27#define HPET_T2_CMP 0x148
28#define HPET_T2_ROUTE 0x150
29
30#define HPET_ID_REV 0x000000ff
31#define HPET_ID_NUMBER 0x00001f00
32#define HPET_ID_64BIT 0x00002000
33#define HPET_ID_LEGSUP 0x00008000
34#define HPET_ID_VENDOR 0xffff0000
35#define HPET_ID_NUMBER_SHIFT 8
36#define HPET_ID_VENDOR_SHIFT 16
37
38#define HPET_ID_VENDOR_8086 0x8086
39
40#define HPET_CFG_ENABLE 0x001
41#define HPET_CFG_LEGACY 0x002
42#define HPET_LEGACY_8254 2
43#define HPET_LEGACY_RTC 8
44
45#define HPET_TN_LEVEL 0x0002
46#define HPET_TN_ENABLE 0x0004
47#define HPET_TN_PERIODIC 0x0008
48#define HPET_TN_PERIODIC_CAP 0x0010
49#define HPET_TN_64BIT_CAP 0x0020
50#define HPET_TN_SETVAL 0x0040
51#define HPET_TN_32BIT 0x0100
52#define HPET_TN_ROUTE 0x3e00
53#define HPET_TN_FSB 0x4000
54#define HPET_TN_FSB_CAP 0x8000
55#define HPET_TN_ROUTE_SHIFT 9
56
57/* Max HPET Period is 10^8 femto sec as in HPET spec */
58#define HPET_MAX_PERIOD 100000000UL
59/*
60 * Min HPET period is 10^5 femto sec just for safety. If it is less than this,
61 * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
62 */
63#define HPET_MIN_PERIOD 100000UL
64
65/* hpet memory map physical address */
66extern unsigned long hpet_address;
67extern int is_hpet_enabled(void);
68extern int hpet_enable(void);
69
70#ifdef CONFIG_HPET_EMULATE_RTC
71
72#include <linux/interrupt.h>
73
74extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
75extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
76extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
77 unsigned char sec);
78extern int hpet_set_periodic_freq(unsigned long freq);
79extern int hpet_rtc_dropped_irq(void);
80extern int hpet_rtc_timer_init(void);
81extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
82
83#endif /* CONFIG_HPET_EMULATE_RTC */
84
85#else
86
87static inline int hpet_enable(void) { return 0; }
88
89#endif /* CONFIG_HPET_TIMER */
90#endif /* _I386_HPET_H */
diff --git a/include/asm-x86/hpet_64.h b/include/asm-x86/hpet_64.h
deleted file mode 100644
index fd4decac93a8..000000000000
--- a/include/asm-x86/hpet_64.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef _ASM_X8664_HPET_H
2#define _ASM_X8664_HPET_H 1
3
4#include <asm/hpet_32.h>
5
6#define HPET_TICK_RATE (HZ * 100000UL)
7
8extern int hpet_rtc_timer_init(void);
9extern int hpet_arch_init(void);
10extern int hpet_timer_stop_set_go(unsigned long tick);
11extern int hpet_reenable(void);
12extern unsigned int hpet_calibrate_tsc(void);
13
14extern int hpet_use_timer;
15extern unsigned long hpet_period;
16extern unsigned long hpet_tick;
17
18#endif
diff --git a/include/asm-x86/i8253.h b/include/asm-x86/i8253.h
index b2a4f995a33f..747548ec5d1d 100644
--- a/include/asm-x86/i8253.h
+++ b/include/asm-x86/i8253.h
@@ -1,5 +1,15 @@
1#ifdef CONFIG_X86_32 1#ifndef __ASM_I8253_H__
2# include "i8253_32.h" 2#define __ASM_I8253_H__
3#else 3
4# include "i8253_64.h" 4/* i8253A PIT registers */
5#endif 5#define PIT_MODE 0x43
6#define PIT_CH0 0x40
7#define PIT_CH2 0x42
8
9extern spinlock_t i8253_lock;
10
11extern struct clock_event_device *global_clock_event;
12
13extern void setup_pit_timer(void);
14
15#endif /* __ASM_I8253_H__ */
diff --git a/include/asm-x86/i8253_32.h b/include/asm-x86/i8253_32.h
deleted file mode 100644
index 7577d058d86e..000000000000
--- a/include/asm-x86/i8253_32.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef __ASM_I8253_H__
2#define __ASM_I8253_H__
3
4#include <linux/clockchips.h>
5
6/* i8253A PIT registers */
7#define PIT_MODE 0x43
8#define PIT_CH0 0x40
9#define PIT_CH2 0x42
10
11extern spinlock_t i8253_lock;
12
13extern struct clock_event_device *global_clock_event;
14
15extern void setup_pit_timer(void);
16
17#endif /* __ASM_I8253_H__ */
diff --git a/include/asm-x86/i8253_64.h b/include/asm-x86/i8253_64.h
deleted file mode 100644
index 015d8df07690..000000000000
--- a/include/asm-x86/i8253_64.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_I8253_H__
2#define __ASM_I8253_H__
3
4extern spinlock_t i8253_lock;
5
6#endif /* __ASM_I8253_H__ */
diff --git a/include/asm-x86/io_apic_32.h b/include/asm-x86/io_apic_32.h
index dbe734ddf2af..3f087883ea48 100644
--- a/include/asm-x86/io_apic_32.h
+++ b/include/asm-x86/io_apic_32.h
@@ -11,8 +11,6 @@
11 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar 11 * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
12 */ 12 */
13 13
14#ifdef CONFIG_X86_IO_APIC
15
16/* 14/*
17 * The structure of the IO-APIC: 15 * The structure of the IO-APIC:
18 */ 16 */
@@ -55,12 +53,6 @@ union IO_APIC_reg_03 {
55 } __attribute__ ((packed)) bits; 53 } __attribute__ ((packed)) bits;
56}; 54};
57 55
58/*
59 * # of IO-APICs and # of IRQ routing registers
60 */
61extern int nr_ioapics;
62extern int nr_ioapic_registers[MAX_IO_APICS];
63
64enum ioapic_irq_destination_types { 56enum ioapic_irq_destination_types {
65 dest_Fixed = 0, 57 dest_Fixed = 0,
66 dest_LowestPrio = 1, 58 dest_LowestPrio = 1,
@@ -100,6 +92,14 @@ struct IO_APIC_route_entry {
100 92
101} __attribute__ ((packed)); 93} __attribute__ ((packed));
102 94
95#ifdef CONFIG_X86_IO_APIC
96
97/*
98 * # of IO-APICs and # of IRQ routing registers
99 */
100extern int nr_ioapics;
101extern int nr_ioapic_registers[MAX_IO_APICS];
102
103/* 103/*
104 * MP-BIOS irq configuration table structures: 104 * MP-BIOS irq configuration table structures:
105 */ 105 */
diff --git a/include/asm-x86/pci.h b/include/asm-x86/pci.h
index a8cac8c2cde7..e88361966347 100644
--- a/include/asm-x86/pci.h
+++ b/include/asm-x86/pci.h
@@ -1,5 +1,95 @@
1#ifndef __x86_PCI_H
2#define __x86_PCI_H
3
4#include <linux/mm.h> /* for struct page */
5#include <linux/types.h>
6#include <linux/slab.h>
7#include <linux/string.h>
8#include <asm/scatterlist.h>
9#include <asm/io.h>
10
11
12#ifdef __KERNEL__
13
14struct pci_sysdata {
15 int domain; /* PCI domain */
16 int node; /* NUMA node */
17#ifdef CONFIG_X86_64
18 void* iommu; /* IOMMU private data */
19#endif
20};
21
22/* scan a bus after allocating a pci_sysdata for it */
23extern struct pci_bus *pci_scan_bus_with_sysdata(int busno);
24
25static inline int pci_domain_nr(struct pci_bus *bus)
26{
27 struct pci_sysdata *sd = bus->sysdata;
28 return sd->domain;
29}
30
31static inline int pci_proc_domain(struct pci_bus *bus)
32{
33 return pci_domain_nr(bus);
34}
35
36
37/* Can be used to override the logic in pci_scan_bus for skipping
38 already-configured bus numbers - to be used for buggy BIOSes
39 or architectures with incomplete PCI setup by the loader */
40
41#ifdef CONFIG_PCI
42extern unsigned int pcibios_assign_all_busses(void);
43#else
44#define pcibios_assign_all_busses() 0
45#endif
46#define pcibios_scan_all_fns(a, b) 0
47
48extern unsigned long pci_mem_start;
49#define PCIBIOS_MIN_IO 0x1000
50#define PCIBIOS_MIN_MEM (pci_mem_start)
51
52#define PCIBIOS_MIN_CARDBUS_IO 0x4000
53
54void pcibios_config_init(void);
55struct pci_bus * pcibios_scan_root(int bus);
56
57void pcibios_set_master(struct pci_dev *dev);
58void pcibios_penalize_isa_irq(int irq, int active);
59struct irq_routing_table *pcibios_get_irq_routing_table(void);
60int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
61
62
63#define HAVE_PCI_MMAP
64extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
65 enum pci_mmap_state mmap_state, int write_combine);
66
67
68#ifdef CONFIG_PCI
69static inline void pci_dma_burst_advice(struct pci_dev *pdev,
70 enum pci_dma_burst_strategy *strat,
71 unsigned long *strategy_parameter)
72{
73 *strat = PCI_DMA_BURST_INFINITY;
74 *strategy_parameter = ~0UL;
75}
76#endif
77
78
79#endif /* __KERNEL__ */
80
1#ifdef CONFIG_X86_32 81#ifdef CONFIG_X86_32
2# include "pci_32.h" 82# include "pci_32.h"
3#else 83#else
4# include "pci_64.h" 84# include "pci_64.h"
5#endif 85#endif
86
87/* implement the pci_ DMA API in terms of the generic device dma_ one */
88#include <asm-generic/pci-dma-compat.h>
89
90/* generic pci stuff */
91#include <asm-generic/pci.h>
92
93
94
95#endif
diff --git a/include/asm-x86/pci_32.h b/include/asm-x86/pci_32.h
index 4fcacc711385..8c4c3a0368e2 100644
--- a/include/asm-x86/pci_32.h
+++ b/include/asm-x86/pci_32.h
@@ -4,50 +4,11 @@
4 4
5#ifdef __KERNEL__ 5#ifdef __KERNEL__
6 6
7struct pci_sysdata {
8 int node; /* NUMA node */
9};
10
11/* scan a bus after allocating a pci_sysdata for it */
12extern struct pci_bus *pci_scan_bus_with_sysdata(int busno);
13
14#include <linux/mm.h> /* for struct page */
15
16/* Can be used to override the logic in pci_scan_bus for skipping
17 already-configured bus numbers - to be used for buggy BIOSes
18 or architectures with incomplete PCI setup by the loader */
19
20#ifdef CONFIG_PCI
21extern unsigned int pcibios_assign_all_busses(void);
22#else
23#define pcibios_assign_all_busses() 0
24#endif
25#define pcibios_scan_all_fns(a, b) 0
26
27extern unsigned long pci_mem_start;
28#define PCIBIOS_MIN_IO 0x1000
29#define PCIBIOS_MIN_MEM (pci_mem_start)
30
31#define PCIBIOS_MIN_CARDBUS_IO 0x4000
32
33void pcibios_config_init(void);
34struct pci_bus * pcibios_scan_root(int bus);
35
36void pcibios_set_master(struct pci_dev *dev);
37void pcibios_penalize_isa_irq(int irq, int active);
38struct irq_routing_table *pcibios_get_irq_routing_table(void);
39int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
40 7
41/* Dynamic DMA mapping stuff. 8/* Dynamic DMA mapping stuff.
42 * i386 has everything mapped statically. 9 * i386 has everything mapped statically.
43 */ 10 */
44 11
45#include <linux/types.h>
46#include <linux/slab.h>
47#include <asm/scatterlist.h>
48#include <linux/string.h>
49#include <asm/io.h>
50
51struct pci_dev; 12struct pci_dev;
52 13
53/* The PCI address space does equal the physical memory 14/* The PCI address space does equal the physical memory
@@ -64,27 +25,8 @@ struct pci_dev;
64#define pci_unmap_len(PTR, LEN_NAME) (0) 25#define pci_unmap_len(PTR, LEN_NAME) (0)
65#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 26#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
66 27
67#define HAVE_PCI_MMAP
68extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
69 enum pci_mmap_state mmap_state, int write_combine);
70
71
72#ifdef CONFIG_PCI
73static inline void pci_dma_burst_advice(struct pci_dev *pdev,
74 enum pci_dma_burst_strategy *strat,
75 unsigned long *strategy_parameter)
76{
77 *strat = PCI_DMA_BURST_INFINITY;
78 *strategy_parameter = ~0UL;
79}
80#endif
81 28
82#endif /* __KERNEL__ */ 29#endif /* __KERNEL__ */
83 30
84/* implement the pci_ DMA API in terms of the generic device dma_ one */
85#include <asm-generic/pci-dma-compat.h>
86
87/* generic pci stuff */
88#include <asm-generic/pci.h>
89 31
90#endif /* __i386_PCI_H */ 32#endif /* __i386_PCI_H */
diff --git a/include/asm-x86/pci_64.h b/include/asm-x86/pci_64.h
index 5da8cb0c0599..9baa46d9f594 100644
--- a/include/asm-x86/pci_64.h
+++ b/include/asm-x86/pci_64.h
@@ -1,16 +1,9 @@
1#ifndef __x8664_PCI_H 1#ifndef __x8664_PCI_H
2#define __x8664_PCI_H 2#define __x8664_PCI_H
3 3
4#include <asm/io.h>
5 4
6#ifdef __KERNEL__ 5#ifdef __KERNEL__
7 6
8struct pci_sysdata {
9 int node; /* NUMA node */
10 void* iommu; /* IOMMU private data */
11};
12
13extern struct pci_bus *pci_scan_bus_with_sysdata(int busno);
14 7
15#ifdef CONFIG_CALGARY_IOMMU 8#ifdef CONFIG_CALGARY_IOMMU
16static inline void* pci_iommu(struct pci_bus *bus) 9static inline void* pci_iommu(struct pci_bus *bus)
@@ -26,40 +19,11 @@ static inline void set_pci_iommu(struct pci_bus *bus, void *val)
26} 19}
27#endif /* CONFIG_CALGARY_IOMMU */ 20#endif /* CONFIG_CALGARY_IOMMU */
28 21
29#include <linux/mm.h> /* for struct page */
30
31/* Can be used to override the logic in pci_scan_bus for skipping
32 already-configured bus numbers - to be used for buggy BIOSes
33 or architectures with incomplete PCI setup by the loader */
34
35#ifdef CONFIG_PCI
36extern unsigned int pcibios_assign_all_busses(void);
37#else
38#define pcibios_assign_all_busses() 0
39#endif
40#define pcibios_scan_all_fns(a, b) 0
41
42extern unsigned long pci_mem_start;
43#define PCIBIOS_MIN_IO 0x1000
44#define PCIBIOS_MIN_MEM (pci_mem_start)
45
46#define PCIBIOS_MIN_CARDBUS_IO 0x4000
47 22
48void pcibios_config_init(void);
49struct pci_bus * pcibios_scan_root(int bus);
50extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value); 23extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value);
51extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value); 24extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value);
52 25
53void pcibios_set_master(struct pci_dev *dev);
54void pcibios_penalize_isa_irq(int irq, int active);
55struct irq_routing_table *pcibios_get_irq_routing_table(void);
56int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
57 26
58#include <linux/types.h>
59#include <linux/slab.h>
60#include <asm/scatterlist.h>
61#include <linux/string.h>
62#include <asm/page.h>
63 27
64extern void pci_iommu_alloc(void); 28extern void pci_iommu_alloc(void);
65extern int iommu_setup(char *opt); 29extern int iommu_setup(char *opt);
@@ -100,27 +64,7 @@ extern int iommu_setup(char *opt);
100 64
101#endif 65#endif
102 66
103#include <asm-generic/pci-dma-compat.h>
104
105#ifdef CONFIG_PCI
106static inline void pci_dma_burst_advice(struct pci_dev *pdev,
107 enum pci_dma_burst_strategy *strat,
108 unsigned long *strategy_parameter)
109{
110 *strat = PCI_DMA_BURST_INFINITY;
111 *strategy_parameter = ~0UL;
112}
113#endif
114
115#define HAVE_PCI_MMAP
116extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
117 enum pci_mmap_state mmap_state, int write_combine);
118
119#endif /* __KERNEL__ */ 67#endif /* __KERNEL__ */
120 68
121/* generic pci stuff */
122#ifdef CONFIG_PCI
123#include <asm-generic/pci.h>
124#endif
125 69
126#endif /* __x8664_PCI_H */ 70#endif /* __x8664_PCI_H */
diff --git a/include/asm-x86/pda.h b/include/asm-x86/pda.h
index 5642634843c4..fb49f80eb94f 100644
--- a/include/asm-x86/pda.h
+++ b/include/asm-x86/pda.h
@@ -29,6 +29,7 @@ struct x8664_pda {
29 short isidle; 29 short isidle;
30 struct mm_struct *active_mm; 30 struct mm_struct *active_mm;
31 unsigned apic_timer_irqs; 31 unsigned apic_timer_irqs;
32 unsigned irq0_irqs;
32} ____cacheline_aligned_in_smp; 33} ____cacheline_aligned_in_smp;
33 34
34extern struct x8664_pda *_cpu_pda[]; 35extern struct x8664_pda *_cpu_pda[];
diff --git a/include/asm-x86/processor-flags.h b/include/asm-x86/processor-flags.h
index 5404e90edd57..199cab107d85 100644
--- a/include/asm-x86/processor-flags.h
+++ b/include/asm-x86/processor-flags.h
@@ -63,7 +63,7 @@
63/* 63/*
64 * x86-64 Task Priority Register, CR8 64 * x86-64 Task Priority Register, CR8
65 */ 65 */
66#define X86_CR8_TPR 0x00000007 /* task priority register */ 66#define X86_CR8_TPR 0x0000000F /* task priority register */
67 67
68/* 68/*
69 * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h> 69 * AMD and Transmeta use MSRs for configuration; see <asm/msr-index.h>
diff --git a/include/asm-x86/proto.h b/include/asm-x86/proto.h
index 31f20ad65876..c44a3a93b5a4 100644
--- a/include/asm-x86/proto.h
+++ b/include/asm-x86/proto.h
@@ -51,9 +51,6 @@ extern void reserve_bootmem_generic(unsigned long phys, unsigned len);
51 51
52extern void load_gs_index(unsigned gs); 52extern void load_gs_index(unsigned gs);
53 53
54extern void stop_timer_interrupt(void);
55extern void main_timer_handler(void);
56
57extern unsigned long end_pfn_map; 54extern unsigned long end_pfn_map;
58 55
59extern void show_trace(struct task_struct *, struct pt_regs *, unsigned long * rsp); 56extern void show_trace(struct task_struct *, struct pt_regs *, unsigned long * rsp);
@@ -90,14 +87,10 @@ extern int timer_over_8254;
90 87
91extern int gsi_irq_sharing(int gsi); 88extern int gsi_irq_sharing(int gsi);
92 89
93extern void smp_local_timer_interrupt(void);
94
95extern int force_mwait; 90extern int force_mwait;
96 91
97long do_arch_prctl(struct task_struct *task, int code, unsigned long addr); 92long do_arch_prctl(struct task_struct *task, int code, unsigned long addr);
98 93
99void i8254_timer_resume(void);
100
101#define round_up(x,y) (((x) + (y) - 1) & ~((y)-1)) 94#define round_up(x,y) (((x) + (y) - 1) & ~((y)-1))
102#define round_down(x,y) ((x) & ~((y)-1)) 95#define round_down(x,y) ((x) & ~((y)-1))
103 96
diff --git a/include/asm-x86/system_32.h b/include/asm-x86/system_32.h
index d69ba937e092..e7e5d426fef5 100644
--- a/include/asm-x86/system_32.h
+++ b/include/asm-x86/system_32.h
@@ -216,6 +216,7 @@ static inline unsigned long get_limit(unsigned long segment)
216 216
217#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2) 217#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
218#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2) 218#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
219#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
219 220
220/** 221/**
221 * read_barrier_depends - Flush all pending reads that subsequents reads 222 * read_barrier_depends - Flush all pending reads that subsequents reads
@@ -271,18 +272,18 @@ static inline unsigned long get_limit(unsigned long segment)
271 272
272#define read_barrier_depends() do { } while(0) 273#define read_barrier_depends() do { } while(0)
273 274
275#ifdef CONFIG_SMP
276#define smp_mb() mb()
277#ifdef CONFIG_X86_PPRO_FENCE
278# define smp_rmb() rmb()
279#else
280# define smp_rmb() barrier()
281#endif
274#ifdef CONFIG_X86_OOSTORE 282#ifdef CONFIG_X86_OOSTORE
275/* Actually there are no OOO store capable CPUs for now that do SSE, 283# define smp_wmb() wmb()
276 but make it already an possibility. */
277#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
278#else 284#else
279#define wmb() __asm__ __volatile__ ("": : :"memory") 285# define smp_wmb() barrier()
280#endif 286#endif
281
282#ifdef CONFIG_SMP
283#define smp_mb() mb()
284#define smp_rmb() rmb()
285#define smp_wmb() wmb()
286#define smp_read_barrier_depends() read_barrier_depends() 287#define smp_read_barrier_depends() read_barrier_depends()
287#define set_mb(var, value) do { (void) xchg(&var, value); } while (0) 288#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
288#else 289#else
diff --git a/include/asm-x86/system_64.h b/include/asm-x86/system_64.h
index 02175aa1d16a..5022aecc333d 100644
--- a/include/asm-x86/system_64.h
+++ b/include/asm-x86/system_64.h
@@ -141,8 +141,8 @@ static inline void write_cr8(unsigned long val)
141 141
142#ifdef CONFIG_SMP 142#ifdef CONFIG_SMP
143#define smp_mb() mb() 143#define smp_mb() mb()
144#define smp_rmb() rmb() 144#define smp_rmb() barrier()
145#define smp_wmb() wmb() 145#define smp_wmb() barrier()
146#define smp_read_barrier_depends() do {} while(0) 146#define smp_read_barrier_depends() do {} while(0)
147#else 147#else
148#define smp_mb() barrier() 148#define smp_mb() barrier()
@@ -159,12 +159,8 @@ static inline void write_cr8(unsigned long val)
159 */ 159 */
160#define mb() asm volatile("mfence":::"memory") 160#define mb() asm volatile("mfence":::"memory")
161#define rmb() asm volatile("lfence":::"memory") 161#define rmb() asm volatile("lfence":::"memory")
162
163#ifdef CONFIG_UNORDERED_IO
164#define wmb() asm volatile("sfence" ::: "memory") 162#define wmb() asm volatile("sfence" ::: "memory")
165#else 163
166#define wmb() asm volatile("" ::: "memory")
167#endif
168#define read_barrier_depends() do {} while(0) 164#define read_barrier_depends() do {} while(0)
169#define set_mb(var, value) do { (void) xchg(&var, value); } while (0) 165#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
170 166
diff --git a/include/asm-x86/timex.h b/include/asm-x86/timex.h
index d01c18cfccef..39a21ab030f0 100644
--- a/include/asm-x86/timex.h
+++ b/include/asm-x86/timex.h
@@ -1,5 +1,18 @@
1#ifdef CONFIG_X86_32 1/* x86 architecture timex specifications */
2# include "timex_32.h" 2#ifndef _ASM_X86_TIMEX_H
3#define _ASM_X86_TIMEX_H
4
5#include <asm/processor.h>
6#include <asm/tsc.h>
7
8#ifdef CONFIG_X86_ELAN
9# define PIT_TICK_RATE 1189200 /* AMD Elan has different frequency! */
3#else 10#else
4# include "timex_64.h" 11# define PIT_TICK_RATE 1193182 /* Underlying HZ */
12#endif
13#define CLOCK_TICK_RATE PIT_TICK_RATE
14
15extern int read_current_timer(unsigned long *timer_value);
16#define ARCH_HAS_READ_CURRENT_TIMER 1
17
5#endif 18#endif
diff --git a/include/asm-x86/timex_32.h b/include/asm-x86/timex_32.h
deleted file mode 100644
index 3666044409f0..000000000000
--- a/include/asm-x86/timex_32.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * linux/include/asm-i386/timex.h
3 *
4 * i386 architecture timex specifications
5 */
6#ifndef _ASMi386_TIMEX_H
7#define _ASMi386_TIMEX_H
8
9#include <asm/processor.h>
10#include <asm/tsc.h>
11
12#ifdef CONFIG_X86_ELAN
13# define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */
14#else
15# define CLOCK_TICK_RATE 1193182 /* Underlying HZ */
16#endif
17
18
19extern int read_current_timer(unsigned long *timer_value);
20#define ARCH_HAS_READ_CURRENT_TIMER 1
21
22#endif
diff --git a/include/asm-x86/timex_64.h b/include/asm-x86/timex_64.h
deleted file mode 100644
index 6ed21f44d308..000000000000
--- a/include/asm-x86/timex_64.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * linux/include/asm-x86_64/timex.h
3 *
4 * x86-64 architecture timex specifications
5 */
6#ifndef _ASMx8664_TIMEX_H
7#define _ASMx8664_TIMEX_H
8
9#include <asm/8253pit.h>
10#include <asm/msr.h>
11#include <asm/vsyscall.h>
12#include <asm/system.h>
13#include <asm/processor.h>
14#include <asm/tsc.h>
15#include <linux/compiler.h>
16
17#define CLOCK_TICK_RATE PIT_TICK_RATE /* Underlying HZ */
18
19extern int read_current_timer(unsigned long *timer_value);
20#define ARCH_HAS_READ_CURRENT_TIMER 1
21
22#define USEC_PER_TICK (USEC_PER_SEC / HZ)
23#define NSEC_PER_TICK (NSEC_PER_SEC / HZ)
24#define FSEC_PER_TICK (FSEC_PER_SEC / HZ)
25
26#define NS_SCALE 10 /* 2^10, carefully chosen */
27#define US_SCALE 32 /* 2^32, arbitralrily chosen */
28
29extern void mark_tsc_unstable(char *msg);
30extern void set_cyc2ns_scale(unsigned long khz);
31#endif
diff --git a/include/asm-x86/tsc.h b/include/asm-x86/tsc.h
index a4d806610b7f..6baab30dc2c8 100644
--- a/include/asm-x86/tsc.h
+++ b/include/asm-x86/tsc.h
@@ -1,13 +1,14 @@
1/* 1/*
2 * linux/include/asm-i386/tsc.h 2 * x86 TSC related functions
3 *
4 * i386 TSC related functions
5 */ 3 */
6#ifndef _ASM_i386_TSC_H 4#ifndef _ASM_X86_TSC_H
7#define _ASM_i386_TSC_H 5#define _ASM_X86_TSC_H
8 6
9#include <asm/processor.h> 7#include <asm/processor.h>
10 8
9#define NS_SCALE 10 /* 2^10, carefully chosen */
10#define US_SCALE 32 /* 2^32, arbitralrily chosen */
11
11/* 12/*
12 * Standard way to access the cycle counter. 13 * Standard way to access the cycle counter.
13 */ 14 */
@@ -72,4 +73,8 @@ int check_tsc_unstable(void);
72extern void check_tsc_sync_source(int cpu); 73extern void check_tsc_sync_source(int cpu);
73extern void check_tsc_sync_target(void); 74extern void check_tsc_sync_target(void);
74 75
76#ifdef CONFIG_X86_64
77extern void tsc_calibrate(void);
78#endif
79
75#endif 80#endif
diff --git a/include/asm-x86/vsyscall.h b/include/asm-x86/vsyscall.h
index 3b8ceb4af2cf..f01c49f5d108 100644
--- a/include/asm-x86/vsyscall.h
+++ b/include/asm-x86/vsyscall.h
@@ -29,9 +29,6 @@ enum vsyscall_num {
29#define VGETCPU_RDTSCP 1 29#define VGETCPU_RDTSCP 1
30#define VGETCPU_LSL 2 30#define VGETCPU_LSL 2
31 31
32#define hpet_readl(a) readl((const void __iomem *)fix_to_virt(FIX_HPET_BASE) + a)
33#define hpet_writel(d,a) writel(d, (void __iomem *)fix_to_virt(FIX_HPET_BASE) + a)
34
35extern int __vgetcpu_mode; 32extern int __vgetcpu_mode;
36extern volatile unsigned long __jiffies; 33extern volatile unsigned long __jiffies;
37 34
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-06 19:25:56 -0500