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-rw-r--r--include/asm-x86/irq_vectors.h4
-rw-r--r--include/asm-x86/mach-default/smpboot_hooks.h6
-rw-r--r--include/asm-x86/mach-visws/mach_apic.h104
-rw-r--r--include/asm-x86/mach-visws/mach_apicdef.h13
-rw-r--r--include/asm-x86/mach-visws/setup_arch.h7
-rw-r--r--include/asm-x86/mach-visws/smpboot_hooks.h29
-rw-r--r--include/asm-x86/setup.h19
-rw-r--r--include/asm-x86/visws/cobalt.h (renamed from include/asm-x86/mach-visws/cobalt.h)0
-rw-r--r--include/asm-x86/visws/lithium.h (renamed from include/asm-x86/mach-visws/lithium.h)0
-rw-r--r--include/asm-x86/visws/piix4.h (renamed from include/asm-x86/mach-visws/piix4.h)0
-rw-r--r--include/asm-x86/visws/sgivw.h5
11 files changed, 36 insertions, 151 deletions
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h
index b58581e2e24e..0ac864ef3cd4 100644
--- a/include/asm-x86/irq_vectors.h
+++ b/include/asm-x86/irq_vectors.h
@@ -107,9 +107,9 @@
107#define LAST_VM86_IRQ 15 107#define LAST_VM86_IRQ 15
108#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) 108#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
109 109
110#if !defined(CONFIG_X86_VISWS) && !defined(CONFIG_X86_VOYAGER) 110#if !defined(CONFIG_X86_VOYAGER)
111 111
112# if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) 112# if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) || defined(CONFIG_X86_VISWS)
113 113
114# define NR_IRQS 224 114# define NR_IRQS 224
115 115
diff --git a/include/asm-x86/mach-default/smpboot_hooks.h b/include/asm-x86/mach-default/smpboot_hooks.h
index b63c52182006..56d001b9dce4 100644
--- a/include/asm-x86/mach-default/smpboot_hooks.h
+++ b/include/asm-x86/mach-default/smpboot_hooks.h
@@ -3,7 +3,9 @@
3 3
4static inline void smpboot_clear_io_apic_irqs(void) 4static inline void smpboot_clear_io_apic_irqs(void)
5{ 5{
6#ifdef CONFIG_X86_IO_APIC
6 io_apic_irqs = 0; 7 io_apic_irqs = 0;
8#endif
7} 9}
8 10
9static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) 11static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
@@ -35,6 +37,7 @@ static inline void smpboot_restore_warm_reset_vector(void)
35 37
36static inline void __init smpboot_setup_io_apic(void) 38static inline void __init smpboot_setup_io_apic(void)
37{ 39{
40#ifdef CONFIG_X86_IO_APIC
38 /* 41 /*
39 * Here we can be sure that there is an IO-APIC in the system. Let's 42 * Here we can be sure that there is an IO-APIC in the system. Let's
40 * go and set it up: 43 * go and set it up:
@@ -45,9 +48,12 @@ static inline void __init smpboot_setup_io_apic(void)
45 nr_ioapics = 0; 48 nr_ioapics = 0;
46 localise_nmi_watchdog(); 49 localise_nmi_watchdog();
47 } 50 }
51#endif
48} 52}
49 53
50static inline void smpboot_clear_io_apic(void) 54static inline void smpboot_clear_io_apic(void)
51{ 55{
56#ifdef CONFIG_X86_IO_APIC
52 nr_ioapics = 0; 57 nr_ioapics = 0;
58#endif
53} 59}
diff --git a/include/asm-x86/mach-visws/mach_apic.h b/include/asm-x86/mach-visws/mach_apic.h
index a9ef33a8a995..6943e7a1d0e6 100644
--- a/include/asm-x86/mach-visws/mach_apic.h
+++ b/include/asm-x86/mach-visws/mach_apic.h
@@ -1,103 +1 @@
1#ifndef __ASM_MACH_APIC_H #include "../mach-default/mach_apic.h"
2#define __ASM_MACH_APIC_H
3
4#include <mach_apicdef.h>
5#include <asm/smp.h>
6
7#define APIC_DFR_VALUE (APIC_DFR_FLAT)
8
9#define no_balance_irq (0)
10#define esr_disable (0)
11
12#define INT_DELIVERY_MODE dest_LowestPrio
13#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
14
15#ifdef CONFIG_SMP
16 #define TARGET_CPUS cpu_online_map
17#else
18 #define TARGET_CPUS cpumask_of_cpu(0)
19#endif
20
21#define check_apicid_used(bitmap, apicid) physid_isset(apicid, bitmap)
22#define check_apicid_present(bit) physid_isset(bit, phys_cpu_present_map)
23
24static inline int apic_id_registered(void)
25{
26 return physid_isset(GET_APIC_ID(read_apic_id()), phys_cpu_present_map);
27}
28
29/*
30 * Set up the logical destination ID.
31 *
32 * Intel recommends to set DFR, LDR and TPR before enabling
33 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
34 * document number 292116). So here it goes...
35 */
36static inline void init_apic_ldr(void)
37{
38 unsigned long val;
39
40 apic_write_around(APIC_DFR, APIC_DFR_VALUE);
41 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
42 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
43 apic_write_around(APIC_LDR, val);
44}
45
46static inline void summit_check(char *oem, char *productid)
47{
48}
49
50static inline void setup_apic_routing(void)
51{
52}
53
54static inline int apicid_to_node(int logical_apicid)
55{
56 return 0;
57}
58
59/* Mapping from cpu number to logical apicid */
60static inline int cpu_to_logical_apicid(int cpu)
61{
62 return 1 << cpu;
63}
64
65static inline int cpu_present_to_apicid(int mps_cpu)
66{
67 if (mps_cpu < get_physical_broadcast())
68 return mps_cpu;
69 else
70 return BAD_APICID;
71}
72
73static inline physid_mask_t apicid_to_cpu_present(int apicid)
74{
75 return physid_mask_of_physid(apicid);
76}
77
78#define WAKE_SECONDARY_VIA_INIT
79
80static inline void setup_portio_remap(void)
81{
82}
83
84static inline void enable_apic_mode(void)
85{
86}
87
88static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
89{
90 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
91}
92
93static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
94{
95 return cpus_addr(cpumask)[0];
96}
97
98static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
99{
100 return cpuid_apic >> index_msb;
101}
102
103#endif /* __ASM_MACH_APIC_H */
diff --git a/include/asm-x86/mach-visws/mach_apicdef.h b/include/asm-x86/mach-visws/mach_apicdef.h
index 826cfa97d778..42711d152a93 100644
--- a/include/asm-x86/mach-visws/mach_apicdef.h
+++ b/include/asm-x86/mach-visws/mach_apicdef.h
@@ -1,12 +1 @@
1#ifndef __ASM_MACH_APICDEF_H #include "../mach-default/mach_apicdef.h"
2#define __ASM_MACH_APICDEF_H
3
4#define APIC_ID_MASK (0xF<<24)
5
6static inline unsigned get_apic_id(unsigned long x)
7{
8 return (((x)>>24)&0xF);
9}
10#define GET_APIC_ID(x) get_apic_id(x)
11
12#endif
diff --git a/include/asm-x86/mach-visws/setup_arch.h b/include/asm-x86/mach-visws/setup_arch.h
index b8f5dd829dba..fa4766ca2d10 100644
--- a/include/asm-x86/mach-visws/setup_arch.h
+++ b/include/asm-x86/mach-visws/setup_arch.h
@@ -1,6 +1 @@
1/* Hook to call BIOS initialisation function */ #include "../mach-default/setup_arch.h"
2
3extern unsigned long sgivwfb_mem_phys;
4extern unsigned long sgivwfb_mem_size;
5
6/* no action for visws */
diff --git a/include/asm-x86/mach-visws/smpboot_hooks.h b/include/asm-x86/mach-visws/smpboot_hooks.h
index c9b83e395a2e..e4433ca88715 100644
--- a/include/asm-x86/mach-visws/smpboot_hooks.h
+++ b/include/asm-x86/mach-visws/smpboot_hooks.h
@@ -1,28 +1 @@
1static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) #include "../mach-default/smpboot_hooks.h"
2{
3 CMOS_WRITE(0xa, 0xf);
4 local_flush_tlb();
5 Dprintk("1.\n");
6 *((volatile unsigned short *) TRAMPOLINE_HIGH) = start_eip >> 4;
7 Dprintk("2.\n");
8 *((volatile unsigned short *) TRAMPOLINE_LOW) = start_eip & 0xf;
9 Dprintk("3.\n");
10}
11
12/* for visws do nothing for any of these */
13
14static inline void smpboot_clear_io_apic_irqs(void)
15{
16}
17
18static inline void smpboot_restore_warm_reset_vector(void)
19{
20}
21
22static inline void smpboot_setup_io_apic(void)
23{
24}
25
26static inline void smpboot_clear_io_apic(void)
27{
28}
diff --git a/include/asm-x86/setup.h b/include/asm-x86/setup.h
index 1d121c632d9e..90ab2225e71b 100644
--- a/include/asm-x86/setup.h
+++ b/include/asm-x86/setup.h
@@ -8,6 +8,25 @@
8/* Interrupt control for vSMPowered x86_64 systems */ 8/* Interrupt control for vSMPowered x86_64 systems */
9void vsmp_init(void); 9void vsmp_init(void);
10 10
11#ifdef CONFIG_X86_VISWS
12extern void visws_early_detect(void);
13extern int is_visws_box(void);
14#else
15static inline void visws_early_detect(void) { }
16static inline int is_visws_box(void) { return 0; }
17#endif
18
19/*
20 * Any setup quirks to be performed?
21 */
22extern int (*arch_time_init_quirk)(void);
23extern int (*arch_pre_intr_init_quirk)(void);
24extern int (*arch_intr_init_quirk)(void);
25extern int (*arch_trap_init_quirk)(void);
26extern char * (*arch_memory_setup_quirk)(void);
27extern int (*mach_get_smp_config_quirk)(unsigned int early);
28extern int (*mach_find_smp_config_quirk)(unsigned int reserve);
29
11#ifndef CONFIG_PARAVIRT 30#ifndef CONFIG_PARAVIRT
12#define paravirt_post_allocator_init() do {} while (0) 31#define paravirt_post_allocator_init() do {} while (0)
13#endif 32#endif
diff --git a/include/asm-x86/mach-visws/cobalt.h b/include/asm-x86/visws/cobalt.h
index 995258831b7f..995258831b7f 100644
--- a/include/asm-x86/mach-visws/cobalt.h
+++ b/include/asm-x86/visws/cobalt.h
diff --git a/include/asm-x86/mach-visws/lithium.h b/include/asm-x86/visws/lithium.h
index dfcd4f07ab85..dfcd4f07ab85 100644
--- a/include/asm-x86/mach-visws/lithium.h
+++ b/include/asm-x86/visws/lithium.h
diff --git a/include/asm-x86/mach-visws/piix4.h b/include/asm-x86/visws/piix4.h
index 83ea4f46e419..83ea4f46e419 100644
--- a/include/asm-x86/mach-visws/piix4.h
+++ b/include/asm-x86/visws/piix4.h
diff --git a/include/asm-x86/visws/sgivw.h b/include/asm-x86/visws/sgivw.h
new file mode 100644
index 000000000000..5fbf63e1003c
--- /dev/null
+++ b/include/asm-x86/visws/sgivw.h
@@ -0,0 +1,5 @@
1/*
2 * Frame buffer position and size:
3 */
4extern unsigned long sgivwfb_mem_phys;
5extern unsigned long sgivwfb_mem_size;