diff options
Diffstat (limited to 'include/asm-x86')
-rw-r--r-- | include/asm-x86/Kbuild | 1 | ||||
-rw-r--r-- | include/asm-x86/kvm.h | 191 | ||||
-rw-r--r-- | include/asm-x86/kvm_host.h | 611 | ||||
-rw-r--r-- | include/asm-x86/kvm_para.h | 105 | ||||
-rw-r--r-- | include/asm-x86/kvm_x86_emulate.h | 186 | ||||
-rw-r--r-- | include/asm-x86/lguest.h | 2 | ||||
-rw-r--r-- | include/asm-x86/lguest_hcall.h | 6 |
7 files changed, 1100 insertions, 2 deletions
diff --git a/include/asm-x86/Kbuild b/include/asm-x86/Kbuild index e6189b229143..3c6f0f80e827 100644 --- a/include/asm-x86/Kbuild +++ b/include/asm-x86/Kbuild | |||
@@ -3,6 +3,7 @@ include include/asm-generic/Kbuild.asm | |||
3 | header-y += boot.h | 3 | header-y += boot.h |
4 | header-y += bootparam.h | 4 | header-y += bootparam.h |
5 | header-y += debugreg.h | 5 | header-y += debugreg.h |
6 | header-y += kvm.h | ||
6 | header-y += ldt.h | 7 | header-y += ldt.h |
7 | header-y += msr-index.h | 8 | header-y += msr-index.h |
8 | header-y += prctl.h | 9 | header-y += prctl.h |
diff --git a/include/asm-x86/kvm.h b/include/asm-x86/kvm.h new file mode 100644 index 000000000000..7a71120426a3 --- /dev/null +++ b/include/asm-x86/kvm.h | |||
@@ -0,0 +1,191 @@ | |||
1 | #ifndef __LINUX_KVM_X86_H | ||
2 | #define __LINUX_KVM_X86_H | ||
3 | |||
4 | /* | ||
5 | * KVM x86 specific structures and definitions | ||
6 | * | ||
7 | */ | ||
8 | |||
9 | #include <asm/types.h> | ||
10 | #include <linux/ioctl.h> | ||
11 | |||
12 | /* Architectural interrupt line count. */ | ||
13 | #define KVM_NR_INTERRUPTS 256 | ||
14 | |||
15 | struct kvm_memory_alias { | ||
16 | __u32 slot; /* this has a different namespace than memory slots */ | ||
17 | __u32 flags; | ||
18 | __u64 guest_phys_addr; | ||
19 | __u64 memory_size; | ||
20 | __u64 target_phys_addr; | ||
21 | }; | ||
22 | |||
23 | /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */ | ||
24 | struct kvm_pic_state { | ||
25 | __u8 last_irr; /* edge detection */ | ||
26 | __u8 irr; /* interrupt request register */ | ||
27 | __u8 imr; /* interrupt mask register */ | ||
28 | __u8 isr; /* interrupt service register */ | ||
29 | __u8 priority_add; /* highest irq priority */ | ||
30 | __u8 irq_base; | ||
31 | __u8 read_reg_select; | ||
32 | __u8 poll; | ||
33 | __u8 special_mask; | ||
34 | __u8 init_state; | ||
35 | __u8 auto_eoi; | ||
36 | __u8 rotate_on_auto_eoi; | ||
37 | __u8 special_fully_nested_mode; | ||
38 | __u8 init4; /* true if 4 byte init */ | ||
39 | __u8 elcr; /* PIIX edge/trigger selection */ | ||
40 | __u8 elcr_mask; | ||
41 | }; | ||
42 | |||
43 | #define KVM_IOAPIC_NUM_PINS 24 | ||
44 | struct kvm_ioapic_state { | ||
45 | __u64 base_address; | ||
46 | __u32 ioregsel; | ||
47 | __u32 id; | ||
48 | __u32 irr; | ||
49 | __u32 pad; | ||
50 | union { | ||
51 | __u64 bits; | ||
52 | struct { | ||
53 | __u8 vector; | ||
54 | __u8 delivery_mode:3; | ||
55 | __u8 dest_mode:1; | ||
56 | __u8 delivery_status:1; | ||
57 | __u8 polarity:1; | ||
58 | __u8 remote_irr:1; | ||
59 | __u8 trig_mode:1; | ||
60 | __u8 mask:1; | ||
61 | __u8 reserve:7; | ||
62 | __u8 reserved[4]; | ||
63 | __u8 dest_id; | ||
64 | } fields; | ||
65 | } redirtbl[KVM_IOAPIC_NUM_PINS]; | ||
66 | }; | ||
67 | |||
68 | #define KVM_IRQCHIP_PIC_MASTER 0 | ||
69 | #define KVM_IRQCHIP_PIC_SLAVE 1 | ||
70 | #define KVM_IRQCHIP_IOAPIC 2 | ||
71 | |||
72 | /* for KVM_GET_REGS and KVM_SET_REGS */ | ||
73 | struct kvm_regs { | ||
74 | /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */ | ||
75 | __u64 rax, rbx, rcx, rdx; | ||
76 | __u64 rsi, rdi, rsp, rbp; | ||
77 | __u64 r8, r9, r10, r11; | ||
78 | __u64 r12, r13, r14, r15; | ||
79 | __u64 rip, rflags; | ||
80 | }; | ||
81 | |||
82 | /* for KVM_GET_LAPIC and KVM_SET_LAPIC */ | ||
83 | #define KVM_APIC_REG_SIZE 0x400 | ||
84 | struct kvm_lapic_state { | ||
85 | char regs[KVM_APIC_REG_SIZE]; | ||
86 | }; | ||
87 | |||
88 | struct kvm_segment { | ||
89 | __u64 base; | ||
90 | __u32 limit; | ||
91 | __u16 selector; | ||
92 | __u8 type; | ||
93 | __u8 present, dpl, db, s, l, g, avl; | ||
94 | __u8 unusable; | ||
95 | __u8 padding; | ||
96 | }; | ||
97 | |||
98 | struct kvm_dtable { | ||
99 | __u64 base; | ||
100 | __u16 limit; | ||
101 | __u16 padding[3]; | ||
102 | }; | ||
103 | |||
104 | |||
105 | /* for KVM_GET_SREGS and KVM_SET_SREGS */ | ||
106 | struct kvm_sregs { | ||
107 | /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */ | ||
108 | struct kvm_segment cs, ds, es, fs, gs, ss; | ||
109 | struct kvm_segment tr, ldt; | ||
110 | struct kvm_dtable gdt, idt; | ||
111 | __u64 cr0, cr2, cr3, cr4, cr8; | ||
112 | __u64 efer; | ||
113 | __u64 apic_base; | ||
114 | __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64]; | ||
115 | }; | ||
116 | |||
117 | /* for KVM_GET_FPU and KVM_SET_FPU */ | ||
118 | struct kvm_fpu { | ||
119 | __u8 fpr[8][16]; | ||
120 | __u16 fcw; | ||
121 | __u16 fsw; | ||
122 | __u8 ftwx; /* in fxsave format */ | ||
123 | __u8 pad1; | ||
124 | __u16 last_opcode; | ||
125 | __u64 last_ip; | ||
126 | __u64 last_dp; | ||
127 | __u8 xmm[16][16]; | ||
128 | __u32 mxcsr; | ||
129 | __u32 pad2; | ||
130 | }; | ||
131 | |||
132 | struct kvm_msr_entry { | ||
133 | __u32 index; | ||
134 | __u32 reserved; | ||
135 | __u64 data; | ||
136 | }; | ||
137 | |||
138 | /* for KVM_GET_MSRS and KVM_SET_MSRS */ | ||
139 | struct kvm_msrs { | ||
140 | __u32 nmsrs; /* number of msrs in entries */ | ||
141 | __u32 pad; | ||
142 | |||
143 | struct kvm_msr_entry entries[0]; | ||
144 | }; | ||
145 | |||
146 | /* for KVM_GET_MSR_INDEX_LIST */ | ||
147 | struct kvm_msr_list { | ||
148 | __u32 nmsrs; /* number of msrs in entries */ | ||
149 | __u32 indices[0]; | ||
150 | }; | ||
151 | |||
152 | |||
153 | struct kvm_cpuid_entry { | ||
154 | __u32 function; | ||
155 | __u32 eax; | ||
156 | __u32 ebx; | ||
157 | __u32 ecx; | ||
158 | __u32 edx; | ||
159 | __u32 padding; | ||
160 | }; | ||
161 | |||
162 | /* for KVM_SET_CPUID */ | ||
163 | struct kvm_cpuid { | ||
164 | __u32 nent; | ||
165 | __u32 padding; | ||
166 | struct kvm_cpuid_entry entries[0]; | ||
167 | }; | ||
168 | |||
169 | struct kvm_cpuid_entry2 { | ||
170 | __u32 function; | ||
171 | __u32 index; | ||
172 | __u32 flags; | ||
173 | __u32 eax; | ||
174 | __u32 ebx; | ||
175 | __u32 ecx; | ||
176 | __u32 edx; | ||
177 | __u32 padding[3]; | ||
178 | }; | ||
179 | |||
180 | #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1 | ||
181 | #define KVM_CPUID_FLAG_STATEFUL_FUNC 2 | ||
182 | #define KVM_CPUID_FLAG_STATE_READ_NEXT 4 | ||
183 | |||
184 | /* for KVM_SET_CPUID2 */ | ||
185 | struct kvm_cpuid2 { | ||
186 | __u32 nent; | ||
187 | __u32 padding; | ||
188 | struct kvm_cpuid_entry2 entries[0]; | ||
189 | }; | ||
190 | |||
191 | #endif | ||
diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h new file mode 100644 index 000000000000..4702b04b979a --- /dev/null +++ b/include/asm-x86/kvm_host.h | |||
@@ -0,0 +1,611 @@ | |||
1 | #/* | ||
2 | * Kernel-based Virtual Machine driver for Linux | ||
3 | * | ||
4 | * This header defines architecture specific interfaces, x86 version | ||
5 | * | ||
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | ||
7 | * the COPYING file in the top-level directory. | ||
8 | * | ||
9 | */ | ||
10 | |||
11 | #ifndef ASM_KVM_HOST_H | ||
12 | #define ASM_KVM_HOST_H | ||
13 | |||
14 | #include <linux/types.h> | ||
15 | #include <linux/mm.h> | ||
16 | |||
17 | #include <linux/kvm.h> | ||
18 | #include <linux/kvm_para.h> | ||
19 | #include <linux/kvm_types.h> | ||
20 | |||
21 | #include <asm/desc.h> | ||
22 | |||
23 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) | ||
24 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | ||
25 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS|0xFFFFFF0000000000ULL) | ||
26 | |||
27 | #define KVM_GUEST_CR0_MASK \ | ||
28 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ | ||
29 | | X86_CR0_NW | X86_CR0_CD) | ||
30 | #define KVM_VM_CR0_ALWAYS_ON \ | ||
31 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ | ||
32 | | X86_CR0_MP) | ||
33 | #define KVM_GUEST_CR4_MASK \ | ||
34 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) | ||
35 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) | ||
36 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE) | ||
37 | |||
38 | #define INVALID_PAGE (~(hpa_t)0) | ||
39 | #define UNMAPPED_GVA (~(gpa_t)0) | ||
40 | |||
41 | #define DE_VECTOR 0 | ||
42 | #define UD_VECTOR 6 | ||
43 | #define NM_VECTOR 7 | ||
44 | #define DF_VECTOR 8 | ||
45 | #define TS_VECTOR 10 | ||
46 | #define NP_VECTOR 11 | ||
47 | #define SS_VECTOR 12 | ||
48 | #define GP_VECTOR 13 | ||
49 | #define PF_VECTOR 14 | ||
50 | |||
51 | #define SELECTOR_TI_MASK (1 << 2) | ||
52 | #define SELECTOR_RPL_MASK 0x03 | ||
53 | |||
54 | #define IOPL_SHIFT 12 | ||
55 | |||
56 | #define KVM_ALIAS_SLOTS 4 | ||
57 | |||
58 | #define KVM_PERMILLE_MMU_PAGES 20 | ||
59 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | ||
60 | #define KVM_NUM_MMU_PAGES 1024 | ||
61 | #define KVM_MIN_FREE_MMU_PAGES 5 | ||
62 | #define KVM_REFILL_PAGES 25 | ||
63 | #define KVM_MAX_CPUID_ENTRIES 40 | ||
64 | |||
65 | extern spinlock_t kvm_lock; | ||
66 | extern struct list_head vm_list; | ||
67 | |||
68 | struct kvm_vcpu; | ||
69 | struct kvm; | ||
70 | |||
71 | enum { | ||
72 | VCPU_REGS_RAX = 0, | ||
73 | VCPU_REGS_RCX = 1, | ||
74 | VCPU_REGS_RDX = 2, | ||
75 | VCPU_REGS_RBX = 3, | ||
76 | VCPU_REGS_RSP = 4, | ||
77 | VCPU_REGS_RBP = 5, | ||
78 | VCPU_REGS_RSI = 6, | ||
79 | VCPU_REGS_RDI = 7, | ||
80 | #ifdef CONFIG_X86_64 | ||
81 | VCPU_REGS_R8 = 8, | ||
82 | VCPU_REGS_R9 = 9, | ||
83 | VCPU_REGS_R10 = 10, | ||
84 | VCPU_REGS_R11 = 11, | ||
85 | VCPU_REGS_R12 = 12, | ||
86 | VCPU_REGS_R13 = 13, | ||
87 | VCPU_REGS_R14 = 14, | ||
88 | VCPU_REGS_R15 = 15, | ||
89 | #endif | ||
90 | NR_VCPU_REGS | ||
91 | }; | ||
92 | |||
93 | enum { | ||
94 | VCPU_SREG_CS, | ||
95 | VCPU_SREG_DS, | ||
96 | VCPU_SREG_ES, | ||
97 | VCPU_SREG_FS, | ||
98 | VCPU_SREG_GS, | ||
99 | VCPU_SREG_SS, | ||
100 | VCPU_SREG_TR, | ||
101 | VCPU_SREG_LDTR, | ||
102 | }; | ||
103 | |||
104 | #include <asm/kvm_x86_emulate.h> | ||
105 | |||
106 | #define KVM_NR_MEM_OBJS 40 | ||
107 | |||
108 | /* | ||
109 | * We don't want allocation failures within the mmu code, so we preallocate | ||
110 | * enough memory for a single page fault in a cache. | ||
111 | */ | ||
112 | struct kvm_mmu_memory_cache { | ||
113 | int nobjs; | ||
114 | void *objects[KVM_NR_MEM_OBJS]; | ||
115 | }; | ||
116 | |||
117 | #define NR_PTE_CHAIN_ENTRIES 5 | ||
118 | |||
119 | struct kvm_pte_chain { | ||
120 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | ||
121 | struct hlist_node link; | ||
122 | }; | ||
123 | |||
124 | /* | ||
125 | * kvm_mmu_page_role, below, is defined as: | ||
126 | * | ||
127 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | ||
128 | * bits 4:7 - page table level for this shadow (1-4) | ||
129 | * bits 8:9 - page table quadrant for 2-level guests | ||
130 | * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode) | ||
131 | * bits 17:19 - common access permissions for all ptes in this shadow page | ||
132 | */ | ||
133 | union kvm_mmu_page_role { | ||
134 | unsigned word; | ||
135 | struct { | ||
136 | unsigned glevels : 4; | ||
137 | unsigned level : 4; | ||
138 | unsigned quadrant : 2; | ||
139 | unsigned pad_for_nice_hex_output : 6; | ||
140 | unsigned metaphysical : 1; | ||
141 | unsigned access : 3; | ||
142 | }; | ||
143 | }; | ||
144 | |||
145 | struct kvm_mmu_page { | ||
146 | struct list_head link; | ||
147 | struct hlist_node hash_link; | ||
148 | |||
149 | /* | ||
150 | * The following two entries are used to key the shadow page in the | ||
151 | * hash table. | ||
152 | */ | ||
153 | gfn_t gfn; | ||
154 | union kvm_mmu_page_role role; | ||
155 | |||
156 | u64 *spt; | ||
157 | /* hold the gfn of each spte inside spt */ | ||
158 | gfn_t *gfns; | ||
159 | unsigned long slot_bitmap; /* One bit set per slot which has memory | ||
160 | * in this shadow page. | ||
161 | */ | ||
162 | int multimapped; /* More than one parent_pte? */ | ||
163 | int root_count; /* Currently serving as active root */ | ||
164 | union { | ||
165 | u64 *parent_pte; /* !multimapped */ | ||
166 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | ||
167 | }; | ||
168 | }; | ||
169 | |||
170 | /* | ||
171 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | ||
172 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | ||
173 | * mode. | ||
174 | */ | ||
175 | struct kvm_mmu { | ||
176 | void (*new_cr3)(struct kvm_vcpu *vcpu); | ||
177 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | ||
178 | void (*free)(struct kvm_vcpu *vcpu); | ||
179 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | ||
180 | void (*prefetch_page)(struct kvm_vcpu *vcpu, | ||
181 | struct kvm_mmu_page *page); | ||
182 | hpa_t root_hpa; | ||
183 | int root_level; | ||
184 | int shadow_root_level; | ||
185 | |||
186 | u64 *pae_root; | ||
187 | }; | ||
188 | |||
189 | struct kvm_vcpu_arch { | ||
190 | u64 host_tsc; | ||
191 | int interrupt_window_open; | ||
192 | unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */ | ||
193 | DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS); | ||
194 | unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */ | ||
195 | unsigned long rip; /* needs vcpu_load_rsp_rip() */ | ||
196 | |||
197 | unsigned long cr0; | ||
198 | unsigned long cr2; | ||
199 | unsigned long cr3; | ||
200 | unsigned long cr4; | ||
201 | unsigned long cr8; | ||
202 | u64 pdptrs[4]; /* pae */ | ||
203 | u64 shadow_efer; | ||
204 | u64 apic_base; | ||
205 | struct kvm_lapic *apic; /* kernel irqchip context */ | ||
206 | #define VCPU_MP_STATE_RUNNABLE 0 | ||
207 | #define VCPU_MP_STATE_UNINITIALIZED 1 | ||
208 | #define VCPU_MP_STATE_INIT_RECEIVED 2 | ||
209 | #define VCPU_MP_STATE_SIPI_RECEIVED 3 | ||
210 | #define VCPU_MP_STATE_HALTED 4 | ||
211 | int mp_state; | ||
212 | int sipi_vector; | ||
213 | u64 ia32_misc_enable_msr; | ||
214 | bool tpr_access_reporting; | ||
215 | |||
216 | struct kvm_mmu mmu; | ||
217 | |||
218 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | ||
219 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | ||
220 | struct kvm_mmu_memory_cache mmu_page_cache; | ||
221 | struct kvm_mmu_memory_cache mmu_page_header_cache; | ||
222 | |||
223 | gfn_t last_pt_write_gfn; | ||
224 | int last_pt_write_count; | ||
225 | u64 *last_pte_updated; | ||
226 | |||
227 | struct { | ||
228 | gfn_t gfn; /* presumed gfn during guest pte update */ | ||
229 | struct page *page; /* page corresponding to that gfn */ | ||
230 | } update_pte; | ||
231 | |||
232 | struct i387_fxsave_struct host_fx_image; | ||
233 | struct i387_fxsave_struct guest_fx_image; | ||
234 | |||
235 | gva_t mmio_fault_cr2; | ||
236 | struct kvm_pio_request pio; | ||
237 | void *pio_data; | ||
238 | |||
239 | struct kvm_queued_exception { | ||
240 | bool pending; | ||
241 | bool has_error_code; | ||
242 | u8 nr; | ||
243 | u32 error_code; | ||
244 | } exception; | ||
245 | |||
246 | struct { | ||
247 | int active; | ||
248 | u8 save_iopl; | ||
249 | struct kvm_save_segment { | ||
250 | u16 selector; | ||
251 | unsigned long base; | ||
252 | u32 limit; | ||
253 | u32 ar; | ||
254 | } tr, es, ds, fs, gs; | ||
255 | } rmode; | ||
256 | int halt_request; /* real mode on Intel only */ | ||
257 | |||
258 | int cpuid_nent; | ||
259 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; | ||
260 | /* emulate context */ | ||
261 | |||
262 | struct x86_emulate_ctxt emulate_ctxt; | ||
263 | }; | ||
264 | |||
265 | struct kvm_mem_alias { | ||
266 | gfn_t base_gfn; | ||
267 | unsigned long npages; | ||
268 | gfn_t target_gfn; | ||
269 | }; | ||
270 | |||
271 | struct kvm_arch{ | ||
272 | int naliases; | ||
273 | struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS]; | ||
274 | |||
275 | unsigned int n_free_mmu_pages; | ||
276 | unsigned int n_requested_mmu_pages; | ||
277 | unsigned int n_alloc_mmu_pages; | ||
278 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; | ||
279 | /* | ||
280 | * Hash table of struct kvm_mmu_page. | ||
281 | */ | ||
282 | struct list_head active_mmu_pages; | ||
283 | struct kvm_pic *vpic; | ||
284 | struct kvm_ioapic *vioapic; | ||
285 | |||
286 | int round_robin_prev_vcpu; | ||
287 | unsigned int tss_addr; | ||
288 | struct page *apic_access_page; | ||
289 | }; | ||
290 | |||
291 | struct kvm_vm_stat { | ||
292 | u32 mmu_shadow_zapped; | ||
293 | u32 mmu_pte_write; | ||
294 | u32 mmu_pte_updated; | ||
295 | u32 mmu_pde_zapped; | ||
296 | u32 mmu_flooded; | ||
297 | u32 mmu_recycled; | ||
298 | u32 mmu_cache_miss; | ||
299 | u32 remote_tlb_flush; | ||
300 | }; | ||
301 | |||
302 | struct kvm_vcpu_stat { | ||
303 | u32 pf_fixed; | ||
304 | u32 pf_guest; | ||
305 | u32 tlb_flush; | ||
306 | u32 invlpg; | ||
307 | |||
308 | u32 exits; | ||
309 | u32 io_exits; | ||
310 | u32 mmio_exits; | ||
311 | u32 signal_exits; | ||
312 | u32 irq_window_exits; | ||
313 | u32 halt_exits; | ||
314 | u32 halt_wakeup; | ||
315 | u32 request_irq_exits; | ||
316 | u32 irq_exits; | ||
317 | u32 host_state_reload; | ||
318 | u32 efer_reload; | ||
319 | u32 fpu_reload; | ||
320 | u32 insn_emulation; | ||
321 | u32 insn_emulation_fail; | ||
322 | }; | ||
323 | |||
324 | struct descriptor_table { | ||
325 | u16 limit; | ||
326 | unsigned long base; | ||
327 | } __attribute__((packed)); | ||
328 | |||
329 | struct kvm_x86_ops { | ||
330 | int (*cpu_has_kvm_support)(void); /* __init */ | ||
331 | int (*disabled_by_bios)(void); /* __init */ | ||
332 | void (*hardware_enable)(void *dummy); /* __init */ | ||
333 | void (*hardware_disable)(void *dummy); | ||
334 | void (*check_processor_compatibility)(void *rtn); | ||
335 | int (*hardware_setup)(void); /* __init */ | ||
336 | void (*hardware_unsetup)(void); /* __exit */ | ||
337 | bool (*cpu_has_accelerated_tpr)(void); | ||
338 | |||
339 | /* Create, but do not attach this VCPU */ | ||
340 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | ||
341 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | ||
342 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | ||
343 | |||
344 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | ||
345 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | ||
346 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | ||
347 | void (*vcpu_decache)(struct kvm_vcpu *vcpu); | ||
348 | |||
349 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | ||
350 | struct kvm_debug_guest *dbg); | ||
351 | void (*guest_debug_pre)(struct kvm_vcpu *vcpu); | ||
352 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); | ||
353 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | ||
354 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | ||
355 | void (*get_segment)(struct kvm_vcpu *vcpu, | ||
356 | struct kvm_segment *var, int seg); | ||
357 | void (*set_segment)(struct kvm_vcpu *vcpu, | ||
358 | struct kvm_segment *var, int seg); | ||
359 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | ||
360 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); | ||
361 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | ||
362 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | ||
363 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | ||
364 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | ||
365 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | ||
366 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | ||
367 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | ||
368 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | ||
369 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | ||
370 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | ||
371 | int *exception); | ||
372 | void (*cache_regs)(struct kvm_vcpu *vcpu); | ||
373 | void (*decache_regs)(struct kvm_vcpu *vcpu); | ||
374 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); | ||
375 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | ||
376 | |||
377 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | ||
378 | |||
379 | void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run); | ||
380 | int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); | ||
381 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | ||
382 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, | ||
383 | unsigned char *hypercall_addr); | ||
384 | int (*get_irq)(struct kvm_vcpu *vcpu); | ||
385 | void (*set_irq)(struct kvm_vcpu *vcpu, int vec); | ||
386 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, | ||
387 | bool has_error_code, u32 error_code); | ||
388 | bool (*exception_injected)(struct kvm_vcpu *vcpu); | ||
389 | void (*inject_pending_irq)(struct kvm_vcpu *vcpu); | ||
390 | void (*inject_pending_vectors)(struct kvm_vcpu *vcpu, | ||
391 | struct kvm_run *run); | ||
392 | |||
393 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); | ||
394 | }; | ||
395 | |||
396 | extern struct kvm_x86_ops *kvm_x86_ops; | ||
397 | |||
398 | int kvm_mmu_module_init(void); | ||
399 | void kvm_mmu_module_exit(void); | ||
400 | |||
401 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | ||
402 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | ||
403 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | ||
404 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | ||
405 | |||
406 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | ||
407 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | ||
408 | void kvm_mmu_zap_all(struct kvm *kvm); | ||
409 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); | ||
410 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); | ||
411 | |||
412 | enum emulation_result { | ||
413 | EMULATE_DONE, /* no further processing */ | ||
414 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | ||
415 | EMULATE_FAIL, /* can't emulate this instruction */ | ||
416 | }; | ||
417 | |||
418 | #define EMULTYPE_NO_DECODE (1 << 0) | ||
419 | #define EMULTYPE_TRAP_UD (1 << 1) | ||
420 | int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run, | ||
421 | unsigned long cr2, u16 error_code, int emulation_type); | ||
422 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); | ||
423 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | ||
424 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | ||
425 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | ||
426 | unsigned long *rflags); | ||
427 | |||
428 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | ||
429 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | ||
430 | unsigned long *rflags); | ||
431 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); | ||
432 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | ||
433 | |||
434 | struct x86_emulate_ctxt; | ||
435 | |||
436 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | ||
437 | int size, unsigned port); | ||
438 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | ||
439 | int size, unsigned long count, int down, | ||
440 | gva_t address, int rep, unsigned port); | ||
441 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | ||
442 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | ||
443 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | ||
444 | int emulate_clts(struct kvm_vcpu *vcpu); | ||
445 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, | ||
446 | unsigned long *dest); | ||
447 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | ||
448 | unsigned long value); | ||
449 | |||
450 | void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); | ||
451 | void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0); | ||
452 | void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0); | ||
453 | void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0); | ||
454 | unsigned long get_cr8(struct kvm_vcpu *vcpu); | ||
455 | void lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | ||
456 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); | ||
457 | |||
458 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | ||
459 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | ||
460 | |||
461 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); | ||
462 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | ||
463 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, | ||
464 | u32 error_code); | ||
465 | |||
466 | void fx_init(struct kvm_vcpu *vcpu); | ||
467 | |||
468 | int emulator_read_std(unsigned long addr, | ||
469 | void *val, | ||
470 | unsigned int bytes, | ||
471 | struct kvm_vcpu *vcpu); | ||
472 | int emulator_write_emulated(unsigned long addr, | ||
473 | const void *val, | ||
474 | unsigned int bytes, | ||
475 | struct kvm_vcpu *vcpu); | ||
476 | |||
477 | unsigned long segment_base(u16 selector); | ||
478 | |||
479 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); | ||
480 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, | ||
481 | const u8 *new, int bytes); | ||
482 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); | ||
483 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | ||
484 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | ||
485 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | ||
486 | |||
487 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | ||
488 | |||
489 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | ||
490 | |||
491 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); | ||
492 | |||
493 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); | ||
494 | int complete_pio(struct kvm_vcpu *vcpu); | ||
495 | |||
496 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | ||
497 | { | ||
498 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | ||
499 | |||
500 | return (struct kvm_mmu_page *)page_private(page); | ||
501 | } | ||
502 | |||
503 | static inline u16 read_fs(void) | ||
504 | { | ||
505 | u16 seg; | ||
506 | asm("mov %%fs, %0" : "=g"(seg)); | ||
507 | return seg; | ||
508 | } | ||
509 | |||
510 | static inline u16 read_gs(void) | ||
511 | { | ||
512 | u16 seg; | ||
513 | asm("mov %%gs, %0" : "=g"(seg)); | ||
514 | return seg; | ||
515 | } | ||
516 | |||
517 | static inline u16 read_ldt(void) | ||
518 | { | ||
519 | u16 ldt; | ||
520 | asm("sldt %0" : "=g"(ldt)); | ||
521 | return ldt; | ||
522 | } | ||
523 | |||
524 | static inline void load_fs(u16 sel) | ||
525 | { | ||
526 | asm("mov %0, %%fs" : : "rm"(sel)); | ||
527 | } | ||
528 | |||
529 | static inline void load_gs(u16 sel) | ||
530 | { | ||
531 | asm("mov %0, %%gs" : : "rm"(sel)); | ||
532 | } | ||
533 | |||
534 | #ifndef load_ldt | ||
535 | static inline void load_ldt(u16 sel) | ||
536 | { | ||
537 | asm("lldt %0" : : "rm"(sel)); | ||
538 | } | ||
539 | #endif | ||
540 | |||
541 | static inline void get_idt(struct descriptor_table *table) | ||
542 | { | ||
543 | asm("sidt %0" : "=m"(*table)); | ||
544 | } | ||
545 | |||
546 | static inline void get_gdt(struct descriptor_table *table) | ||
547 | { | ||
548 | asm("sgdt %0" : "=m"(*table)); | ||
549 | } | ||
550 | |||
551 | static inline unsigned long read_tr_base(void) | ||
552 | { | ||
553 | u16 tr; | ||
554 | asm("str %0" : "=g"(tr)); | ||
555 | return segment_base(tr); | ||
556 | } | ||
557 | |||
558 | #ifdef CONFIG_X86_64 | ||
559 | static inline unsigned long read_msr(unsigned long msr) | ||
560 | { | ||
561 | u64 value; | ||
562 | |||
563 | rdmsrl(msr, value); | ||
564 | return value; | ||
565 | } | ||
566 | #endif | ||
567 | |||
568 | static inline void fx_save(struct i387_fxsave_struct *image) | ||
569 | { | ||
570 | asm("fxsave (%0)":: "r" (image)); | ||
571 | } | ||
572 | |||
573 | static inline void fx_restore(struct i387_fxsave_struct *image) | ||
574 | { | ||
575 | asm("fxrstor (%0)":: "r" (image)); | ||
576 | } | ||
577 | |||
578 | static inline void fpu_init(void) | ||
579 | { | ||
580 | asm("finit"); | ||
581 | } | ||
582 | |||
583 | static inline u32 get_rdx_init_val(void) | ||
584 | { | ||
585 | return 0x600; /* P6 family */ | ||
586 | } | ||
587 | |||
588 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) | ||
589 | { | ||
590 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | ||
591 | } | ||
592 | |||
593 | #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30" | ||
594 | #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2" | ||
595 | #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3" | ||
596 | #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30" | ||
597 | #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0" | ||
598 | #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0" | ||
599 | #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4" | ||
600 | #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4" | ||
601 | #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30" | ||
602 | |||
603 | #define MSR_IA32_TIME_STAMP_COUNTER 0x010 | ||
604 | |||
605 | #define TSS_IOPB_BASE_OFFSET 0x66 | ||
606 | #define TSS_BASE_SIZE 0x68 | ||
607 | #define TSS_IOPB_SIZE (65536 / 8) | ||
608 | #define TSS_REDIRECTION_SIZE (256 / 8) | ||
609 | #define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | ||
610 | |||
611 | #endif | ||
diff --git a/include/asm-x86/kvm_para.h b/include/asm-x86/kvm_para.h new file mode 100644 index 000000000000..c6f3fd8d8c53 --- /dev/null +++ b/include/asm-x86/kvm_para.h | |||
@@ -0,0 +1,105 @@ | |||
1 | #ifndef __X86_KVM_PARA_H | ||
2 | #define __X86_KVM_PARA_H | ||
3 | |||
4 | /* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It | ||
5 | * should be used to determine that a VM is running under KVM. | ||
6 | */ | ||
7 | #define KVM_CPUID_SIGNATURE 0x40000000 | ||
8 | |||
9 | /* This CPUID returns a feature bitmap in eax. Before enabling a particular | ||
10 | * paravirtualization, the appropriate feature bit should be checked. | ||
11 | */ | ||
12 | #define KVM_CPUID_FEATURES 0x40000001 | ||
13 | |||
14 | #ifdef __KERNEL__ | ||
15 | #include <asm/processor.h> | ||
16 | |||
17 | /* This instruction is vmcall. On non-VT architectures, it will generate a | ||
18 | * trap that we will then rewrite to the appropriate instruction. | ||
19 | */ | ||
20 | #define KVM_HYPERCALL ".byte 0x0f,0x01,0xc1" | ||
21 | |||
22 | /* For KVM hypercalls, a three-byte sequence of either the vmrun or the vmmrun | ||
23 | * instruction. The hypervisor may replace it with something else but only the | ||
24 | * instructions are guaranteed to be supported. | ||
25 | * | ||
26 | * Up to four arguments may be passed in rbx, rcx, rdx, and rsi respectively. | ||
27 | * The hypercall number should be placed in rax and the return value will be | ||
28 | * placed in rax. No other registers will be clobbered unless explicited | ||
29 | * noted by the particular hypercall. | ||
30 | */ | ||
31 | |||
32 | static inline long kvm_hypercall0(unsigned int nr) | ||
33 | { | ||
34 | long ret; | ||
35 | asm volatile(KVM_HYPERCALL | ||
36 | : "=a"(ret) | ||
37 | : "a"(nr)); | ||
38 | return ret; | ||
39 | } | ||
40 | |||
41 | static inline long kvm_hypercall1(unsigned int nr, unsigned long p1) | ||
42 | { | ||
43 | long ret; | ||
44 | asm volatile(KVM_HYPERCALL | ||
45 | : "=a"(ret) | ||
46 | : "a"(nr), "b"(p1)); | ||
47 | return ret; | ||
48 | } | ||
49 | |||
50 | static inline long kvm_hypercall2(unsigned int nr, unsigned long p1, | ||
51 | unsigned long p2) | ||
52 | { | ||
53 | long ret; | ||
54 | asm volatile(KVM_HYPERCALL | ||
55 | : "=a"(ret) | ||
56 | : "a"(nr), "b"(p1), "c"(p2)); | ||
57 | return ret; | ||
58 | } | ||
59 | |||
60 | static inline long kvm_hypercall3(unsigned int nr, unsigned long p1, | ||
61 | unsigned long p2, unsigned long p3) | ||
62 | { | ||
63 | long ret; | ||
64 | asm volatile(KVM_HYPERCALL | ||
65 | : "=a"(ret) | ||
66 | : "a"(nr), "b"(p1), "c"(p2), "d"(p3)); | ||
67 | return ret; | ||
68 | } | ||
69 | |||
70 | static inline long kvm_hypercall4(unsigned int nr, unsigned long p1, | ||
71 | unsigned long p2, unsigned long p3, | ||
72 | unsigned long p4) | ||
73 | { | ||
74 | long ret; | ||
75 | asm volatile(KVM_HYPERCALL | ||
76 | : "=a"(ret) | ||
77 | : "a"(nr), "b"(p1), "c"(p2), "d"(p3), "S"(p4)); | ||
78 | return ret; | ||
79 | } | ||
80 | |||
81 | static inline int kvm_para_available(void) | ||
82 | { | ||
83 | unsigned int eax, ebx, ecx, edx; | ||
84 | char signature[13]; | ||
85 | |||
86 | cpuid(KVM_CPUID_SIGNATURE, &eax, &ebx, &ecx, &edx); | ||
87 | memcpy(signature + 0, &ebx, 4); | ||
88 | memcpy(signature + 4, &ecx, 4); | ||
89 | memcpy(signature + 8, &edx, 4); | ||
90 | signature[12] = 0; | ||
91 | |||
92 | if (strcmp(signature, "KVMKVMKVM") == 0) | ||
93 | return 1; | ||
94 | |||
95 | return 0; | ||
96 | } | ||
97 | |||
98 | static inline unsigned int kvm_arch_para_features(void) | ||
99 | { | ||
100 | return cpuid_eax(KVM_CPUID_FEATURES); | ||
101 | } | ||
102 | |||
103 | #endif | ||
104 | |||
105 | #endif | ||
diff --git a/include/asm-x86/kvm_x86_emulate.h b/include/asm-x86/kvm_x86_emulate.h new file mode 100644 index 000000000000..7db91b9bdcd4 --- /dev/null +++ b/include/asm-x86/kvm_x86_emulate.h | |||
@@ -0,0 +1,186 @@ | |||
1 | /****************************************************************************** | ||
2 | * x86_emulate.h | ||
3 | * | ||
4 | * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. | ||
5 | * | ||
6 | * Copyright (c) 2005 Keir Fraser | ||
7 | * | ||
8 | * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4 | ||
9 | */ | ||
10 | |||
11 | #ifndef __X86_EMULATE_H__ | ||
12 | #define __X86_EMULATE_H__ | ||
13 | |||
14 | struct x86_emulate_ctxt; | ||
15 | |||
16 | /* | ||
17 | * x86_emulate_ops: | ||
18 | * | ||
19 | * These operations represent the instruction emulator's interface to memory. | ||
20 | * There are two categories of operation: those that act on ordinary memory | ||
21 | * regions (*_std), and those that act on memory regions known to require | ||
22 | * special treatment or emulation (*_emulated). | ||
23 | * | ||
24 | * The emulator assumes that an instruction accesses only one 'emulated memory' | ||
25 | * location, that this location is the given linear faulting address (cr2), and | ||
26 | * that this is one of the instruction's data operands. Instruction fetches and | ||
27 | * stack operations are assumed never to access emulated memory. The emulator | ||
28 | * automatically deduces which operand of a string-move operation is accessing | ||
29 | * emulated memory, and assumes that the other operand accesses normal memory. | ||
30 | * | ||
31 | * NOTES: | ||
32 | * 1. The emulator isn't very smart about emulated vs. standard memory. | ||
33 | * 'Emulated memory' access addresses should be checked for sanity. | ||
34 | * 'Normal memory' accesses may fault, and the caller must arrange to | ||
35 | * detect and handle reentrancy into the emulator via recursive faults. | ||
36 | * Accesses may be unaligned and may cross page boundaries. | ||
37 | * 2. If the access fails (cannot emulate, or a standard access faults) then | ||
38 | * it is up to the memop to propagate the fault to the guest VM via | ||
39 | * some out-of-band mechanism, unknown to the emulator. The memop signals | ||
40 | * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will | ||
41 | * then immediately bail. | ||
42 | * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only | ||
43 | * cmpxchg8b_emulated need support 8-byte accesses. | ||
44 | * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system. | ||
45 | */ | ||
46 | /* Access completed successfully: continue emulation as normal. */ | ||
47 | #define X86EMUL_CONTINUE 0 | ||
48 | /* Access is unhandleable: bail from emulation and return error to caller. */ | ||
49 | #define X86EMUL_UNHANDLEABLE 1 | ||
50 | /* Terminate emulation but return success to the caller. */ | ||
51 | #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */ | ||
52 | #define X86EMUL_RETRY_INSTR 2 /* retry the instruction for some reason */ | ||
53 | #define X86EMUL_CMPXCHG_FAILED 2 /* cmpxchg did not see expected value */ | ||
54 | struct x86_emulate_ops { | ||
55 | /* | ||
56 | * read_std: Read bytes of standard (non-emulated/special) memory. | ||
57 | * Used for instruction fetch, stack operations, and others. | ||
58 | * @addr: [IN ] Linear address from which to read. | ||
59 | * @val: [OUT] Value read from memory, zero-extended to 'u_long'. | ||
60 | * @bytes: [IN ] Number of bytes to read from memory. | ||
61 | */ | ||
62 | int (*read_std)(unsigned long addr, void *val, | ||
63 | unsigned int bytes, struct kvm_vcpu *vcpu); | ||
64 | |||
65 | /* | ||
66 | * read_emulated: Read bytes from emulated/special memory area. | ||
67 | * @addr: [IN ] Linear address from which to read. | ||
68 | * @val: [OUT] Value read from memory, zero-extended to 'u_long'. | ||
69 | * @bytes: [IN ] Number of bytes to read from memory. | ||
70 | */ | ||
71 | int (*read_emulated) (unsigned long addr, | ||
72 | void *val, | ||
73 | unsigned int bytes, | ||
74 | struct kvm_vcpu *vcpu); | ||
75 | |||
76 | /* | ||
77 | * write_emulated: Read bytes from emulated/special memory area. | ||
78 | * @addr: [IN ] Linear address to which to write. | ||
79 | * @val: [IN ] Value to write to memory (low-order bytes used as | ||
80 | * required). | ||
81 | * @bytes: [IN ] Number of bytes to write to memory. | ||
82 | */ | ||
83 | int (*write_emulated) (unsigned long addr, | ||
84 | const void *val, | ||
85 | unsigned int bytes, | ||
86 | struct kvm_vcpu *vcpu); | ||
87 | |||
88 | /* | ||
89 | * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an | ||
90 | * emulated/special memory area. | ||
91 | * @addr: [IN ] Linear address to access. | ||
92 | * @old: [IN ] Value expected to be current at @addr. | ||
93 | * @new: [IN ] Value to write to @addr. | ||
94 | * @bytes: [IN ] Number of bytes to access using CMPXCHG. | ||
95 | */ | ||
96 | int (*cmpxchg_emulated) (unsigned long addr, | ||
97 | const void *old, | ||
98 | const void *new, | ||
99 | unsigned int bytes, | ||
100 | struct kvm_vcpu *vcpu); | ||
101 | |||
102 | }; | ||
103 | |||
104 | /* Type, address-of, and value of an instruction's operand. */ | ||
105 | struct operand { | ||
106 | enum { OP_REG, OP_MEM, OP_IMM, OP_NONE } type; | ||
107 | unsigned int bytes; | ||
108 | unsigned long val, orig_val, *ptr; | ||
109 | }; | ||
110 | |||
111 | struct fetch_cache { | ||
112 | u8 data[15]; | ||
113 | unsigned long start; | ||
114 | unsigned long end; | ||
115 | }; | ||
116 | |||
117 | struct decode_cache { | ||
118 | u8 twobyte; | ||
119 | u8 b; | ||
120 | u8 lock_prefix; | ||
121 | u8 rep_prefix; | ||
122 | u8 op_bytes; | ||
123 | u8 ad_bytes; | ||
124 | u8 rex_prefix; | ||
125 | struct operand src; | ||
126 | struct operand dst; | ||
127 | unsigned long *override_base; | ||
128 | unsigned int d; | ||
129 | unsigned long regs[NR_VCPU_REGS]; | ||
130 | unsigned long eip; | ||
131 | /* modrm */ | ||
132 | u8 modrm; | ||
133 | u8 modrm_mod; | ||
134 | u8 modrm_reg; | ||
135 | u8 modrm_rm; | ||
136 | u8 use_modrm_ea; | ||
137 | unsigned long modrm_ea; | ||
138 | unsigned long modrm_val; | ||
139 | struct fetch_cache fetch; | ||
140 | }; | ||
141 | |||
142 | struct x86_emulate_ctxt { | ||
143 | /* Register state before/after emulation. */ | ||
144 | struct kvm_vcpu *vcpu; | ||
145 | |||
146 | /* Linear faulting address (if emulating a page-faulting instruction). */ | ||
147 | unsigned long eflags; | ||
148 | |||
149 | /* Emulated execution mode, represented by an X86EMUL_MODE value. */ | ||
150 | int mode; | ||
151 | |||
152 | unsigned long cs_base; | ||
153 | unsigned long ds_base; | ||
154 | unsigned long es_base; | ||
155 | unsigned long ss_base; | ||
156 | unsigned long gs_base; | ||
157 | unsigned long fs_base; | ||
158 | |||
159 | /* decode cache */ | ||
160 | |||
161 | struct decode_cache decode; | ||
162 | }; | ||
163 | |||
164 | /* Repeat String Operation Prefix */ | ||
165 | #define REPE_PREFIX 1 | ||
166 | #define REPNE_PREFIX 2 | ||
167 | |||
168 | /* Execution mode, passed to the emulator. */ | ||
169 | #define X86EMUL_MODE_REAL 0 /* Real mode. */ | ||
170 | #define X86EMUL_MODE_PROT16 2 /* 16-bit protected mode. */ | ||
171 | #define X86EMUL_MODE_PROT32 4 /* 32-bit protected mode. */ | ||
172 | #define X86EMUL_MODE_PROT64 8 /* 64-bit (long) mode. */ | ||
173 | |||
174 | /* Host execution mode. */ | ||
175 | #if defined(__i386__) | ||
176 | #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32 | ||
177 | #elif defined(CONFIG_X86_64) | ||
178 | #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64 | ||
179 | #endif | ||
180 | |||
181 | int x86_decode_insn(struct x86_emulate_ctxt *ctxt, | ||
182 | struct x86_emulate_ops *ops); | ||
183 | int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, | ||
184 | struct x86_emulate_ops *ops); | ||
185 | |||
186 | #endif /* __X86_EMULATE_H__ */ | ||
diff --git a/include/asm-x86/lguest.h b/include/asm-x86/lguest.h index 1c8367a692f6..4d9367b72976 100644 --- a/include/asm-x86/lguest.h +++ b/include/asm-x86/lguest.h | |||
@@ -56,7 +56,7 @@ struct lguest_ro_state | |||
56 | struct desc_struct guest_gdt[GDT_ENTRIES]; | 56 | struct desc_struct guest_gdt[GDT_ENTRIES]; |
57 | }; | 57 | }; |
58 | 58 | ||
59 | struct lguest_arch | 59 | struct lg_cpu_arch |
60 | { | 60 | { |
61 | /* The GDT entries copied into lguest_ro_state when running. */ | 61 | /* The GDT entries copied into lguest_ro_state when running. */ |
62 | struct desc_struct gdt[GDT_ENTRIES]; | 62 | struct desc_struct gdt[GDT_ENTRIES]; |
diff --git a/include/asm-x86/lguest_hcall.h b/include/asm-x86/lguest_hcall.h index 2091779e91fb..758b9a5d4539 100644 --- a/include/asm-x86/lguest_hcall.h +++ b/include/asm-x86/lguest_hcall.h | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | #define LHCALL_FLUSH_ASYNC 0 | 5 | #define LHCALL_FLUSH_ASYNC 0 |
6 | #define LHCALL_LGUEST_INIT 1 | 6 | #define LHCALL_LGUEST_INIT 1 |
7 | #define LHCALL_CRASH 2 | 7 | #define LHCALL_SHUTDOWN 2 |
8 | #define LHCALL_LOAD_GDT 3 | 8 | #define LHCALL_LOAD_GDT 3 |
9 | #define LHCALL_NEW_PGTABLE 4 | 9 | #define LHCALL_NEW_PGTABLE 4 |
10 | #define LHCALL_FLUSH_TLB 5 | 10 | #define LHCALL_FLUSH_TLB 5 |
@@ -20,6 +20,10 @@ | |||
20 | 20 | ||
21 | #define LGUEST_TRAP_ENTRY 0x1F | 21 | #define LGUEST_TRAP_ENTRY 0x1F |
22 | 22 | ||
23 | /* Argument number 3 to LHCALL_LGUEST_SHUTDOWN */ | ||
24 | #define LGUEST_SHUTDOWN_POWEROFF 1 | ||
25 | #define LGUEST_SHUTDOWN_RESTART 2 | ||
26 | |||
23 | #ifndef __ASSEMBLY__ | 27 | #ifndef __ASSEMBLY__ |
24 | #include <asm/hw_irq.h> | 28 | #include <asm/hw_irq.h> |
25 | 29 | ||