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-rw-r--r--include/asm-x86/cmpxchg_32.h32
-rw-r--r--include/asm-x86/e820_32.h2
-rw-r--r--include/asm-x86/e820_64.h2
-rw-r--r--include/asm-x86/io_32.h6
-rw-r--r--include/asm-x86/io_64.h6
-rw-r--r--include/asm-x86/page.h4
-rw-r--r--include/asm-x86/pgtable.h2
-rw-r--r--include/asm-x86/sync_bitops.h9
8 files changed, 35 insertions, 28 deletions
diff --git a/include/asm-x86/cmpxchg_32.h b/include/asm-x86/cmpxchg_32.h
index cea1dae288a7..959fad00dff5 100644
--- a/include/asm-x86/cmpxchg_32.h
+++ b/include/asm-x86/cmpxchg_32.h
@@ -269,22 +269,26 @@ static inline unsigned long cmpxchg_386(volatile void *ptr, unsigned long old,
269({ \ 269({ \
270 __typeof__(*(ptr)) __ret; \ 270 __typeof__(*(ptr)) __ret; \
271 if (likely(boot_cpu_data.x86 > 3)) \ 271 if (likely(boot_cpu_data.x86 > 3)) \
272 __ret = __cmpxchg((ptr), (unsigned long)(o), \ 272 __ret = (__typeof__(*(ptr)))__cmpxchg((ptr), \
273 (unsigned long)(n), sizeof(*(ptr))); \ 273 (unsigned long)(o), (unsigned long)(n), \
274 sizeof(*(ptr))); \
274 else \ 275 else \
275 __ret = cmpxchg_386((ptr), (unsigned long)(o), \ 276 __ret = (__typeof__(*(ptr)))cmpxchg_386((ptr), \
276 (unsigned long)(n), sizeof(*(ptr))); \ 277 (unsigned long)(o), (unsigned long)(n), \
278 sizeof(*(ptr))); \
277 __ret; \ 279 __ret; \
278}) 280})
279#define cmpxchg_local(ptr, o, n) \ 281#define cmpxchg_local(ptr, o, n) \
280({ \ 282({ \
281 __typeof__(*(ptr)) __ret; \ 283 __typeof__(*(ptr)) __ret; \
282 if (likely(boot_cpu_data.x86 > 3)) \ 284 if (likely(boot_cpu_data.x86 > 3)) \
283 __ret = __cmpxchg_local((ptr), (unsigned long)(o), \ 285 __ret = (__typeof__(*(ptr)))__cmpxchg_local((ptr), \
284 (unsigned long)(n), sizeof(*(ptr))); \ 286 (unsigned long)(o), (unsigned long)(n), \
287 sizeof(*(ptr))); \
285 else \ 288 else \
286 __ret = cmpxchg_386((ptr), (unsigned long)(o), \ 289 __ret = (__typeof__(*(ptr)))cmpxchg_386((ptr), \
287 (unsigned long)(n), sizeof(*(ptr))); \ 290 (unsigned long)(o), (unsigned long)(n), \
291 sizeof(*(ptr))); \
288 __ret; \ 292 __ret; \
289}) 293})
290#endif 294#endif
@@ -301,10 +305,12 @@ extern unsigned long long cmpxchg_486_u64(volatile void *, u64, u64);
301({ \ 305({ \
302 __typeof__(*(ptr)) __ret; \ 306 __typeof__(*(ptr)) __ret; \
303 if (likely(boot_cpu_data.x86 > 4)) \ 307 if (likely(boot_cpu_data.x86 > 4)) \
304 __ret = __cmpxchg64((ptr), (unsigned long long)(o), \ 308 __ret = (__typeof__(*(ptr)))__cmpxchg64((ptr), \
309 (unsigned long long)(o), \
305 (unsigned long long)(n)); \ 310 (unsigned long long)(n)); \
306 else \ 311 else \
307 __ret = cmpxchg_486_u64((ptr), (unsigned long long)(o), \ 312 __ret = (__typeof__(*(ptr)))cmpxchg_486_u64((ptr), \
313 (unsigned long long)(o), \
308 (unsigned long long)(n)); \ 314 (unsigned long long)(n)); \
309 __ret; \ 315 __ret; \
310}) 316})
@@ -312,10 +318,12 @@ extern unsigned long long cmpxchg_486_u64(volatile void *, u64, u64);
312({ \ 318({ \
313 __typeof__(*(ptr)) __ret; \ 319 __typeof__(*(ptr)) __ret; \
314 if (likely(boot_cpu_data.x86 > 4)) \ 320 if (likely(boot_cpu_data.x86 > 4)) \
315 __ret = __cmpxchg64_local((ptr), (unsigned long long)(o), \ 321 __ret = (__typeof__(*(ptr)))__cmpxchg64_local((ptr), \
322 (unsigned long long)(o), \
316 (unsigned long long)(n)); \ 323 (unsigned long long)(n)); \
317 else \ 324 else \
318 __ret = cmpxchg_486_u64((ptr), (unsigned long long)(o), \ 325 __ret = (__typeof__(*(ptr)))cmpxchg_486_u64((ptr), \
326 (unsigned long long)(o), \
319 (unsigned long long)(n)); \ 327 (unsigned long long)(n)); \
320 __ret; \ 328 __ret; \
321}) 329})
diff --git a/include/asm-x86/e820_32.h b/include/asm-x86/e820_32.h
index f1da7ebd1905..e7207a6de3e0 100644
--- a/include/asm-x86/e820_32.h
+++ b/include/asm-x86/e820_32.h
@@ -28,6 +28,8 @@ extern void find_max_pfn(void);
28extern void register_bootmem_low_pages(unsigned long max_low_pfn); 28extern void register_bootmem_low_pages(unsigned long max_low_pfn);
29extern void add_memory_region(unsigned long long start, 29extern void add_memory_region(unsigned long long start,
30 unsigned long long size, int type); 30 unsigned long long size, int type);
31extern void update_memory_range(u64 start, u64 size, unsigned old_type,
32 unsigned new_type);
31extern void e820_register_memory(void); 33extern void e820_register_memory(void);
32extern void limit_regions(unsigned long long size); 34extern void limit_regions(unsigned long long size);
33extern void print_memory_map(char *who); 35extern void print_memory_map(char *who);
diff --git a/include/asm-x86/e820_64.h b/include/asm-x86/e820_64.h
index a560c4f5d500..22ede73ae724 100644
--- a/include/asm-x86/e820_64.h
+++ b/include/asm-x86/e820_64.h
@@ -18,6 +18,8 @@ extern unsigned long find_e820_area(unsigned long start, unsigned long end,
18 unsigned size, unsigned long align); 18 unsigned size, unsigned long align);
19extern void add_memory_region(unsigned long start, unsigned long size, 19extern void add_memory_region(unsigned long start, unsigned long size,
20 int type); 20 int type);
21extern void update_memory_range(u64 start, u64 size, unsigned old_type,
22 unsigned new_type);
21extern void setup_memory_region(void); 23extern void setup_memory_region(void);
22extern void contig_e820_setup(void); 24extern void contig_e820_setup(void);
23extern unsigned long e820_end_of_ram(void); 25extern unsigned long e820_end_of_ram(void);
diff --git a/include/asm-x86/io_32.h b/include/asm-x86/io_32.h
index 58d2c45cd0b1..d4d8fbd9378c 100644
--- a/include/asm-x86/io_32.h
+++ b/include/asm-x86/io_32.h
@@ -114,13 +114,13 @@ static inline void * phys_to_virt(unsigned long address)
114 * If the area you are trying to map is a PCI BAR you should have a 114 * If the area you are trying to map is a PCI BAR you should have a
115 * look at pci_iomap(). 115 * look at pci_iomap().
116 */ 116 */
117extern void __iomem *ioremap_nocache(unsigned long offset, unsigned long size); 117extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
118extern void __iomem *ioremap_cache(unsigned long offset, unsigned long size); 118extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
119 119
120/* 120/*
121 * The default ioremap() behavior is non-cached: 121 * The default ioremap() behavior is non-cached:
122 */ 122 */
123static inline void __iomem *ioremap(unsigned long offset, unsigned long size) 123static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
124{ 124{
125 return ioremap_nocache(offset, size); 125 return ioremap_nocache(offset, size);
126} 126}
diff --git a/include/asm-x86/io_64.h b/include/asm-x86/io_64.h
index f64a59cc396d..db0be2011a3c 100644
--- a/include/asm-x86/io_64.h
+++ b/include/asm-x86/io_64.h
@@ -158,13 +158,13 @@ extern void early_iounmap(void *addr, unsigned long size);
158 * it's useful if some control registers are in such an area and write combining 158 * it's useful if some control registers are in such an area and write combining
159 * or read caching is not desirable: 159 * or read caching is not desirable:
160 */ 160 */
161extern void __iomem *ioremap_nocache(unsigned long offset, unsigned long size); 161extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
162extern void __iomem *ioremap_cache(unsigned long offset, unsigned long size); 162extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
163 163
164/* 164/*
165 * The default ioremap() behavior is non-cached: 165 * The default ioremap() behavior is non-cached:
166 */ 166 */
167static inline void __iomem *ioremap(unsigned long offset, unsigned long size) 167static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
168{ 168{
169 return ioremap_nocache(offset, size); 169 return ioremap_nocache(offset, size);
170} 170}
diff --git a/include/asm-x86/page.h b/include/asm-x86/page.h
index 1cb7c51bc296..a05b2896492f 100644
--- a/include/asm-x86/page.h
+++ b/include/asm-x86/page.h
@@ -52,13 +52,13 @@ extern int page_is_ram(unsigned long pagenr);
52 52
53struct page; 53struct page;
54 54
55static void inline clear_user_page(void *page, unsigned long vaddr, 55static inline void clear_user_page(void *page, unsigned long vaddr,
56 struct page *pg) 56 struct page *pg)
57{ 57{
58 clear_page(page); 58 clear_page(page);
59} 59}
60 60
61static void inline copy_user_page(void *to, void *from, unsigned long vaddr, 61static inline void copy_user_page(void *to, void *from, unsigned long vaddr,
62 struct page *topage) 62 struct page *topage)
63{ 63{
64 copy_page(to, from); 64 copy_page(to, from);
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
index 174b87738714..9cf472aeb9ce 100644
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -85,6 +85,7 @@ extern pteval_t __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
85#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW) 85#define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
86#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT) 86#define __PAGE_KERNEL_EXEC_NOCACHE (__PAGE_KERNEL_EXEC | _PAGE_PCD | _PAGE_PWT)
87#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT) 87#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_PCD | _PAGE_PWT)
88#define __PAGE_KERNEL_UC_MINUS (__PAGE_KERNEL | _PAGE_PCD)
88#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER) 89#define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
89#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT) 90#define __PAGE_KERNEL_VSYSCALL_NOCACHE (__PAGE_KERNEL_VSYSCALL | _PAGE_PCD | _PAGE_PWT)
90#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE) 91#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
@@ -101,6 +102,7 @@ extern pteval_t __PAGE_KERNEL, __PAGE_KERNEL_EXEC;
101#define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC) 102#define PAGE_KERNEL_EXEC MAKE_GLOBAL(__PAGE_KERNEL_EXEC)
102#define PAGE_KERNEL_RX MAKE_GLOBAL(__PAGE_KERNEL_RX) 103#define PAGE_KERNEL_RX MAKE_GLOBAL(__PAGE_KERNEL_RX)
103#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE) 104#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
105#define PAGE_KERNEL_UC_MINUS MAKE_GLOBAL(__PAGE_KERNEL_UC_MINUS)
104#define PAGE_KERNEL_EXEC_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_EXEC_NOCACHE) 106#define PAGE_KERNEL_EXEC_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_EXEC_NOCACHE)
105#define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE) 107#define PAGE_KERNEL_LARGE MAKE_GLOBAL(__PAGE_KERNEL_LARGE)
106#define PAGE_KERNEL_LARGE_EXEC MAKE_GLOBAL(__PAGE_KERNEL_LARGE_EXEC) 108#define PAGE_KERNEL_LARGE_EXEC MAKE_GLOBAL(__PAGE_KERNEL_LARGE_EXEC)
diff --git a/include/asm-x86/sync_bitops.h b/include/asm-x86/sync_bitops.h
index cbce08a2d135..6b775c905666 100644
--- a/include/asm-x86/sync_bitops.h
+++ b/include/asm-x86/sync_bitops.h
@@ -23,10 +23,6 @@
23 * This function is atomic and may not be reordered. See __set_bit() 23 * This function is atomic and may not be reordered. See __set_bit()
24 * if you do not require the atomic guarantees. 24 * if you do not require the atomic guarantees.
25 * 25 *
26 * Note: there are no guarantees that this function will not be reordered
27 * on non-x86 architectures, so if you are writing portable code,
28 * make sure not to rely on its reordering guarantees.
29 *
30 * Note that @nr may be almost arbitrarily large; this function is not 26 * Note that @nr may be almost arbitrarily large; this function is not
31 * restricted to acting on a single-word quantity. 27 * restricted to acting on a single-word quantity.
32 */ 28 */
@@ -61,8 +57,7 @@ static inline void sync_clear_bit(int nr, volatile unsigned long * addr)
61 * @nr: Bit to change 57 * @nr: Bit to change
62 * @addr: Address to start counting from 58 * @addr: Address to start counting from
63 * 59 *
64 * change_bit() is atomic and may not be reordered. It may be 60 * sync_change_bit() is atomic and may not be reordered.
65 * reordered on other architectures than x86.
66 * Note that @nr may be almost arbitrarily large; this function is not 61 * Note that @nr may be almost arbitrarily large; this function is not
67 * restricted to acting on a single-word quantity. 62 * restricted to acting on a single-word quantity.
68 */ 63 */
@@ -80,7 +75,6 @@ static inline void sync_change_bit(int nr, volatile unsigned long * addr)
80 * @addr: Address to count from 75 * @addr: Address to count from
81 * 76 *
82 * This operation is atomic and cannot be reordered. 77 * This operation is atomic and cannot be reordered.
83 * It may be reordered on other architectures than x86.
84 * It also implies a memory barrier. 78 * It also implies a memory barrier.
85 */ 79 */
86static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr) 80static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr)
@@ -99,7 +93,6 @@ static inline int sync_test_and_set_bit(int nr, volatile unsigned long * addr)
99 * @addr: Address to count from 93 * @addr: Address to count from
100 * 94 *
101 * This operation is atomic and cannot be reordered. 95 * This operation is atomic and cannot be reordered.
102 * It can be reorderdered on other architectures other than x86.
103 * It also implies a memory barrier. 96 * It also implies a memory barrier.
104 */ 97 */
105static inline int sync_test_and_clear_bit(int nr, volatile unsigned long * addr) 98static inline int sync_test_and_clear_bit(int nr, volatile unsigned long * addr)