292 files changed, 2809 insertions, 1353 deletions
diff --git a/include/asm-x86/a.out-core.h b/include/asm-x86/a.out-core.h
index 714207a1c387..f5705761a37b 100644
--- a/include/asm-x86/a.out-core.h
+++ b/include/asm-x86/a.out-core.h
@@ -9,8 +9,8 @@
 * 2 of the Licence, or (at your option) any later version.
 */
-#ifndef _ASM_A_OUT_CORE_H
+#ifndef ASM_X86__A_OUT_CORE_H
-#define _ASM_A_OUT_CORE_H
+#define ASM_X86__A_OUT_CORE_H
 #ifdef __KERNEL__
 #ifdef CONFIG_X86_32
@@ -70,4 +70,4 @@ static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
 #endif /* CONFIG_X86_32 */
 #endif /* __KERNEL__ */
-#endif /* _ASM_A_OUT_CORE_H */
+#endif /* ASM_X86__A_OUT_CORE_H */
diff --git a/include/asm-x86/a.out.h b/include/asm-x86/a.out.h
index 4684f97a5bbd..0948748bc69c 100644
--- a/include/asm-x86/a.out.h
+++ b/include/asm-x86/a.out.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_A_OUT_H
+#ifndef ASM_X86__A_OUT_H
-#define _ASM_X86_A_OUT_H
+#define ASM_X86__A_OUT_H
 struct exec
 {
@@ -17,4 +17,4 @@ struct exec
 #define N_DRSIZE(a)     ((a).a_drsize)
 #define N_SYMSIZE(a)    ((a).a_syms)
-#endif /* _ASM_X86_A_OUT_H */
+#endif /* ASM_X86__A_OUT_H */
diff --git a/include/asm-x86/acpi.h b/include/asm-x86/acpi.h
index 635d764dc13e..392e17336be1 100644
--- a/include/asm-x86/acpi.h
+++ b/include/asm-x86/acpi.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_ACPI_H
+#ifndef ASM_X86__ACPI_H
-#define _ASM_X86_ACPI_H
+#define ASM_X86__ACPI_H
 /*
 *  Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
@@ -140,6 +140,8 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
            boot_cpu_data.x86_model <= 0x05 &&
            boot_cpu_data.x86_mask < 0x0A)
                return 1;
+        else if (boot_cpu_has(X86_FEATURE_AMDC1E))
+                return 1;
        else
                return max_cstate;
 }
@@ -173,4 +175,4 @@ static inline void acpi_fake_nodes(const struct bootnode *fake_nodes,
 #define acpi_unlazy_tlb(x)      leave_mm(x)
-#endif /*__X86_ASM_ACPI_H*/
+#endif /* ASM_X86__ACPI_H */
diff --git a/include/asm-x86/agp.h b/include/asm-x86/agp.h
index e4004a9f6a9a..3617fd4fcdf9 100644
--- a/include/asm-x86/agp.h
+++ b/include/asm-x86/agp.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_AGP_H
+#ifndef ASM_X86__AGP_H
-#define _ASM_X86_AGP_H
+#define ASM_X86__AGP_H
 #include <asm/pgtable.h>
 #include <asm/cacheflush.h>
@@ -32,4 +32,4 @@
 #define free_gatt_pages(table, order)   \
        free_pages((unsigned long)(table), (order))
-#endif
+#endif /* ASM_X86__AGP_H */
diff --git a/include/asm-x86/alternative.h b/include/asm-x86/alternative.h
index f6aa18eadf71..22d3c9862bf3 100644
--- a/include/asm-x86/alternative.h
+++ b/include/asm-x86/alternative.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_ALTERNATIVE_H
+#ifndef ASM_X86__ALTERNATIVE_H
-#define _ASM_X86_ALTERNATIVE_H
+#define ASM_X86__ALTERNATIVE_H
 #include <linux/types.h>
 #include <linux/stddef.h>
@@ -180,4 +180,4 @@ extern void add_nops(void *insns, unsigned int len);
 extern void *text_poke(void *addr, const void *opcode, size_t len);
 extern void *text_poke_early(void *addr, const void *opcode, size_t len);
-#endif /* _ASM_X86_ALTERNATIVE_H */
+#endif /* ASM_X86__ALTERNATIVE_H */
diff --git a/include/asm-x86/amd_iommu.h b/include/asm-x86/amd_iommu.h
index 30a12049353b..041d0db7da27 100644
--- a/include/asm-x86/amd_iommu.h
+++ b/include/asm-x86/amd_iommu.h
@@ -17,16 +17,19 @@
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
-#ifndef _ASM_X86_AMD_IOMMU_H
+#ifndef ASM_X86__AMD_IOMMU_H
-#define _ASM_X86_AMD_IOMMU_H
+#define ASM_X86__AMD_IOMMU_H
+#include <linux/irqreturn.h>
 #ifdef CONFIG_AMD_IOMMU
 extern int amd_iommu_init(void);
 extern int amd_iommu_init_dma_ops(void);
 extern void amd_iommu_detect(void);
+extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
 #else
 static inline int amd_iommu_init(void) { return -ENODEV; }
 static inline void amd_iommu_detect(void) { }
 #endif
-#endif
+#endif /* ASM_X86__AMD_IOMMU_H */
diff --git a/include/asm-x86/amd_iommu_types.h b/include/asm-x86/amd_iommu_types.h
index 22aa58ca1991..b3085869a17b 100644
--- a/include/asm-x86/amd_iommu_types.h
+++ b/include/asm-x86/amd_iommu_types.h
@@ -17,8 +17,8 @@
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
-#ifndef __AMD_IOMMU_TYPES_H__
+#ifndef ASM_X86__AMD_IOMMU_TYPES_H
-#define __AMD_IOMMU_TYPES_H__
+#define ASM_X86__AMD_IOMMU_TYPES_H
 #include <linux/types.h>
 #include <linux/list.h>
@@ -31,15 +31,13 @@
 #define ALIAS_TABLE_ENTRY_SIZE          2
 #define RLOOKUP_TABLE_ENTRY_SIZE        (sizeof(void *))
-/* helper macros */
-#define LOW_U32(x) ((x) & ((1ULL << 32)-1))
 /* Length of the MMIO region for the AMD IOMMU */
 #define MMIO_REGION_LENGTH       0x4000
 /* Capability offsets used by the driver */
 #define MMIO_CAP_HDR_OFFSET     0x00
 #define MMIO_RANGE_OFFSET       0x0c
+#define MMIO_MISC_OFFSET        0x10
 /* Masks, shifts and macros to parse the device range capability */
 #define MMIO_RANGE_LD_MASK      0xff000000
@@ -51,6 +49,7 @@
 #define MMIO_GET_LD(x)  (((x) & MMIO_RANGE_LD_MASK) >> MMIO_RANGE_LD_SHIFT)
 #define MMIO_GET_FD(x)  (((x) & MMIO_RANGE_FD_MASK) >> MMIO_RANGE_FD_SHIFT)
 #define MMIO_GET_BUS(x) (((x) & MMIO_RANGE_BUS_MASK) >> MMIO_RANGE_BUS_SHIFT)
+#define MMIO_MSI_NUM(x) ((x) & 0x1f)
 /* Flag masks for the AMD IOMMU exclusion range */
 #define MMIO_EXCL_ENABLE_MASK 0x01ULL
@@ -69,6 +68,28 @@
 #define MMIO_EVT_TAIL_OFFSET    0x2018
 #define MMIO_STATUS_OFFSET      0x2020
+/* MMIO status bits */
+#define MMIO_STATUS_COM_WAIT_INT_MASK   0x04
+/* event logging constants */
+#define EVENT_ENTRY_SIZE        0x10
+#define EVENT_TYPE_SHIFT        28
+#define EVENT_TYPE_MASK         0xf
+#define EVENT_TYPE_ILL_DEV      0x1
+#define EVENT_TYPE_IO_FAULT     0x2
+#define EVENT_TYPE_DEV_TAB_ERR  0x3
+#define EVENT_TYPE_PAGE_TAB_ERR 0x4
+#define EVENT_TYPE_ILL_CMD      0x5
+#define EVENT_TYPE_CMD_HARD_ERR 0x6
+#define EVENT_TYPE_IOTLB_INV_TO 0x7
+#define EVENT_TYPE_INV_DEV_REQ  0x8
+#define EVENT_DEVID_MASK        0xffff
+#define EVENT_DEVID_SHIFT       0
+#define EVENT_DOMID_MASK        0xffff
+#define EVENT_DOMID_SHIFT       0
+#define EVENT_FLAGS_MASK        0xfff
+#define EVENT_FLAGS_SHIFT       0x10
 /* feature control bits */
 #define CONTROL_IOMMU_EN        0x00ULL
 #define CONTROL_HT_TUN_EN       0x01ULL
@@ -89,6 +110,7 @@
 #define CMD_INV_IOMMU_PAGES     0x03
 #define CMD_COMPL_WAIT_STORE_MASK       0x01
+#define CMD_COMPL_WAIT_INT_MASK         0x02
 #define CMD_INV_IOMMU_PAGES_SIZE_MASK   0x01
 #define CMD_INV_IOMMU_PAGES_PDE_MASK    0x02
@@ -99,6 +121,7 @@
 #define DEV_ENTRY_TRANSLATION   0x01
 #define DEV_ENTRY_IR            0x3d
 #define DEV_ENTRY_IW            0x3e
+#define DEV_ENTRY_NO_PAGE_FAULT 0x62
 #define DEV_ENTRY_EX            0x67
 #define DEV_ENTRY_SYSMGT1       0x68
 #define DEV_ENTRY_SYSMGT2       0x69
@@ -107,6 +130,8 @@
 #define DEV_ENTRY_NMI_PASS      0xba
 #define DEV_ENTRY_LINT0_PASS    0xbe
 #define DEV_ENTRY_LINT1_PASS    0xbf
+#define DEV_ENTRY_MODE_MASK     0x07
+#define DEV_ENTRY_MODE_SHIFT    0x09
 /* constants to configure the command buffer */
 #define CMD_BUFFER_SIZE    8192
@@ -114,6 +139,10 @@
 #define MMIO_CMD_SIZE_SHIFT 56
 #define MMIO_CMD_SIZE_512 (0x9ULL << MMIO_CMD_SIZE_SHIFT)
+/* constants for event buffer handling */
+#define EVT_BUFFER_SIZE         8192 /* 512 entries */
+#define EVT_LEN_MASK            (0x9ULL << 56)
 #define PAGE_MODE_1_LEVEL 0x01
 #define PAGE_MODE_2_LEVEL 0x02
 #define PAGE_MODE_3_LEVEL 0x03
@@ -132,6 +161,7 @@
 #define IOMMU_MAP_SIZE_L3 (1ULL << 39)
 #define IOMMU_PTE_P  (1ULL << 0)
+#define IOMMU_PTE_TV (1ULL << 1)
 #define IOMMU_PTE_U  (1ULL << 59)
 #define IOMMU_PTE_FC (1ULL << 60)
 #define IOMMU_PTE_IR (1ULL << 61)
@@ -157,6 +187,9 @@
 #define MAX_DOMAIN_ID 65536
+/* FIXME: move this macro to <linux/pci.h> */
+#define PCI_BUS(x) (((x) >> 8) & 0xff)
 /*
 * This structure contains generic data for  IOMMU protection domains
 * independent of their use.
@@ -194,6 +227,15 @@ struct dma_ops_domain {
         * just calculate its address in constant time.
         */
        u64 **pte_pages;
+        /* This will be set to true when TLB needs to be flushed */
+        bool need_flush;
+        /*
+         * if this is a preallocated domain, keep the device for which it was
+         * preallocated in this variable
+         */
+        u16 target_dev;
 };
 /*
@@ -206,8 +248,9 @@ struct amd_iommu {
        /* locks the accesses to the hardware */
        spinlock_t lock;
-        /* device id of this IOMMU */
+        /* Pointer to PCI device of this IOMMU */
-        u16 devid;
+        struct pci_dev *dev;
        /*
         * Capability pointer. There could be more than one IOMMU per PCI
         * device function if there are more than one AMD IOMMU capability
@@ -223,6 +266,9 @@ struct amd_iommu {
        /* capabilities of that IOMMU read from ACPI */
        u32 cap;
+        /* pci domain of this IOMMU */
+        u16 pci_seg;
        /* first device this IOMMU handles. read from PCI */
        u16 first_device;
        /* last device this IOMMU handles. read from PCI */
@@ -238,9 +284,19 @@ struct amd_iommu {
        /* size of command buffer */
        u32 cmd_buf_size;
+        /* event buffer virtual address */
+        u8 *evt_buf;
+        /* size of event buffer */
+        u32 evt_buf_size;
+        /* MSI number for event interrupt */
+        u16 evt_msi_num;
        /* if one, we need to send a completion wait command */
        int need_sync;
+        /* true if interrupts for this IOMMU are already enabled */
+        bool int_enabled;
        /* default dma_ops domain for that IOMMU */
        struct dma_ops_domain *default_dom;
 };
@@ -320,6 +376,12 @@ extern unsigned long *amd_iommu_pd_alloc_bitmap;
 /* will be 1 if device isolation is enabled */
 extern int amd_iommu_isolate;
+/*
+ * If true, the addresses will be flushed on unmap time, not when
+ * they are reused
+ */
+extern bool amd_iommu_unmap_flush;
 /* takes a PCI device id and prints it out in a readable form */
 static inline void print_devid(u16 devid, int nl)
 {
@@ -339,4 +401,4 @@ static inline u16 calc_devid(u8 bus, u8 devfn)
        return (((u16)bus) << 8) | devfn;
 }
-#endif
+#endif /* ASM_X86__AMD_IOMMU_TYPES_H */
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
index 133c998161ca..d76a0839abe9 100644
--- a/include/asm-x86/apic.h
+++ b/include/asm-x86/apic.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_APIC_H
+#ifndef ASM_X86__APIC_H
-#define _ASM_X86_APIC_H
+#define ASM_X86__APIC_H
 #include <linux/pm.h>
 #include <linux/delay.h>
@@ -9,6 +9,8 @@
 #include <asm/apicdef.h>
 #include <asm/processor.h>
 #include <asm/system.h>
+#include <asm/cpufeature.h>
+#include <asm/msr.h>
 #define ARCH_APICTIMER_STOPS_ON_C3      1
@@ -47,15 +49,18 @@ extern int disable_apic;
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
 #else
-#define apic_write native_apic_write
-#define apic_read native_apic_read
 #define setup_boot_clock setup_boot_APIC_clock
 #define setup_secondary_clock setup_secondary_APIC_clock
 #endif
 extern int is_vsmp_box(void);
+extern void xapic_wait_icr_idle(void);
+extern u32 safe_xapic_wait_icr_idle(void);
+extern u64 xapic_icr_read(void);
+extern void xapic_icr_write(u32, u32);
+extern int setup_profiling_timer(unsigned int);
-static inline void native_apic_write(unsigned long reg, u32 v)
+static inline void native_apic_mem_write(u32 reg, u32 v)
 {
        volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg);
@@ -64,21 +69,72 @@ static inline void native_apic_write(unsigned long reg, u32 v)
                       ASM_OUTPUT2("0" (v), "m" (*addr)));
 }
-static inline u32 native_apic_read(unsigned long reg)
+static inline u32 native_apic_mem_read(u32 reg)
 {
        return *((volatile u32 *)(APIC_BASE + reg));
 }
-extern void apic_wait_icr_idle(void);
+static inline void native_apic_msr_write(u32 reg, u32 v)
-extern u32 safe_apic_wait_icr_idle(void);
+{
+        if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
+            reg == APIC_LVR)
+                return;
+        wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
+}
+static inline u32 native_apic_msr_read(u32 reg)
+{
+        u32 low, high;
+        if (reg == APIC_DFR)
+                return -1;
+        rdmsr(APIC_BASE_MSR + (reg >> 4), low, high);
+        return low;
+}
+#ifndef CONFIG_X86_32
+extern int x2apic, x2apic_preenabled;
+extern void check_x2apic(void);
+extern void enable_x2apic(void);
+extern void enable_IR_x2apic(void);
+extern void x2apic_icr_write(u32 low, u32 id);
+#endif
+struct apic_ops {
+        u32 (*read)(u32 reg);
+        void (*write)(u32 reg, u32 v);
+        u64 (*icr_read)(void);
+        void (*icr_write)(u32 low, u32 high);
+        void (*wait_icr_idle)(void);
+        u32 (*safe_wait_icr_idle)(void);
+};
+extern struct apic_ops *apic_ops;
+#define apic_read (apic_ops->read)
+#define apic_write (apic_ops->write)
+#define apic_icr_read (apic_ops->icr_read)
+#define apic_icr_write (apic_ops->icr_write)
+#define apic_wait_icr_idle (apic_ops->wait_icr_idle)
+#define safe_apic_wait_icr_idle (apic_ops->safe_wait_icr_idle)
 extern int get_physical_broadcast(void);
+#ifdef CONFIG_X86_64
+static inline void ack_x2APIC_irq(void)
+{
+        /* Docs say use 0 for future compatibility */
+        native_apic_msr_write(APIC_EOI, 0);
+}
+#endif
 static inline void ack_APIC_irq(void)
 {
        /*
-         * ack_APIC_irq() actually gets compiled as a single instruction:
+         * ack_APIC_irq() actually gets compiled as a single instruction
-         * - a single rmw on Pentium/82489DX
-         * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
         * ... yummie.
         */
@@ -128,4 +184,4 @@ static inline void init_apic_mappings(void) { }
 #endif /* !CONFIG_X86_LOCAL_APIC */
-#endif /* __ASM_APIC_H */
+#endif /* ASM_X86__APIC_H */
diff --git a/include/asm-x86/apicdef.h b/include/asm-x86/apicdef.h
index 6b9008c78731..b922c85ac91d 100644
--- a/include/asm-x86/apicdef.h
+++ b/include/asm-x86/apicdef.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_APICDEF_H
+#ifndef ASM_X86__APICDEF_H
-#define _ASM_X86_APICDEF_H
+#define ASM_X86__APICDEF_H
 /*
 * Constants for various Intel APICs. (local APIC, IOAPIC, etc.)
@@ -105,6 +105,7 @@
 #define APIC_TMICT      0x380
 #define APIC_TMCCT      0x390
 #define APIC_TDCR       0x3E0
+#define APIC_SELF_IPI   0x3F0
 #define         APIC_TDR_DIV_TMBASE     (1 << 2)
 #define         APIC_TDR_DIV_1          0xB
 #define         APIC_TDR_DIV_2          0x0
@@ -128,6 +129,8 @@
 #define APIC_EILVT3     0x530
 #define APIC_BASE (fix_to_virt(FIX_APIC_BASE))
+#define APIC_BASE_MSR   0x800
+#define X2APIC_ENABLE   (1UL << 10)
 #ifdef CONFIG_X86_32
 # define MAX_IO_APICS 64
@@ -411,4 +414,4 @@ struct local_apic {
 #else
 #define BAD_APICID 0xFFFFu
 #endif
-#endif
+#endif /* ASM_X86__APICDEF_H */
diff --git a/include/asm-x86/arch_hooks.h b/include/asm-x86/arch_hooks.h
index 8411750ceb63..de4596b24c23 100644
--- a/include/asm-x86/arch_hooks.h
+++ b/include/asm-x86/arch_hooks.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_ARCH_HOOKS_H
+#ifndef ASM_X86__ARCH_HOOKS_H
-#define _ASM_ARCH_HOOKS_H
+#define ASM_X86__ARCH_HOOKS_H
 #include <linux/interrupt.h>
@@ -12,8 +12,6 @@
 /* these aren't arch hooks, they are generic routines
 * that can be used by the hooks */
 extern void init_ISA_irqs(void);
-extern void apic_intr_init(void);
-extern void smp_intr_init(void);
 extern irqreturn_t timer_interrupt(int irq, void *dev_id);
 /* these are the defined hooks */
@@ -25,4 +23,4 @@ extern void pre_time_init_hook(void);
 extern void time_init_hook(void);
 extern void mca_nmi_hook(void);
-#endif
+#endif /* ASM_X86__ARCH_HOOKS_H */
diff --git a/include/asm-x86/asm.h b/include/asm-x86/asm.h
index 97220321f39d..e1355f44d7c3 100644
--- a/include/asm-x86/asm.h
+++ b/include/asm-x86/asm.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_ASM_H
+#ifndef ASM_X86__ASM_H
-#define _ASM_X86_ASM_H
+#define ASM_X86__ASM_H
 #ifdef __ASSEMBLY__
 # define __ASM_FORM(x)  x
@@ -20,17 +20,22 @@
 #define _ASM_PTR        __ASM_SEL(.long, .quad)
 #define _ASM_ALIGN      __ASM_SEL(.balign 4, .balign 8)
-#define _ASM_MOV_UL     __ASM_SIZE(mov)
+#define _ASM_MOV        __ASM_SIZE(mov)
 #define _ASM_INC        __ASM_SIZE(inc)
 #define _ASM_DEC        __ASM_SIZE(dec)
 #define _ASM_ADD        __ASM_SIZE(add)
 #define _ASM_SUB        __ASM_SIZE(sub)
 #define _ASM_XADD       __ASM_SIZE(xadd)
 #define _ASM_AX         __ASM_REG(ax)
 #define _ASM_BX         __ASM_REG(bx)
 #define _ASM_CX         __ASM_REG(cx)
 #define _ASM_DX         __ASM_REG(dx)
+#define _ASM_SP         __ASM_REG(sp)
+#define _ASM_BP         __ASM_REG(bp)
+#define _ASM_SI         __ASM_REG(si)
+#define _ASM_DI         __ASM_REG(di)
 /* Exception table entry */
 # define _ASM_EXTABLE(from,to) \
@@ -39,4 +44,4 @@
        _ASM_PTR #from "," #to "\n" \
        " .previous\n"
-#endif /* _ASM_X86_ASM_H */
+#endif /* ASM_X86__ASM_H */
diff --git a/include/asm-x86/atomic_32.h b/include/asm-x86/atomic_32.h
index 21a4825148c0..14d3f0beb889 100644
--- a/include/asm-x86/atomic_32.h
+++ b/include/asm-x86/atomic_32.h
@@ -1,5 +1,5 @@
-#ifndef __ARCH_I386_ATOMIC__
+#ifndef ASM_X86__ATOMIC_32_H
-#define __ARCH_I386_ATOMIC__
+#define ASM_X86__ATOMIC_32_H
 #include <linux/compiler.h>
 #include <asm/processor.h>
@@ -256,4 +256,4 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 #define smp_mb__after_atomic_inc()      barrier()
 #include <asm-generic/atomic.h>
-#endif
+#endif /* ASM_X86__ATOMIC_32_H */
diff --git a/include/asm-x86/atomic_64.h b/include/asm-x86/atomic_64.h
index a0095191c02e..2cb218c4a356 100644
--- a/include/asm-x86/atomic_64.h
+++ b/include/asm-x86/atomic_64.h
@@ -1,5 +1,5 @@
-#ifndef __ARCH_X86_64_ATOMIC__
+#ifndef ASM_X86__ATOMIC_64_H
-#define __ARCH_X86_64_ATOMIC__
+#define ASM_X86__ATOMIC_64_H
 #include <asm/alternative.h>
 #include <asm/cmpxchg.h>
@@ -228,7 +228,7 @@ static inline void atomic64_add(long i, atomic64_t *v)
 {
        asm volatile(LOCK_PREFIX "addq %1,%0"
                     : "=m" (v->counter)
-                     : "ir" (i), "m" (v->counter));
+                     : "er" (i), "m" (v->counter));
 }
 /**
@@ -242,7 +242,7 @@ static inline void atomic64_sub(long i, atomic64_t *v)
 {
        asm volatile(LOCK_PREFIX "subq %1,%0"
                     : "=m" (v->counter)
-                     : "ir" (i), "m" (v->counter));
+                     : "er" (i), "m" (v->counter));
 }
 /**
@@ -260,7 +260,7 @@ static inline int atomic64_sub_and_test(long i, atomic64_t *v)
        asm volatile(LOCK_PREFIX "subq %2,%0; sete %1"
                     : "=m" (v->counter), "=qm" (c)
-                     : "ir" (i), "m" (v->counter) : "memory");
+                     : "er" (i), "m" (v->counter) : "memory");
        return c;
 }
@@ -341,7 +341,7 @@ static inline int atomic64_add_negative(long i, atomic64_t *v)
        asm volatile(LOCK_PREFIX "addq %2,%0; sets %1"
                     : "=m" (v->counter), "=qm" (c)
-                     : "ir" (i), "m" (v->counter) : "memory");
+                     : "er" (i), "m" (v->counter) : "memory");
        return c;
 }
@@ -470,4 +470,4 @@ static inline void atomic_or_long(unsigned long *v1, unsigned long v2)
 #define smp_mb__after_atomic_inc()      barrier()
 #include <asm-generic/atomic.h>
-#endif
+#endif /* ASM_X86__ATOMIC_64_H */
diff --git a/include/asm-x86/auxvec.h b/include/asm-x86/auxvec.h
index 87f5e6d5a020..12c7cac74202 100644
--- a/include/asm-x86/auxvec.h
+++ b/include/asm-x86/auxvec.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_AUXVEC_H
+#ifndef ASM_X86__AUXVEC_H
-#define _ASM_X86_AUXVEC_H
+#define ASM_X86__AUXVEC_H
 /*
 * Architecture-neutral AT_ values in 0-17, leave some room
 * for more of them, start the x86-specific ones at 32.
@@ -9,4 +9,4 @@
 #endif
 #define AT_SYSINFO_EHDR         33
-#endif
+#endif /* ASM_X86__AUXVEC_H */
diff --git a/include/asm-x86/mach-bigsmp/mach_apic.h b/include/asm-x86/bigsmp/apic.h
index c3b9dc6970c9..0a9cd7c5ca0c 100644
--- a/include/asm-x86/mach-bigsmp/mach_apic.h
+++ b/include/asm-x86/bigsmp/apic.h
@@ -11,7 +11,7 @@ static inline int apic_id_registered(void)
 /* Round robin the irqs amoung the online cpus */
 static inline cpumask_t target_cpus(void)
-{ 
+{
        static unsigned long cpu = NR_CPUS;
        do {
                if (cpu >= NR_CPUS)
@@ -23,7 +23,7 @@ static inline cpumask_t target_cpus(void)
 }
 #undef APIC_DEST_LOGICAL
-#define APIC_DEST_LOGICAL       0
+#define APIC_DEST_LOGICAL       0
 #define TARGET_CPUS             (target_cpus())
 #define APIC_DFR_VALUE          (APIC_DFR_FLAT)
 #define INT_DELIVERY_MODE       (dest_Fixed)
diff --git a/include/asm-x86/mach-es7000/mach_apicdef.h b/include/asm-x86/bigsmp/apicdef.h
index a58ab5a75c8c..392c3f5ef2fe 100644
--- a/include/asm-x86/mach-es7000/mach_apicdef.h
+++ b/include/asm-x86/bigsmp/apicdef.h
@@ -3,10 +3,10 @@
 #define         APIC_ID_MASK            (0xFF<<24)
-static inline unsigned get_apic_id(unsigned long x) 
+static inline unsigned get_apic_id(unsigned long x)
-{ 
+{
        return (((x)>>24)&0xFF);
-} 
+}
 #define         GET_APIC_ID(x)  get_apic_id(x)
diff --git a/include/asm-x86/mach-bigsmp/mach_ipi.h b/include/asm-x86/bigsmp/ipi.h
index 9404c535b7ec..9404c535b7ec 100644
--- a/include/asm-x86/mach-bigsmp/mach_ipi.h
+++ b/include/asm-x86/bigsmp/ipi.h
diff --git a/include/asm-x86/bios_ebda.h b/include/asm-x86/bios_ebda.h
index 0033e50c13b2..79b4b88505d7 100644
--- a/include/asm-x86/bios_ebda.h
+++ b/include/asm-x86/bios_ebda.h
@@ -1,5 +1,5 @@
-#ifndef _MACH_BIOS_EBDA_H
+#ifndef ASM_X86__BIOS_EBDA_H
-#define _MACH_BIOS_EBDA_H
+#define ASM_X86__BIOS_EBDA_H
 #include <asm/io.h>
@@ -16,4 +16,21 @@ static inline unsigned int get_bios_ebda(void)
 void reserve_ebda_region(void);
-#endif /* _MACH_BIOS_EBDA_H */
+#ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION
+/*
+ * This is obviously not a great place for this, but we want to be
+ * able to scatter it around anywhere in the kernel.
+ */
+void check_for_bios_corruption(void);
+void start_periodic_check_for_corruption(void);
+#else
+static inline void check_for_bios_corruption(void)
+{
+}
+static inline void start_periodic_check_for_corruption(void)
+{
+}
+#endif
+#endif /* ASM_X86__BIOS_EBDA_H */
diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h
index cfb2b64f76e7..451a74762bd4 100644
--- a/include/asm-x86/bitops.h
+++ b/include/asm-x86/bitops.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_BITOPS_H
+#ifndef ASM_X86__BITOPS_H
-#define _ASM_X86_BITOPS_H
+#define ASM_X86__BITOPS_H
 /*
 * Copyright 1992, Linus Torvalds.
@@ -424,16 +424,6 @@ static inline int fls(int x)
 #undef ADDR
-static inline void set_bit_string(unsigned long *bitmap,
-                unsigned long i, int len)
-{
-        unsigned long end = i + len;
-        while (i < end) {
-                __set_bit(i, bitmap);
-                i++;
-        }
-}
 #ifdef __KERNEL__
 #include <asm-generic/bitops/sched.h>
@@ -458,4 +448,4 @@ static inline void set_bit_string(unsigned long *bitmap,
 #include <asm-generic/bitops/minix.h>
 #endif /* __KERNEL__ */
-#endif  /* _ASM_X86_BITOPS_H */
+#endif /* ASM_X86__BITOPS_H */
diff --git a/include/asm-x86/boot.h b/include/asm-x86/boot.h
index 2faed7ecb092..1d63bd5d5946 100644
--- a/include/asm-x86/boot.h
+++ b/include/asm-x86/boot.h
@@ -1,10 +1,8 @@
-#ifndef _ASM_BOOT_H
+#ifndef ASM_X86__BOOT_H
-#define _ASM_BOOT_H
+#define ASM_X86__BOOT_H
 /* Don't touch these, unless you really know what you're doing. */
-#define DEF_INITSEG     0x9000
 #define DEF_SYSSEG      0x1000
-#define DEF_SETUPSEG    0x9020
 #define DEF_SYSSIZE     0x7F00
 /* Internal svga startup constants */
@@ -25,4 +23,4 @@
 #define BOOT_STACK_SIZE 0x1000
 #endif
-#endif /* _ASM_BOOT_H */
+#endif /* ASM_X86__BOOT_H */
diff --git a/include/asm-x86/bootparam.h b/include/asm-x86/bootparam.h
index ae22bdf0ab14..ccf027e2d97d 100644
--- a/include/asm-x86/bootparam.h
+++ b/include/asm-x86/bootparam.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_BOOTPARAM_H
+#ifndef ASM_X86__BOOTPARAM_H
-#define _ASM_BOOTPARAM_H
+#define ASM_X86__BOOTPARAM_H
 #include <linux/types.h>
 #include <linux/screen_info.h>
@@ -108,4 +108,4 @@ struct boot_params {
        __u8  _pad9[276];                               /* 0xeec */
 } __attribute__((packed));
-#endif /* _ASM_BOOTPARAM_H */
+#endif /* ASM_X86__BOOTPARAM_H */
diff --git a/include/asm-x86/bug.h b/include/asm-x86/bug.h
index b69aa64b82a4..91ad43a54c47 100644
--- a/include/asm-x86/bug.h
+++ b/include/asm-x86/bug.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_BUG_H
+#ifndef ASM_X86__BUG_H
-#define _ASM_X86_BUG_H
+#define ASM_X86__BUG_H
 #ifdef CONFIG_BUG
 #define HAVE_ARCH_BUG
@@ -36,4 +36,4 @@ do {								\
 #endif /* !CONFIG_BUG */
 #include <asm-generic/bug.h>
-#endif
+#endif /* ASM_X86__BUG_H */
diff --git a/include/asm-x86/bugs.h b/include/asm-x86/bugs.h
index 021cbdd5f258..dc604985f2ad 100644
--- a/include/asm-x86/bugs.h
+++ b/include/asm-x86/bugs.h
@@ -1,7 +1,12 @@
-#ifndef _ASM_X86_BUGS_H
+#ifndef ASM_X86__BUGS_H
-#define _ASM_X86_BUGS_H
+#define ASM_X86__BUGS_H
 extern void check_bugs(void);
+#if defined(CONFIG_CPU_SUP_INTEL) && defined(CONFIG_X86_32)
 int ppro_with_ram_bug(void);
+#else
+static inline int ppro_with_ram_bug(void) { return 0; }
+#endif
-#endif /* _ASM_X86_BUGS_H */
+#endif /* ASM_X86__BUGS_H */
diff --git a/include/asm-x86/byteorder.h b/include/asm-x86/byteorder.h
index e02ae2d89acf..722f27d68105 100644
--- a/include/asm-x86/byteorder.h
+++ b/include/asm-x86/byteorder.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_BYTEORDER_H
+#ifndef ASM_X86__BYTEORDER_H
-#define _ASM_X86_BYTEORDER_H
+#define ASM_X86__BYTEORDER_H
 #include <asm/types.h>
 #include <linux/compiler.h>
@@ -78,4 +78,4 @@ static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
 #include <linux/byteorder/little_endian.h>
-#endif /* _ASM_X86_BYTEORDER_H */
+#endif /* ASM_X86__BYTEORDER_H */
diff --git a/include/asm-x86/cache.h b/include/asm-x86/cache.h
index 1e0bac86f38f..ea3f1cc06a97 100644
--- a/include/asm-x86/cache.h
+++ b/include/asm-x86/cache.h
@@ -1,5 +1,5 @@
-#ifndef _ARCH_X86_CACHE_H
+#ifndef ASM_X86__CACHE_H
-#define _ARCH_X86_CACHE_H
+#define ASM_X86__CACHE_H
 /* L1 cache line size */
 #define L1_CACHE_SHIFT  (CONFIG_X86_L1_CACHE_SHIFT)
@@ -17,4 +17,4 @@
 #endif
 #endif
-#endif
+#endif /* ASM_X86__CACHE_H */
diff --git a/include/asm-x86/cacheflush.h b/include/asm-x86/cacheflush.h
index f4c0ab50d2c2..68840ef1b35a 100644
--- a/include/asm-x86/cacheflush.h
+++ b/include/asm-x86/cacheflush.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_CACHEFLUSH_H
+#ifndef ASM_X86__CACHEFLUSH_H
-#define _ASM_X86_CACHEFLUSH_H
+#define ASM_X86__CACHEFLUSH_H
 /* Keep includes the same across arches.  */
 #include <linux/mm.h>
@@ -24,6 +24,8 @@
 #define copy_from_user_page(vma, page, vaddr, dst, src, len)    \
        memcpy((dst), (src), (len))
+#define PG_non_WB                               PG_arch_1
+PAGEFLAG(NonWB, non_WB)
 /*
 * The set_memory_* API can be used to change various attributes of a virtual
@@ -66,6 +68,9 @@ int set_memory_rw(unsigned long addr, int numpages);
 int set_memory_np(unsigned long addr, int numpages);
 int set_memory_4k(unsigned long addr, int numpages);
+int set_memory_array_uc(unsigned long *addr, int addrinarray);
+int set_memory_array_wb(unsigned long *addr, int addrinarray);
 /*
 * For legacy compatibility with the old APIs, a few functions
 * are provided that work on a "struct page".
@@ -96,8 +101,6 @@ int set_pages_rw(struct page *page, int numpages);
 void clflush_cache_range(void *addr, unsigned int size);
-void cpa_init(void);
 #ifdef CONFIG_DEBUG_RODATA
 void mark_rodata_ro(void);
 extern const int rodata_test_data;
@@ -112,4 +115,4 @@ static inline int rodata_test(void)
 }
 #endif
-#endif
+#endif /* ASM_X86__CACHEFLUSH_H */
diff --git a/include/asm-x86/calgary.h b/include/asm-x86/calgary.h
index 67f60406e2d8..933fd272f826 100644
--- a/include/asm-x86/calgary.h
+++ b/include/asm-x86/calgary.h
@@ -21,8 +21,8 @@
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
-#ifndef _ASM_X86_64_CALGARY_H
+#ifndef ASM_X86__CALGARY_H
-#define _ASM_X86_64_CALGARY_H
+#define ASM_X86__CALGARY_H
 #include <linux/spinlock.h>
 #include <linux/device.h>
@@ -69,4 +69,4 @@ static inline int calgary_iommu_init(void) { return 1; }
 static inline void detect_calgary(void) { return; }
 #endif
-#endif /* _ASM_X86_64_CALGARY_H */
+#endif /* ASM_X86__CALGARY_H */
diff --git a/include/asm-x86/checksum_32.h b/include/asm-x86/checksum_32.h
index 52bbb0d8c4c1..d041e8cda227 100644
--- a/include/asm-x86/checksum_32.h
+++ b/include/asm-x86/checksum_32.h
@@ -1,5 +1,5 @@
-#ifndef _I386_CHECKSUM_H
+#ifndef ASM_X86__CHECKSUM_32_H
-#define _I386_CHECKSUM_H
+#define ASM_X86__CHECKSUM_32_H
 #include <linux/in6.h>
@@ -186,4 +186,4 @@ static inline __wsum csum_and_copy_to_user(const void *src,
        return (__force __wsum)-1; /* invalid checksum */
 }
-#endif
+#endif /* ASM_X86__CHECKSUM_32_H */
diff --git a/include/asm-x86/checksum_64.h b/include/asm-x86/checksum_64.h
index 8bd861cc5267..110f403beb89 100644
--- a/include/asm-x86/checksum_64.h
+++ b/include/asm-x86/checksum_64.h
@@ -1,5 +1,5 @@
-#ifndef _X86_64_CHECKSUM_H
+#ifndef ASM_X86__CHECKSUM_64_H
-#define _X86_64_CHECKSUM_H
+#define ASM_X86__CHECKSUM_64_H
 /*
 * Checksums for x86-64
@@ -188,4 +188,4 @@ static inline unsigned add32_with_carry(unsigned a, unsigned b)
        return a;
 }
-#endif
+#endif /* ASM_X86__CHECKSUM_64_H */
diff --git a/include/asm-x86/cmpxchg_32.h b/include/asm-x86/cmpxchg_32.h
index bf5a69d1329e..0622e45cdf7c 100644
--- a/include/asm-x86/cmpxchg_32.h
+++ b/include/asm-x86/cmpxchg_32.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_CMPXCHG_H
+#ifndef ASM_X86__CMPXCHG_32_H
-#define __ASM_CMPXCHG_H
+#define ASM_X86__CMPXCHG_32_H
 #include <linux/bitops.h> /* for LOCK_PREFIX */
@@ -341,4 +341,4 @@ extern unsigned long long cmpxchg_486_u64(volatile void *, u64, u64);
 #endif
-#endif
+#endif /* ASM_X86__CMPXCHG_32_H */
diff --git a/include/asm-x86/cmpxchg_64.h b/include/asm-x86/cmpxchg_64.h
index 17463ccf8166..63c1a5e61b99 100644
--- a/include/asm-x86/cmpxchg_64.h
+++ b/include/asm-x86/cmpxchg_64.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_CMPXCHG_H
+#ifndef ASM_X86__CMPXCHG_64_H
-#define __ASM_CMPXCHG_H
+#define ASM_X86__CMPXCHG_64_H
 #include <asm/alternative.h> /* Provides LOCK_PREFIX */
@@ -182,4 +182,4 @@ static inline unsigned long __cmpxchg_local(volatile void *ptr,
        cmpxchg_local((ptr), (o), (n));                                 \
 })
-#endif
+#endif /* ASM_X86__CMPXCHG_64_H */
diff --git a/include/asm-x86/compat.h b/include/asm-x86/compat.h
index 1793ac317a30..6732b150949e 100644
--- a/include/asm-x86/compat.h
+++ b/include/asm-x86/compat.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_64_COMPAT_H
+#ifndef ASM_X86__COMPAT_H
-#define _ASM_X86_64_COMPAT_H
+#define ASM_X86__COMPAT_H
 /*
 * Architecture specific compatibility types
@@ -215,4 +215,4 @@ static inline int is_compat_task(void)
        return current_thread_info()->status & TS_COMPAT;
 }
-#endif /* _ASM_X86_64_COMPAT_H */
+#endif /* ASM_X86__COMPAT_H */
diff --git a/include/asm-x86/cpu.h b/include/asm-x86/cpu.h
index 73f2ea84fd74..83a115083f0d 100644
--- a/include/asm-x86/cpu.h
+++ b/include/asm-x86/cpu.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_I386_CPU_H_
+#ifndef ASM_X86__CPU_H
-#define _ASM_I386_CPU_H_
+#define ASM_X86__CPU_H
 #include <linux/device.h>
 #include <linux/cpu.h>
@@ -17,4 +17,4 @@ extern void arch_unregister_cpu(int);
 #endif
 DECLARE_PER_CPU(int, cpu_state);
-#endif /* _ASM_I386_CPU_H_ */
+#endif /* ASM_X86__CPU_H */
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
index 2f5a792b0acc..adfeae6586e1 100644
--- a/include/asm-x86/cpufeature.h
+++ b/include/asm-x86/cpufeature.h
@@ -1,12 +1,18 @@
 /*
 * Defines x86 CPU feature bits
 */
-#ifndef _ASM_X86_CPUFEATURE_H
+#ifndef ASM_X86__CPUFEATURE_H
-#define _ASM_X86_CPUFEATURE_H
+#define ASM_X86__CPUFEATURE_H
 #include <asm/required-features.h>
-#define NCAPINTS        8       /* N 32-bit words worth of info */
+#define NCAPINTS        9       /* N 32-bit words worth of info */
+/*
+ * Note: If the comment begins with a quoted string, that string is used
+ * in /proc/cpuinfo instead of the macro name.  If the string is "",
+ * this feature bit is not displayed in /proc/cpuinfo at all.
+ */
 /* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */
 #define X86_FEATURE_FPU         (0*32+ 0) /* Onboard FPU */
@@ -14,7 +20,7 @@
 #define X86_FEATURE_DE          (0*32+ 2) /* Debugging Extensions */
 #define X86_FEATURE_PSE         (0*32+ 3) /* Page Size Extensions */
 #define X86_FEATURE_TSC         (0*32+ 4) /* Time Stamp Counter */
-#define X86_FEATURE_MSR         (0*32+ 5) /* Model-Specific Registers, RDMSR, WRMSR */
+#define X86_FEATURE_MSR         (0*32+ 5) /* Model-Specific Registers */
 #define X86_FEATURE_PAE         (0*32+ 6) /* Physical Address Extensions */
 #define X86_FEATURE_MCE         (0*32+ 7) /* Machine Check Architecture */
 #define X86_FEATURE_CX8         (0*32+ 8) /* CMPXCHG8 instruction */
@@ -23,22 +29,23 @@
 #define X86_FEATURE_MTRR        (0*32+12) /* Memory Type Range Registers */
 #define X86_FEATURE_PGE         (0*32+13) /* Page Global Enable */
 #define X86_FEATURE_MCA         (0*32+14) /* Machine Check Architecture */
-#define X86_FEATURE_CMOV        (0*32+15) /* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */
+#define X86_FEATURE_CMOV        (0*32+15) /* CMOV instructions */
+                                          /* (plus FCMOVcc, FCOMI with FPU) */
 #define X86_FEATURE_PAT         (0*32+16) /* Page Attribute Table */
 #define X86_FEATURE_PSE36       (0*32+17) /* 36-bit PSEs */
 #define X86_FEATURE_PN          (0*32+18) /* Processor serial number */
-#define X86_FEATURE_CLFLSH      (0*32+19) /* Supports the CLFLUSH instruction */
+#define X86_FEATURE_CLFLSH      (0*32+19) /* "clflush" CLFLUSH instruction */
-#define X86_FEATURE_DS          (0*32+21) /* Debug Store */
+#define X86_FEATURE_DS          (0*32+21) /* "dts" Debug Store */
 #define X86_FEATURE_ACPI        (0*32+22) /* ACPI via MSR */
 #define X86_FEATURE_MMX         (0*32+23) /* Multimedia Extensions */
-#define X86_FEATURE_FXSR        (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */
+#define X86_FEATURE_FXSR        (0*32+24) /* FXSAVE/FXRSTOR, CR4.OSFXSR */
-                                          /* of FPU context), and CR4.OSFXSR available */
+#define X86_FEATURE_XMM         (0*32+25) /* "sse" */
-#define X86_FEATURE_XMM         (0*32+25) /* Streaming SIMD Extensions */
+#define X86_FEATURE_XMM2        (0*32+26) /* "sse2" */
-#define X86_FEATURE_XMM2        (0*32+26) /* Streaming SIMD Extensions-2 */
+#define X86_FEATURE_SELFSNOOP   (0*32+27) /* "ss" CPU self snoop */
-#define X86_FEATURE_SELFSNOOP   (0*32+27) /* CPU self snoop */
 #define X86_FEATURE_HT          (0*32+28) /* Hyper-Threading */
-#define X86_FEATURE_ACC         (0*32+29) /* Automatic clock control */
+#define X86_FEATURE_ACC         (0*32+29) /* "tm" Automatic clock control */
 #define X86_FEATURE_IA64        (0*32+30) /* IA-64 processor */
+#define X86_FEATURE_PBE         (0*32+31) /* Pending Break Enable */
 /* AMD-defined CPU features, CPUID level 0x80000001, word 1 */
 /* Don't duplicate feature flags which are redundant with Intel! */
@@ -46,7 +53,8 @@
 #define X86_FEATURE_MP          (1*32+19) /* MP Capable. */
 #define X86_FEATURE_NX          (1*32+20) /* Execute Disable */
 #define X86_FEATURE_MMXEXT      (1*32+22) /* AMD MMX extensions */
-#define X86_FEATURE_GBPAGES     (1*32+26) /* GB pages */
+#define X86_FEATURE_FXSR_OPT    (1*32+25) /* FXSAVE/FXRSTOR optimizations */
+#define X86_FEATURE_GBPAGES     (1*32+26) /* "pdpe1gb" GB pages */
 #define X86_FEATURE_RDTSCP      (1*32+27) /* RDTSCP */
 #define X86_FEATURE_LM          (1*32+29) /* Long Mode (x86-64) */
 #define X86_FEATURE_3DNOWEXT    (1*32+30) /* AMD 3DNow! extensions */
@@ -64,50 +72,79 @@
 #define X86_FEATURE_CYRIX_ARR   (3*32+ 2) /* Cyrix ARRs (= MTRRs) */
 #define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */
 /* cpu types for specific tunings: */
-#define X86_FEATURE_K8          (3*32+ 4) /* Opteron, Athlon64 */
+#define X86_FEATURE_K8          (3*32+ 4) /* "" Opteron, Athlon64 */
-#define X86_FEATURE_K7          (3*32+ 5) /* Athlon */
+#define X86_FEATURE_K7          (3*32+ 5) /* "" Athlon */
-#define X86_FEATURE_P3          (3*32+ 6) /* P3 */
+#define X86_FEATURE_P3          (3*32+ 6) /* "" P3 */
-#define X86_FEATURE_P4          (3*32+ 7) /* P4 */
+#define X86_FEATURE_P4          (3*32+ 7) /* "" P4 */
 #define X86_FEATURE_CONSTANT_TSC (3*32+ 8) /* TSC ticks at a constant rate */
 #define X86_FEATURE_UP          (3*32+ 9) /* smp kernel running on up */
-#define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* FXSAVE leaks FOP/FIP/FOP */
+#define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* "" FXSAVE leaks FOP/FIP/FOP */
 #define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */
-#define X86_FEATURE_PEBS        (3*32+12)  /* Precise-Event Based Sampling */
+#define X86_FEATURE_NOPL        (3*32+20) /* The NOPL (0F 1F) instructions */
-#define X86_FEATURE_BTS         (3*32+13)  /* Branch Trace Store */
+#define X86_FEATURE_PEBS        (3*32+12) /* Precise-Event Based Sampling */
-#define X86_FEATURE_SYSCALL32   (3*32+14)  /* syscall in ia32 userspace */
+#define X86_FEATURE_BTS         (3*32+13) /* Branch Trace Store */
-#define X86_FEATURE_SYSENTER32  (3*32+15)  /* sysenter in ia32 userspace */
+#define X86_FEATURE_SYSCALL32   (3*32+14) /* "" syscall in ia32 userspace */
-#define X86_FEATURE_REP_GOOD    (3*32+16) /* rep microcode works well on this CPU */
+#define X86_FEATURE_SYSENTER32  (3*32+15) /* "" sysenter in ia32 userspace */
-#define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* Mfence synchronizes RDTSC */
+#define X86_FEATURE_REP_GOOD    (3*32+16) /* rep microcode works well */
-#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */
+#define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* "" Mfence synchronizes RDTSC */
-#define X86_FEATURE_11AP        (3*32+19)  /* Bad local APIC aka 11AP */
+#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* "" Lfence synchronizes RDTSC */
+#define X86_FEATURE_11AP        (3*32+19) /* "" Bad local APIC aka 11AP */
+#define X86_FEATURE_NOPL        (3*32+20) /* The NOPL (0F 1F) instructions */
+#define X86_FEATURE_AMDC1E      (3*32+21) /* AMD C1E detected */
+#define X86_FEATURE_XTOPOLOGY   (3*32+21) /* cpu topology enum extensions */
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
-#define X86_FEATURE_XMM3        (4*32+ 0) /* Streaming SIMD Extensions-3 */
+#define X86_FEATURE_XMM3        (4*32+ 0) /* "pni" SSE-3 */
-#define X86_FEATURE_MWAIT       (4*32+ 3) /* Monitor/Mwait support */
+#define X86_FEATURE_PCLMULQDQ   (4*32+ 1) /* PCLMULQDQ instruction */
-#define X86_FEATURE_DSCPL       (4*32+ 4) /* CPL Qualified Debug Store */
+#define X86_FEATURE_DTES64      (4*32+ 2) /* 64-bit Debug Store */
+#define X86_FEATURE_MWAIT       (4*32+ 3) /* "monitor" Monitor/Mwait support */
+#define X86_FEATURE_DSCPL       (4*32+ 4) /* "ds_cpl" CPL Qual. Debug Store */
+#define X86_FEATURE_VMX         (4*32+ 5) /* Hardware virtualization */
+#define X86_FEATURE_SMX         (4*32+ 6) /* Safer mode */
 #define X86_FEATURE_EST         (4*32+ 7) /* Enhanced SpeedStep */
 #define X86_FEATURE_TM2         (4*32+ 8) /* Thermal Monitor 2 */
+#define X86_FEATURE_SSSE3       (4*32+ 9) /* Supplemental SSE-3 */
 #define X86_FEATURE_CID         (4*32+10) /* Context ID */
+#define X86_FEATURE_FMA         (4*32+12) /* Fused multiply-add */
 #define X86_FEATURE_CX16        (4*32+13) /* CMPXCHG16B */
 #define X86_FEATURE_XTPR        (4*32+14) /* Send Task Priority Messages */
+#define X86_FEATURE_PDCM        (4*32+15) /* Performance Capabilities */
 #define X86_FEATURE_DCA         (4*32+18) /* Direct Cache Access */
+#define X86_FEATURE_XMM4_1      (4*32+19) /* "sse4_1" SSE-4.1 */
+#define X86_FEATURE_XMM4_2      (4*32+20) /* "sse4_2" SSE-4.2 */
+#define X86_FEATURE_X2APIC      (4*32+21) /* x2APIC */
+#define X86_FEATURE_AES         (4*32+25) /* AES instructions */
+#define X86_FEATURE_XSAVE       (4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */
+#define X86_FEATURE_OSXSAVE     (4*32+27) /* "" XSAVE enabled in the OS */
+#define X86_FEATURE_AVX         (4*32+28) /* Advanced Vector Extensions */
 /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
-#define X86_FEATURE_XSTORE      (5*32+ 2) /* on-CPU RNG present (xstore insn) */
+#define X86_FEATURE_XSTORE      (5*32+ 2) /* "rng" RNG present (xstore) */
-#define X86_FEATURE_XSTORE_EN   (5*32+ 3) /* on-CPU RNG enabled */
+#define X86_FEATURE_XSTORE_EN   (5*32+ 3) /* "rng_en" RNG enabled */
-#define X86_FEATURE_XCRYPT      (5*32+ 6) /* on-CPU crypto (xcrypt insn) */
+#define X86_FEATURE_XCRYPT      (5*32+ 6) /* "ace" on-CPU crypto (xcrypt) */
-#define X86_FEATURE_XCRYPT_EN   (5*32+ 7) /* on-CPU crypto enabled */
+#define X86_FEATURE_XCRYPT_EN   (5*32+ 7) /* "ace_en" on-CPU crypto enabled */
 #define X86_FEATURE_ACE2        (5*32+ 8) /* Advanced Cryptography Engine v2 */
 #define X86_FEATURE_ACE2_EN     (5*32+ 9) /* ACE v2 enabled */
-#define X86_FEATURE_PHE         (5*32+ 10) /* PadLock Hash Engine */
+#define X86_FEATURE_PHE         (5*32+10) /* PadLock Hash Engine */
-#define X86_FEATURE_PHE_EN      (5*32+ 11) /* PHE enabled */
+#define X86_FEATURE_PHE_EN      (5*32+11) /* PHE enabled */
-#define X86_FEATURE_PMM         (5*32+ 12) /* PadLock Montgomery Multiplier */
+#define X86_FEATURE_PMM         (5*32+12) /* PadLock Montgomery Multiplier */
-#define X86_FEATURE_PMM_EN      (5*32+ 13) /* PMM enabled */
+#define X86_FEATURE_PMM_EN      (5*32+13) /* PMM enabled */
 /* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
 #define X86_FEATURE_LAHF_LM     (6*32+ 0) /* LAHF/SAHF in long mode */
 #define X86_FEATURE_CMP_LEGACY  (6*32+ 1) /* If yes HyperThreading not valid */
-#define X86_FEATURE_IBS         (6*32+ 10) /* Instruction Based Sampling */
+#define X86_FEATURE_SVM         (6*32+ 2) /* Secure virtual machine */
+#define X86_FEATURE_EXTAPIC     (6*32+ 3) /* Extended APIC space */
+#define X86_FEATURE_CR8_LEGACY  (6*32+ 4) /* CR8 in 32-bit mode */
+#define X86_FEATURE_ABM         (6*32+ 5) /* Advanced bit manipulation */
+#define X86_FEATURE_SSE4A       (6*32+ 6) /* SSE-4A */
+#define X86_FEATURE_MISALIGNSSE (6*32+ 7) /* Misaligned SSE mode */
+#define X86_FEATURE_3DNOWPREFETCH (6*32+ 8) /* 3DNow prefetch instructions */
+#define X86_FEATURE_OSVW        (6*32+ 9) /* OS Visible Workaround */
+#define X86_FEATURE_IBS         (6*32+10) /* Instruction Based Sampling */
+#define X86_FEATURE_SSE5        (6*32+11) /* SSE-5 */
+#define X86_FEATURE_SKINIT      (6*32+12) /* SKINIT/STGI instructions */
+#define X86_FEATURE_WDT         (6*32+13) /* Watchdog timer */
 /*
 * Auxiliary flags: Linux defined - For features scattered in various
@@ -115,6 +152,13 @@
 */
 #define X86_FEATURE_IDA         (7*32+ 0) /* Intel Dynamic Acceleration */
+/* Virtualization flags: Linux defined */
+#define X86_FEATURE_TPR_SHADOW  (8*32+ 0) /* Intel TPR Shadow */
+#define X86_FEATURE_VNMI        (8*32+ 1) /* Intel Virtual NMI */
+#define X86_FEATURE_FLEXPRIORITY (8*32+ 2) /* Intel FlexPriority */
+#define X86_FEATURE_EPT         (8*32+ 3) /* Intel Extended Page Table */
+#define X86_FEATURE_VPID        (8*32+ 4) /* Intel Virtual Processor ID */
 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
 #include <linux/bitops.h>
@@ -148,7 +192,7 @@ extern const char * const x86_power_flags[32];
 } while (0)
 #define setup_force_cpu_cap(bit) do { \
        set_cpu_cap(&boot_cpu_data, bit);       \
-        clear_bit(bit, (unsigned long *)cleared_cpu_caps);      \
+        clear_bit(bit, (unsigned long *)cleared_cpu_caps);      \
 } while (0)
 #define cpu_has_fpu             boot_cpu_has(X86_FEATURE_FPU)
@@ -189,6 +233,10 @@ extern const char * const x86_power_flags[32];
 #define cpu_has_gbpages         boot_cpu_has(X86_FEATURE_GBPAGES)
 #define cpu_has_arch_perfmon    boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
 #define cpu_has_pat             boot_cpu_has(X86_FEATURE_PAT)
+#define cpu_has_xmm4_1          boot_cpu_has(X86_FEATURE_XMM4_1)
+#define cpu_has_xmm4_2          boot_cpu_has(X86_FEATURE_XMM4_2)
+#define cpu_has_x2apic          boot_cpu_has(X86_FEATURE_X2APIC)
+#define cpu_has_xsave           boot_cpu_has(X86_FEATURE_XSAVE)
 #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
 # define cpu_has_invlpg         1
@@ -220,4 +268,4 @@ extern const char * const x86_power_flags[32];
 #endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
-#endif /* _ASM_X86_CPUFEATURE_H */
+#endif /* ASM_X86__CPUFEATURE_H */
diff --git a/include/asm-x86/current.h b/include/asm-x86/current.h
index 7515c19d4988..a863ead856f3 100644
--- a/include/asm-x86/current.h
+++ b/include/asm-x86/current.h
@@ -1,5 +1,5 @@
-#ifndef _X86_CURRENT_H
+#ifndef ASM_X86__CURRENT_H
-#define _X86_CURRENT_H
+#define ASM_X86__CURRENT_H
 #ifdef CONFIG_X86_32
 #include <linux/compiler.h>
@@ -36,4 +36,4 @@ static __always_inline struct task_struct *get_current(void)
 #define current get_current()
-#endif /* X86_CURRENT_H */
+#endif /* ASM_X86__CURRENT_H */
diff --git a/include/asm-x86/debugreg.h b/include/asm-x86/debugreg.h
index c6344d572b03..ecb6907c3ea4 100644
--- a/include/asm-x86/debugreg.h
+++ b/include/asm-x86/debugreg.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_DEBUGREG_H
+#ifndef ASM_X86__DEBUGREG_H
-#define _ASM_X86_DEBUGREG_H
+#define ASM_X86__DEBUGREG_H
 /* Indicate the register numbers for a number of the specific
@@ -67,4 +67,4 @@
 #define DR_LOCAL_SLOWDOWN (0x100)   /* Local slow the pipeline */
 #define DR_GLOBAL_SLOWDOWN (0x200)  /* Global slow the pipeline */
-#endif
+#endif /* ASM_X86__DEBUGREG_H */
diff --git a/include/asm-x86/delay.h b/include/asm-x86/delay.h
index 409a649204aa..8a0da95b4fc5 100644
--- a/include/asm-x86/delay.h
+++ b/include/asm-x86/delay.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_DELAY_H
+#ifndef ASM_X86__DELAY_H
-#define _ASM_X86_DELAY_H
+#define ASM_X86__DELAY_H
 /*
 * Copyright (C) 1993 Linus Torvalds
@@ -28,4 +28,4 @@ extern void __delay(unsigned long loops);
 void use_tsc_delay(void);
-#endif /* _ASM_X86_DELAY_H */
+#endif /* ASM_X86__DELAY_H */
diff --git a/include/asm-x86/desc.h b/include/asm-x86/desc.h
index a44c4dc70590..ebc307817e98 100644
--- a/include/asm-x86/desc.h
+++ b/include/asm-x86/desc.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_DESC_H_
+#ifndef ASM_X86__DESC_H
-#define _ASM_DESC_H_
+#define ASM_X86__DESC_H
 #ifndef __ASSEMBLY__
 #include <asm/desc_defs.h>
@@ -24,6 +24,11 @@ static inline void fill_ldt(struct desc_struct *desc,
        desc->d = info->seg_32bit;
        desc->g = info->limit_in_pages;
        desc->base2 = (info->base_addr & 0xff000000) >> 24;
+        /*
+         * Don't allow setting of the lm bit. It is useless anyway
+         * because 64bit system calls require __USER_CS:
+         */
+        desc->l = 0;
 }
 extern struct desc_ptr idt_descr;
@@ -97,7 +102,15 @@ static inline int desc_empty(const void *ptr)
        native_write_gdt_entry(dt, entry, desc, type)
 #define write_idt_entry(dt, entry, g)           \
        native_write_idt_entry(dt, entry, g)
-#endif
+static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
+{
+}
+static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
+{
+}
+#endif  /* CONFIG_PARAVIRT */
 static inline void native_write_idt_entry(gate_desc *idt, int entry,
                                          const gate_desc *gate)
@@ -397,4 +410,4 @@ static inline void set_system_gate_ist(int n, void *addr, unsigned ist)
 #endif /* __ASSEMBLY__ */
-#endif
+#endif /* ASM_X86__DESC_H */
diff --git a/include/asm-x86/desc_defs.h b/include/asm-x86/desc_defs.h
index f7bacf357dac..b881db664b46 100644
--- a/include/asm-x86/desc_defs.h
+++ b/include/asm-x86/desc_defs.h
@@ -1,6 +1,6 @@
 /* Written 2000 by Andi Kleen */
-#ifndef __ARCH_DESC_DEFS_H
+#ifndef ASM_X86__DESC_DEFS_H
-#define __ARCH_DESC_DEFS_H
+#define ASM_X86__DESC_DEFS_H
 /*
 * Segment descriptor structure definitions, usable from both x86_64 and i386
@@ -92,4 +92,4 @@ struct desc_ptr {
 #endif /* !__ASSEMBLY__ */
-#endif
+#endif /* ASM_X86__DESC_DEFS_H */
diff --git a/include/asm-x86/device.h b/include/asm-x86/device.h
index 87a715367a1b..1bece04c7d9d 100644
--- a/include/asm-x86/device.h
+++ b/include/asm-x86/device.h
@@ -1,13 +1,16 @@
-#ifndef _ASM_X86_DEVICE_H
+#ifndef ASM_X86__DEVICE_H
-#define _ASM_X86_DEVICE_H
+#define ASM_X86__DEVICE_H
 struct dev_archdata {
 #ifdef CONFIG_ACPI
        void    *acpi_handle;
 #endif
+#ifdef CONFIG_X86_64
+struct dma_mapping_ops *dma_ops;
+#endif
 #ifdef CONFIG_DMAR
        void *iommu; /* hook for IOMMU specific extension */
 #endif
 };
-#endif /* _ASM_X86_DEVICE_H */
+#endif /* ASM_X86__DEVICE_H */
diff --git a/include/asm-x86/div64.h b/include/asm-x86/div64.h
index 9a2d644c08ef..f9530f23f1d6 100644
--- a/include/asm-x86/div64.h
+++ b/include/asm-x86/div64.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_DIV64_H
+#ifndef ASM_X86__DIV64_H
-#define _ASM_X86_DIV64_H
+#define ASM_X86__DIV64_H
 #ifdef CONFIG_X86_32
@@ -57,4 +57,4 @@ static inline u64 div_u64_rem(u64 dividend, u32 divisor, u32 *remainder)
 # include <asm-generic/div64.h>
 #endif /* CONFIG_X86_32 */
-#endif /* _ASM_X86_DIV64_H */
+#endif /* ASM_X86__DIV64_H */
diff --git a/include/asm-x86/dma-mapping.h b/include/asm-x86/dma-mapping.h
index c2ddd3d1b883..219c33d6361c 100644
--- a/include/asm-x86/dma-mapping.h
+++ b/include/asm-x86/dma-mapping.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_DMA_MAPPING_H_
+#ifndef ASM_X86__DMA_MAPPING_H
-#define _ASM_DMA_MAPPING_H_
+#define ASM_X86__DMA_MAPPING_H
 /*
 * IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for
@@ -9,24 +9,22 @@
 #include <linux/scatterlist.h>
 #include <asm/io.h>
 #include <asm/swiotlb.h>
+#include <asm-generic/dma-coherent.h>
 extern dma_addr_t bad_dma_address;
 extern int iommu_merge;
-extern struct device fallback_dev;
+extern struct device x86_dma_fallback_dev;
 extern int panic_on_overflow;
-extern int force_iommu;
 struct dma_mapping_ops {
-        int             (*mapping_error)(dma_addr_t dma_addr);
+        int             (*mapping_error)(struct device *dev,
+                                         dma_addr_t dma_addr);
        void*           (*alloc_coherent)(struct device *dev, size_t size,
                                dma_addr_t *dma_handle, gfp_t gfp);
        void            (*free_coherent)(struct device *dev, size_t size,
                                void *vaddr, dma_addr_t dma_handle);
        dma_addr_t      (*map_single)(struct device *hwdev, phys_addr_t ptr,
                                size_t size, int direction);
-        /* like map_single, but doesn't check the device mask */
-        dma_addr_t      (*map_simple)(struct device *hwdev, phys_addr_t ptr,
-                                size_t size, int direction);
        void            (*unmap_single)(struct device *dev, dma_addr_t addr,
                                size_t size, int direction);
        void            (*sync_single_for_cpu)(struct device *hwdev,
@@ -56,71 +54,95 @@ struct dma_mapping_ops {
        int             is_phys;
 };
-extern const struct dma_mapping_ops *dma_ops;
+extern struct dma_mapping_ops *dma_ops;
-static inline int dma_mapping_error(dma_addr_t dma_addr)
+static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
 {
-        if (dma_ops->mapping_error)
+#ifdef CONFIG_X86_32
-                return dma_ops->mapping_error(dma_addr);
+        return dma_ops;
+#else
+        if (unlikely(!dev) || !dev->archdata.dma_ops)
+                return dma_ops;
+        else
+                return dev->archdata.dma_ops;
+#endif /* ASM_X86__DMA_MAPPING_H */
+}
+/* Make sure we keep the same behaviour */
+static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
+{
+#ifdef CONFIG_X86_32
+        return 0;
+#else
+        struct dma_mapping_ops *ops = get_dma_ops(dev);
+        if (ops->mapping_error)
+                return ops->mapping_error(dev, dma_addr);
        return (dma_addr == bad_dma_address);
+#endif
 }
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+#define dma_is_consistent(d, h) (1)
-void *dma_alloc_coherent(struct device *dev, size_t size,
-                           dma_addr_t *dma_handle, gfp_t flag);
-void dma_free_coherent(struct device *dev, size_t size,
-                         void *vaddr, dma_addr_t dma_handle);
 extern int dma_supported(struct device *hwdev, u64 mask);
 extern int dma_set_mask(struct device *dev, u64 mask);
+extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
+                                        dma_addr_t *dma_addr, gfp_t flag);
 static inline dma_addr_t
 dma_map_single(struct device *hwdev, void *ptr, size_t size,
               int direction)
 {
+        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
        BUG_ON(!valid_dma_direction(direction));
-        return dma_ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
+        return ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
 }
 static inline void
 dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
                 int direction)
 {
+        struct dma_mapping_ops *ops = get_dma_ops(dev);
        BUG_ON(!valid_dma_direction(direction));
-        if (dma_ops->unmap_single)
+        if (ops->unmap_single)
-                dma_ops->unmap_single(dev, addr, size, direction);
+                ops->unmap_single(dev, addr, size, direction);
 }
 static inline int
 dma_map_sg(struct device *hwdev, struct scatterlist *sg,
           int nents, int direction)
 {
+        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
        BUG_ON(!valid_dma_direction(direction));
-        return dma_ops->map_sg(hwdev, sg, nents, direction);
+        return ops->map_sg(hwdev, sg, nents, direction);
 }
 static inline void
 dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
             int direction)
 {
+        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
        BUG_ON(!valid_dma_direction(direction));
-        if (dma_ops->unmap_sg)
+        if (ops->unmap_sg)
-                dma_ops->unmap_sg(hwdev, sg, nents, direction);
+                ops->unmap_sg(hwdev, sg, nents, direction);
 }
 static inline void
 dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
                        size_t size, int direction)
 {
+        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
        BUG_ON(!valid_dma_direction(direction));
-        if (dma_ops->sync_single_for_cpu)
+        if (ops->sync_single_for_cpu)
-                dma_ops->sync_single_for_cpu(hwdev, dma_handle, size,
+                ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
-                                             direction);
        flush_write_buffers();
 }
@@ -128,10 +150,11 @@ static inline void
 dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
                           size_t size, int direction)
 {
+        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
        BUG_ON(!valid_dma_direction(direction));
-        if (dma_ops->sync_single_for_device)
+        if (ops->sync_single_for_device)
-                dma_ops->sync_single_for_device(hwdev, dma_handle, size,
+                ops->sync_single_for_device(hwdev, dma_handle, size, direction);
-                                                direction);
        flush_write_buffers();
 }
@@ -139,11 +162,12 @@ static inline void
 dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
                              unsigned long offset, size_t size, int direction)
 {
-        BUG_ON(!valid_dma_direction(direction));
+        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
-        if (dma_ops->sync_single_range_for_cpu)
-                dma_ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
-                                                   size, direction);
+        BUG_ON(!valid_dma_direction(direction));
+        if (ops->sync_single_range_for_cpu)
+                ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
+                                               size, direction);
        flush_write_buffers();
 }
@@ -152,11 +176,12 @@ dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
                                 unsigned long offset, size_t size,
                                 int direction)
 {
-        BUG_ON(!valid_dma_direction(direction));
+        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
-        if (dma_ops->sync_single_range_for_device)
-                dma_ops->sync_single_range_for_device(hwdev, dma_handle,
-                                                      offset, size, direction);
+        BUG_ON(!valid_dma_direction(direction));
+        if (ops->sync_single_range_for_device)
+                ops->sync_single_range_for_device(hwdev, dma_handle,
+                                                  offset, size, direction);
        flush_write_buffers();
 }
@@ -164,9 +189,11 @@ static inline void
 dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
                    int nelems, int direction)
 {
+        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
        BUG_ON(!valid_dma_direction(direction));
-        if (dma_ops->sync_sg_for_cpu)
+        if (ops->sync_sg_for_cpu)
-                dma_ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
+                ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
        flush_write_buffers();
 }
@@ -174,9 +201,11 @@ static inline void
 dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
                       int nelems, int direction)
 {
+        struct dma_mapping_ops *ops = get_dma_ops(hwdev);
        BUG_ON(!valid_dma_direction(direction));
-        if (dma_ops->sync_sg_for_device)
+        if (ops->sync_sg_for_device)
-                dma_ops->sync_sg_for_device(hwdev, sg, nelems, direction);
+                ops->sync_sg_for_device(hwdev, sg, nelems, direction);
        flush_write_buffers();
 }
@@ -185,9 +214,11 @@ static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
                                      size_t offset, size_t size,
                                      int direction)
 {
+        struct dma_mapping_ops *ops = get_dma_ops(dev);
        BUG_ON(!valid_dma_direction(direction));
-        return dma_ops->map_single(dev, page_to_phys(page)+offset,
+        return ops->map_single(dev, page_to_phys(page) + offset,
-                                   size, direction);
+                               size, direction);
 }
 static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
@@ -210,27 +241,68 @@ static inline int dma_get_cache_alignment(void)
        return boot_cpu_data.x86_clflush_size;
 }
-#define dma_is_consistent(d, h) (1)
+static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
+                                                    gfp_t gfp)
+{
+        unsigned long dma_mask = 0;
-#ifdef CONFIG_X86_32
+        dma_mask = dev->coherent_dma_mask;
-#  define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
+        if (!dma_mask)
-struct dma_coherent_mem {
+                dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;
-        void            *virt_base;
-        u32             device_base;
+        return dma_mask;
-        int             size;
+}
-        int             flags;
-        unsigned long   *bitmap;
+static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
-};
+{
+#ifdef CONFIG_X86_64
+        unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
+        if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
+                gfp |= GFP_DMA32;
+#endif
+       return gfp;
+}
+static inline void *
+dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
+                gfp_t gfp)
+{
+        struct dma_mapping_ops *ops = get_dma_ops(dev);
+        void *memory;
+        gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
+        if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
+                return memory;
+        if (!dev) {
+                dev = &x86_dma_fallback_dev;
+                gfp |= GFP_DMA;
+        }
+        if (!is_device_dma_capable(dev))
+                return NULL;
+        if (!ops->alloc_coherent)
+                return NULL;
-extern int
+        return ops->alloc_coherent(dev, size, dma_handle,
-dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
+                                   dma_alloc_coherent_gfp_flags(dev, gfp));
-                            dma_addr_t device_addr, size_t size, int flags);
+}
+static inline void dma_free_coherent(struct device *dev, size_t size,
+                                     void *vaddr, dma_addr_t bus)
+{
+        struct dma_mapping_ops *ops = get_dma_ops(dev);
-extern void
+        WARN_ON(irqs_disabled());       /* for portability */
-dma_release_declared_memory(struct device *dev);
+        if (dma_release_from_coherent(dev, get_order(size), vaddr))
+                return;
+        if (ops->free_coherent)
+                ops->free_coherent(dev, size, vaddr, bus);
+}
-extern void *
-dma_mark_declared_memory_occupied(struct device *dev,
-                                  dma_addr_t device_addr, size_t size);
-#endif /* CONFIG_X86_32 */
 #endif
diff --git a/include/asm-x86/dma.h b/include/asm-x86/dma.h
index ca1098a7e580..c9f7a4eec555 100644
--- a/include/asm-x86/dma.h
+++ b/include/asm-x86/dma.h
@@ -5,8 +5,8 @@
 * and John Boyd, Nov. 1992.
 */
-#ifndef _ASM_X86_DMA_H
+#ifndef ASM_X86__DMA_H
-#define _ASM_X86_DMA_H
+#define ASM_X86__DMA_H
 #include <linux/spinlock.h>     /* And spinlocks */
 #include <asm/io.h>             /* need byte IO */
@@ -315,4 +315,4 @@ extern int isa_dma_bridge_buggy;
 #define isa_dma_bridge_buggy    (0)
 #endif
-#endif /* _ASM_X86_DMA_H */
+#endif /* ASM_X86__DMA_H */
diff --git a/include/asm-x86/dmi.h b/include/asm-x86/dmi.h
index 58a86571fe0f..1cff6fe81fa5 100644
--- a/include/asm-x86/dmi.h
+++ b/include/asm-x86/dmi.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_DMI_H
+#ifndef ASM_X86__DMI_H
-#define _ASM_X86_DMI_H
+#define ASM_X86__DMI_H
 #include <asm/io.h>
@@ -23,4 +23,4 @@ static inline void *dmi_alloc(unsigned len)
 #define dmi_ioremap early_ioremap
 #define dmi_iounmap early_iounmap
-#endif
+#endif /* ASM_X86__DMI_H */
diff --git a/include/asm-x86/ds.h b/include/asm-x86/ds.h
index 7881368142fa..c3c953a45b21 100644
--- a/include/asm-x86/ds.h
+++ b/include/asm-x86/ds.h
@@ -2,71 +2,237 @@
 * Debug Store (DS) support
 *
 * This provides a low-level interface to the hardware's Debug Store
- * feature that is used for last branch recording (LBR) and
+ * feature that is used for branch trace store (BTS) and
 * precise-event based sampling (PEBS).
 *
- * Different architectures use a different DS layout/pointer size.
+ * It manages:
- * The below functions therefore work on a void*.
+ * - per-thread and per-cpu allocation of BTS and PEBS
+ * - buffer memory allocation (optional)
+ * - buffer overflow handling
+ * - buffer access
 *
+ * It assumes:
+ * - get_task_struct on all parameter tasks
+ * - current is allowed to trace parameter tasks
 *
- * Since there is no user for PEBS, yet, only LBR (or branch
- * trace store, BTS) is supported.
 *
- *
+ * Copyright (C) 2007-2008 Intel Corporation.
- * Copyright (C) 2007 Intel Corporation.
+ * Markus Metzger <markus.t.metzger@intel.com>, 2007-2008
- * Markus Metzger <markus.t.metzger@intel.com>, Dec 2007
 */
-#ifndef _ASM_X86_DS_H
+#ifndef ASM_X86__DS_H
-#define _ASM_X86_DS_H
+#define ASM_X86__DS_H
+#ifdef CONFIG_X86_DS
 #include <linux/types.h>
 #include <linux/init.h>
-struct cpuinfo_x86;
+struct task_struct;
-/* a branch trace record entry
+/*
+ * Request BTS or PEBS
+ *
+ * Due to alignement constraints, the actual buffer may be slightly
+ * smaller than the requested or provided buffer.
 *
- * In order to unify the interface between various processor versions,
+ * Returns 0 on success; -Eerrno otherwise
- * we use the below data structure for all processors.
+ *
+ * task: the task to request recording for;
+ *       NULL for per-cpu recording on the current cpu
+ * base: the base pointer for the (non-pageable) buffer;
+ *       NULL if buffer allocation requested
+ * size: the size of the requested or provided buffer
+ * ovfl: pointer to a function to be called on buffer overflow;
+ *       NULL if cyclic buffer requested
 */
-enum bts_qualifier {
+typedef void (*ds_ovfl_callback_t)(struct task_struct *);
-        BTS_INVALID = 0,
+extern int ds_request_bts(struct task_struct *task, void *base, size_t size,
-        BTS_BRANCH,
+                          ds_ovfl_callback_t ovfl);
-        BTS_TASK_ARRIVES,
+extern int ds_request_pebs(struct task_struct *task, void *base, size_t size,
-        BTS_TASK_DEPARTS
+                           ds_ovfl_callback_t ovfl);
-};
-struct bts_struct {
+/*
-        u64 qualifier;
+ * Release BTS or PEBS resources
-        union {
+ *
-                /* BTS_BRANCH */
+ * Frees buffers allocated on ds_request.
-                struct {
+ *
-                        u64 from_ip;
+ * Returns 0 on success; -Eerrno otherwise
-                        u64 to_ip;
+ *
-                } lbr;
+ * task: the task to release resources for;
-                /* BTS_TASK_ARRIVES or
+ *       NULL to release resources for the current cpu
-                   BTS_TASK_DEPARTS */
+ */
-                u64 jiffies;
+extern int ds_release_bts(struct task_struct *task);
-        } variant;
+extern int ds_release_pebs(struct task_struct *task);
+/*
+ * Return the (array) index of the write pointer.
+ * (assuming an array of BTS/PEBS records)
+ *
+ * Returns -Eerrno on error
+ *
+ * task: the task to access;
+ *       NULL to access the current cpu
+ * pos (out): if not NULL, will hold the result
+ */
+extern int ds_get_bts_index(struct task_struct *task, size_t *pos);
+extern int ds_get_pebs_index(struct task_struct *task, size_t *pos);
+/*
+ * Return the (array) index one record beyond the end of the array.
+ * (assuming an array of BTS/PEBS records)
+ *
+ * Returns -Eerrno on error
+ *
+ * task: the task to access;
+ *       NULL to access the current cpu
+ * pos (out): if not NULL, will hold the result
+ */
+extern int ds_get_bts_end(struct task_struct *task, size_t *pos);
+extern int ds_get_pebs_end(struct task_struct *task, size_t *pos);
+/*
+ * Provide a pointer to the BTS/PEBS record at parameter index.
+ * (assuming an array of BTS/PEBS records)
+ *
+ * The pointer points directly into the buffer. The user is
+ * responsible for copying the record.
+ *
+ * Returns the size of a single record on success; -Eerrno on error
+ *
+ * task: the task to access;
+ *       NULL to access the current cpu
+ * index: the index of the requested record
+ * record (out): pointer to the requested record
+ */
+extern int ds_access_bts(struct task_struct *task,
+                         size_t index, const void **record);
+extern int ds_access_pebs(struct task_struct *task,
+                          size_t index, const void **record);
+/*
+ * Write one or more BTS/PEBS records at the write pointer index and
+ * advance the write pointer.
+ *
+ * If size is not a multiple of the record size, trailing bytes are
+ * zeroed out.
+ *
+ * May result in one or more overflow notifications.
+ *
+ * If called during overflow handling, that is, with index >=
+ * interrupt threshold, the write will wrap around.
+ *
+ * An overflow notification is given if and when the interrupt
+ * threshold is reached during or after the write.
+ *
+ * Returns the number of bytes written or -Eerrno.
+ *
+ * task: the task to access;
+ *       NULL to access the current cpu
+ * buffer: the buffer to write
+ * size: the size of the buffer
+ */
+extern int ds_write_bts(struct task_struct *task,
+                        const void *buffer, size_t size);
+extern int ds_write_pebs(struct task_struct *task,
+                         const void *buffer, size_t size);
+/*
+ * Same as ds_write_bts/pebs, but omit ownership checks.
+ *
+ * This is needed to have some other task than the owner of the
+ * BTS/PEBS buffer or the parameter task itself write into the
+ * respective buffer.
+ */
+extern int ds_unchecked_write_bts(struct task_struct *task,
+                                  const void *buffer, size_t size);
+extern int ds_unchecked_write_pebs(struct task_struct *task,
+                                   const void *buffer, size_t size);
+/*
+ * Reset the write pointer of the BTS/PEBS buffer.
+ *
+ * Returns 0 on success; -Eerrno on error
+ *
+ * task: the task to access;
+ *       NULL to access the current cpu
+ */
+extern int ds_reset_bts(struct task_struct *task);
+extern int ds_reset_pebs(struct task_struct *task);
+/*
+ * Clear the BTS/PEBS buffer and reset the write pointer.
+ * The entire buffer will be zeroed out.
+ *
+ * Returns 0 on success; -Eerrno on error
+ *
+ * task: the task to access;
+ *       NULL to access the current cpu
+ */
+extern int ds_clear_bts(struct task_struct *task);
+extern int ds_clear_pebs(struct task_struct *task);
+/*
+ * Provide the PEBS counter reset value.
+ *
+ * Returns 0 on success; -Eerrno on error
+ *
+ * task: the task to access;
+ *       NULL to access the current cpu
+ * value (out): the counter reset value
+ */
+extern int ds_get_pebs_reset(struct task_struct *task, u64 *value);
+/*
+ * Set the PEBS counter reset value.
+ *
+ * Returns 0 on success; -Eerrno on error
+ *
+ * task: the task to access;
+ *       NULL to access the current cpu
+ * value: the new counter reset value
+ */
+extern int ds_set_pebs_reset(struct task_struct *task, u64 value);
+/*
+ * Initialization
+ */
+struct cpuinfo_x86;
+extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *);
+/*
+ * The DS context - part of struct thread_struct.
+ */
+struct ds_context {
+        /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */
+        unsigned char *ds;
+        /* the owner of the BTS and PEBS configuration, respectively */
+        struct task_struct *owner[2];
+        /* buffer overflow notification function for BTS and PEBS */
+        ds_ovfl_callback_t callback[2];
+        /* the original buffer address */
+        void *buffer[2];
+        /* the number of allocated pages for on-request allocated buffers */
+        unsigned int pages[2];
+        /* use count */
+        unsigned long count;
+        /* a pointer to the context location inside the thread_struct
+         * or the per_cpu context array */
+        struct ds_context **this;
+        /* a pointer to the task owning this context, or NULL, if the
+         * context is owned by a cpu */
+        struct task_struct *task;
 };
-/* Overflow handling mechanisms */
+/* called by exit_thread() to free leftover contexts */
-#define DS_O_SIGNAL     1 /* send overflow signal */
+extern void ds_free(struct ds_context *context);
-#define DS_O_WRAP       2 /* wrap around */
+#else /* CONFIG_X86_DS */
-extern int ds_allocate(void **, size_t);
-extern int ds_free(void **);
+#define ds_init_intel(config) do {} while (0)
-extern int ds_get_bts_size(void *);
-extern int ds_get_bts_end(void *);
+#endif /* CONFIG_X86_DS */
-extern int ds_get_bts_index(void *);
+#endif /* ASM_X86__DS_H */
-extern int ds_set_overflow(void *, int);
-extern int ds_get_overflow(void *);
-extern int ds_clear(void *);
-extern int ds_read_bts(void *, int, struct bts_struct *);
-extern int ds_write_bts(void *, const struct bts_struct *);
-extern unsigned long ds_debugctl_mask(void);
-extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *c);
-#endif /* _ASM_X86_DS_H */
diff --git a/include/asm-x86/dwarf2.h b/include/asm-x86/dwarf2.h
index 738bb9fb3e53..21d1bc32ad7c 100644
--- a/include/asm-x86/dwarf2.h
+++ b/include/asm-x86/dwarf2.h
@@ -1,5 +1,5 @@
-#ifndef _DWARF2_H
+#ifndef ASM_X86__DWARF2_H
-#define _DWARF2_H
+#define ASM_X86__DWARF2_H
 #ifndef __ASSEMBLY__
 #warning "asm/dwarf2.h should be only included in pure assembly files"
@@ -58,4 +58,4 @@
 #endif
-#endif
+#endif /* ASM_X86__DWARF2_H */
diff --git a/include/asm-x86/e820.h b/include/asm-x86/e820.h
index 16a31e2c7c57..5abbdec06bd2 100644
--- a/include/asm-x86/e820.h
+++ b/include/asm-x86/e820.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_E820_H
+#ifndef ASM_X86__E820_H
-#define __ASM_E820_H
+#define ASM_X86__E820_H
 #define E820MAP 0x2d0           /* our map */
 #define E820MAX 128             /* number of entries in E820MAP */
@@ -43,6 +43,7 @@
 #define E820_RESERVED   2
 #define E820_ACPI       3
 #define E820_NVS        4
+#define E820_UNUSABLE   5
 /* reserved RAM used by kernel itself */
 #define E820_RESERVED_KERN        128
@@ -64,6 +65,7 @@ struct e820map {
 extern struct e820map e820;
 extern struct e820map e820_saved;
+extern unsigned long pci_mem_start;
 extern int e820_any_mapped(u64 start, u64 end, unsigned type);
 extern int e820_all_mapped(u64 start, u64 end, unsigned type);
 extern void e820_add_region(u64 start, u64 size, int type);
@@ -120,6 +122,7 @@ extern void e820_register_active_regions(int nid, unsigned long start_pfn,
 extern u64 e820_hole_size(u64 start, u64 end);
 extern void finish_e820_parsing(void);
 extern void e820_reserve_resources(void);
+extern void e820_reserve_resources_late(void);
 extern void setup_memory_map(void);
 extern char *default_machine_specific_memory_setup(void);
 extern char *machine_specific_memory_setup(void);
@@ -140,4 +143,4 @@ extern char *memory_setup(void);
 #define HIGH_MEMORY     (1024*1024)
 #endif /* __KERNEL__ */
-#endif  /* __ASM_E820_H */
+#endif /* ASM_X86__E820_H */
diff --git a/include/asm-x86/edac.h b/include/asm-x86/edac.h
index a8088f63a30e..9493c5b27bbd 100644
--- a/include/asm-x86/edac.h
+++ b/include/asm-x86/edac.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_EDAC_H
+#ifndef ASM_X86__EDAC_H
-#define _ASM_X86_EDAC_H
+#define ASM_X86__EDAC_H
 /* ECC atomic, DMA, SMP and interrupt safe scrub function */
@@ -15,4 +15,4 @@ static inline void atomic_scrub(void *va, u32 size)
                asm volatile("lock; addl $0, %0"::"m" (*virt_addr));
 }
-#endif
+#endif /* ASM_X86__EDAC_H */
diff --git a/include/asm-x86/efi.h b/include/asm-x86/efi.h
index 7ed2bd7a7f51..ed2de22e8705 100644
--- a/include/asm-x86/efi.h
+++ b/include/asm-x86/efi.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_EFI_H
+#ifndef ASM_X86__EFI_H
-#define _ASM_X86_EFI_H
+#define ASM_X86__EFI_H
 #ifdef CONFIG_X86_32
@@ -86,7 +86,7 @@ extern u64 efi_call6(void *fp, u64 arg1, u64 arg2, u64 arg3,
        efi_call6((void *)(efi.systab->runtime->f), (u64)(a1), (u64)(a2), \
                  (u64)(a3), (u64)(a4), (u64)(a5), (u64)(a6))
-extern void *efi_ioremap(unsigned long addr, unsigned long size);
+extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size);
 #endif /* CONFIG_X86_32 */
@@ -94,4 +94,4 @@ extern void efi_reserve_early(void);
 extern void efi_call_phys_prelog(void);
 extern void efi_call_phys_epilog(void);
-#endif
+#endif /* ASM_X86__EFI_H */
diff --git a/include/asm-x86/elf.h b/include/asm-x86/elf.h
index 7be4733c793e..5c4745bec906 100644
--- a/include/asm-x86/elf.h
+++ b/include/asm-x86/elf.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_ELF_H
+#ifndef ASM_X86__ELF_H
-#define _ASM_X86_ELF_H
+#define ASM_X86__ELF_H
 /*
 * ELF register definitions..
@@ -148,8 +148,9 @@ do {						\
 static inline void start_ia32_thread(struct pt_regs *regs, u32 ip, u32 sp)
 {
-        asm volatile("movl %0,%%fs" :: "r" (0));
+        loadsegment(fs, 0);
-        asm volatile("movl %0,%%es; movl %0,%%ds" : : "r" (__USER32_DS));
+        loadsegment(ds, __USER32_DS);
+        loadsegment(es, __USER32_DS);
        load_gs_index(0);
        regs->ip = ip;
        regs->sp = sp;
@@ -332,4 +333,4 @@ extern int syscall32_setup_pages(struct linux_binprm *, int exstack);
 extern unsigned long arch_randomize_brk(struct mm_struct *mm);
 #define arch_randomize_brk arch_randomize_brk
-#endif
+#endif /* ASM_X86__ELF_H */
diff --git a/include/asm-x86/emergency-restart.h b/include/asm-x86/emergency-restart.h
index 8e6aef19f8f0..190d0d8b71e3 100644
--- a/include/asm-x86/emergency-restart.h
+++ b/include/asm-x86/emergency-restart.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_EMERGENCY_RESTART_H
+#ifndef ASM_X86__EMERGENCY_RESTART_H
-#define _ASM_EMERGENCY_RESTART_H
+#define ASM_X86__EMERGENCY_RESTART_H
 enum reboot_type {
        BOOT_TRIPLE = 't',
@@ -15,4 +15,4 @@ extern enum reboot_type reboot_type;
 extern void machine_emergency_restart(void);
-#endif /* _ASM_EMERGENCY_RESTART_H */
+#endif /* ASM_X86__EMERGENCY_RESTART_H */
diff --git a/include/asm-x86/mach-es7000/mach_apic.h b/include/asm-x86/es7000/apic.h
index 0a3fdf930672..bd2c44d1f7ac 100644
--- a/include/asm-x86/mach-es7000/mach_apic.h
+++ b/include/asm-x86/es7000/apic.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_APIC_H
+#ifndef __ASM_ES7000_APIC_H
-#define __ASM_MACH_APIC_H
+#define __ASM_ES7000_APIC_H
 #define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
 #define esr_disable (1)
@@ -10,7 +10,7 @@ static inline int apic_id_registered(void)
 }
 static inline cpumask_t target_cpus(void)
-{ 
+{
 #if defined CONFIG_ES7000_CLUSTERED_APIC
        return CPU_MASK_ALL;
 #else
@@ -23,24 +23,24 @@ static inline cpumask_t target_cpus(void)
 #define APIC_DFR_VALUE          (APIC_DFR_CLUSTER)
 #define INT_DELIVERY_MODE       (dest_LowestPrio)
 #define INT_DEST_MODE           (1)    /* logical delivery broadcast to all procs */
-#define NO_BALANCE_IRQ          (1)
+#define NO_BALANCE_IRQ          (1)
 #undef  WAKE_SECONDARY_VIA_INIT
 #define WAKE_SECONDARY_VIA_MIP
 #else
 #define APIC_DFR_VALUE          (APIC_DFR_FLAT)
 #define INT_DELIVERY_MODE       (dest_Fixed)
 #define INT_DEST_MODE           (0)    /* phys delivery to target procs */
-#define NO_BALANCE_IRQ          (0)
+#define NO_BALANCE_IRQ          (0)
 #undef  APIC_DEST_LOGICAL
 #define APIC_DEST_LOGICAL       0x0
 #define WAKE_SECONDARY_VIA_INIT
 #endif
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
-{ 
+{
        return 0;
-} 
+}
-static inline unsigned long check_apicid_present(int bit) 
+static inline unsigned long check_apicid_present(int bit)
 {
        return physid_isset(bit, phys_cpu_present_map);
 }
@@ -80,7 +80,7 @@ static inline void setup_apic_routing(void)
 {
        int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id());
        printk("Enabling APIC mode:  %s.  Using %d I/O APICs, target cpus %lx\n",
-                (apic_version[apic] == 0x14) ? 
+                (apic_version[apic] == 0x14) ?
                "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]);
 }
@@ -141,7 +141,7 @@ static inline void setup_portio_remap(void)
 extern unsigned int boot_cpu_physical_apicid;
 static inline int check_phys_apicid_present(int cpu_physical_apicid)
 {
-        boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());
+        boot_cpu_physical_apicid = read_apic_id();
        return (1);
 }
@@ -150,7 +150,7 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
        int num_bits_set;
        int cpus_found = 0;
        int cpu;
-        int apicid;     
+        int apicid;
        num_bits_set = cpus_weight(cpumask);
        /* Return id to all */
@@ -160,16 +160,16 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
 #else
                return cpu_to_logical_apicid(0);
 #endif
-        /* 
+        /*
-         * The cpus in the mask must all be on the apic cluster.  If are not 
+         * The cpus in the mask must all be on the apic cluster.  If are not
-         * on the same apicid cluster return default value of TARGET_CPUS. 
+         * on the same apicid cluster return default value of TARGET_CPUS.
         */
        cpu = first_cpu(cpumask);
        apicid = cpu_to_logical_apicid(cpu);
        while (cpus_found < num_bits_set) {
                if (cpu_isset(cpu, cpumask)) {
                        int new_apicid = cpu_to_logical_apicid(cpu);
-                        if (apicid_cluster(apicid) != 
+                        if (apicid_cluster(apicid) !=
                                        apicid_cluster(new_apicid)){
                                printk ("%s: Not a valid mask!\n",__FUNCTION__);
 #if defined CONFIG_ES7000_CLUSTERED_APIC
@@ -191,4 +191,4 @@ static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
        return cpuid_apic >> index_msb;
 }
-#endif /* __ASM_MACH_APIC_H */
+#endif /* __ASM_ES7000_APIC_H */
diff --git a/include/asm-x86/es7000/apicdef.h b/include/asm-x86/es7000/apicdef.h
new file mode 100644
index 000000000000..8b234a3cb851
--- /dev/null
+++ b/include/asm-x86/es7000/apicdef.h
@@ -0,0 +1,13 @@
+#ifndef __ASM_ES7000_APICDEF_H
+#define __ASM_ES7000_APICDEF_H
+#define         APIC_ID_MASK            (0xFF<<24)
+static inline unsigned get_apic_id(unsigned long x)
+{
+        return (((x)>>24)&0xFF);
+}
+#define         GET_APIC_ID(x)  get_apic_id(x)
+#endif
diff --git a/include/asm-x86/mach-es7000/mach_ipi.h b/include/asm-x86/es7000/ipi.h
index 5e61bd220b06..632a955fcc0a 100644
--- a/include/asm-x86/mach-es7000/mach_ipi.h
+++ b/include/asm-x86/es7000/ipi.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_IPI_H
+#ifndef __ASM_ES7000_IPI_H
-#define __ASM_MACH_IPI_H
+#define __ASM_ES7000_IPI_H
 void send_IPI_mask_sequence(cpumask_t mask, int vector);
@@ -21,4 +21,4 @@ static inline void send_IPI_all(int vector)
        send_IPI_mask(cpu_online_map, vector);
 }
-#endif /* __ASM_MACH_IPI_H */
+#endif /* __ASM_ES7000_IPI_H */
diff --git a/include/asm-x86/mach-es7000/mach_mpparse.h b/include/asm-x86/es7000/mpparse.h
index ef26d3523625..7b5c889d8e7d 100644
--- a/include/asm-x86/mach-es7000/mach_mpparse.h
+++ b/include/asm-x86/es7000/mpparse.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_MPPARSE_H
+#ifndef __ASM_ES7000_MPPARSE_H
-#define __ASM_MACH_MPPARSE_H
+#define __ASM_ES7000_MPPARSE_H
 #include <linux/acpi.h>
diff --git a/include/asm-x86/mach-es7000/mach_wakecpu.h b/include/asm-x86/es7000/wakecpu.h
index 84ff58314501..3ffc5a7bf667 100644
--- a/include/asm-x86/mach-es7000/mach_wakecpu.h
+++ b/include/asm-x86/es7000/wakecpu.h
@@ -1,7 +1,7 @@
-#ifndef __ASM_MACH_WAKECPU_H
+#ifndef __ASM_ES7000_WAKECPU_H
-#define __ASM_MACH_WAKECPU_H
+#define __ASM_ES7000_WAKECPU_H
-/* 
+/*
 * This file copes with machines that wakeup secondary CPUs by the
 * INIT, INIT, STARTUP sequence.
 */
diff --git a/include/asm-x86/fb.h b/include/asm-x86/fb.h
index 53018464aea6..aca38dbd9a64 100644
--- a/include/asm-x86/fb.h
+++ b/include/asm-x86/fb.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_FB_H
+#ifndef ASM_X86__FB_H
-#define _ASM_X86_FB_H
+#define ASM_X86__FB_H
 #include <linux/fb.h>
 #include <linux/fs.h>
@@ -18,4 +18,4 @@ extern int fb_is_primary_device(struct fb_info *info);
 static inline int fb_is_primary_device(struct fb_info *info) { return 0; }
 #endif
-#endif /* _ASM_X86_FB_H */
+#endif /* ASM_X86__FB_H */
diff --git a/include/asm-x86/fixmap.h b/include/asm-x86/fixmap.h
index 44d4f8217349..78e33a1bc591 100644
--- a/include/asm-x86/fixmap.h
+++ b/include/asm-x86/fixmap.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_FIXMAP_H
+#ifndef ASM_X86__FIXMAP_H
-#define _ASM_FIXMAP_H
+#define ASM_X86__FIXMAP_H
 #ifdef CONFIG_X86_32
 # include "fixmap_32.h"
@@ -65,4 +65,4 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
        BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
        return __virt_to_fix(vaddr);
 }
-#endif
+#endif /* ASM_X86__FIXMAP_H */
diff --git a/include/asm-x86/fixmap_32.h b/include/asm-x86/fixmap_32.h
index f1ac2b2167d7..784e3e759866 100644
--- a/include/asm-x86/fixmap_32.h
+++ b/include/asm-x86/fixmap_32.h
@@ -10,8 +10,8 @@
 * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999
 */
-#ifndef _ASM_FIXMAP_32_H
+#ifndef ASM_X86__FIXMAP_32_H
-#define _ASM_FIXMAP_32_H
+#define ASM_X86__FIXMAP_32_H
 /* used by vmalloc.c, vsyscall.lds.S.
@@ -120,4 +120,4 @@ extern void reserve_top_address(unsigned long reserve);
 #define FIXADDR_BOOT_START      (FIXADDR_TOP - __FIXADDR_BOOT_SIZE)
 #endif /* !__ASSEMBLY__ */
-#endif
+#endif /* ASM_X86__FIXMAP_32_H */
diff --git a/include/asm-x86/fixmap_64.h b/include/asm-x86/fixmap_64.h
index 00f3d74a0524..dafb24bc0424 100644
--- a/include/asm-x86/fixmap_64.h
+++ b/include/asm-x86/fixmap_64.h
@@ -8,8 +8,8 @@
 * Copyright (C) 1998 Ingo Molnar
 */
-#ifndef _ASM_FIXMAP_64_H
+#ifndef ASM_X86__FIXMAP_64_H
-#define _ASM_FIXMAP_64_H
+#define ASM_X86__FIXMAP_64_H
 #include <linux/kernel.h>
 #include <asm/acpi.h>
@@ -80,4 +80,4 @@ enum fixed_addresses {
 #define FIXADDR_USER_START      ((unsigned long)VSYSCALL32_VSYSCALL)
 #define FIXADDR_USER_END        (FIXADDR_USER_START + PAGE_SIZE)
-#endif
+#endif /* ASM_X86__FIXMAP_64_H */
diff --git a/include/asm-x86/floppy.h b/include/asm-x86/floppy.h
index dbe82a5c5eac..7d83a3a83e37 100644
--- a/include/asm-x86/floppy.h
+++ b/include/asm-x86/floppy.h
@@ -7,8 +7,8 @@
 *
 * Copyright (C) 1995
 */
-#ifndef _ASM_X86_FLOPPY_H
+#ifndef ASM_X86__FLOPPY_H
-#define _ASM_X86_FLOPPY_H
+#define ASM_X86__FLOPPY_H
 #include <linux/vmalloc.h>
@@ -278,4 +278,4 @@ static int FDC2 = -1;
 #define EXTRA_FLOPPY_PARAMS
-#endif /* _ASM_X86_FLOPPY_H */
+#endif /* ASM_X86__FLOPPY_H */
diff --git a/include/asm-x86/ftrace.h b/include/asm-x86/ftrace.h
index 5c68b32ee1c8..be0e004ad148 100644
--- a/include/asm-x86/ftrace.h
+++ b/include/asm-x86/ftrace.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_FTRACE
+#ifndef ASM_X86__FTRACE_H
-#define _ASM_X86_FTRACE
+#define ASM_X86__FTRACE_H
 #ifdef CONFIG_FTRACE
 #define MCOUNT_ADDR             ((long)(mcount))
@@ -11,4 +11,4 @@ extern void mcount(void);
 #endif /* CONFIG_FTRACE */
-#endif /* _ASM_X86_FTRACE */
+#endif /* ASM_X86__FTRACE_H */
diff --git a/include/asm-x86/futex.h b/include/asm-x86/futex.h
index e7a76b37b333..06b924ef6fa5 100644
--- a/include/asm-x86/futex.h
+++ b/include/asm-x86/futex.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_FUTEX_H
+#ifndef ASM_X86__FUTEX_H
-#define _ASM_X86_FUTEX_H
+#define ASM_X86__FUTEX_H
 #ifdef __KERNEL__
@@ -25,7 +25,7 @@
        asm volatile("1:\tmovl  %2, %0\n"                       \
                     "\tmovl\t%0, %3\n"                         \
                     "\t" insn "\n"                             \
-                     "2:\tlock; cmpxchgl %3, %2\n"              \
+                     "2:\t" LOCK_PREFIX "cmpxchgl %3, %2\n"     \
                     "\tjnz\t1b\n"                              \
                     "3:\t.section .fixup,\"ax\"\n"             \
                     "4:\tmov\t%5, %1\n"                        \
@@ -64,7 +64,7 @@ static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
                __futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg);
                break;
        case FUTEX_OP_ADD:
-                __futex_atomic_op1("lock; xaddl %0, %2", ret, oldval,
+                __futex_atomic_op1(LOCK_PREFIX "xaddl %0, %2", ret, oldval,
                                   uaddr, oparg);
                break;
        case FUTEX_OP_OR:
@@ -122,7 +122,7 @@ static inline int futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval,
        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
                return -EFAULT;
-        asm volatile("1:\tlock; cmpxchgl %3, %1\n"
+        asm volatile("1:\t" LOCK_PREFIX "cmpxchgl %3, %1\n"
                     "2:\t.section .fixup, \"ax\"\n"
                     "3:\tmov     %2, %0\n"
                     "\tjmp     2b\n"
@@ -137,4 +137,4 @@ static inline int futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval,
 }
 #endif
-#endif
+#endif /* ASM_X86__FUTEX_H */
diff --git a/include/asm-x86/gart.h b/include/asm-x86/gart.h
index 3f62a83887f3..605edb39ef9e 100644
--- a/include/asm-x86/gart.h
+++ b/include/asm-x86/gart.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X8664_GART_H
+#ifndef ASM_X86__GART_H
-#define _ASM_X8664_GART_H 1
+#define ASM_X86__GART_H
 #include <asm/e820.h>
@@ -29,6 +29,8 @@ extern int fix_aperture;
 #define AMD64_GARTCACHECTL      0x9c
 #define AMD64_GARTEN            (1<<0)
+extern int agp_amd64_init(void);
 static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
 {
        u32 tmp, ctl;
@@ -52,15 +54,15 @@ static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
                return 0;
        if (aper_base + aper_size > 0x100000000ULL) {
-                printk(KERN_ERR "Aperture beyond 4GB. Ignoring.\n");
+                printk(KERN_INFO "Aperture beyond 4GB. Ignoring.\n");
                return 0;
        }
        if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) {
-                printk(KERN_ERR "Aperture pointing to e820 RAM. Ignoring.\n");
+                printk(KERN_INFO "Aperture pointing to e820 RAM. Ignoring.\n");
                return 0;
        }
        if (aper_size < min_size) {
-                printk(KERN_ERR "Aperture too small (%d MB) than (%d MB)\n",
+                printk(KERN_INFO "Aperture too small (%d MB) than (%d MB)\n",
                                 aper_size>>20, min_size>>20);
                return 0;
        }
@@ -68,4 +70,4 @@ static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
        return 1;
 }
-#endif
+#endif /* ASM_X86__GART_H */
diff --git a/include/asm-x86/genapic_32.h b/include/asm-x86/genapic_32.h
index b02ea6e17de8..34280f027664 100644
--- a/include/asm-x86/genapic_32.h
+++ b/include/asm-x86/genapic_32.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_GENAPIC_H
+#ifndef ASM_X86__GENAPIC_32_H
-#define _ASM_GENAPIC_H 1
+#define ASM_X86__GENAPIC_32_H
 #include <asm/mpspec.h>
@@ -118,6 +118,7 @@ enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
 #define get_uv_system_type()            UV_NONE
 #define is_uv_system()                  0
 #define uv_wakeup_secondary(a, b)       1
+#define uv_system_init()                do {} while (0)
-#endif
+#endif /* ASM_X86__GENAPIC_32_H */
diff --git a/include/asm-x86/genapic_64.h b/include/asm-x86/genapic_64.h
index 0f8504627c41..ed6a4886c082 100644
--- a/include/asm-x86/genapic_64.h
+++ b/include/asm-x86/genapic_64.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_GENAPIC_H
+#ifndef ASM_X86__GENAPIC_64_H
-#define _ASM_GENAPIC_H 1
+#define ASM_X86__GENAPIC_64_H
 /*
 * Copyright 2004 James Cleverdon, IBM.
@@ -14,6 +14,7 @@
 struct genapic {
        char *name;
+        int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
        u32 int_delivery_mode;
        u32 int_dest_mode;
        int (*apic_id_registered)(void);
@@ -24,17 +25,24 @@ struct genapic {
        void (*send_IPI_mask)(cpumask_t mask, int vector);
        void (*send_IPI_allbutself)(int vector);
        void (*send_IPI_all)(int vector);
+        void (*send_IPI_self)(int vector);
        /* */
        unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask);
        unsigned int (*phys_pkg_id)(int index_msb);
+        unsigned int (*get_apic_id)(unsigned long x);
+        unsigned long (*set_apic_id)(unsigned int id);
+        unsigned long apic_id_mask;
 };
 extern struct genapic *genapic;
 extern struct genapic apic_flat;
 extern struct genapic apic_physflat;
+extern struct genapic apic_x2apic_cluster;
+extern struct genapic apic_x2apic_phys;
 extern int acpi_madt_oem_check(char *, char *);
+extern void apic_send_IPI_self(int vector);
 enum uv_system_type {UV_NONE, UV_LEGACY_APIC, UV_X2APIC, UV_NON_UNIQUE_APIC};
 extern enum uv_system_type get_uv_system_type(void);
 extern int is_uv_system(void);
@@ -42,8 +50,9 @@ extern int is_uv_system(void);
 extern struct genapic apic_x2apic_uv_x;
 DECLARE_PER_CPU(int, x2apic_extra_bits);
 extern void uv_cpu_init(void);
+extern void uv_system_init(void);
 extern int uv_wakeup_secondary(int phys_apicid, unsigned int start_rip);
 extern void setup_apic_routing(void);
-#endif
+#endif /* ASM_X86__GENAPIC_64_H */
diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h
index bb06027fc83e..3f3444be2638 100644
--- a/include/asm-x86/geode.h
+++ b/include/asm-x86/geode.h
@@ -7,8 +7,8 @@
 * as published by the Free Software Foundation.
 */
-#ifndef _ASM_GEODE_H_
+#ifndef ASM_X86__GEODE_H
-#define _ASM_GEODE_H_
+#define ASM_X86__GEODE_H
 #include <asm/processor.h>
 #include <linux/io.h>
@@ -50,6 +50,7 @@ extern int geode_get_dev_base(unsigned int dev);
 #define MSR_PIC_YSEL_HIGH       0x51400021
 #define MSR_PIC_ZSEL_LOW        0x51400022
 #define MSR_PIC_ZSEL_HIGH       0x51400023
+#define MSR_PIC_IRQM_LPC        0x51400025
 #define MSR_MFGPT_IRQ           0x51400028
 #define MSR_MFGPT_NR            0x51400029
@@ -237,7 +238,7 @@ static inline u16 geode_mfgpt_read(int timer, u16 reg)
 }
 extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable);
-extern int geode_mfgpt_set_irq(int timer, int cmp, int irq, int enable);
+extern int geode_mfgpt_set_irq(int timer, int cmp, int *irq, int enable);
 extern int geode_mfgpt_alloc_timer(int timer, int domain);
 #define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
@@ -249,4 +250,4 @@ extern int __init mfgpt_timer_setup(void);
 static inline int mfgpt_timer_setup(void) { return 0; }
 #endif
-#endif
+#endif /* ASM_X86__GEODE_H */
diff --git a/include/asm-x86/gpio.h b/include/asm-x86/gpio.h
index 116e9147fe66..497fb980d962 100644
--- a/include/asm-x86/gpio.h
+++ b/include/asm-x86/gpio.h
@@ -16,10 +16,6 @@
 #ifndef _ASM_I386_GPIO_H
 #define _ASM_I386_GPIO_H
-#ifdef CONFIG_X86_RDC321X
-#include <gpio.h>
-#else /* CONFIG_X86_RDC321X */
 #include <asm-generic/gpio.h>
 #ifdef CONFIG_GPIOLIB
@@ -57,6 +53,4 @@ static inline int irq_to_gpio(unsigned int irq)
 #endif /* CONFIG_GPIOLIB */
-#endif /* CONFIG_X86_RDC321X */
+#endif /* ASM_X86__GPIO_H */
-#endif /* _ASM_I386_GPIO_H */
diff --git a/include/asm-x86/hardirq_32.h b/include/asm-x86/hardirq_32.h
index 4f85f0f4b563..700fe230d919 100644
--- a/include/asm-x86/hardirq_32.h
+++ b/include/asm-x86/hardirq_32.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_HARDIRQ_H
+#ifndef ASM_X86__HARDIRQ_32_H
-#define __ASM_HARDIRQ_H
+#define ASM_X86__HARDIRQ_32_H
 #include <linux/threads.h>
 #include <linux/irq.h>
@@ -25,4 +25,4 @@ DECLARE_PER_CPU(irq_cpustat_t, irq_stat);
 void ack_bad_irq(unsigned int irq);
 #include <linux/irq_cpustat.h>
-#endif /* __ASM_HARDIRQ_H */
+#endif /* ASM_X86__HARDIRQ_32_H */
diff --git a/include/asm-x86/hardirq_64.h b/include/asm-x86/hardirq_64.h
index 95d5e090ed89..f8bd2919a8ce 100644
--- a/include/asm-x86/hardirq_64.h
+++ b/include/asm-x86/hardirq_64.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_HARDIRQ_H
+#ifndef ASM_X86__HARDIRQ_64_H
-#define __ASM_HARDIRQ_H
+#define ASM_X86__HARDIRQ_64_H
 #include <linux/threads.h>
 #include <linux/irq.h>
@@ -20,4 +20,4 @@
 extern void ack_bad_irq(unsigned int irq);
-#endif /* __ASM_HARDIRQ_H */
+#endif /* ASM_X86__HARDIRQ_64_H */
diff --git a/include/asm-x86/highmem.h b/include/asm-x86/highmem.h
index 4514b16cc723..bc3f6a280316 100644
--- a/include/asm-x86/highmem.h
+++ b/include/asm-x86/highmem.h
@@ -15,8 +15,8 @@
 * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
 */
-#ifndef _ASM_HIGHMEM_H
+#ifndef ASM_X86__HIGHMEM_H
-#define _ASM_HIGHMEM_H
+#define ASM_X86__HIGHMEM_H
 #ifdef __KERNEL__
@@ -79,4 +79,4 @@ extern void add_highpages_with_active_regions(int nid, unsigned long start_pfn,
 #endif /* __KERNEL__ */
-#endif /* _ASM_HIGHMEM_H */
+#endif /* ASM_X86__HIGHMEM_H */
diff --git a/include/asm-x86/hpet.h b/include/asm-x86/hpet.h
index 82f1ac641bd7..cbbbb6d4dd32 100644
--- a/include/asm-x86/hpet.h
+++ b/include/asm-x86/hpet.h
@@ -1,5 +1,5 @@
-#ifndef ASM_X86_HPET_H
+#ifndef ASM_X86__HPET_H
-#define ASM_X86_HPET_H
+#define ASM_X86__HPET_H
 #ifdef CONFIG_HPET_TIMER
@@ -90,4 +90,4 @@ static inline int is_hpet_enabled(void) { return 0; }
 #define hpet_readl(a) 0
 #endif
-#endif /* ASM_X86_HPET_H */
+#endif /* ASM_X86__HPET_H */
diff --git a/include/asm-x86/hugetlb.h b/include/asm-x86/hugetlb.h
index 439a9acc132d..0b7ec5dc0884 100644
--- a/include/asm-x86/hugetlb.h
+++ b/include/asm-x86/hugetlb.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_HUGETLB_H
+#ifndef ASM_X86__HUGETLB_H
-#define _ASM_X86_HUGETLB_H
+#define ASM_X86__HUGETLB_H
 #include <asm/page.h>
@@ -90,4 +90,4 @@ static inline void arch_release_hugepage(struct page *page)
 {
 }
-#endif /* _ASM_X86_HUGETLB_H */
+#endif /* ASM_X86__HUGETLB_H */
diff --git a/include/asm-x86/hw_irq.h b/include/asm-x86/hw_irq.h
index 77ba51df5668..50f6e0316b50 100644
--- a/include/asm-x86/hw_irq.h
+++ b/include/asm-x86/hw_irq.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_HW_IRQ_H
+#ifndef ASM_X86__HW_IRQ_H
-#define _ASM_HW_IRQ_H
+#define ASM_X86__HW_IRQ_H
 /*
 * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
@@ -64,7 +64,6 @@ extern unsigned long io_apic_irqs;
 extern void init_VISWS_APIC_irqs(void);
 extern void setup_IO_APIC(void);
 extern void disable_IO_APIC(void);
-extern void print_IO_APIC(void);
 extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
 extern void setup_ioapic_dest(void);
@@ -73,7 +72,9 @@ extern void enable_IO_APIC(void);
 #endif
 /* IPI functions */
+#ifdef CONFIG_X86_32
 extern void send_IPI_self(int vector);
+#endif
 extern void send_IPI(int dest, int vector);
 /* Statistics */
@@ -93,15 +94,43 @@ extern asmlinkage void qic_reschedule_interrupt(void);
 extern asmlinkage void qic_enable_irq_interrupt(void);
 extern asmlinkage void qic_call_function_interrupt(void);
+/* SMP */
+extern void smp_apic_timer_interrupt(struct pt_regs *);
+#ifdef CONFIG_X86_32
+extern void smp_spurious_interrupt(struct pt_regs *);
+extern void smp_error_interrupt(struct pt_regs *);
+#else
+extern asmlinkage void smp_spurious_interrupt(void);
+extern asmlinkage void smp_error_interrupt(void);
+#endif
+#ifdef CONFIG_X86_SMP
+extern void smp_reschedule_interrupt(struct pt_regs *);
+extern void smp_call_function_interrupt(struct pt_regs *);
+extern void smp_call_function_single_interrupt(struct pt_regs *);
+#ifdef CONFIG_X86_32
+extern void smp_invalidate_interrupt(struct pt_regs *);
+#else
+extern asmlinkage void smp_invalidate_interrupt(struct pt_regs *);
+#endif
+#endif
 #ifdef CONFIG_X86_32
 extern void (*const interrupt[NR_IRQS])(void);
 #else
 typedef int vector_irq_t[NR_VECTORS];
 DECLARE_PER_CPU(vector_irq_t, vector_irq);
-extern spinlock_t vector_lock;
 #endif
-extern void setup_vector_irq(int cpu);
+#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_X86_64)
+extern void lock_vector_lock(void);
+extern void unlock_vector_lock(void);
+extern void __setup_vector_irq(int cpu);
+#else
+static inline void lock_vector_lock(void) {}
+static inline void unlock_vector_lock(void) {}
+static inline void __setup_vector_irq(int cpu) {}
+#endif
 #endif /* !ASSEMBLY_ */
-#endif
+#endif /* ASM_X86__HW_IRQ_H */
diff --git a/include/asm-x86/hypertransport.h b/include/asm-x86/hypertransport.h
index d2bbd238b3e1..cc011a3bc1c2 100644
--- a/include/asm-x86/hypertransport.h
+++ b/include/asm-x86/hypertransport.h
@@ -1,5 +1,5 @@
-#ifndef ASM_HYPERTRANSPORT_H
+#ifndef ASM_X86__HYPERTRANSPORT_H
-#define ASM_HYPERTRANSPORT_H
+#define ASM_X86__HYPERTRANSPORT_H
 /*
 * Constants for x86 Hypertransport Interrupts.
@@ -42,4 +42,4 @@
 #define HT_IRQ_HIGH_DEST_ID(v)                                          \
        ((((v) >> 8) << HT_IRQ_HIGH_DEST_ID_SHIFT) & HT_IRQ_HIGH_DEST_ID_MASK)
-#endif /* ASM_HYPERTRANSPORT_H */
+#endif /* ASM_X86__HYPERTRANSPORT_H */
diff --git a/include/asm-x86/i387.h b/include/asm-x86/i387.h
index 96fa8449ff11..9ba862a4eac0 100644
--- a/include/asm-x86/i387.h
+++ b/include/asm-x86/i387.h
@@ -7,34 +7,44 @@
 * x86-64 work by Andi Kleen 2002
 */
-#ifndef _ASM_X86_I387_H
+#ifndef ASM_X86__I387_H
-#define _ASM_X86_I387_H
+#define ASM_X86__I387_H
 #include <linux/sched.h>
 #include <linux/kernel_stat.h>
 #include <linux/regset.h>
+#include <linux/hardirq.h>
 #include <asm/asm.h>
 #include <asm/processor.h>
 #include <asm/sigcontext.h>
 #include <asm/user.h>
 #include <asm/uaccess.h>
+#include <asm/xsave.h>
+extern unsigned int sig_xstate_size;
 extern void fpu_init(void);
 extern void mxcsr_feature_mask_init(void);
 extern int init_fpu(struct task_struct *child);
 extern asmlinkage void math_state_restore(void);
 extern void init_thread_xstate(void);
+extern int dump_fpu(struct pt_regs *, struct user_i387_struct *);
 extern user_regset_active_fn fpregs_active, xfpregs_active;
 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
+extern struct _fpx_sw_bytes fx_sw_reserved;
 #ifdef CONFIG_IA32_EMULATION
+extern unsigned int sig_xstate_ia32_size;
+extern struct _fpx_sw_bytes fx_sw_reserved_ia32;
 struct _fpstate_ia32;
-extern int save_i387_ia32(struct _fpstate_ia32 __user *buf);
+struct _xstate_ia32;
-extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);
+extern int save_i387_xstate_ia32(void __user *buf);
+extern int restore_i387_xstate_ia32(void __user *buf);
 #endif
+#define X87_FSW_ES (1 << 7)     /* Exception Summary */
 #ifdef CONFIG_X86_64
 /* Ignore delayed exceptions from user space */
@@ -45,7 +55,7 @@ static inline void tolerant_fwait(void)
                     _ASM_EXTABLE(1b, 2b));
 }
-static inline int restore_fpu_checking(struct i387_fxsave_struct *fx)
+static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
 {
        int err;
@@ -62,20 +72,34 @@ static inline int restore_fpu_checking(struct i387_fxsave_struct *fx)
 #else
                     : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
 #endif
-        if (unlikely(err))
-                init_fpu(current);
        return err;
 }
-#define X87_FSW_ES (1 << 7)     /* Exception Summary */
+static inline int restore_fpu_checking(struct task_struct *tsk)
+{
+        if (task_thread_info(tsk)->status & TS_XSAVE)
+                return xrstor_checking(&tsk->thread.xstate->xsave);
+        else
+                return fxrstor_checking(&tsk->thread.xstate->fxsave);
+}
 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
   is pending. Clear the x87 state here by setting it to fixed
   values. The kernel data segment can be sometimes 0 and sometimes
   new user value. Both should be ok.
   Use the PDA as safe address because it should be already in L1. */
-static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
+static inline void clear_fpu_state(struct task_struct *tsk)
 {
+        struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
+        struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
+        /*
+         * xsave header may indicate the init state of the FP.
+         */
+        if ((task_thread_info(tsk)->status & TS_XSAVE) &&
+            !(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
+                return;
        if (unlikely(fx->swd & X87_FSW_ES))
                asm volatile("fnclex");
        alternative_input(ASM_NOP8 ASM_NOP2,
@@ -84,7 +108,7 @@ static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
                          X86_FEATURE_FXSAVE_LEAK);
 }
-static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
+static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
 {
        int err;
@@ -108,7 +132,7 @@ static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
        return err;
 }
-static inline void __save_init_fpu(struct task_struct *tsk)
+static inline void fxsave(struct task_struct *tsk)
 {
        /* Using "rex64; fxsave %0" is broken because, if the memory operand
           uses any extended registers for addressing, a second REX prefix
@@ -133,7 +157,16 @@ static inline void __save_init_fpu(struct task_struct *tsk)
                             : "=m" (tsk->thread.xstate->fxsave)
                             : "cdaSDb" (&tsk->thread.xstate->fxsave));
 #endif
-        clear_fpu_state(&tsk->thread.xstate->fxsave);
+}
+static inline void __save_init_fpu(struct task_struct *tsk)
+{
+        if (task_thread_info(tsk)->status & TS_XSAVE)
+                xsave(tsk);
+        else
+                fxsave(tsk);
+        clear_fpu_state(tsk);
        task_thread_info(tsk)->status &= ~TS_USEDFPU;
 }
@@ -148,6 +181,10 @@ static inline void tolerant_fwait(void)
 static inline void restore_fpu(struct task_struct *tsk)
 {
+        if (task_thread_info(tsk)->status & TS_XSAVE) {
+                xrstor_checking(&tsk->thread.xstate->xsave);
+                return;
+        }
        /*
         * The "nop" is needed to make the instructions the same
         * length.
@@ -173,6 +210,27 @@ static inline void restore_fpu(struct task_struct *tsk)
 */
 static inline void __save_init_fpu(struct task_struct *tsk)
 {
+        if (task_thread_info(tsk)->status & TS_XSAVE) {
+                struct xsave_struct *xstate = &tsk->thread.xstate->xsave;
+                struct i387_fxsave_struct *fx = &tsk->thread.xstate->fxsave;
+                xsave(tsk);
+                /*
+                 * xsave header may indicate the init state of the FP.
+                 */
+                if (!(xstate->xsave_hdr.xstate_bv & XSTATE_FP))
+                        goto end;
+                if (unlikely(fx->swd & X87_FSW_ES))
+                        asm volatile("fnclex");
+                /*
+                 * we can do a simple return here or be paranoid :)
+                 */
+                goto clear_state;
+        }
        /* Use more nops than strictly needed in case the compiler
           varies code */
        alternative_input(
@@ -182,6 +240,7 @@ static inline void __save_init_fpu(struct task_struct *tsk)
                X86_FEATURE_FXSR,
                [fx] "m" (tsk->thread.xstate->fxsave),
                [fsw] "m" (tsk->thread.xstate->fxsave.swd) : "memory");
+clear_state:
        /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
           is pending.  Clear the x87 state here by setting it to fixed
           values. safe_address is a random variable that should be in L1 */
@@ -191,16 +250,17 @@ static inline void __save_init_fpu(struct task_struct *tsk)
                "fildl %[addr]",        /* set F?P to defined value */
                X86_FEATURE_FXSAVE_LEAK,
                [addr] "m" (safe_address));
+end:
        task_thread_info(tsk)->status &= ~TS_USEDFPU;
 }
+#endif  /* CONFIG_X86_64 */
 /*
 * Signal frame handlers...
 */
-extern int save_i387(struct _fpstate __user *buf);
+extern int save_i387_xstate(void __user *buf);
-extern int restore_i387(struct _fpstate __user *buf);
+extern int restore_i387_xstate(void __user *buf);
-#endif  /* CONFIG_X86_64 */
 static inline void __unlazy_fpu(struct task_struct *tsk)
 {
@@ -236,6 +296,37 @@ static inline void kernel_fpu_end(void)
        preempt_enable();
 }
+/*
+ * Some instructions like VIA's padlock instructions generate a spurious
+ * DNA fault but don't modify SSE registers. And these instructions
+ * get used from interrupt context aswell. To prevent these kernel instructions
+ * in interrupt context interact wrongly with other user/kernel fpu usage, we
+ * should use them only in the context of irq_ts_save/restore()
+ */
+static inline int irq_ts_save(void)
+{
+        /*
+         * If we are in process context, we are ok to take a spurious DNA fault.
+         * Otherwise, doing clts() in process context require pre-emption to
+         * be disabled or some heavy lifting like kernel_fpu_begin()
+         */
+        if (!in_interrupt())
+                return 0;
+        if (read_cr0() & X86_CR0_TS) {
+                clts();
+                return 1;
+        }
+        return 0;
+}
+static inline void irq_ts_restore(int TS_state)
+{
+        if (TS_state)
+                stts();
+}
 #ifdef CONFIG_X86_64
 static inline void save_init_fpu(struct task_struct *tsk)
@@ -306,4 +397,4 @@ static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
        }
 }
-#endif  /* _ASM_X86_I387_H */
+#endif /* ASM_X86__I387_H */
diff --git a/include/asm-x86/i8253.h b/include/asm-x86/i8253.h
index b51c0487fc41..15a5b530044e 100644
--- a/include/asm-x86/i8253.h
+++ b/include/asm-x86/i8253.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_I8253_H__
+#ifndef ASM_X86__I8253_H
-#define __ASM_I8253_H__
+#define ASM_X86__I8253_H
 /* i8253A PIT registers */
 #define PIT_MODE                0x43
@@ -15,4 +15,4 @@ extern void setup_pit_timer(void);
 #define inb_pit         inb_p
 #define outb_pit        outb_p
-#endif  /* __ASM_I8253_H__ */
+#endif /* ASM_X86__I8253_H */
diff --git a/include/asm-x86/i8259.h b/include/asm-x86/i8259.h
index 2f98df91f1f2..23c1b3baaecd 100644
--- a/include/asm-x86/i8259.h
+++ b/include/asm-x86/i8259.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_I8259_H__
+#ifndef ASM_X86__I8259_H
-#define __ASM_I8259_H__
+#define ASM_X86__I8259_H
 #include <linux/delay.h>
@@ -57,4 +57,7 @@ static inline void outb_pic(unsigned char value, unsigned int port)
 extern struct irq_chip i8259A_chip;
-#endif  /* __ASM_I8259_H__ */
+extern void mask_8259A(void);
+extern void unmask_8259A(void);
+#endif /* ASM_X86__I8259_H */
diff --git a/include/asm-x86/ia32.h b/include/asm-x86/ia32.h
index 55d3abe5276f..f932f7ad51dd 100644
--- a/include/asm-x86/ia32.h
+++ b/include/asm-x86/ia32.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_64_IA32_H
+#ifndef ASM_X86__IA32_H
-#define _ASM_X86_64_IA32_H
+#define ASM_X86__IA32_H
 #ifdef CONFIG_IA32_EMULATION
@@ -167,4 +167,4 @@ extern void ia32_pick_mmap_layout(struct mm_struct *mm);
 #endif /* !CONFIG_IA32_SUPPORT */
-#endif
+#endif /* ASM_X86__IA32_H */
diff --git a/include/asm-x86/ia32_unistd.h b/include/asm-x86/ia32_unistd.h
index 61cea9e7c5c1..dbd887d8a5a5 100644
--- a/include/asm-x86/ia32_unistd.h
+++ b/include/asm-x86/ia32_unistd.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_64_IA32_UNISTD_H_
+#ifndef ASM_X86__IA32_UNISTD_H
-#define _ASM_X86_64_IA32_UNISTD_H_
+#define ASM_X86__IA32_UNISTD_H
 /*
 * This file contains the system call numbers of the ia32 port,
@@ -15,4 +15,4 @@
 #define __NR_ia32_sigreturn     119
 #define __NR_ia32_rt_sigreturn  173
-#endif /* _ASM_X86_64_IA32_UNISTD_H_ */
+#endif /* ASM_X86__IA32_UNISTD_H */
diff --git a/include/asm-x86/idle.h b/include/asm-x86/idle.h
index d240e5b30a45..baa3f783d27d 100644
--- a/include/asm-x86/idle.h
+++ b/include/asm-x86/idle.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_64_IDLE_H
+#ifndef ASM_X86__IDLE_H
-#define _ASM_X86_64_IDLE_H 1
+#define ASM_X86__IDLE_H
 #define IDLE_START 1
 #define IDLE_END 2
@@ -10,4 +10,6 @@ void idle_notifier_register(struct notifier_block *n);
 void enter_idle(void);
 void exit_idle(void);
-#endif
+void c1e_remove_cpu(int cpu);
+#endif /* ASM_X86__IDLE_H */
diff --git a/include/asm-x86/intel_arch_perfmon.h b/include/asm-x86/intel_arch_perfmon.h
index fa0fd068bc2e..07c03c6c9a16 100644
--- a/include/asm-x86/intel_arch_perfmon.h
+++ b/include/asm-x86/intel_arch_perfmon.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_INTEL_ARCH_PERFMON_H
+#ifndef ASM_X86__INTEL_ARCH_PERFMON_H
-#define _ASM_X86_INTEL_ARCH_PERFMON_H
+#define ASM_X86__INTEL_ARCH_PERFMON_H
 #define MSR_ARCH_PERFMON_PERFCTR0               0xc1
 #define MSR_ARCH_PERFMON_PERFCTR1               0xc2
@@ -28,4 +28,4 @@ union cpuid10_eax {
        unsigned int full;
 };
-#endif /* _ASM_X86_INTEL_ARCH_PERFMON_H */
+#endif /* ASM_X86__INTEL_ARCH_PERFMON_H */
diff --git a/include/asm-x86/io.h b/include/asm-x86/io.h
index bf5d629b3a39..72b7719523bf 100644
--- a/include/asm-x86/io.h
+++ b/include/asm-x86/io.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_IO_H
+#ifndef ASM_X86__IO_H
-#define _ASM_X86_IO_H
+#define ASM_X86__IO_H
 #define ARCH_HAS_IOREMAP_WC
@@ -21,7 +21,7 @@ extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
 #define build_mmio_read(name, size, type, reg, barrier) \
 static inline type name(const volatile void __iomem *addr) \
-{ type ret; asm volatile("mov" size " %1,%0":"=" reg (ret) \
+{ type ret; asm volatile("mov" size " %1,%0":reg (ret) \
 :"m" (*(volatile type __force *)addr) barrier); return ret; }
 #define build_mmio_write(name, size, type, reg, barrier) \
@@ -29,13 +29,13 @@ static inline void name(type val, volatile void __iomem *addr) \
 { asm volatile("mov" size " %0,%1": :reg (val), \
 "m" (*(volatile type __force *)addr) barrier); }
-build_mmio_read(readb, "b", unsigned char, "q", :"memory")
+build_mmio_read(readb, "b", unsigned char, "=q", :"memory")
-build_mmio_read(readw, "w", unsigned short, "r", :"memory")
+build_mmio_read(readw, "w", unsigned short, "=r", :"memory")
-build_mmio_read(readl, "l", unsigned int, "r", :"memory")
+build_mmio_read(readl, "l", unsigned int, "=r", :"memory")
-build_mmio_read(__readb, "b", unsigned char, "q", )
+build_mmio_read(__readb, "b", unsigned char, "=q", )
-build_mmio_read(__readw, "w", unsigned short, "r", )
+build_mmio_read(__readw, "w", unsigned short, "=r", )
-build_mmio_read(__readl, "l", unsigned int, "r", )
+build_mmio_read(__readl, "l", unsigned int, "=r", )
 build_mmio_write(writeb, "b", unsigned char, "q", :"memory")
 build_mmio_write(writew, "w", unsigned short, "r", :"memory")
@@ -59,8 +59,8 @@ build_mmio_write(__writel, "l", unsigned int, "r", )
 #define mmiowb() barrier()
 #ifdef CONFIG_X86_64
-build_mmio_read(readq, "q", unsigned long, "r", :"memory")
+build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
-build_mmio_read(__readq, "q", unsigned long, "r", )
+build_mmio_read(__readq, "q", unsigned long, "=r", )
 build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
 build_mmio_write(__writeq, "q", unsigned long, "r", )
@@ -73,6 +73,8 @@ build_mmio_write(__writeq, "q", unsigned long, "r", )
 #define writeq writeq
 #endif
+extern int iommu_bio_merge;
 #ifdef CONFIG_X86_32
 # include "io_32.h"
 #else
@@ -99,4 +101,4 @@ extern void early_iounmap(void *addr, unsigned long size);
 extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
-#endif /* _ASM_X86_IO_H */
+#endif /* ASM_X86__IO_H */
diff --git a/include/asm-x86/io_32.h b/include/asm-x86/io_32.h
index e876d89ac156..4f7d878bda18 100644
--- a/include/asm-x86/io_32.h
+++ b/include/asm-x86/io_32.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_IO_H
+#ifndef ASM_X86__IO_32_H
-#define _ASM_IO_H
+#define ASM_X86__IO_32_H
 #include <linux/string.h>
 #include <linux/compiler.h>
@@ -281,4 +281,4 @@ BUILDIO(b, b, char)
 BUILDIO(w, w, short)
 BUILDIO(l, , int)
-#endif
+#endif /* ASM_X86__IO_32_H */
diff --git a/include/asm-x86/io_64.h b/include/asm-x86/io_64.h
index 22995c5c5adc..64429e9431a8 100644
--- a/include/asm-x86/io_64.h
+++ b/include/asm-x86/io_64.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_IO_H
+#ifndef ASM_X86__IO_64_H
-#define _ASM_IO_H
+#define ASM_X86__IO_64_H
 /*
@@ -235,7 +235,6 @@ void memset_io(volatile void __iomem *a, int b, size_t c);
 #define flush_write_buffers()
-extern int iommu_bio_merge;
 #define BIO_VMERGE_BOUNDARY iommu_bio_merge
 /*
@@ -245,4 +244,4 @@ extern int iommu_bio_merge;
 #endif /* __KERNEL__ */
-#endif
+#endif /* ASM_X86__IO_64_H */
diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h
index 14f82bbcb5fd..8ec68a50cf10 100644
--- a/include/asm-x86/io_apic.h
+++ b/include/asm-x86/io_apic.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_IO_APIC_H
+#ifndef ASM_X86__IO_APIC_H
-#define __ASM_IO_APIC_H
+#define ASM_X86__IO_APIC_H
 #include <linux/types.h>
 #include <asm/mpspec.h>
@@ -107,6 +107,20 @@ struct IO_APIC_route_entry {
 } __attribute__ ((packed));
+struct IR_IO_APIC_route_entry {
+        __u64   vector          : 8,
+                zero            : 3,
+                index2          : 1,
+                delivery_status : 1,
+                polarity        : 1,
+                irr             : 1,
+                trigger         : 1,
+                mask            : 1,
+                reserved        : 31,
+                format          : 1,
+                index           : 15;
+} __attribute__ ((packed));
 #ifdef CONFIG_X86_IO_APIC
 /*
@@ -183,10 +197,16 @@ extern int io_apic_set_pci_routing(int ioapic, int pin, int irq,
 extern int (*ioapic_renumber_irq)(int ioapic, int irq);
 extern void ioapic_init_mappings(void);
+#ifdef CONFIG_X86_64
+extern int save_mask_IO_APIC_setup(void);
+extern void restore_IO_APIC_setup(void);
+extern void reinit_intr_remapped_IO_APIC(int);
+#endif
 #else  /* !CONFIG_X86_IO_APIC */
 #define io_apic_assign_pci_irqs 0
 static const int timer_through_8259 = 0;
 static inline void ioapic_init_mappings(void) { }
 #endif
-#endif
+#endif /* ASM_X86__IO_APIC_H */
diff --git a/include/asm-x86/ioctls.h b/include/asm-x86/ioctls.h
index c0c338bd4068..336603512399 100644
--- a/include/asm-x86/ioctls.h
+++ b/include/asm-x86/ioctls.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_IOCTLS_H
+#ifndef ASM_X86__IOCTLS_H
-#define _ASM_X86_IOCTLS_H
+#define ASM_X86__IOCTLS_H
 #include <asm/ioctl.h>
@@ -85,4 +85,4 @@
 #define TIOCSER_TEMT    0x01    /* Transmitter physically empty */
-#endif
+#endif /* ASM_X86__IOCTLS_H */
diff --git a/include/asm-x86/iommu.h b/include/asm-x86/iommu.h
index d63166fb3ab7..546ad3110fea 100644
--- a/include/asm-x86/iommu.h
+++ b/include/asm-x86/iommu.h
@@ -1,10 +1,14 @@
-#ifndef _ASM_X8664_IOMMU_H
+#ifndef ASM_X86__IOMMU_H
-#define _ASM_X8664_IOMMU_H 1
+#define ASM_X86__IOMMU_H
 extern void pci_iommu_shutdown(void);
 extern void no_iommu_init(void);
+extern struct dma_mapping_ops nommu_dma_ops;
 extern int force_iommu, no_iommu;
 extern int iommu_detected;
+extern int dmar_disabled;
+extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len);
 #ifdef CONFIG_GART_IOMMU
 extern int gart_iommu_aperture;
@@ -39,4 +43,4 @@ static inline void gart_iommu_hole_init(void)
 }
 #endif
-#endif
+#endif /* ASM_X86__IOMMU_H */
diff --git a/include/asm-x86/ipcbuf.h b/include/asm-x86/ipcbuf.h
index ee678fd51594..910304fbdc8f 100644
--- a/include/asm-x86/ipcbuf.h
+++ b/include/asm-x86/ipcbuf.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_IPCBUF_H
+#ifndef ASM_X86__IPCBUF_H
-#define _ASM_X86_IPCBUF_H
+#define ASM_X86__IPCBUF_H
 /*
 * The ipc64_perm structure for x86 architecture.
@@ -25,4 +25,4 @@ struct ipc64_perm {
        unsigned long           __unused2;
 };
-#endif /* _ASM_X86_IPCBUF_H */
+#endif /* ASM_X86__IPCBUF_H */
diff --git a/include/asm-x86/ipi.h b/include/asm-x86/ipi.h
index bb1c09f7a76c..30a692cfaff8 100644
--- a/include/asm-x86/ipi.h
+++ b/include/asm-x86/ipi.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_IPI_H
+#ifndef ASM_X86__IPI_H
-#define __ASM_IPI_H
+#define ASM_X86__IPI_H
 /*
 * Copyright 2004 James Cleverdon, IBM.
@@ -49,6 +49,12 @@ static inline int __prepare_ICR2(unsigned int mask)
        return SET_APIC_DEST_FIELD(mask);
 }
+static inline void __xapic_wait_icr_idle(void)
+{
+        while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
+                cpu_relax();
+}
 static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
                                       unsigned int dest)
 {
@@ -64,7 +70,7 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
        /*
         * Wait for idle.
         */
-        apic_wait_icr_idle();
+        __xapic_wait_icr_idle();
        /*
         * No need to touch the target chip field
@@ -74,7 +80,7 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
        /*
         * Send the IPI. The write to APIC_ICR fires this off.
         */
-        apic_write(APIC_ICR, cfg);
+        native_apic_mem_write(APIC_ICR, cfg);
 }
 /*
@@ -92,13 +98,13 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector,
        if (unlikely(vector == NMI_VECTOR))
                safe_apic_wait_icr_idle();
        else
-                apic_wait_icr_idle();
+                __xapic_wait_icr_idle();
        /*
         * prepare target chip field
         */
        cfg = __prepare_ICR2(mask);
-        apic_write(APIC_ICR2, cfg);
+        native_apic_mem_write(APIC_ICR2, cfg);
        /*
         * program the ICR
@@ -108,7 +114,7 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector,
        /*
         * Send the IPI. The write to APIC_ICR fires this off.
         */
-        apic_write(APIC_ICR, cfg);
+        native_apic_mem_write(APIC_ICR, cfg);
 }
 static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
@@ -129,4 +135,4 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
        local_irq_restore(flags);
 }
-#endif /* __ASM_IPI_H */
+#endif /* ASM_X86__IPI_H */
diff --git a/include/asm-x86/irq.h b/include/asm-x86/irq.h
index 1a2925757317..1e5f2909c1db 100644
--- a/include/asm-x86/irq.h
+++ b/include/asm-x86/irq.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_IRQ_H
+#ifndef ASM_X86__IRQ_H
-#define _ASM_IRQ_H
+#define ASM_X86__IRQ_H
 /*
 *      (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
 *
@@ -47,4 +47,4 @@ extern void native_init_IRQ(void);
 /* Interrupt vector management */
 extern DECLARE_BITMAP(used_vectors, NR_VECTORS);
-#endif /* _ASM_IRQ_H */
+#endif /* ASM_X86__IRQ_H */
diff --git a/include/asm-x86/irq_regs_32.h b/include/asm-x86/irq_regs_32.h
index 3368b20c0b48..316a3b258871 100644
--- a/include/asm-x86/irq_regs_32.h
+++ b/include/asm-x86/irq_regs_32.h
@@ -4,8 +4,8 @@
 *
 * Jeremy Fitzhardinge <jeremy@goop.org>
 */
-#ifndef _ASM_I386_IRQ_REGS_H
+#ifndef ASM_X86__IRQ_REGS_32_H
-#define _ASM_I386_IRQ_REGS_H
+#define ASM_X86__IRQ_REGS_32_H
 #include <asm/percpu.h>
@@ -26,4 +26,4 @@ static inline struct pt_regs *set_irq_regs(struct pt_regs *new_regs)
        return old_regs;
 }
-#endif /* _ASM_I386_IRQ_REGS_H */
+#endif /* ASM_X86__IRQ_REGS_32_H */
diff --git a/include/asm-x86/irq_remapping.h b/include/asm-x86/irq_remapping.h
new file mode 100644
index 000000000000..78242c6ffa58
--- /dev/null
+++ b/include/asm-x86/irq_remapping.h
@@ -0,0 +1,8 @@
+#ifndef _ASM_IRQ_REMAPPING_H
+#define _ASM_IRQ_REMAPPING_H
+extern int x2apic;
+#define IRTE_DEST(dest) ((x2apic) ? dest : dest << 8)
+#endif
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h
index 90b1d1f12f08..c5d2d767a1f3 100644
--- a/include/asm-x86/irq_vectors.h
+++ b/include/asm-x86/irq_vectors.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_IRQ_VECTORS_H
+#ifndef ASM_X86__IRQ_VECTORS_H
-#define _ASM_IRQ_VECTORS_H
+#define ASM_X86__IRQ_VECTORS_H
 #include <linux/threads.h>
@@ -76,6 +76,7 @@
 #define CALL_FUNCTION_SINGLE_VECTOR     0xfb
 #define THERMAL_APIC_VECTOR             0xfa
 #define THRESHOLD_APIC_VECTOR           0xf9
+#define UV_BAU_MESSAGE                  0xf8
 #define INVALIDATE_TLB_VECTOR_END       0xf7
 #define INVALIDATE_TLB_VECTOR_START     0xf0    /* f0-f7 used for TLB flush */
@@ -109,7 +110,15 @@
 #define LAST_VM86_IRQ           15
 #define invalid_vm86_irq(irq)   ((irq) < 3 || (irq) > 15)
-#if !defined(CONFIG_X86_VOYAGER)
+#ifdef CONFIG_X86_64
+# if NR_CPUS < MAX_IO_APICS
+#  define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
+# else
+#  define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
+# endif
+# define NR_IRQ_VECTORS NR_IRQS
+#elif !defined(CONFIG_X86_VOYAGER)
 # if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) || defined(CONFIG_X86_VISWS)
@@ -170,4 +179,4 @@
 #define VIC_CPU_BOOT_ERRATA_CPI         (VIC_CPI_LEVEL0 + 8)
-#endif /* _ASM_IRQ_VECTORS_H */
+#endif /* ASM_X86__IRQ_VECTORS_H */
diff --git a/include/asm-x86/ist.h b/include/asm-x86/ist.h
index 6ec6ceed95a7..35a2fe9bc921 100644
--- a/include/asm-x86/ist.h
+++ b/include/asm-x86/ist.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_IST_H
+#ifndef ASM_X86__IST_H
-#define _ASM_IST_H
+#define ASM_X86__IST_H
 /*
 * Include file for the interface to IST BIOS
@@ -31,4 +31,4 @@ struct ist_info {
 extern struct ist_info ist_info;
 #endif  /* __KERNEL__ */
-#endif  /* _ASM_IST_H */
+#endif /* ASM_X86__IST_H */
diff --git a/include/asm-x86/k8.h b/include/asm-x86/k8.h
index 452e2b696ff4..2bbaf4370a55 100644
--- a/include/asm-x86/k8.h
+++ b/include/asm-x86/k8.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_K8_H
+#ifndef ASM_X86__K8_H
-#define _ASM_K8_H 1
+#define ASM_X86__K8_H
 #include <linux/pci.h>
@@ -12,4 +12,4 @@ extern int cache_k8_northbridges(void);
 extern void k8_flush_garts(void);
 extern int k8_scan_nodes(unsigned long start, unsigned long end);
-#endif
+#endif /* ASM_X86__K8_H */
diff --git a/include/asm-x86/kdebug.h b/include/asm-x86/kdebug.h
index 96651bb59ba1..5ec3ad3e825c 100644
--- a/include/asm-x86/kdebug.h
+++ b/include/asm-x86/kdebug.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_KDEBUG_H
+#ifndef ASM_X86__KDEBUG_H
-#define _ASM_X86_KDEBUG_H
+#define ASM_X86__KDEBUG_H
 #include <linux/notifier.h>
@@ -35,4 +35,4 @@ extern void show_regs(struct pt_regs *regs);
 extern unsigned long oops_begin(void);
 extern void oops_end(unsigned long, struct pt_regs *, int signr);
-#endif
+#endif /* ASM_X86__KDEBUG_H */
diff --git a/include/asm-x86/kexec.h b/include/asm-x86/kexec.h
index 8f855a15f64d..ea09600d6129 100644
--- a/include/asm-x86/kexec.h
+++ b/include/asm-x86/kexec.h
@@ -1,5 +1,5 @@
-#ifndef _KEXEC_H
+#ifndef ASM_X86__KEXEC_H
-#define _KEXEC_H
+#define ASM_X86__KEXEC_H
 #ifdef CONFIG_X86_32
 # define PA_CONTROL_PAGE        0
@@ -10,14 +10,15 @@
 # define VA_PTE_0               5
 # define PA_PTE_1               6
 # define VA_PTE_1               7
+# define PA_SWAP_PAGE           8
 # ifdef CONFIG_X86_PAE
-#  define PA_PMD_0              8
+#  define PA_PMD_0              9
-#  define VA_PMD_0              9
+#  define VA_PMD_0              10
-#  define PA_PMD_1              10
+#  define PA_PMD_1              11
-#  define VA_PMD_1              11
+#  define VA_PMD_1              12
-#  define PAGES_NR              12
+#  define PAGES_NR              13
 # else
-#  define PAGES_NR              8
+#  define PAGES_NR              9
 # endif
 #else
 # define PA_CONTROL_PAGE        0
@@ -40,6 +41,10 @@
 # define PAGES_NR               17
 #endif
+#ifdef CONFIG_X86_32
+# define KEXEC_CONTROL_CODE_MAX_SIZE    2048
+#endif
 #ifndef __ASSEMBLY__
 #include <linux/string.h>
@@ -62,7 +67,7 @@
 /* Maximum address we can use for the control code buffer */
 # define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
-# define KEXEC_CONTROL_CODE_SIZE        4096
+# define KEXEC_CONTROL_PAGE_SIZE        4096
 /* The native architecture */
 # define KEXEC_ARCH KEXEC_ARCH_386
@@ -78,7 +83,7 @@
 # define KEXEC_CONTROL_MEMORY_LIMIT     (0xFFFFFFFFFFUL)
 /* Allocate one page for the pdp and the second for the code */
-# define KEXEC_CONTROL_CODE_SIZE  (4096UL + 4096UL)
+# define KEXEC_CONTROL_PAGE_SIZE  (4096UL + 4096UL)
 /* The native architecture */
 # define KEXEC_ARCH KEXEC_ARCH_X86_64
@@ -152,11 +157,12 @@ static inline void crash_setup_regs(struct pt_regs *newregs,
 }
 #ifdef CONFIG_X86_32
-asmlinkage NORET_TYPE void
+asmlinkage unsigned long
 relocate_kernel(unsigned long indirection_page,
                unsigned long control_page,
                unsigned long start_address,
-                unsigned int has_pae) ATTRIB_NORET;
+                unsigned int has_pae,
+                unsigned int preserve_context);
 #else
 NORET_TYPE void
 relocate_kernel(unsigned long indirection_page,
@@ -166,4 +172,4 @@ relocate_kernel(unsigned long indirection_page,
 #endif /* __ASSEMBLY__ */
-#endif /* _KEXEC_H */
+#endif /* ASM_X86__KEXEC_H */
diff --git a/include/asm-x86/kgdb.h b/include/asm-x86/kgdb.h
index 484c47554f3b..d283863354de 100644
--- a/include/asm-x86/kgdb.h
+++ b/include/asm-x86/kgdb.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_KGDB_H_
+#ifndef ASM_X86__KGDB_H
-#define _ASM_KGDB_H_
+#define ASM_X86__KGDB_H
 /*
 * Copyright (C) 2001-2004 Amit S. Kale
@@ -39,12 +39,13 @@ enum regnames {
        GDB_FS,                 /* 14 */
        GDB_GS,                 /* 15 */
 };
+#define NUMREGBYTES             ((GDB_GS+1)*4)
 #else /* ! CONFIG_X86_32 */
-enum regnames {
+enum regnames64 {
        GDB_AX,                 /* 0 */
-        GDB_DX,                 /* 1 */
+        GDB_BX,                 /* 1 */
        GDB_CX,                 /* 2 */
-        GDB_BX,                 /* 3 */
+        GDB_DX,                 /* 3 */
        GDB_SI,                 /* 4 */
        GDB_DI,                 /* 5 */
        GDB_BP,                 /* 6 */
@@ -58,18 +59,15 @@ enum regnames {
        GDB_R14,                /* 14 */
        GDB_R15,                /* 15 */
        GDB_PC,                 /* 16 */
-        GDB_PS,                 /* 17 */
 };
-#endif /* CONFIG_X86_32 */
-/*
+enum regnames32 {
- * Number of bytes of registers:
+        GDB_PS = 34,
- */
+        GDB_CS,
-#ifdef CONFIG_X86_32
+        GDB_SS,
-# define NUMREGBYTES            64
+};
-#else
+#define NUMREGBYTES             ((GDB_SS+1)*4)
-# define NUMREGBYTES            ((GDB_PS+1)*8)
+#endif /* CONFIG_X86_32 */
-#endif
 static inline void arch_kgdb_breakpoint(void)
 {
@@ -78,4 +76,4 @@ static inline void arch_kgdb_breakpoint(void)
 #define BREAK_INSTR_SIZE        1
 #define CACHE_FLUSH_IS_SAFE     1
-#endif                          /* _ASM_KGDB_H_ */
+#endif /* ASM_X86__KGDB_H */
diff --git a/include/asm-x86/kmap_types.h b/include/asm-x86/kmap_types.h
index 5f4174132a22..89f44493e643 100644
--- a/include/asm-x86/kmap_types.h
+++ b/include/asm-x86/kmap_types.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_KMAP_TYPES_H
+#ifndef ASM_X86__KMAP_TYPES_H
-#define _ASM_X86_KMAP_TYPES_H
+#define ASM_X86__KMAP_TYPES_H
 #if defined(CONFIG_X86_32) && defined(CONFIG_DEBUG_HIGHMEM)
 # define D(n) __KM_FENCE_##n ,
@@ -26,4 +26,4 @@ D(13)	KM_TYPE_NR
 #undef D
-#endif
+#endif /* ASM_X86__KMAP_TYPES_H */
diff --git a/include/asm-x86/kprobes.h b/include/asm-x86/kprobes.h
index 54980b0b3892..bd8407863c13 100644
--- a/include/asm-x86/kprobes.h
+++ b/include/asm-x86/kprobes.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_KPROBES_H
+#ifndef ASM_X86__KPROBES_H
-#define _ASM_KPROBES_H
+#define ASM_X86__KPROBES_H
 /*
 *  Kernel Probes (KProbes)
 *
@@ -94,4 +94,4 @@ static inline void restore_interrupts(struct pt_regs *regs)
 extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr);
 extern int kprobe_exceptions_notify(struct notifier_block *self,
                                    unsigned long val, void *data);
-#endif                          /* _ASM_KPROBES_H */
+#endif /* ASM_X86__KPROBES_H */
diff --git a/include/asm-x86/kvm.h b/include/asm-x86/kvm.h
index 6f1840812e59..78e954db1e7f 100644
--- a/include/asm-x86/kvm.h
+++ b/include/asm-x86/kvm.h
@@ -1,5 +1,5 @@
-#ifndef __LINUX_KVM_X86_H
+#ifndef ASM_X86__KVM_H
-#define __LINUX_KVM_X86_H
+#define ASM_X86__KVM_H
 /*
 * KVM x86 specific structures and definitions
@@ -230,4 +230,4 @@ struct kvm_pit_state {
 #define KVM_TRC_APIC_ACCESS      (KVM_TRC_HANDLER + 0x14)
 #define KVM_TRC_TDP_FAULT        (KVM_TRC_HANDLER + 0x15)
-#endif
+#endif /* ASM_X86__KVM_H */
diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h
index fdde0bedaa90..69794547f514 100644
--- a/include/asm-x86/kvm_host.h
+++ b/include/asm-x86/kvm_host.h
@@ -1,4 +1,4 @@
-#/*
+/*
 * Kernel-based Virtual Machine driver for Linux
 *
 * This header defines architecture specific interfaces, x86 version
@@ -8,11 +8,12 @@
 *
 */
-#ifndef ASM_KVM_HOST_H
+#ifndef ASM_X86__KVM_HOST_H
-#define ASM_KVM_HOST_H
+#define ASM_X86__KVM_HOST_H
 #include <linux/types.h>
 #include <linux/mm.h>
+#include <linux/mmu_notifier.h>
 #include <linux/kvm.h>
 #include <linux/kvm_para.h>
@@ -251,6 +252,7 @@ struct kvm_vcpu_arch {
                gfn_t gfn;      /* presumed gfn during guest pte update */
                pfn_t pfn;      /* pfn corresponding to that gfn */
                int largepage;
+                unsigned long mmu_seq;
        } update_pte;
        struct i387_fxsave_struct host_fx_image;
@@ -556,6 +558,7 @@ int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
 void kvm_enable_tdp(void);
+void kvm_disable_tdp(void);
 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
 int complete_pio(struct kvm_vcpu *vcpu);
@@ -719,7 +722,7 @@ asmlinkage void kvm_handle_fault_on_reboot(void);
 #define __kvm_handle_fault_on_reboot(insn) \
        "666: " insn "\n\t" \
-        ".pushsection .text.fixup, \"ax\" \n" \
+        ".pushsection .fixup, \"ax\" \n" \
        "667: \n\t" \
        KVM_EX_PUSH " $666b \n\t" \
        "jmp kvm_handle_fault_on_reboot \n\t" \
@@ -728,4 +731,8 @@ asmlinkage void kvm_handle_fault_on_reboot(void);
        KVM_EX_ENTRY " 666b, 667b \n\t" \
        ".popsection"
-#endif
+#define KVM_ARCH_WANT_MMU_NOTIFIER
+int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
+int kvm_age_hva(struct kvm *kvm, unsigned long hva);
+#endif /* ASM_X86__KVM_HOST_H */
diff --git a/include/asm-x86/kvm_para.h b/include/asm-x86/kvm_para.h
index 76f392146daa..30054fded4fb 100644
--- a/include/asm-x86/kvm_para.h
+++ b/include/asm-x86/kvm_para.h
@@ -1,5 +1,5 @@
-#ifndef __X86_KVM_PARA_H
+#ifndef ASM_X86__KVM_PARA_H
-#define __X86_KVM_PARA_H
+#define ASM_X86__KVM_PARA_H
 /* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx.  It
 * should be used to determine that a VM is running under KVM.
@@ -144,4 +144,4 @@ static inline unsigned int kvm_arch_para_features(void)
 #endif
-#endif
+#endif /* ASM_X86__KVM_PARA_H */
diff --git a/include/asm-x86/kvm_x86_emulate.h b/include/asm-x86/kvm_x86_emulate.h
index 4e8c1e48d91d..e2d9b030c1ac 100644
--- a/include/asm-x86/kvm_x86_emulate.h
+++ b/include/asm-x86/kvm_x86_emulate.h
@@ -8,8 +8,8 @@
 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
 */
-#ifndef __X86_EMULATE_H__
+#ifndef ASM_X86__KVM_X86_EMULATE_H
-#define __X86_EMULATE_H__
+#define ASM_X86__KVM_X86_EMULATE_H
 struct x86_emulate_ctxt;
@@ -181,4 +181,4 @@ int x86_decode_insn(struct x86_emulate_ctxt *ctxt,
 int x86_emulate_insn(struct x86_emulate_ctxt *ctxt,
                     struct x86_emulate_ops *ops);
-#endif                          /* __X86_EMULATE_H__ */
+#endif /* ASM_X86__KVM_X86_EMULATE_H */
diff --git a/include/asm-x86/ldt.h b/include/asm-x86/ldt.h
index 20c597242b53..a5228504d867 100644
--- a/include/asm-x86/ldt.h
+++ b/include/asm-x86/ldt.h
@@ -3,8 +3,8 @@
 *
 * Definitions of structures used with the modify_ldt system call.
 */
-#ifndef _ASM_X86_LDT_H
+#ifndef ASM_X86__LDT_H
-#define _ASM_X86_LDT_H
+#define ASM_X86__LDT_H
 /* Maximum number of LDT entries supported. */
 #define LDT_ENTRIES     8192
@@ -37,4 +37,4 @@ struct user_desc {
 #define MODIFY_LDT_CONTENTS_CODE        2
 #endif /* !__ASSEMBLY__ */
-#endif
+#endif /* ASM_X86__LDT_H */
diff --git a/include/asm-x86/lguest.h b/include/asm-x86/lguest.h
index be4a7247fa2b..7505e947ed27 100644
--- a/include/asm-x86/lguest.h
+++ b/include/asm-x86/lguest.h
@@ -1,5 +1,5 @@
-#ifndef _X86_LGUEST_H
+#ifndef ASM_X86__LGUEST_H
-#define _X86_LGUEST_H
+#define ASM_X86__LGUEST_H
 #define GDT_ENTRY_LGUEST_CS     10
 #define GDT_ENTRY_LGUEST_DS     11
@@ -91,4 +91,4 @@ static inline void lguest_set_ts(void)
 #endif /* __ASSEMBLY__ */
-#endif
+#endif /* ASM_X86__LGUEST_H */
diff --git a/include/asm-x86/lguest_hcall.h b/include/asm-x86/lguest_hcall.h
index a3241f28e34a..8f034ba4b53e 100644
--- a/include/asm-x86/lguest_hcall.h
+++ b/include/asm-x86/lguest_hcall.h
@@ -1,6 +1,6 @@
 /* Architecture specific portion of the lguest hypercalls */
-#ifndef _X86_LGUEST_HCALL_H
+#ifndef ASM_X86__LGUEST_HCALL_H
-#define _X86_LGUEST_HCALL_H
+#define ASM_X86__LGUEST_HCALL_H
 #define LHCALL_FLUSH_ASYNC      0
 #define LHCALL_LGUEST_INIT      1
@@ -68,4 +68,4 @@ struct hcall_args {
 };
 #endif /* !__ASSEMBLY__ */
-#endif  /* _I386_LGUEST_HCALL_H */
+#endif /* ASM_X86__LGUEST_HCALL_H */
diff --git a/include/asm-x86/linkage.h b/include/asm-x86/linkage.h
index 64e444f8e85b..42d8b62ee8ab 100644
--- a/include/asm-x86/linkage.h
+++ b/include/asm-x86/linkage.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_LINKAGE_H
+#ifndef ASM_X86__LINKAGE_H
-#define __ASM_LINKAGE_H
+#define ASM_X86__LINKAGE_H
 #undef notrace
 #define notrace __attribute__((no_instrument_function))
@@ -57,5 +57,5 @@
 #define __ALIGN_STR ".align 16,0x90"
 #endif
-#endif
+#endif /* ASM_X86__LINKAGE_H */
diff --git a/include/asm-x86/local.h b/include/asm-x86/local.h
index 330a72496abd..ae91994fd6c9 100644
--- a/include/asm-x86/local.h
+++ b/include/asm-x86/local.h
@@ -1,5 +1,5 @@
-#ifndef _ARCH_LOCAL_H
+#ifndef ASM_X86__LOCAL_H
-#define _ARCH_LOCAL_H
+#define ASM_X86__LOCAL_H
 #include <linux/percpu.h>
@@ -232,4 +232,4 @@ static inline long local_sub_return(long i, local_t *l)
 #define __cpu_local_add(i, l)   cpu_local_add((i), (l))
 #define __cpu_local_sub(i, l)   cpu_local_sub((i), (l))
-#endif /* _ARCH_LOCAL_H */
+#endif /* ASM_X86__LOCAL_H */
diff --git a/include/asm-x86/mach-bigsmp/mach_apicdef.h b/include/asm-x86/mach-bigsmp/mach_apicdef.h
deleted file mode 100644
index a58ab5a75c8c..000000000000
--- a/include/asm-x86/mach-bigsmp/mach_apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __ASM_MACH_APICDEF_H
-#define __ASM_MACH_APICDEF_H
-#define         APIC_ID_MASK            (0xFF<<24)
-static inline unsigned get_apic_id(unsigned long x) 
-{ 
-        return (((x)>>24)&0xFF);
-} 
-#define         GET_APIC_ID(x)  get_apic_id(x)
-#endif
diff --git a/include/asm-x86/mach-default/apm.h b/include/asm-x86/mach-default/apm.h
index 989f34c37d32..2aa61b54fbd5 100644
--- a/include/asm-x86/mach-default/apm.h
+++ b/include/asm-x86/mach-default/apm.h
@@ -3,8 +3,8 @@
 *  Split out from apm.c by Osamu Tomita <tomita@cinet.co.jp>
 */
-#ifndef _ASM_APM_H
+#ifndef ASM_X86__MACH_DEFAULT__APM_H
-#define _ASM_APM_H
+#define ASM_X86__MACH_DEFAULT__APM_H
 #ifdef APM_ZERO_SEGS
 #       define APM_DO_ZERO_SEGS \
@@ -70,4 +70,4 @@ static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in,
        return error;
 }
-#endif /* _ASM_APM_H */
+#endif /* ASM_X86__MACH_DEFAULT__APM_H */
diff --git a/include/asm-x86/mach-default/mach_apic.h b/include/asm-x86/mach-default/mach_apic.h
index f3226b9a6b82..2a330a41b3dd 100644
--- a/include/asm-x86/mach-default/mach_apic.h
+++ b/include/asm-x86/mach-default/mach_apic.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_APIC_H
+#ifndef ASM_X86__MACH_DEFAULT__MACH_APIC_H
-#define __ASM_MACH_APIC_H
+#define ASM_X86__MACH_DEFAULT__MACH_APIC_H
 #ifdef CONFIG_X86_LOCAL_APIC
@@ -30,6 +30,8 @@ static inline cpumask_t target_cpus(void)
 #define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
 #define phys_pkg_id     (genapic->phys_pkg_id)
 #define vector_allocation_domain    (genapic->vector_allocation_domain)
+#define read_apic_id()  (GET_APIC_ID(apic_read(APIC_ID)))
+#define send_IPI_self (genapic->send_IPI_self)
 extern void setup_apic_routing(void);
 #else
 #define INT_DELIVERY_MODE dest_LowestPrio
@@ -54,7 +56,7 @@ static inline void init_apic_ldr(void)
 static inline int apic_id_registered(void)
 {
-        return physid_isset(GET_APIC_ID(read_apic_id()), phys_cpu_present_map);
+        return physid_isset(read_apic_id(), phys_cpu_present_map);
 }
 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
@@ -138,4 +140,4 @@ static inline void enable_apic_mode(void)
 }
 #endif /* CONFIG_X86_LOCAL_APIC */
-#endif /* __ASM_MACH_APIC_H */
+#endif /* ASM_X86__MACH_DEFAULT__MACH_APIC_H */
diff --git a/include/asm-x86/mach-default/mach_apicdef.h b/include/asm-x86/mach-default/mach_apicdef.h
index e4b29ba37de6..0c2d41c41b20 100644
--- a/include/asm-x86/mach-default/mach_apicdef.h
+++ b/include/asm-x86/mach-default/mach_apicdef.h
@@ -1,12 +1,12 @@
-#ifndef __ASM_MACH_APICDEF_H
+#ifndef ASM_X86__MACH_DEFAULT__MACH_APICDEF_H
-#define __ASM_MACH_APICDEF_H
+#define ASM_X86__MACH_DEFAULT__MACH_APICDEF_H
 #include <asm/apic.h>
 #ifdef CONFIG_X86_64
-#define APIC_ID_MASK            (0xFFu<<24)
+#define APIC_ID_MASK            (genapic->apic_id_mask)
-#define GET_APIC_ID(x)          (((x)>>24)&0xFFu)
+#define GET_APIC_ID(x)          (genapic->get_apic_id(x))
-#define SET_APIC_ID(x)          (((x)<<24))
+#define SET_APIC_ID(x)          (genapic->set_apic_id(x))
 #else
 #define         APIC_ID_MASK            (0xF<<24)
 static inline unsigned get_apic_id(unsigned long x) 
@@ -21,4 +21,4 @@ static inline unsigned get_apic_id(unsigned long x)
 #define         GET_APIC_ID(x)  get_apic_id(x)
 #endif
-#endif
+#endif /* ASM_X86__MACH_DEFAULT__MACH_APICDEF_H */
diff --git a/include/asm-x86/mach-default/mach_ipi.h b/include/asm-x86/mach-default/mach_ipi.h
index be323364e68f..674bc7e50c35 100644
--- a/include/asm-x86/mach-default/mach_ipi.h
+++ b/include/asm-x86/mach-default/mach_ipi.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_IPI_H
+#ifndef ASM_X86__MACH_DEFAULT__MACH_IPI_H
-#define __ASM_MACH_IPI_H
+#define ASM_X86__MACH_DEFAULT__MACH_IPI_H
 /* Avoid include hell */
 #define NMI_VECTOR 0x02
@@ -61,4 +61,4 @@ static inline void send_IPI_all(int vector)
 }
 #endif
-#endif /* __ASM_MACH_IPI_H */
+#endif /* ASM_X86__MACH_DEFAULT__MACH_IPI_H */
diff --git a/include/asm-x86/mach-default/mach_mpparse.h b/include/asm-x86/mach-default/mach_mpparse.h
index d14108505bb8..9c381f2815ac 100644
--- a/include/asm-x86/mach-default/mach_mpparse.h
+++ b/include/asm-x86/mach-default/mach_mpparse.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_MPPARSE_H
+#ifndef ASM_X86__MACH_DEFAULT__MACH_MPPARSE_H
-#define __ASM_MACH_MPPARSE_H
+#define ASM_X86__MACH_DEFAULT__MACH_MPPARSE_H
 static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, 
                char *productid)
@@ -14,4 +14,4 @@ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 }
-#endif /* __ASM_MACH_MPPARSE_H */
+#endif /* ASM_X86__MACH_DEFAULT__MACH_MPPARSE_H */
diff --git a/include/asm-x86/mach-default/mach_mpspec.h b/include/asm-x86/mach-default/mach_mpspec.h
index 51c9a9775932..d77646f011f1 100644
--- a/include/asm-x86/mach-default/mach_mpspec.h
+++ b/include/asm-x86/mach-default/mach_mpspec.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_MPSPEC_H
+#ifndef ASM_X86__MACH_DEFAULT__MACH_MPSPEC_H
-#define __ASM_MACH_MPSPEC_H
+#define ASM_X86__MACH_DEFAULT__MACH_MPSPEC_H
 #define MAX_IRQ_SOURCES 256
@@ -9,4 +9,4 @@
 #define MAX_MP_BUSSES 32
 #endif
-#endif /* __ASM_MACH_MPSPEC_H */
+#endif /* ASM_X86__MACH_DEFAULT__MACH_MPSPEC_H */
diff --git a/include/asm-x86/mach-default/mach_timer.h b/include/asm-x86/mach-default/mach_timer.h
index 4b76e536cd98..990b15833834 100644
--- a/include/asm-x86/mach-default/mach_timer.h
+++ b/include/asm-x86/mach-default/mach_timer.h
@@ -10,8 +10,8 @@
 * directly because of the awkward 8-bit access mechanism of the 82C54
 * device.
 */
-#ifndef _MACH_TIMER_H
+#ifndef ASM_X86__MACH_DEFAULT__MACH_TIMER_H
-#define _MACH_TIMER_H
+#define ASM_X86__MACH_DEFAULT__MACH_TIMER_H
 #define CALIBRATE_TIME_MSEC 30 /* 30 msecs */
 #define CALIBRATE_LATCH \
@@ -45,4 +45,4 @@ static inline void mach_countup(unsigned long *count_p)
        *count_p = count;
 }
-#endif /* !_MACH_TIMER_H */
+#endif /* ASM_X86__MACH_DEFAULT__MACH_TIMER_H */
diff --git a/include/asm-x86/mach-default/mach_traps.h b/include/asm-x86/mach-default/mach_traps.h
index 2fe7705c0484..de9ac3f5c4ce 100644
--- a/include/asm-x86/mach-default/mach_traps.h
+++ b/include/asm-x86/mach-default/mach_traps.h
@@ -2,8 +2,8 @@
 *  Machine specific NMI handling for generic.
 *  Split out from traps.c by Osamu Tomita <tomita@cinet.co.jp>
 */
-#ifndef _MACH_TRAPS_H
+#ifndef ASM_X86__MACH_DEFAULT__MACH_TRAPS_H
-#define _MACH_TRAPS_H
+#define ASM_X86__MACH_DEFAULT__MACH_TRAPS_H
 #include <asm/mc146818rtc.h>
@@ -36,4 +36,4 @@ static inline void reassert_nmi(void)
                unlock_cmos();
 }
-#endif /* !_MACH_TRAPS_H */
+#endif /* ASM_X86__MACH_DEFAULT__MACH_TRAPS_H */
diff --git a/include/asm-x86/mach-default/mach_wakecpu.h b/include/asm-x86/mach-default/mach_wakecpu.h
index 3ebb17893aa5..361b810f5160 100644
--- a/include/asm-x86/mach-default/mach_wakecpu.h
+++ b/include/asm-x86/mach-default/mach_wakecpu.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_WAKECPU_H
+#ifndef ASM_X86__MACH_DEFAULT__MACH_WAKECPU_H
-#define __ASM_MACH_WAKECPU_H
+#define ASM_X86__MACH_DEFAULT__MACH_WAKECPU_H
 /* 
 * This file copes with machines that wakeup secondary CPUs by the
@@ -39,4 +39,4 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
 #define inquire_remote_apic(apicid) {}
 #endif
-#endif /* __ASM_MACH_WAKECPU_H */
+#endif /* ASM_X86__MACH_DEFAULT__MACH_WAKECPU_H */
diff --git a/include/asm-x86/mach-generic/gpio.h b/include/asm-x86/mach-generic/gpio.h
index 5305dcb96df2..6ce0f7786ef8 100644
--- a/include/asm-x86/mach-generic/gpio.h
+++ b/include/asm-x86/mach-generic/gpio.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_GENERIC_GPIO_H
+#ifndef ASM_X86__MACH_GENERIC__GPIO_H
-#define __ASM_MACH_GENERIC_GPIO_H
+#define ASM_X86__MACH_GENERIC__GPIO_H
 int gpio_request(unsigned gpio, const char *label);
 void gpio_free(unsigned gpio);
@@ -12,4 +12,4 @@ int irq_to_gpio(unsigned irq);
 #include <asm-generic/gpio.h>           /* cansleep wrappers */
-#endif /* __ASM_MACH_GENERIC_GPIO_H */
+#endif /* ASM_X86__MACH_GENERIC__GPIO_H */
diff --git a/include/asm-x86/mach-generic/irq_vectors_limits.h b/include/asm-x86/mach-generic/irq_vectors_limits.h
index 890ce3f5e09a..f7870e1a220d 100644
--- a/include/asm-x86/mach-generic/irq_vectors_limits.h
+++ b/include/asm-x86/mach-generic/irq_vectors_limits.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_IRQ_VECTORS_LIMITS_H
+#ifndef ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H
-#define _ASM_IRQ_VECTORS_LIMITS_H
+#define ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H
 /*
 * For Summit or generic (i.e. installer) kernels, we have lots of I/O APICs,
@@ -11,4 +11,4 @@
 #define NR_IRQS 224
 #define NR_IRQ_VECTORS  1024
-#endif /* _ASM_IRQ_VECTORS_LIMITS_H */
+#endif /* ASM_X86__MACH_GENERIC__IRQ_VECTORS_LIMITS_H */
diff --git a/include/asm-x86/mach-generic/mach_apic.h b/include/asm-x86/mach-generic/mach_apic.h
index 6eff343e1233..5d010c6881dd 100644
--- a/include/asm-x86/mach-generic/mach_apic.h
+++ b/include/asm-x86/mach-generic/mach_apic.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_APIC_H
+#ifndef ASM_X86__MACH_GENERIC__MACH_APIC_H
-#define __ASM_MACH_APIC_H
+#define ASM_X86__MACH_GENERIC__MACH_APIC_H
 #include <asm/genapic.h>
@@ -29,4 +29,4 @@
 extern void generic_bigsmp_probe(void);
-#endif /* __ASM_MACH_APIC_H */
+#endif /* ASM_X86__MACH_GENERIC__MACH_APIC_H */
diff --git a/include/asm-x86/mach-generic/mach_apicdef.h b/include/asm-x86/mach-generic/mach_apicdef.h
index 28ed98972ca8..1657f38b8f27 100644
--- a/include/asm-x86/mach-generic/mach_apicdef.h
+++ b/include/asm-x86/mach-generic/mach_apicdef.h
@@ -1,5 +1,5 @@
-#ifndef _GENAPIC_MACH_APICDEF_H
+#ifndef ASM_X86__MACH_GENERIC__MACH_APICDEF_H
-#define _GENAPIC_MACH_APICDEF_H 1
+#define ASM_X86__MACH_GENERIC__MACH_APICDEF_H
 #ifndef APIC_DEFINITION
 #include <asm/genapic.h>
@@ -8,4 +8,4 @@
 #define APIC_ID_MASK (genapic->apic_id_mask)
 #endif
-#endif
+#endif /* ASM_X86__MACH_GENERIC__MACH_APICDEF_H */
diff --git a/include/asm-x86/mach-generic/mach_ipi.h b/include/asm-x86/mach-generic/mach_ipi.h
index 441b0fe3ed1d..f67433dbd65f 100644
--- a/include/asm-x86/mach-generic/mach_ipi.h
+++ b/include/asm-x86/mach-generic/mach_ipi.h
@@ -1,5 +1,5 @@
-#ifndef _MACH_IPI_H
+#ifndef ASM_X86__MACH_GENERIC__MACH_IPI_H
-#define _MACH_IPI_H 1
+#define ASM_X86__MACH_GENERIC__MACH_IPI_H
 #include <asm/genapic.h>
@@ -7,4 +7,4 @@
 #define send_IPI_allbutself (genapic->send_IPI_allbutself)
 #define send_IPI_all (genapic->send_IPI_all)
-#endif
+#endif /* ASM_X86__MACH_GENERIC__MACH_IPI_H */
diff --git a/include/asm-x86/mach-generic/mach_mpparse.h b/include/asm-x86/mach-generic/mach_mpparse.h
index 586cadbf3787..3115564e557c 100644
--- a/include/asm-x86/mach-generic/mach_mpparse.h
+++ b/include/asm-x86/mach-generic/mach_mpparse.h
@@ -1,5 +1,5 @@
-#ifndef _MACH_MPPARSE_H
+#ifndef ASM_X86__MACH_GENERIC__MACH_MPPARSE_H
-#define _MACH_MPPARSE_H 1
+#define ASM_X86__MACH_GENERIC__MACH_MPPARSE_H
 extern int mps_oem_check(struct mp_config_table *mpc, char *oem,
@@ -7,4 +7,4 @@ extern int mps_oem_check(struct mp_config_table *mpc, char *oem,
 extern int acpi_madt_oem_check(char *oem_id, char *oem_table_id);
-#endif
+#endif /* ASM_X86__MACH_GENERIC__MACH_MPPARSE_H */
diff --git a/include/asm-x86/mach-generic/mach_mpspec.h b/include/asm-x86/mach-generic/mach_mpspec.h
index c83c120be538..6061b153613e 100644
--- a/include/asm-x86/mach-generic/mach_mpspec.h
+++ b/include/asm-x86/mach-generic/mach_mpspec.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_MPSPEC_H
+#ifndef ASM_X86__MACH_GENERIC__MACH_MPSPEC_H
-#define __ASM_MACH_MPSPEC_H
+#define ASM_X86__MACH_GENERIC__MACH_MPSPEC_H
 #define MAX_IRQ_SOURCES 256
@@ -9,4 +9,4 @@
 extern void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem,
                                char *productid);
-#endif /* __ASM_MACH_MPSPEC_H */
+#endif /* ASM_X86__MACH_GENERIC__MACH_MPSPEC_H */
diff --git a/include/asm-x86/mach-rdc321x/gpio.h b/include/asm-x86/mach-rdc321x/gpio.h
index acce0b7d397b..94b6cdf532e2 100644
--- a/include/asm-x86/mach-rdc321x/gpio.h
+++ b/include/asm-x86/mach-rdc321x/gpio.h
@@ -1,5 +1,7 @@
-#ifndef _RDC321X_GPIO_H
+#ifndef ASM_X86__MACH_RDC321X__GPIO_H
-#define _RDC321X_GPIO_H
+#define ASM_X86__MACH_RDC321X__GPIO_H
+#include <linux/kernel.h>
 extern int rdc_gpio_get_value(unsigned gpio);
 extern void rdc_gpio_set_value(unsigned gpio, int value);
@@ -18,6 +20,7 @@ static inline int gpio_request(unsigned gpio, const char *label)
 static inline void gpio_free(unsigned gpio)
 {
+        might_sleep();
        rdc_gpio_free(gpio);
 }
@@ -54,4 +57,4 @@ static inline int irq_to_gpio(unsigned irq)
 /* For cansleep */
 #include <asm-generic/gpio.h>
-#endif /* _RDC321X_GPIO_H_ */
+#endif /* ASM_X86__MACH_RDC321X__GPIO_H */
diff --git a/include/asm-x86/mach-summit/mach_apicdef.h b/include/asm-x86/mach-summit/mach_apicdef.h
deleted file mode 100644
index a58ab5a75c8c..000000000000
--- a/include/asm-x86/mach-summit/mach_apicdef.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#ifndef __ASM_MACH_APICDEF_H
-#define __ASM_MACH_APICDEF_H
-#define         APIC_ID_MASK            (0xFF<<24)
-static inline unsigned get_apic_id(unsigned long x) 
-{ 
-        return (((x)>>24)&0xFF);
-} 
-#define         GET_APIC_ID(x)  get_apic_id(x)
-#endif
diff --git a/include/asm-x86/math_emu.h b/include/asm-x86/math_emu.h
index 9bf4ae93ab10..5768d8e95c8c 100644
--- a/include/asm-x86/math_emu.h
+++ b/include/asm-x86/math_emu.h
@@ -1,5 +1,5 @@
-#ifndef _I386_MATH_EMU_H
+#ifndef ASM_X86__MATH_EMU_H
-#define _I386_MATH_EMU_H
+#define ASM_X86__MATH_EMU_H
 /* This structure matches the layout of the data saved to the stack
   following a device-not-present interrupt, part of it saved
@@ -28,4 +28,4 @@ struct info {
        long ___vm86_fs;
        long ___vm86_gs;
 };
-#endif
+#endif /* ASM_X86__MATH_EMU_H */
diff --git a/include/asm-x86/mc146818rtc.h b/include/asm-x86/mc146818rtc.h
index daf1ccde77af..a995f33176cd 100644
--- a/include/asm-x86/mc146818rtc.h
+++ b/include/asm-x86/mc146818rtc.h
@@ -1,8 +1,8 @@
 /*
 * Machine dependent access functions for RTC registers.
 */
-#ifndef _ASM_MC146818RTC_H
+#ifndef ASM_X86__MC146818RTC_H
-#define _ASM_MC146818RTC_H
+#define ASM_X86__MC146818RTC_H
 #include <asm/io.h>
 #include <asm/system.h>
@@ -101,4 +101,4 @@ extern unsigned long mach_get_cmos_time(void);
 #define RTC_IRQ 8
-#endif /* _ASM_MC146818RTC_H */
+#endif /* ASM_X86__MC146818RTC_H */
diff --git a/include/asm-x86/mca.h b/include/asm-x86/mca.h
index 09adf2eac4dc..60d1ed287b13 100644
--- a/include/asm-x86/mca.h
+++ b/include/asm-x86/mca.h
@@ -1,8 +1,8 @@
 /* -*- mode: c; c-basic-offset: 8 -*- */
 /* Platform specific MCA defines */
-#ifndef _ASM_MCA_H
+#ifndef ASM_X86__MCA_H
-#define _ASM_MCA_H
+#define ASM_X86__MCA_H
 /* Maximal number of MCA slots - actually, some machines have less, but
 * they all have sufficient number of POS registers to cover 8.
@@ -40,4 +40,4 @@
 */
 #define MCA_NUMADAPTERS (MCA_MAX_SLOT_NR+3)
-#endif
+#endif /* ASM_X86__MCA_H */
diff --git a/include/asm-x86/mca_dma.h b/include/asm-x86/mca_dma.h
index c3dca6edc6b1..49f22be237d2 100644
--- a/include/asm-x86/mca_dma.h
+++ b/include/asm-x86/mca_dma.h
@@ -1,5 +1,5 @@
-#ifndef MCA_DMA_H
+#ifndef ASM_X86__MCA_DMA_H
-#define MCA_DMA_H
+#define ASM_X86__MCA_DMA_H
 #include <asm/io.h>
 #include <linux/ioport.h>
@@ -198,4 +198,4 @@ static inline void mca_set_dma_mode(unsigned int dmanr, unsigned int mode)
        outb(mode, MCA_DMA_REG_EXE);
 }
-#endif /* MCA_DMA_H */
+#endif /* ASM_X86__MCA_DMA_H */
diff --git a/include/asm-x86/mce.h b/include/asm-x86/mce.h
index 94f1fd79e22a..036133eaf744 100644
--- a/include/asm-x86/mce.h
+++ b/include/asm-x86/mce.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_MCE_H
+#ifndef ASM_X86__MCE_H
-#define _ASM_X86_MCE_H
+#define ASM_X86__MCE_H
 #ifdef __x86_64__
@@ -92,6 +92,7 @@ extern int mce_disabled;
 void mce_log(struct mce *m);
 DECLARE_PER_CPU(struct sys_device, device_mce);
+extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
 #ifdef CONFIG_X86_MCE_INTEL
 void mce_intel_feature_init(struct cpuinfo_x86 *c);
@@ -126,4 +127,4 @@ extern void restart_mce(void);
 #endif /* __KERNEL__ */
-#endif
+#endif /* ASM_X86__MCE_H */
diff --git a/include/asm-x86/microcode.h b/include/asm-x86/microcode.h
new file mode 100644
index 000000000000..62c793bb70ca
--- /dev/null
+++ b/include/asm-x86/microcode.h
@@ -0,0 +1,47 @@
+#ifndef ASM_X86__MICROCODE_H
+#define ASM_X86__MICROCODE_H
+struct cpu_signature {
+        unsigned int sig;
+        unsigned int pf;
+        unsigned int rev;
+};
+struct device;
+struct microcode_ops {
+        int  (*request_microcode_user) (int cpu, const void __user *buf, size_t size);
+        int  (*request_microcode_fw) (int cpu, struct device *device);
+        void (*apply_microcode) (int cpu);
+        int  (*collect_cpu_info) (int cpu, struct cpu_signature *csig);
+        void (*microcode_fini_cpu) (int cpu);
+};
+struct ucode_cpu_info {
+        struct cpu_signature cpu_sig;
+        int valid;
+        void *mc;
+};
+extern struct ucode_cpu_info ucode_cpu_info[];
+#ifdef CONFIG_MICROCODE_INTEL
+extern struct microcode_ops * __init init_intel_microcode(void);
+#else
+static inline struct microcode_ops * __init init_intel_microcode(void)
+{
+        return NULL;
+}
+#endif /* CONFIG_MICROCODE_INTEL */
+#ifdef CONFIG_MICROCODE_AMD
+extern struct microcode_ops * __init init_amd_microcode(void);
+#else
+static inline struct microcode_ops * __init init_amd_microcode(void)
+{
+        return NULL;
+}
+#endif
+#endif /* ASM_X86__MICROCODE_H */
diff --git a/include/asm-x86/mman.h b/include/asm-x86/mman.h
index c1682b542daf..4ef28e6de383 100644
--- a/include/asm-x86/mman.h
+++ b/include/asm-x86/mman.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_MMAN_H
+#ifndef ASM_X86__MMAN_H
-#define _ASM_X86_MMAN_H
+#define ASM_X86__MMAN_H
 #include <asm-generic/mman.h>
@@ -12,8 +12,9 @@
 #define MAP_NORESERVE   0x4000          /* don't check for reservations */
 #define MAP_POPULATE    0x8000          /* populate (prefault) pagetables */
 #define MAP_NONBLOCK    0x10000         /* do not block on IO */
+#define MAP_STACK       0x20000         /* give out an address that is best suited for process/thread stacks */
 #define MCL_CURRENT     1               /* lock all current mappings */
 #define MCL_FUTURE      2               /* lock all future mappings */
-#endif /* _ASM_X86_MMAN_H */
+#endif /* ASM_X86__MMAN_H */
diff --git a/include/asm-x86/mmconfig.h b/include/asm-x86/mmconfig.h
index 95beda07c6fa..fb79b1cf5d07 100644
--- a/include/asm-x86/mmconfig.h
+++ b/include/asm-x86/mmconfig.h
@@ -1,12 +1,12 @@
-#ifndef _ASM_MMCONFIG_H
+#ifndef ASM_X86__MMCONFIG_H
-#define _ASM_MMCONFIG_H
+#define ASM_X86__MMCONFIG_H
 #ifdef CONFIG_PCI_MMCONFIG
 extern void __cpuinit fam10h_check_enable_mmcfg(void);
-extern void __init check_enable_amd_mmconf_dmi(void);
+extern void __cpuinit check_enable_amd_mmconf_dmi(void);
 #else
 static inline void fam10h_check_enable_mmcfg(void) { }
 static inline void check_enable_amd_mmconf_dmi(void) { }
 #endif
-#endif
+#endif /* ASM_X86__MMCONFIG_H */
diff --git a/include/asm-x86/mmu.h b/include/asm-x86/mmu.h
index 00e88679e11f..9d5aff14334a 100644
--- a/include/asm-x86/mmu.h
+++ b/include/asm-x86/mmu.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_MMU_H
+#ifndef ASM_X86__MMU_H
-#define _ASM_X86_MMU_H
+#define ASM_X86__MMU_H
 #include <linux/spinlock.h>
 #include <linux/mutex.h>
@@ -7,14 +7,9 @@
 /*
 * The x86 doesn't have a mmu context, but
 * we put the segment information here.
- *
- * cpu_vm_mask is used to optimize ldt flushing.
 */
 typedef struct {
        void *ldt;
-#ifdef CONFIG_X86_64
-        rwlock_t ldtlock;
-#endif
        int size;
        struct mutex lock;
        void *vdso;
@@ -28,4 +23,4 @@ static inline void leave_mm(int cpu)
 }
 #endif
-#endif /* _ASM_X86_MMU_H */
+#endif /* ASM_X86__MMU_H */
diff --git a/include/asm-x86/mmu_context.h b/include/asm-x86/mmu_context.h
index fac57014e7c6..8ec940bfd079 100644
--- a/include/asm-x86/mmu_context.h
+++ b/include/asm-x86/mmu_context.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_X86_MMU_CONTEXT_H
+#ifndef ASM_X86__MMU_CONTEXT_H
-#define __ASM_X86_MMU_CONTEXT_H
+#define ASM_X86__MMU_CONTEXT_H
 #include <asm/desc.h>
 #include <asm/atomic.h>
@@ -34,4 +34,4 @@ do {						\
 } while (0);
-#endif /* __ASM_X86_MMU_CONTEXT_H */
+#endif /* ASM_X86__MMU_CONTEXT_H */
diff --git a/include/asm-x86/mmu_context_32.h b/include/asm-x86/mmu_context_32.h
index 824fc575c6d8..cce6f6e4afd6 100644
--- a/include/asm-x86/mmu_context_32.h
+++ b/include/asm-x86/mmu_context_32.h
@@ -1,5 +1,5 @@
-#ifndef __I386_SCHED_H
+#ifndef ASM_X86__MMU_CONTEXT_32_H
-#define __I386_SCHED_H
+#define ASM_X86__MMU_CONTEXT_32_H
 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
@@ -53,4 +53,4 @@ static inline void switch_mm(struct mm_struct *prev,
 #define deactivate_mm(tsk, mm)                  \
        asm("movl %0,%%gs": :"r" (0));
-#endif
+#endif /* ASM_X86__MMU_CONTEXT_32_H */
diff --git a/include/asm-x86/mmu_context_64.h b/include/asm-x86/mmu_context_64.h
index c7000634ccae..26758673c828 100644
--- a/include/asm-x86/mmu_context_64.h
+++ b/include/asm-x86/mmu_context_64.h
@@ -1,5 +1,5 @@
-#ifndef __X86_64_MMU_CONTEXT_H
+#ifndef ASM_X86__MMU_CONTEXT_64_H
-#define __X86_64_MMU_CONTEXT_H
+#define ASM_X86__MMU_CONTEXT_64_H
 #include <asm/pda.h>
@@ -51,4 +51,4 @@ do {						\
        asm volatile("movl %0,%%fs"::"r"(0));   \
 } while (0)
-#endif
+#endif /* ASM_X86__MMU_CONTEXT_64_H */
diff --git a/include/asm-x86/mmx.h b/include/asm-x86/mmx.h
index 940881218ff8..2e7299bb3653 100644
--- a/include/asm-x86/mmx.h
+++ b/include/asm-x86/mmx.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_MMX_H
+#ifndef ASM_X86__MMX_H
-#define _ASM_MMX_H
+#define ASM_X86__MMX_H
 /*
 *      MMX 3Dnow! helper operations
@@ -11,4 +11,4 @@ extern void *_mmx_memcpy(void *to, const void *from, size_t size);
 extern void mmx_clear_page(void *page);
 extern void mmx_copy_page(void *to, void *from);
-#endif
+#endif /* ASM_X86__MMX_H */
diff --git a/include/asm-x86/mmzone_32.h b/include/asm-x86/mmzone_32.h
index b2298a227567..121b65d61d86 100644
--- a/include/asm-x86/mmzone_32.h
+++ b/include/asm-x86/mmzone_32.h
@@ -3,8 +3,8 @@
 *
 */
-#ifndef _ASM_MMZONE_H_
+#ifndef ASM_X86__MMZONE_32_H
-#define _ASM_MMZONE_H_
+#define ASM_X86__MMZONE_32_H
 #include <asm/smp.h>
@@ -97,10 +97,16 @@ static inline int pfn_valid(int pfn)
        reserve_bootmem_node(NODE_DATA(0), (addr), (size), (flags))
 #define alloc_bootmem(x) \
        __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS))
+#define alloc_bootmem_nopanic(x) \
+        __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), SMP_CACHE_BYTES, \
+                                __pa(MAX_DMA_ADDRESS))
 #define alloc_bootmem_low(x) \
        __alloc_bootmem_node(NODE_DATA(0), (x), SMP_CACHE_BYTES, 0)
 #define alloc_bootmem_pages(x) \
        __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, __pa(MAX_DMA_ADDRESS))
+#define alloc_bootmem_pages_nopanic(x) \
+        __alloc_bootmem_node_nopanic(NODE_DATA(0), (x), PAGE_SIZE, \
+                                __pa(MAX_DMA_ADDRESS))
 #define alloc_bootmem_low_pages(x) \
        __alloc_bootmem_node(NODE_DATA(0), (x), PAGE_SIZE, 0)
 #define alloc_bootmem_node(pgdat, x)                                    \
@@ -125,4 +131,4 @@ static inline int pfn_valid(int pfn)
 })
 #endif /* CONFIG_NEED_MULTIPLE_NODES */
-#endif /* _ASM_MMZONE_H_ */
+#endif /* ASM_X86__MMZONE_32_H */
diff --git a/include/asm-x86/mmzone_64.h b/include/asm-x86/mmzone_64.h
index 594bd0dc1d08..6480f3333b2a 100644
--- a/include/asm-x86/mmzone_64.h
+++ b/include/asm-x86/mmzone_64.h
@@ -1,13 +1,13 @@
 /* K8 NUMA support */
 /* Copyright 2002,2003 by Andi Kleen, SuSE Labs */
 /* 2.5 Version loosely based on the NUMAQ Code by Pat Gaughen. */
-#ifndef _ASM_X86_64_MMZONE_H
+#ifndef ASM_X86__MMZONE_64_H
-#define _ASM_X86_64_MMZONE_H 1
+#define ASM_X86__MMZONE_64_H
 #ifdef CONFIG_NUMA
-#define VIRTUAL_BUG_ON(x)
+#include <linux/mmdebug.h>
 #include <asm/smp.h>
@@ -29,7 +29,6 @@ static inline __attribute__((pure)) int phys_to_nid(unsigned long addr)
 {
        unsigned nid;
        VIRTUAL_BUG_ON(!memnodemap);
-        VIRTUAL_BUG_ON((addr >> memnode_shift) >= memnodemapsize);
        nid = memnodemap[addr >> memnode_shift];
        VIRTUAL_BUG_ON(nid >= MAX_NUMNODES || !node_data[nid]);
        return nid;
@@ -49,4 +48,4 @@ extern int early_pfn_to_nid(unsigned long pfn);
 #endif
 #endif
-#endif
+#endif /* ASM_X86__MMZONE_64_H */
diff --git a/include/asm-x86/module.h b/include/asm-x86/module.h
index bfedb247871c..48dc3e0c07d9 100644
--- a/include/asm-x86/module.h
+++ b/include/asm-x86/module.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_MODULE_H
+#ifndef ASM_X86__MODULE_H
-#define _ASM_MODULE_H
+#define ASM_X86__MODULE_H
 /* x86_32/64 are simple */
 struct mod_arch_specific {};
@@ -79,4 +79,4 @@ struct mod_arch_specific {};
 # define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY MODULE_STACKSIZE
 #endif
-#endif /* _ASM_MODULE_H */
+#endif /* ASM_X86__MODULE_H */
diff --git a/include/asm-x86/mpspec.h b/include/asm-x86/mpspec.h
index b6995e567fcc..be2241a818f1 100644
--- a/include/asm-x86/mpspec.h
+++ b/include/asm-x86/mpspec.h
@@ -1,15 +1,16 @@
-#ifndef _AM_X86_MPSPEC_H
+#ifndef ASM_X86__MPSPEC_H
-#define _AM_X86_MPSPEC_H
+#define ASM_X86__MPSPEC_H
 #include <linux/init.h>
 #include <asm/mpspec_def.h>
+extern int apic_version[MAX_APICS];
 #ifdef CONFIG_X86_32
 #include <mach_mpspec.h>
 extern unsigned int def_to_bigsmp;
-extern int apic_version[MAX_APICS];
 extern u8 apicid_2_node[];
 extern int pic_mode;
@@ -141,4 +142,4 @@ static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
 extern physid_mask_t phys_cpu_present_map;
-#endif
+#endif /* ASM_X86__MPSPEC_H */
diff --git a/include/asm-x86/mpspec_def.h b/include/asm-x86/mpspec_def.h
index 38d1e73b49e4..79166b048012 100644
--- a/include/asm-x86/mpspec_def.h
+++ b/include/asm-x86/mpspec_def.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MPSPEC_DEF_H
+#ifndef ASM_X86__MPSPEC_DEF_H
-#define __ASM_MPSPEC_DEF_H
+#define ASM_X86__MPSPEC_DEF_H
 /*
 * Structure definitions for SMP machines following the
@@ -177,4 +177,4 @@ enum mp_bustype {
        MP_BUS_PCI,
        MP_BUS_MCA,
 };
-#endif
+#endif /* ASM_X86__MPSPEC_DEF_H */
diff --git a/include/asm-x86/msgbuf.h b/include/asm-x86/msgbuf.h
index 7e4e9481f51c..1b538c907a3d 100644
--- a/include/asm-x86/msgbuf.h
+++ b/include/asm-x86/msgbuf.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_MSGBUF_H
+#ifndef ASM_X86__MSGBUF_H
-#define _ASM_X86_MSGBUF_H
+#define ASM_X86__MSGBUF_H
 /*
 * The msqid64_ds structure for i386 architecture.
@@ -36,4 +36,4 @@ struct msqid64_ds {
        unsigned long  __unused5;
 };
-#endif /* _ASM_X86_MSGBUF_H */
+#endif /* ASM_X86__MSGBUF_H */
diff --git a/include/asm-x86/msidef.h b/include/asm-x86/msidef.h
index 296f29ce426d..ed9190246876 100644
--- a/include/asm-x86/msidef.h
+++ b/include/asm-x86/msidef.h
@@ -1,5 +1,5 @@
-#ifndef ASM_MSIDEF_H
+#ifndef ASM_X86__MSIDEF_H
-#define ASM_MSIDEF_H
+#define ASM_X86__MSIDEF_H
 /*
 * Constants for Intel APIC based MSI messages.
@@ -48,4 +48,8 @@
 #define  MSI_ADDR_DEST_ID(dest)         (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \
                                         MSI_ADDR_DEST_ID_MASK)
-#endif /* ASM_MSIDEF_H */
+#define MSI_ADDR_IR_EXT_INT             (1 << 4)
+#define MSI_ADDR_IR_SHV                 (1 << 3)
+#define MSI_ADDR_IR_INDEX1(index)       ((index & 0x8000) >> 13)
+#define MSI_ADDR_IR_INDEX2(index)       ((index & 0x7fff) << 5)
+#endif /* ASM_X86__MSIDEF_H */
diff --git a/include/asm-x86/msr-index.h b/include/asm-x86/msr-index.h
index 44bce773012e..0bb43301a202 100644
--- a/include/asm-x86/msr-index.h
+++ b/include/asm-x86/msr-index.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MSR_INDEX_H
+#ifndef ASM_X86__MSR_INDEX_H
-#define __ASM_MSR_INDEX_H
+#define ASM_X86__MSR_INDEX_H
 /* CPU model specific register (MSR) numbers */
@@ -176,6 +176,7 @@
 #define MSR_IA32_TSC                    0x00000010
 #define MSR_IA32_PLATFORM_ID            0x00000017
 #define MSR_IA32_EBL_CR_POWERON         0x0000002a
+#define MSR_IA32_FEATURE_CONTROL        0x0000003a
 #define MSR_IA32_APICBASE               0x0000001b
 #define MSR_IA32_APICBASE_BSP           (1<<8)
@@ -310,4 +311,19 @@
 /* Geode defined MSRs */
 #define MSR_GEODE_BUSCONT_CONF0         0x00001900
-#endif /* __ASM_MSR_INDEX_H */
+/* Intel VT MSRs */
+#define MSR_IA32_VMX_BASIC              0x00000480
+#define MSR_IA32_VMX_PINBASED_CTLS      0x00000481
+#define MSR_IA32_VMX_PROCBASED_CTLS     0x00000482
+#define MSR_IA32_VMX_EXIT_CTLS          0x00000483
+#define MSR_IA32_VMX_ENTRY_CTLS         0x00000484
+#define MSR_IA32_VMX_MISC               0x00000485
+#define MSR_IA32_VMX_CR0_FIXED0         0x00000486
+#define MSR_IA32_VMX_CR0_FIXED1         0x00000487
+#define MSR_IA32_VMX_CR4_FIXED0         0x00000488
+#define MSR_IA32_VMX_CR4_FIXED1         0x00000489
+#define MSR_IA32_VMX_VMCS_ENUM          0x0000048a
+#define MSR_IA32_VMX_PROCBASED_CTLS2    0x0000048b
+#define MSR_IA32_VMX_EPT_VPID_CAP       0x0000048c
+#endif /* ASM_X86__MSR_INDEX_H */
diff --git a/include/asm-x86/msr.h b/include/asm-x86/msr.h
index ca110ee73f07..530af1f6389e 100644
--- a/include/asm-x86/msr.h
+++ b/include/asm-x86/msr.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_X86_MSR_H_
+#ifndef ASM_X86__MSR_H
-#define __ASM_X86_MSR_H_
+#define ASM_X86__MSR_H
 #include <asm/msr-index.h>
@@ -52,6 +52,22 @@ static inline unsigned long long native_read_msr_safe(unsigned int msr,
 {
        DECLARE_ARGS(val, low, high);
+        asm volatile("2: rdmsr ; xor %[err],%[err]\n"
+                     "1:\n\t"
+                     ".section .fixup,\"ax\"\n\t"
+                     "3:  mov %[fault],%[err] ; jmp 1b\n\t"
+                     ".previous\n\t"
+                     _ASM_EXTABLE(2b, 3b)
+                     : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
+                     : "c" (msr), [fault] "i" (-EFAULT));
+        return EAX_EDX_VAL(val, low, high);
+}
+static inline unsigned long long native_read_msr_amd_safe(unsigned int msr,
+                                                      int *err)
+{
+        DECLARE_ARGS(val, low, high);
        asm volatile("2: rdmsr ; xor %0,%0\n"
                     "1:\n\t"
                     ".section .fixup,\"ax\"\n\t"
@@ -59,7 +75,7 @@ static inline unsigned long long native_read_msr_safe(unsigned int msr,
                     ".previous\n\t"
                     _ASM_EXTABLE(2b, 3b)
                     : "=r" (*err), EAX_EDX_RET(val, low, high)
-                     : "c" (msr), "i" (-EFAULT));
+                     : "c" (msr), "D" (0x9c5a203a), "i" (-EFAULT));
        return EAX_EDX_VAL(val, low, high);
 }
@@ -73,15 +89,15 @@ static inline int native_write_msr_safe(unsigned int msr,
                                        unsigned low, unsigned high)
 {
        int err;
-        asm volatile("2: wrmsr ; xor %0,%0\n"
+        asm volatile("2: wrmsr ; xor %[err],%[err]\n"
                     "1:\n\t"
                     ".section .fixup,\"ax\"\n\t"
-                     "3:  mov %4,%0 ; jmp 1b\n\t"
+                     "3:  mov %[fault],%[err] ; jmp 1b\n\t"
                     ".previous\n\t"
                     _ASM_EXTABLE(2b, 3b)
-                     : "=a" (err)
+                     : [err] "=a" (err)
                     : "c" (msr), "0" (low), "d" (high),
-                       "i" (-EFAULT)
+                       [fault] "i" (-EFAULT)
                     : "memory");
        return err;
 }
@@ -158,6 +174,13 @@ static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
        *p = native_read_msr_safe(msr, &err);
        return err;
 }
+static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
+{
+        int err;
+        *p = native_read_msr_amd_safe(msr, &err);
+        return err;
+}
 #define rdtscl(low)                                             \
        ((low) = (u32)native_read_tsc())
@@ -192,19 +215,20 @@ do {                                                            \
 #define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0)
 #ifdef CONFIG_SMP
-void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
+int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
-void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
+int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
 int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
 #else  /*  CONFIG_SMP  */
-static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
+static inline int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
 {
        rdmsr(msr_no, *l, *h);
+        return 0;
 }
-static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
+static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
 {
        wrmsr(msr_no, l, h);
+        return 0;
 }
 static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
                                    u32 *l, u32 *h)
@@ -220,4 +244,4 @@ static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
 #endif /* __KERNEL__ */
-#endif
+#endif /* ASM_X86__MSR_H */
diff --git a/include/asm-x86/mtrr.h b/include/asm-x86/mtrr.h
index a69a01a51729..23a7f83da953 100644
--- a/include/asm-x86/mtrr.h
+++ b/include/asm-x86/mtrr.h
@@ -20,8 +20,8 @@
    The postal address is:
      Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
 */
-#ifndef _ASM_X86_MTRR_H
+#ifndef ASM_X86__MTRR_H
-#define _ASM_X86_MTRR_H
+#define ASM_X86__MTRR_H
 #include <linux/ioctl.h>
 #include <linux/errno.h>
@@ -170,4 +170,4 @@ struct mtrr_gentry32 {
 #endif /* __KERNEL__ */
-#endif  /*  _ASM_X86_MTRR_H  */
+#endif /* ASM_X86__MTRR_H */
diff --git a/include/asm-x86/mutex_32.h b/include/asm-x86/mutex_32.h
index 73e928ef5f03..25c16d8ba3c7 100644
--- a/include/asm-x86/mutex_32.h
+++ b/include/asm-x86/mutex_32.h
@@ -6,8 +6,8 @@
 *
 *  Copyright (C) 2004, 2005, 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
 */
-#ifndef _ASM_MUTEX_H
+#ifndef ASM_X86__MUTEX_32_H
-#define _ASM_MUTEX_H
+#define ASM_X86__MUTEX_32_H
 #include <asm/alternative.h>
@@ -122,4 +122,4 @@ static inline int __mutex_fastpath_trylock(atomic_t *count,
 #endif
 }
-#endif
+#endif /* ASM_X86__MUTEX_32_H */
diff --git a/include/asm-x86/mutex_64.h b/include/asm-x86/mutex_64.h
index f3fae9becb38..918ba21ab9d9 100644
--- a/include/asm-x86/mutex_64.h
+++ b/include/asm-x86/mutex_64.h
@@ -6,8 +6,8 @@
 *
 *  Copyright (C) 2004, 2005, 2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
 */
-#ifndef _ASM_MUTEX_H
+#ifndef ASM_X86__MUTEX_64_H
-#define _ASM_MUTEX_H
+#define ASM_X86__MUTEX_64_H
 /**
 * __mutex_fastpath_lock - decrement and call function if negative
@@ -97,4 +97,4 @@ static inline int __mutex_fastpath_trylock(atomic_t *count,
                return 0;
 }
-#endif
+#endif /* ASM_X86__MUTEX_64_H */
diff --git a/include/asm-x86/namei.h b/include/asm-x86/namei.h
deleted file mode 100644
index 415ef5d9550e..000000000000
--- a/include/asm-x86/namei.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef _ASM_X86_NAMEI_H
-#define _ASM_X86_NAMEI_H
-/* This dummy routine maybe changed to something useful
- * for /usr/gnemul/ emulation stuff.
- * Look at asm-sparc/namei.h for details.
- */
-#define __emul_prefix() NULL
-#endif /* _ASM_X86_NAMEI_H */
diff --git a/include/asm-x86/nmi.h b/include/asm-x86/nmi.h
index 21f8d0202a82..d5e715f024dc 100644
--- a/include/asm-x86/nmi.h
+++ b/include/asm-x86/nmi.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_NMI_H_
+#ifndef ASM_X86__NMI_H
-#define _ASM_X86_NMI_H_
+#define ASM_X86__NMI_H
 #include <linux/pm.h>
 #include <asm/irq.h>
@@ -34,6 +34,7 @@ extern void stop_apic_nmi_watchdog(void *);
 extern void disable_timer_nmi_watchdog(void);
 extern void enable_timer_nmi_watchdog(void);
 extern int nmi_watchdog_tick(struct pt_regs *regs, unsigned reason);
+extern void cpu_nmi_set_wd_enabled(void);
 extern atomic_t nmi_active;
 extern unsigned int nmi_watchdog;
@@ -81,4 +82,4 @@ void enable_lapic_nmi_watchdog(void);
 void stop_nmi(void);
 void restart_nmi(void);
-#endif
+#endif /* ASM_X86__NMI_H */
diff --git a/include/asm-x86/nops.h b/include/asm-x86/nops.h
index ad0bedd10b89..ae742721ae73 100644
--- a/include/asm-x86/nops.h
+++ b/include/asm-x86/nops.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_NOPS_H
+#ifndef ASM_X86__NOPS_H
-#define _ASM_NOPS_H 1
+#define ASM_X86__NOPS_H
 /* Define nops for use with alternative() */
@@ -115,4 +115,4 @@
 #define ASM_NOP_MAX 8
-#endif
+#endif /* ASM_X86__NOPS_H */
diff --git a/include/asm-x86/numa_32.h b/include/asm-x86/numa_32.h
index 220d7b7707a0..44cb07855c5b 100644
--- a/include/asm-x86/numa_32.h
+++ b/include/asm-x86/numa_32.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_32_NUMA_H
+#ifndef ASM_X86__NUMA_32_H
-#define _ASM_X86_32_NUMA_H 1
+#define ASM_X86__NUMA_32_H
 extern int pxm_to_nid(int pxm);
 extern void numa_remove_cpu(int cpu);
@@ -8,4 +8,4 @@ extern void numa_remove_cpu(int cpu);
 extern void set_highmem_pages_init(void);
 #endif
-#endif /* _ASM_X86_32_NUMA_H */
+#endif /* ASM_X86__NUMA_32_H */
diff --git a/include/asm-x86/numa_64.h b/include/asm-x86/numa_64.h
index 3830094434a9..15c990395b02 100644
--- a/include/asm-x86/numa_64.h
+++ b/include/asm-x86/numa_64.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X8664_NUMA_H
+#ifndef ASM_X86__NUMA_64_H
-#define _ASM_X8664_NUMA_H 1
+#define ASM_X86__NUMA_64_H
 #include <linux/nodemask.h>
 #include <asm/apicdef.h>
@@ -40,4 +40,4 @@ static inline void numa_add_cpu(int cpu, int node)	{ }
 static inline void numa_remove_cpu(int cpu)             { }
 #endif
-#endif
+#endif /* ASM_X86__NUMA_64_H */
diff --git a/include/asm-x86/numaq.h b/include/asm-x86/numaq.h
index 34b92d581fa3..124bf7d4b70a 100644
--- a/include/asm-x86/numaq.h
+++ b/include/asm-x86/numaq.h
@@ -23,8 +23,8 @@
 * Send feedback to <gone@us.ibm.com>
 */
-#ifndef NUMAQ_H
+#ifndef ASM_X86__NUMAQ_H
-#define NUMAQ_H
+#define ASM_X86__NUMAQ_H
 #ifdef CONFIG_X86_NUMAQ
@@ -165,5 +165,5 @@ static inline int get_memcfg_numaq(void)
        return 0;
 }
 #endif /* CONFIG_X86_NUMAQ */
-#endif /* NUMAQ_H */
+#endif /* ASM_X86__NUMAQ_H */
diff --git a/include/asm-x86/mach-numaq/mach_apic.h b/include/asm-x86/numaq/apic.h
index d802465e026a..a8344ba6ea15 100644
--- a/include/asm-x86/mach-numaq/mach_apic.h
+++ b/include/asm-x86/numaq/apic.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_APIC_H
+#ifndef __ASM_NUMAQ_APIC_H
-#define __ASM_MACH_APIC_H
+#define __ASM_NUMAQ_APIC_H
 #include <asm/io.h>
 #include <linux/mmzone.h>
@@ -135,4 +135,4 @@ static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
        return cpuid_apic >> index_msb;
 }
-#endif /* __ASM_MACH_APIC_H */
+#endif /* __ASM_NUMAQ_APIC_H */
diff --git a/include/asm-x86/mach-numaq/mach_apicdef.h b/include/asm-x86/numaq/apicdef.h
index bf439d0690f5..e012a46cc22a 100644
--- a/include/asm-x86/mach-numaq/mach_apicdef.h
+++ b/include/asm-x86/numaq/apicdef.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_APICDEF_H
+#ifndef __ASM_NUMAQ_APICDEF_H
-#define __ASM_MACH_APICDEF_H
+#define __ASM_NUMAQ_APICDEF_H
 #define APIC_ID_MASK (0xF<<24)
diff --git a/include/asm-x86/mach-numaq/mach_ipi.h b/include/asm-x86/numaq/ipi.h
index c6044488e9e6..935588d286cf 100644
--- a/include/asm-x86/mach-numaq/mach_ipi.h
+++ b/include/asm-x86/numaq/ipi.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_IPI_H
+#ifndef __ASM_NUMAQ_IPI_H
-#define __ASM_MACH_IPI_H
+#define __ASM_NUMAQ_IPI_H
 void send_IPI_mask_sequence(cpumask_t, int vector);
@@ -22,4 +22,4 @@ static inline void send_IPI_all(int vector)
        send_IPI_mask(cpu_online_map, vector);
 }
-#endif /* __ASM_MACH_IPI_H */
+#endif /* __ASM_NUMAQ_IPI_H */
diff --git a/include/asm-x86/mach-numaq/mach_mpparse.h b/include/asm-x86/numaq/mpparse.h
index 626aef6b155f..252292e077b6 100644
--- a/include/asm-x86/mach-numaq/mach_mpparse.h
+++ b/include/asm-x86/numaq/mpparse.h
@@ -1,7 +1,7 @@
-#ifndef __ASM_MACH_MPPARSE_H
+#ifndef __ASM_NUMAQ_MPPARSE_H
-#define __ASM_MACH_MPPARSE_H
+#define __ASM_NUMAQ_MPPARSE_H
 extern void numaq_mps_oem_check(struct mp_config_table *mpc, char *oem,
                                char *productid);
-#endif /* __ASM_MACH_MPPARSE_H */
+#endif /* __ASM_NUMAQ_MPPARSE_H */
diff --git a/include/asm-x86/mach-numaq/mach_wakecpu.h b/include/asm-x86/numaq/wakecpu.h
index 00530041a991..c577bda5b1c5 100644
--- a/include/asm-x86/mach-numaq/mach_wakecpu.h
+++ b/include/asm-x86/numaq/wakecpu.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_WAKECPU_H
+#ifndef __ASM_NUMAQ_WAKECPU_H
-#define __ASM_MACH_WAKECPU_H
+#define __ASM_NUMAQ_WAKECPU_H
 /* This file copes with machines that wakeup secondary CPUs by NMIs */
@@ -40,4 +40,4 @@ static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
 #define inquire_remote_apic(apicid) {}
-#endif /* __ASM_MACH_WAKECPU_H */
+#endif /* __ASM_NUMAQ_WAKECPU_H */
diff --git a/include/asm-x86/olpc.h b/include/asm-x86/olpc.h
index 97d47133486f..d7328b1a05c1 100644
--- a/include/asm-x86/olpc.h
+++ b/include/asm-x86/olpc.h
@@ -1,7 +1,7 @@
 /* OLPC machine specific definitions */
-#ifndef ASM_OLPC_H_
+#ifndef ASM_X86__OLPC_H
-#define ASM_OLPC_H_
+#define ASM_X86__OLPC_H
 #include <asm/geode.h>
@@ -129,4 +129,4 @@ extern int olpc_ec_mask_unset(uint8_t bits);
 #define OLPC_GPIO_LID           geode_gpio(26)
 #define OLPC_GPIO_ECSCI         geode_gpio(27)
-#endif
+#endif /* ASM_X86__OLPC_H */
diff --git a/include/asm-x86/page.h b/include/asm-x86/page.h
index 49982110e4d9..c91574776751 100644
--- a/include/asm-x86/page.h
+++ b/include/asm-x86/page.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PAGE_H
+#ifndef ASM_X86__PAGE_H
-#define _ASM_X86_PAGE_H
+#define ASM_X86__PAGE_H
 #include <linux/const.h>
@@ -57,6 +57,7 @@ typedef struct { pgdval_t pgd; } pgd_t;
 typedef struct { pgprotval_t pgprot; } pgprot_t;
 extern int page_is_ram(unsigned long pagenr);
+extern int pagerange_is_ram(unsigned long start, unsigned long end);
 extern int devmem_is_allowed(unsigned long pagenr);
 extern void map_devmem(unsigned long pfn, unsigned long size,
                       pgprot_t vma_prot);
@@ -199,4 +200,4 @@ static inline pteval_t native_pte_flags(pte_t pte)
 #define __HAVE_ARCH_GATE_AREA 1
 #endif  /* __KERNEL__ */
-#endif  /* _ASM_X86_PAGE_H */
+#endif /* ASM_X86__PAGE_H */
diff --git a/include/asm-x86/page_32.h b/include/asm-x86/page_32.h
index ab8528793f08..9c5a737a9af9 100644
--- a/include/asm-x86/page_32.h
+++ b/include/asm-x86/page_32.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PAGE_32_H
+#ifndef ASM_X86__PAGE_32_H
-#define _ASM_X86_PAGE_32_H
+#define ASM_X86__PAGE_32_H
 /*
 * This handles the memory map.
@@ -73,7 +73,12 @@ typedef struct page *pgtable_t;
 #endif
 #ifndef __ASSEMBLY__
+#define __phys_addr_const(x)    ((x) - PAGE_OFFSET)
+#ifdef CONFIG_DEBUG_VIRTUAL
+extern unsigned long __phys_addr(unsigned long);
+#else
 #define __phys_addr(x)          ((x) - PAGE_OFFSET)
+#endif
 #define __phys_reloc_hide(x)    RELOC_HIDE((x), 0)
 #ifdef CONFIG_FLATMEM
@@ -89,13 +94,11 @@ extern int nx_enabled;
 extern unsigned int __VMALLOC_RESERVE;
 extern int sysctl_legacy_va_layout;
-#define VMALLOC_RESERVE         ((unsigned long)__VMALLOC_RESERVE)
-#define MAXMEM                  (-__PAGE_OFFSET - __VMALLOC_RESERVE)
 extern void find_low_pfn_range(void);
 extern unsigned long init_memory_mapping(unsigned long start,
                                         unsigned long end);
 extern void initmem_init(unsigned long, unsigned long);
+extern void free_initmem(void);
 extern void setup_bootmem_allocator(void);
@@ -126,4 +129,4 @@ static inline void copy_page(void *to, void *from)
 #endif  /* CONFIG_X86_3DNOW */
 #endif  /* !__ASSEMBLY__ */
-#endif /* _ASM_X86_PAGE_32_H */
+#endif /* ASM_X86__PAGE_32_H */
diff --git a/include/asm-x86/page_64.h b/include/asm-x86/page_64.h
index c6916c83e6b1..5e64acfed0a4 100644
--- a/include/asm-x86/page_64.h
+++ b/include/asm-x86/page_64.h
@@ -1,5 +1,5 @@
-#ifndef _X86_64_PAGE_H
+#ifndef ASM_X86__PAGE_64_H
-#define _X86_64_PAGE_H
+#define ASM_X86__PAGE_64_H
 #define PAGETABLE_LEVELS        4
@@ -91,6 +91,7 @@ extern unsigned long init_memory_mapping(unsigned long start,
                                         unsigned long end);
 extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
+extern void free_initmem(void);
 extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
 extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
@@ -102,4 +103,4 @@ extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
 #endif
-#endif /* _X86_64_PAGE_H */
+#endif /* ASM_X86__PAGE_64_H */
diff --git a/include/asm-x86/param.h b/include/asm-x86/param.h
index 6f0d0422f4ca..0009cfb11a5f 100644
--- a/include/asm-x86/param.h
+++ b/include/asm-x86/param.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PARAM_H
+#ifndef ASM_X86__PARAM_H
-#define _ASM_X86_PARAM_H
+#define ASM_X86__PARAM_H
 #ifdef __KERNEL__
 # define HZ             CONFIG_HZ       /* Internal kernel timer frequency */
@@ -19,4 +19,4 @@
 #define MAXHOSTNAMELEN  64      /* max length of hostname */
-#endif /* _ASM_X86_PARAM_H */
+#endif /* ASM_X86__PARAM_H */
diff --git a/include/asm-x86/paravirt.h b/include/asm-x86/paravirt.h
index fbbde93f12d6..8d6ae2f760d0 100644
--- a/include/asm-x86/paravirt.h
+++ b/include/asm-x86/paravirt.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_PARAVIRT_H
+#ifndef ASM_X86__PARAVIRT_H
-#define __ASM_PARAVIRT_H
+#define ASM_X86__PARAVIRT_H
 /* Various instructions on x86 need to be replaced for
 * para-virtualization: those hooks are defined here. */
@@ -124,6 +124,9 @@ struct pv_cpu_ops {
                                int entrynum, const void *desc, int size);
        void (*write_idt_entry)(gate_desc *,
                                int entrynum, const gate_desc *gate);
+        void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
+        void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
        void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
        void (*set_iopl_mask)(unsigned mask);
@@ -137,6 +140,7 @@ struct pv_cpu_ops {
        /* MSR, PMC and TSR operations.
           err = 0/-EFAULT.  wrmsr returns 0/-EFAULT. */
+        u64 (*read_msr_amd)(unsigned int msr, int *err);
        u64 (*read_msr)(unsigned int msr, int *err);
        int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
@@ -200,12 +204,6 @@ struct pv_irq_ops {
 struct pv_apic_ops {
 #ifdef CONFIG_X86_LOCAL_APIC
-        /*
-         * Direct APIC operations, principally for VMI.  Ideally
-         * these shouldn't be in this interface.
-         */
-        void (*apic_write)(unsigned long reg, u32 v);
-        u32 (*apic_read)(unsigned long reg);
        void (*setup_boot_clock)(void);
        void (*setup_secondary_clock)(void);
@@ -257,13 +255,13 @@ struct pv_mmu_ops {
         * Hooks for allocating/releasing pagetable pages when they're
         * attached to a pagetable
         */
-        void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
+        void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
-        void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
+        void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
-        void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
+        void (*alloc_pmd_clone)(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count);
-        void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
+        void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
-        void (*release_pte)(u32 pfn);
+        void (*release_pte)(unsigned long pfn);
-        void (*release_pmd)(u32 pfn);
+        void (*release_pmd)(unsigned long pfn);
-        void (*release_pud)(u32 pfn);
+        void (*release_pud)(unsigned long pfn);
        /* Pagetable manipulation functions */
        void (*set_pte)(pte_t *ptep, pte_t pteval);
@@ -330,6 +328,7 @@ struct pv_lock_ops {
        int (*spin_is_locked)(struct raw_spinlock *lock);
        int (*spin_is_contended)(struct raw_spinlock *lock);
        void (*spin_lock)(struct raw_spinlock *lock);
+        void (*spin_lock_flags)(struct raw_spinlock *lock, unsigned long flags);
        int (*spin_trylock)(struct raw_spinlock *lock);
        void (*spin_unlock)(struct raw_spinlock *lock);
 };
@@ -726,6 +725,10 @@ static inline u64 paravirt_read_msr(unsigned msr, int *err)
 {
        return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
 }
+static inline u64 paravirt_read_msr_amd(unsigned msr, int *err)
+{
+        return PVOP_CALL2(u64, pv_cpu_ops.read_msr_amd, msr, err);
+}
 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
 {
        return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
@@ -771,6 +774,13 @@ static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
        *p = paravirt_read_msr(msr, &err);
        return err;
 }
+static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
+{
+        int err;
+        *p = paravirt_read_msr_amd(msr, &err);
+        return err;
+}
 static inline u64 paravirt_read_tsc(void)
 {
@@ -824,6 +834,16 @@ do {							\
        (aux) = __aux;                                  \
 } while (0)
+static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
+{
+        PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
+}
+static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
+{
+        PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
+}
 static inline void load_TR_desc(void)
 {
        PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
@@ -898,19 +918,6 @@ static inline void slow_down_io(void)
 }
 #ifdef CONFIG_X86_LOCAL_APIC
-/*
- * Basic functions accessing APICs.
- */
-static inline void apic_write(unsigned long reg, u32 v)
-{
-        PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
-}
-static inline u32 apic_read(unsigned long reg)
-{
-        return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
-}
 static inline void setup_boot_clock(void)
 {
        PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
@@ -993,35 +1000,35 @@ static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
        PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
 }
-static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
+static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
 {
        PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
 }
-static inline void paravirt_release_pte(unsigned pfn)
+static inline void paravirt_release_pte(unsigned long pfn)
 {
        PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
 }
-static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
+static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
 {
        PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
 }
-static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
+static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
-                                            unsigned start, unsigned count)
+                                            unsigned long start, unsigned long count)
 {
        PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
 }
-static inline void paravirt_release_pmd(unsigned pfn)
+static inline void paravirt_release_pmd(unsigned long pfn)
 {
        PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
 }
-static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
+static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
 {
        PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
 }
-static inline void paravirt_release_pud(unsigned pfn)
+static inline void paravirt_release_pud(unsigned long pfn)
 {
        PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
 }
@@ -1401,6 +1408,12 @@ static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
        PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
 }
+static __always_inline void __raw_spin_lock_flags(struct raw_spinlock *lock,
+                                                  unsigned long flags)
+{
+        PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
+}
 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
 {
        return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
@@ -1634,4 +1647,4 @@ static inline unsigned long __raw_local_irq_save(void)
 #endif /* __ASSEMBLY__ */
 #endif /* CONFIG_PARAVIRT */
-#endif  /* __ASM_PARAVIRT_H */
+#endif /* ASM_X86__PARAVIRT_H */
diff --git a/include/asm-x86/parport.h b/include/asm-x86/parport.h
index 3c4ffeb467e9..2e3dda4dc3d9 100644
--- a/include/asm-x86/parport.h
+++ b/include/asm-x86/parport.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PARPORT_H
+#ifndef ASM_X86__PARPORT_H
-#define _ASM_X86_PARPORT_H
+#define ASM_X86__PARPORT_H
 static int __devinit parport_pc_find_isa_ports(int autoirq, int autodma);
 static int __devinit parport_pc_find_nonpci_ports(int autoirq, int autodma)
@@ -7,4 +7,4 @@ static int __devinit parport_pc_find_nonpci_ports(int autoirq, int autodma)
        return parport_pc_find_isa_ports(autoirq, autodma);
 }
-#endif /* _ASM_X86_PARPORT_H */
+#endif /* ASM_X86__PARPORT_H */
diff --git a/include/asm-x86/pat.h b/include/asm-x86/pat.h
index 7edc47307217..482c3e3f9879 100644
--- a/include/asm-x86/pat.h
+++ b/include/asm-x86/pat.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_PAT_H
+#ifndef ASM_X86__PAT_H
-#define _ASM_PAT_H
+#define ASM_X86__PAT_H
 #include <linux/types.h>
@@ -19,4 +19,4 @@ extern int free_memtype(u64 start, u64 end);
 extern void pat_disable(char *reason);
-#endif
+#endif /* ASM_X86__PAT_H */
diff --git a/include/asm-x86/pci-direct.h b/include/asm-x86/pci-direct.h
index 80c775d9fe20..da42be07b690 100644
--- a/include/asm-x86/pci-direct.h
+++ b/include/asm-x86/pci-direct.h
@@ -1,5 +1,5 @@
-#ifndef ASM_PCI_DIRECT_H
+#ifndef ASM_X86__PCI_DIRECT_H
-#define ASM_PCI_DIRECT_H 1
+#define ASM_X86__PCI_DIRECT_H
 #include <linux/types.h>
@@ -18,4 +18,4 @@ extern int early_pci_allowed(void);
 extern unsigned int pci_early_dump_regs;
 extern void early_dump_pci_device(u8 bus, u8 slot, u8 func);
 extern void early_dump_pci_devices(void);
-#endif
+#endif /* ASM_X86__PCI_DIRECT_H */
diff --git a/include/asm-x86/pci.h b/include/asm-x86/pci.h
index 2db14cf17db8..602583192991 100644
--- a/include/asm-x86/pci.h
+++ b/include/asm-x86/pci.h
@@ -1,5 +1,5 @@
-#ifndef __x86_PCI_H
+#ifndef ASM_X86__PCI_H
-#define __x86_PCI_H
+#define ASM_X86__PCI_H
 #include <linux/mm.h> /* for struct page */
 #include <linux/types.h>
@@ -111,4 +111,4 @@ static inline cpumask_t __pcibus_to_cpumask(struct pci_bus *bus)
 }
 #endif
-#endif
+#endif /* ASM_X86__PCI_H */
diff --git a/include/asm-x86/pci_32.h b/include/asm-x86/pci_32.h
index a50d46851285..3f2288207c0c 100644
--- a/include/asm-x86/pci_32.h
+++ b/include/asm-x86/pci_32.h
@@ -1,5 +1,5 @@
-#ifndef __i386_PCI_H
+#ifndef ASM_X86__PCI_32_H
-#define __i386_PCI_H
+#define ASM_X86__PCI_32_H
 #ifdef __KERNEL__
@@ -31,4 +31,4 @@ struct pci_dev;
 #endif /* __KERNEL__ */
-#endif /* __i386_PCI_H */
+#endif /* ASM_X86__PCI_32_H */
diff --git a/include/asm-x86/pci_64.h b/include/asm-x86/pci_64.h
index f330234ffa5c..f72e12d5770e 100644
--- a/include/asm-x86/pci_64.h
+++ b/include/asm-x86/pci_64.h
@@ -1,5 +1,5 @@
-#ifndef __x8664_PCI_H
+#ifndef ASM_X86__PCI_64_H
-#define __x8664_PCI_H
+#define ASM_X86__PCI_64_H
 #ifdef __KERNEL__
@@ -63,4 +63,4 @@ extern void pci_iommu_alloc(void);
 #endif /* __KERNEL__ */
-#endif /* __x8664_PCI_H */
+#endif /* ASM_X86__PCI_64_H */
diff --git a/include/asm-x86/pda.h b/include/asm-x86/pda.h
index b34e9a7cc80b..80860afffbdb 100644
--- a/include/asm-x86/pda.h
+++ b/include/asm-x86/pda.h
@@ -1,5 +1,5 @@
-#ifndef X86_64_PDA_H
+#ifndef ASM_X86__PDA_H
-#define X86_64_PDA_H
+#define ASM_X86__PDA_H
 #ifndef __ASSEMBLY__
 #include <linux/stddef.h>
@@ -134,4 +134,4 @@ do {									\
 #define PDA_STACKOFFSET (5*8)
-#endif
+#endif /* ASM_X86__PDA_H */
diff --git a/include/asm-x86/percpu.h b/include/asm-x86/percpu.h
index 4e91ee1e37aa..e10a1d0678cf 100644
--- a/include/asm-x86/percpu.h
+++ b/include/asm-x86/percpu.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PERCPU_H_
+#ifndef ASM_X86__PERCPU_H
-#define _ASM_X86_PERCPU_H_
+#define ASM_X86__PERCPU_H
 #ifdef CONFIG_X86_64
 #include <linux/compiler.h>
@@ -182,7 +182,7 @@ do {							\
        DEFINE_PER_CPU(_type, _name) = _initvalue;                      \
        __typeof__(_type) _name##_early_map[NR_CPUS] __initdata =       \
                                { [0 ... NR_CPUS-1] = _initvalue };     \
-        __typeof__(_type) *_name##_early_ptr = _name##_early_map
+        __typeof__(_type) *_name##_early_ptr __refdata = _name##_early_map
 #define EXPORT_EARLY_PER_CPU_SYMBOL(_name)                      \
        EXPORT_PER_CPU_SYMBOL(_name)
@@ -215,4 +215,4 @@ do {							\
 #endif  /* !CONFIG_SMP */
-#endif /* _ASM_X86_PERCPU_H_ */
+#endif /* ASM_X86__PERCPU_H */
diff --git a/include/asm-x86/pgalloc.h b/include/asm-x86/pgalloc.h
index d63ea431cb3b..3cd23adedae8 100644
--- a/include/asm-x86/pgalloc.h
+++ b/include/asm-x86/pgalloc.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PGALLOC_H
+#ifndef ASM_X86__PGALLOC_H
-#define _ASM_X86_PGALLOC_H
+#define ASM_X86__PGALLOC_H
 #include <linux/threads.h>
 #include <linux/mm.h>           /* for struct page */
@@ -111,4 +111,4 @@ extern void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pud);
 #endif  /* PAGETABLE_LEVELS > 3 */
 #endif  /* PAGETABLE_LEVELS > 2 */
-#endif  /* _ASM_X86_PGALLOC_H */
+#endif /* ASM_X86__PGALLOC_H */
diff --git a/include/asm-x86/pgtable-2level-defs.h b/include/asm-x86/pgtable-2level-defs.h
index 0f71c9f13da4..7ec48f4e5347 100644
--- a/include/asm-x86/pgtable-2level-defs.h
+++ b/include/asm-x86/pgtable-2level-defs.h
@@ -1,5 +1,5 @@
-#ifndef _I386_PGTABLE_2LEVEL_DEFS_H
+#ifndef ASM_X86__PGTABLE_2LEVEL_DEFS_H
-#define _I386_PGTABLE_2LEVEL_DEFS_H
+#define ASM_X86__PGTABLE_2LEVEL_DEFS_H
 #define SHARED_KERNEL_PMD       0
@@ -17,4 +17,4 @@
 #define PTRS_PER_PTE    1024
-#endif /* _I386_PGTABLE_2LEVEL_DEFS_H */
+#endif /* ASM_X86__PGTABLE_2LEVEL_DEFS_H */
diff --git a/include/asm-x86/pgtable-2level.h b/include/asm-x86/pgtable-2level.h
index 46bc52c0eae1..81762081dcd8 100644
--- a/include/asm-x86/pgtable-2level.h
+++ b/include/asm-x86/pgtable-2level.h
@@ -1,5 +1,5 @@
-#ifndef _I386_PGTABLE_2LEVEL_H
+#ifndef ASM_X86__PGTABLE_2LEVEL_H
-#define _I386_PGTABLE_2LEVEL_H
+#define ASM_X86__PGTABLE_2LEVEL_H
 #define pte_ERROR(e) \
        printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte_low)
@@ -53,9 +53,7 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp)
 #define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp)
 #endif
-#define pte_page(x)             pfn_to_page(pte_pfn(x))
 #define pte_none(x)             (!(x).pte_low)
-#define pte_pfn(x)              (pte_val(x) >> PAGE_SHIFT)
 /*
 * Bits 0, 6 and 7 are taken, split up the 29 bits of offset
@@ -78,4 +76,4 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp)
 #define __pte_to_swp_entry(pte)         ((swp_entry_t) { (pte).pte_low })
 #define __swp_entry_to_pte(x)           ((pte_t) { .pte = (x).val })
-#endif /* _I386_PGTABLE_2LEVEL_H */
+#endif /* ASM_X86__PGTABLE_2LEVEL_H */
diff --git a/include/asm-x86/pgtable-3level-defs.h b/include/asm-x86/pgtable-3level-defs.h
index 448ac9516314..c05fe6ff3720 100644
--- a/include/asm-x86/pgtable-3level-defs.h
+++ b/include/asm-x86/pgtable-3level-defs.h
@@ -1,5 +1,5 @@
-#ifndef _I386_PGTABLE_3LEVEL_DEFS_H
+#ifndef ASM_X86__PGTABLE_3LEVEL_DEFS_H
-#define _I386_PGTABLE_3LEVEL_DEFS_H
+#define ASM_X86__PGTABLE_3LEVEL_DEFS_H
 #ifdef CONFIG_PARAVIRT
 #define SHARED_KERNEL_PMD       (pv_info.shared_kernel_pmd)
@@ -25,4 +25,4 @@
 */
 #define PTRS_PER_PTE    512
-#endif /* _I386_PGTABLE_3LEVEL_DEFS_H */
+#endif /* ASM_X86__PGTABLE_3LEVEL_DEFS_H */
diff --git a/include/asm-x86/pgtable-3level.h b/include/asm-x86/pgtable-3level.h
index 105057f34032..75f4276b5ddb 100644
--- a/include/asm-x86/pgtable-3level.h
+++ b/include/asm-x86/pgtable-3level.h
@@ -1,5 +1,5 @@
-#ifndef _I386_PGTABLE_3LEVEL_H
+#ifndef ASM_X86__PGTABLE_3LEVEL_H
-#define _I386_PGTABLE_3LEVEL_H
+#define ASM_X86__PGTABLE_3LEVEL_H
 /*
 * Intel Physical Address Extension (PAE) Mode - three-level page
@@ -151,18 +151,11 @@ static inline int pte_same(pte_t a, pte_t b)
        return a.pte_low == b.pte_low && a.pte_high == b.pte_high;
 }
-#define pte_page(x)     pfn_to_page(pte_pfn(x))
 static inline int pte_none(pte_t pte)
 {
        return !pte.pte_low && !pte.pte_high;
 }
-static inline unsigned long pte_pfn(pte_t pte)
-{
-        return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
-}
 /*
 * Bits 0, 6 and 7 are taken in the low part of the pte,
 * put the 32 bits of offset into the high part.
@@ -179,4 +172,4 @@ static inline unsigned long pte_pfn(pte_t pte)
 #define __pte_to_swp_entry(pte)         ((swp_entry_t){ (pte).pte_high })
 #define __swp_entry_to_pte(x)           ((pte_t){ { .pte_high = (x).val } })
-#endif /* _I386_PGTABLE_3LEVEL_H */
+#endif /* ASM_X86__PGTABLE_3LEVEL_H */
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
index 3e5dbc4195f4..ed932453ef26 100644
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PGTABLE_H
+#ifndef ASM_X86__PGTABLE_H
-#define _ASM_X86_PGTABLE_H
+#define ASM_X86__PGTABLE_H
 #define FIRST_USER_ADDRESS      0
@@ -18,6 +18,8 @@
 #define _PAGE_BIT_UNUSED2       10
 #define _PAGE_BIT_UNUSED3       11
 #define _PAGE_BIT_PAT_LARGE     12      /* On 2MB or 1GB pages */
+#define _PAGE_BIT_SPECIAL       _PAGE_BIT_UNUSED1
+#define _PAGE_BIT_CPA_TEST      _PAGE_BIT_UNUSED1
 #define _PAGE_BIT_NX           63       /* No execute: only valid after cpuid check */
 #define _PAGE_PRESENT   (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
@@ -34,6 +36,9 @@
 #define _PAGE_UNUSED3   (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3)
 #define _PAGE_PAT       (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
 #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
+#define _PAGE_SPECIAL   (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
+#define _PAGE_CPA_TEST  (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
+#define __HAVE_ARCH_PTE_SPECIAL
 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
 #define _PAGE_NX        (_AT(pteval_t, 1) << _PAGE_BIT_NX)
@@ -54,7 +59,7 @@
 /* Set of bits not changed in pte_modify */
 #define _PAGE_CHG_MASK  (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT |         \
-                         _PAGE_ACCESSED | _PAGE_DIRTY)
+                         _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY)
 #define _PAGE_CACHE_MASK        (_PAGE_PCD | _PAGE_PWT)
 #define _PAGE_CACHE_WB          (0)
@@ -127,6 +132,17 @@
 #define __S110  PAGE_SHARED_EXEC
 #define __S111  PAGE_SHARED_EXEC
+/*
+ * early identity mapping  pte attrib macros.
+ */
+#ifdef CONFIG_X86_64
+#define __PAGE_KERNEL_IDENT_LARGE_EXEC  __PAGE_KERNEL_LARGE_EXEC
+#else
+#define PTE_IDENT_ATTR   0x003          /* PRESENT+RW */
+#define PDE_IDENT_ATTR   0x063          /* PRESENT+RW+DIRTY+ACCESSED */
+#define PGD_IDENT_ATTR   0x001          /* PRESENT (no other attributes) */
+#endif
 #ifndef __ASSEMBLY__
 /*
@@ -180,9 +196,16 @@ static inline int pte_exec(pte_t pte)
 static inline int pte_special(pte_t pte)
 {
-        return 0;
+        return pte_val(pte) & _PAGE_SPECIAL;
 }
+static inline unsigned long pte_pfn(pte_t pte)
+{
+        return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
+}
+#define pte_page(pte)   pfn_to_page(pte_pfn(pte))
 static inline int pmd_large(pmd_t pte)
 {
        return (pmd_val(pte) & (_PAGE_PSE | _PAGE_PRESENT)) ==
@@ -246,7 +269,7 @@ static inline pte_t pte_clrglobal(pte_t pte)
 static inline pte_t pte_mkspecial(pte_t pte)
 {
-        return pte;
+        return __pte(pte_val(pte) | _PAGE_SPECIAL);
 }
 extern pteval_t __supported_pte_mask;
@@ -310,6 +333,8 @@ static inline void native_pagetable_setup_start(pgd_t *base) {}
 static inline void native_pagetable_setup_done(pgd_t *base) {}
 #endif
+extern int arch_report_meminfo(char *page);
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
 #else  /* !CONFIG_PARAVIRT */
@@ -518,4 +543,4 @@ static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
 #include <asm-generic/pgtable.h>
 #endif  /* __ASSEMBLY__ */
-#endif  /* _ASM_X86_PGTABLE_H */
+#endif /* ASM_X86__PGTABLE_H */
diff --git a/include/asm-x86/pgtable_32.h b/include/asm-x86/pgtable_32.h
index 5c3b26567a95..8de702dc7d62 100644
--- a/include/asm-x86/pgtable_32.h
+++ b/include/asm-x86/pgtable_32.h
@@ -1,5 +1,5 @@
-#ifndef _I386_PGTABLE_H
+#ifndef ASM_X86__PGTABLE_32_H
-#define _I386_PGTABLE_H
+#define ASM_X86__PGTABLE_32_H
 /*
@@ -31,6 +31,7 @@ static inline void pgtable_cache_init(void) { }
 static inline void check_pgt_cache(void) { }
 void paging_init(void);
+extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
 /*
 * The Linux x86 paging architecture is 'compile-time dual-mode', it
@@ -56,8 +57,7 @@ void paging_init(void);
 * area for the same reason. ;)
 */
 #define VMALLOC_OFFSET  (8 * 1024 * 1024)
-#define VMALLOC_START   (((unsigned long)high_memory + 2 * VMALLOC_OFFSET - 1) \
+#define VMALLOC_START   ((unsigned long)high_memory + VMALLOC_OFFSET)
-                         & ~(VMALLOC_OFFSET - 1))
 #ifdef CONFIG_X86_PAE
 #define LAST_PKMAP 512
 #else
@@ -73,6 +73,8 @@ void paging_init(void);
 # define VMALLOC_END    (FIXADDR_START - 2 * PAGE_SIZE)
 #endif
+#define MAXMEM  (VMALLOC_END - PAGE_OFFSET - __VMALLOC_RESERVE)
 /*
 * Define this if things work differently on an i386 and an i486:
 * it will (on an i486) warn about kernel memory accesses that are
@@ -186,4 +188,4 @@ do {						\
 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
        remap_pfn_range(vma, vaddr, pfn, size, prot)
-#endif /* _I386_PGTABLE_H */
+#endif /* ASM_X86__PGTABLE_32_H */
diff --git a/include/asm-x86/pgtable_64.h b/include/asm-x86/pgtable_64.h
index ac5fff4cc58a..fde9770e53d1 100644
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -1,5 +1,5 @@
-#ifndef _X86_64_PGTABLE_H
+#ifndef ASM_X86__PGTABLE_64_H
-#define _X86_64_PGTABLE_H
+#define ASM_X86__PGTABLE_64_H
 #include <linux/const.h>
 #ifndef __ASSEMBLY__
@@ -151,7 +151,7 @@ static inline void native_pgd_clear(pgd_t *pgd)
 #define VMALLOC_END      _AC(0xffffe1ffffffffff, UL)
 #define VMEMMAP_START    _AC(0xffffe20000000000, UL)
 #define MODULES_VADDR    _AC(0xffffffffa0000000, UL)
-#define MODULES_END      _AC(0xfffffffffff00000, UL)
+#define MODULES_END      _AC(0xffffffffff000000, UL)
 #define MODULES_LEN   (MODULES_END - MODULES_VADDR)
 #ifndef __ASSEMBLY__
@@ -175,8 +175,6 @@ static inline int pmd_bad(pmd_t pmd)
 #define pte_present(x)  (pte_val((x)) & (_PAGE_PRESENT | _PAGE_PROTNONE))
 #define pages_to_mb(x)  ((x) >> (20 - PAGE_SHIFT))   /* FIXME: is this right? */
-#define pte_page(x)     pfn_to_page(pte_pfn((x)))
-#define pte_pfn(x)      ((pte_val((x)) & __PHYSICAL_MASK) >> PAGE_SHIFT)
 /*
 * Macro to mark a page protection value as "uncacheable".
@@ -284,4 +282,4 @@ extern void cleanup_highmap(void);
 #define __HAVE_ARCH_PTE_SAME
 #endif /* !__ASSEMBLY__ */
-#endif /* _X86_64_PGTABLE_H */
+#endif /* ASM_X86__PGTABLE_64_H */
diff --git a/include/asm-x86/posix_types_32.h b/include/asm-x86/posix_types_32.h
index b031efda37ec..70cf2bb05939 100644
--- a/include/asm-x86/posix_types_32.h
+++ b/include/asm-x86/posix_types_32.h
@@ -1,5 +1,5 @@
-#ifndef __ARCH_I386_POSIX_TYPES_H
+#ifndef ASM_X86__POSIX_TYPES_32_H
-#define __ARCH_I386_POSIX_TYPES_H
+#define ASM_X86__POSIX_TYPES_32_H
 /*
 * This file is generally used by user-level software, so you need to
@@ -82,4 +82,4 @@ do {								\
 #endif /* defined(__KERNEL__) */
-#endif
+#endif /* ASM_X86__POSIX_TYPES_32_H */
diff --git a/include/asm-x86/posix_types_64.h b/include/asm-x86/posix_types_64.h
index d6624c95854a..388b4e7f4a44 100644
--- a/include/asm-x86/posix_types_64.h
+++ b/include/asm-x86/posix_types_64.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_64_POSIX_TYPES_H
+#ifndef ASM_X86__POSIX_TYPES_64_H
-#define _ASM_X86_64_POSIX_TYPES_H
+#define ASM_X86__POSIX_TYPES_64_H
 /*
 * This file is generally used by user-level software, so you need to
@@ -116,4 +116,4 @@ static inline void __FD_ZERO(__kernel_fd_set *p)
 #endif /* defined(__KERNEL__) */
-#endif
+#endif /* ASM_X86__POSIX_TYPES_64_H */
diff --git a/include/asm-x86/prctl.h b/include/asm-x86/prctl.h
index 52952adef1ca..e7ae34eb4103 100644
--- a/include/asm-x86/prctl.h
+++ b/include/asm-x86/prctl.h
@@ -1,5 +1,5 @@
-#ifndef X86_64_PRCTL_H
+#ifndef ASM_X86__PRCTL_H
-#define X86_64_PRCTL_H 1
+#define ASM_X86__PRCTL_H
 #define ARCH_SET_GS 0x1001
 #define ARCH_SET_FS 0x1002
@@ -7,4 +7,4 @@
 #define ARCH_GET_GS 0x1004
-#endif
+#endif /* ASM_X86__PRCTL_H */
diff --git a/include/asm-x86/processor-cyrix.h b/include/asm-x86/processor-cyrix.h
index 97568ada1f97..1198f2a0e42c 100644
--- a/include/asm-x86/processor-cyrix.h
+++ b/include/asm-x86/processor-cyrix.h
@@ -28,3 +28,11 @@ static inline void setCx86(u8 reg, u8 data)
        outb(reg, 0x22);
        outb(data, 0x23);
 }
+#define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); })
+#define setCx86_old(reg, data) do { \
+        outb((reg), 0x22); \
+        outb((data), 0x23); \
+} while (0)
diff --git a/include/asm-x86/processor-flags.h b/include/asm-x86/processor-flags.h
index eff2ecd7fff0..dc5f0712f9fa 100644
--- a/include/asm-x86/processor-flags.h
+++ b/include/asm-x86/processor-flags.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_I386_PROCESSOR_FLAGS_H
+#ifndef ASM_X86__PROCESSOR_FLAGS_H
-#define __ASM_I386_PROCESSOR_FLAGS_H
+#define ASM_X86__PROCESSOR_FLAGS_H
 /* Various flags defined: can be included from assembler. */
 /*
@@ -59,6 +59,7 @@
 #define X86_CR4_OSFXSR  0x00000200 /* enable fast FPU save and restore */
 #define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */
 #define X86_CR4_VMXE    0x00002000 /* enable VMX virtualization */
+#define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */
 /*
 * x86-64 Task Priority Register, CR8
@@ -96,4 +97,4 @@
 #endif
 #endif
-#endif  /* __ASM_I386_PROCESSOR_FLAGS_H */
+#endif /* ASM_X86__PROCESSOR_FLAGS_H */
diff --git a/include/asm-x86/processor.h b/include/asm-x86/processor.h
index 5f58da401b43..ee7cbb30773a 100644
--- a/include/asm-x86/processor.h
+++ b/include/asm-x86/processor.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_X86_PROCESSOR_H
+#ifndef ASM_X86__PROCESSOR_H
-#define __ASM_X86_PROCESSOR_H
+#define ASM_X86__PROCESSOR_H
 #include <asm/processor-flags.h>
@@ -20,6 +20,7 @@ struct mm_struct;
 #include <asm/msr.h>
 #include <asm/desc_defs.h>
 #include <asm/nops.h>
+#include <asm/ds.h>
 #include <linux/personality.h>
 #include <linux/cpumask.h>
@@ -75,11 +76,11 @@ struct cpuinfo_x86 {
        int                      x86_tlbsize;
        __u8                    x86_virt_bits;
        __u8                    x86_phys_bits;
+#endif
        /* CPUID returned core id bits: */
        __u8                    x86_coreid_bits;
        /* Max extended CPUID function supported: */
        __u32                   extended_cpuid_level;
-#endif
        /* Maximum supported CPUID level, -1=no CPUID: */
        int                     cpuid_level;
        __u32                   x86_capability[NCAPINTS];
@@ -140,6 +141,8 @@ DECLARE_PER_CPU(struct cpuinfo_x86, cpu_info);
 #define current_cpu_data        boot_cpu_data
 #endif
+extern const struct seq_operations cpuinfo_op;
 static inline int hlt_works(int cpu)
 {
 #ifdef CONFIG_X86_32
@@ -153,6 +156,8 @@ static inline int hlt_works(int cpu)
 extern void cpu_detect(struct cpuinfo_x86 *c);
+extern struct pt_regs *idle_regs(struct pt_regs *);
 extern void early_cpu_init(void);
 extern void identify_boot_cpu(void);
 extern void identify_secondary_cpu(struct cpuinfo_x86 *);
@@ -161,11 +166,8 @@ extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
 extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
 extern unsigned short num_cache_leaves;
-#if defined(CONFIG_X86_HT) || defined(CONFIG_X86_64)
+extern void detect_extended_topology(struct cpuinfo_x86 *c);
 extern void detect_ht(struct cpuinfo_x86 *c);
-#else
-static inline void detect_ht(struct cpuinfo_x86 *c) {}
-#endif
 static inline void native_cpuid(unsigned int *eax, unsigned int *ebx,
                                unsigned int *ecx, unsigned int *edx)
@@ -322,7 +324,12 @@ struct i387_fxsave_struct {
        /* 16*16 bytes for each XMM-reg = 256 bytes:                    */
        u32                     xmm_space[64];
-        u32                     padding[24];
+        u32                     padding[12];
+        union {
+                u32             padding1[12];
+                u32             sw_reserved[12];
+        };
 } __attribute__((aligned(16)));
@@ -346,10 +353,23 @@ struct i387_soft_struct {
        u32                     entry_eip;
 };
+struct xsave_hdr_struct {
+        u64 xstate_bv;
+        u64 reserved1[2];
+        u64 reserved2[5];
+} __attribute__((packed));
+struct xsave_struct {
+        struct i387_fxsave_struct i387;
+        struct xsave_hdr_struct xsave_hdr;
+        /* new processor state extensions will go here */
+} __attribute__ ((packed, aligned (64)));
 union thread_xstate {
        struct i387_fsave_struct        fsave;
        struct i387_fxsave_struct       fxsave;
        struct i387_soft_struct         soft;
+        struct xsave_struct             xsave;
 };
 #ifdef CONFIG_X86_64
@@ -411,9 +431,14 @@ struct thread_struct {
        unsigned                io_bitmap_max;
 /* MSR_IA32_DEBUGCTLMSR value to switch in if TIF_DEBUGCTLMSR is set.  */
        unsigned long   debugctlmsr;
-/* Debug Store - if not 0 points to a DS Save Area configuration;
+#ifdef CONFIG_X86_DS
- *               goes into MSR_IA32_DS_AREA */
+/* Debug Store context; see include/asm-x86/ds.h; goes into MSR_IA32_DS_AREA */
-        unsigned long   ds_area_msr;
+        struct ds_context       *ds_ctx;
+#endif /* CONFIG_X86_DS */
+#ifdef CONFIG_X86_PTRACE_BTS
+/* the signal to send on a bts buffer overflow */
+        unsigned int    bts_ovfl_signal;
+#endif /* CONFIG_X86_PTRACE_BTS */
 };
 static inline unsigned long native_get_debugreg(int regno)
@@ -561,41 +586,6 @@ static inline void clear_in_cr4(unsigned long mask)
        write_cr4(cr4);
 }
-struct microcode_header {
-        unsigned int            hdrver;
-        unsigned int            rev;
-        unsigned int            date;
-        unsigned int            sig;
-        unsigned int            cksum;
-        unsigned int            ldrver;
-        unsigned int            pf;
-        unsigned int            datasize;
-        unsigned int            totalsize;
-        unsigned int            reserved[3];
-};
-struct microcode {
-        struct microcode_header hdr;
-        unsigned int            bits[0];
-};
-typedef struct microcode        microcode_t;
-typedef struct microcode_header microcode_header_t;
-/* microcode format is extended from prescott processors */
-struct extended_signature {
-        unsigned int            sig;
-        unsigned int            pf;
-        unsigned int            cksum;
-};
-struct extended_sigtable {
-        unsigned int            count;
-        unsigned int            cksum;
-        unsigned int            reserved[3];
-        struct extended_signature sigs[0];
-};
 typedef struct {
        unsigned long           seg;
 } mm_segment_t;
@@ -728,6 +718,29 @@ extern unsigned long		boot_option_idle_override;
 extern unsigned long            idle_halt;
 extern unsigned long            idle_nomwait;
+/*
+ * on systems with caches, caches must be flashed as the absolute
+ * last instruction before going into a suspended halt.  Otherwise,
+ * dirty data can linger in the cache and become stale on resume,
+ * leading to strange errors.
+ *
+ * perform a variety of operations to guarantee that the compiler
+ * will not reorder instructions.  wbinvd itself is serializing
+ * so the processor will not reorder.
+ *
+ * Systems without cache can just go into halt.
+ */
+static inline void wbinvd_halt(void)
+{
+        mb();
+        /* check for clflush to determine if wbinvd is legal */
+        if (cpu_has_clflush)
+                asm volatile("cli; wbinvd; 1: hlt; jmp 1b" : : : "memory");
+        else
+                while (1)
+                        halt();
+}
 extern void enable_sep_cpu(void);
 extern int sysenter_setup(void);
@@ -920,4 +933,4 @@ extern void start_thread(struct pt_regs *regs, unsigned long new_ip,
 extern int get_tsc_mode(unsigned long adr);
 extern int set_tsc_mode(unsigned int val);
-#endif
+#endif /* ASM_X86__PROCESSOR_H */
diff --git a/include/asm-x86/proto.h b/include/asm-x86/proto.h
index 3dd458c385c0..6e89e8b4de0e 100644
--- a/include/asm-x86/proto.h
+++ b/include/asm-x86/proto.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X8664_PROTO_H
+#ifndef ASM_X86__PROTO_H
-#define _ASM_X8664_PROTO_H 1
+#define ASM_X86__PROTO_H
 #include <asm/ldt.h>
@@ -29,4 +29,4 @@ long do_arch_prctl(struct task_struct *task, int code, unsigned long addr);
 #define round_up(x, y) (((x) + (y) - 1) & ~((y) - 1))
 #define round_down(x, y) ((x) & ~((y) - 1))
-#endif
+#endif /* ASM_X86__PROTO_H */
diff --git a/include/asm-x86/ptrace-abi.h b/include/asm-x86/ptrace-abi.h
index 72e7b9db29bb..4298b8882a78 100644
--- a/include/asm-x86/ptrace-abi.h
+++ b/include/asm-x86/ptrace-abi.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PTRACE_ABI_H
+#ifndef ASM_X86__PTRACE_ABI_H
-#define _ASM_X86_PTRACE_ABI_H
+#define ASM_X86__PTRACE_ABI_H
 #ifdef __i386__
@@ -80,8 +80,9 @@
 #define PTRACE_SINGLEBLOCK      33      /* resume execution until next branch */
-#ifndef __ASSEMBLY__
+#ifdef CONFIG_X86_PTRACE_BTS
+#ifndef __ASSEMBLY__
 #include <asm/types.h>
 /* configuration/status structure used in PTRACE_BTS_CONFIG and
@@ -97,20 +98,20 @@ struct ptrace_bts_config {
        /* actual size of bts_struct in bytes */
        __u32 bts_size;
 };
-#endif
+#endif /* __ASSEMBLY__ */
 #define PTRACE_BTS_O_TRACE      0x1 /* branch trace */
 #define PTRACE_BTS_O_SCHED      0x2 /* scheduling events w/ jiffies */
 #define PTRACE_BTS_O_SIGNAL     0x4 /* send SIG<signal> on buffer overflow
                                       instead of wrapping around */
-#define PTRACE_BTS_O_CUT_SIZE   0x8 /* cut requested size to max available
+#define PTRACE_BTS_O_ALLOC      0x8 /* (re)allocate buffer */
-                                       instead of failing */
 #define PTRACE_BTS_CONFIG       40
 /* Configure branch trace recording.
   ADDR points to a struct ptrace_bts_config.
   DATA gives the size of that buffer.
-   A new buffer is allocated, iff the size changes.
+   A new buffer is allocated, if requested in the flags.
+   An overflow signal may only be requested for new buffers.
   Returns the number of bytes read.
 */
 #define PTRACE_BTS_STATUS       41
@@ -119,7 +120,7 @@ struct ptrace_bts_config {
   Returns the number of bytes written.
 */
 #define PTRACE_BTS_SIZE         42
-/* Return the number of available BTS records.
+/* Return the number of available BTS records for draining.
   DATA and ADDR are ignored.
 */
 #define PTRACE_BTS_GET          43
@@ -139,5 +140,6 @@ struct ptrace_bts_config {
   BTS records are read from oldest to newest.
   Returns number of BTS records drained.
 */
+#endif /* CONFIG_X86_PTRACE_BTS */
-#endif
+#endif /* ASM_X86__PTRACE_ABI_H */
diff --git a/include/asm-x86/ptrace.h b/include/asm-x86/ptrace.h
index 8a71db803da6..ac578f11c1c5 100644
--- a/include/asm-x86/ptrace.h
+++ b/include/asm-x86/ptrace.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PTRACE_H
+#ifndef ASM_X86__PTRACE_H
-#define _ASM_X86_PTRACE_H
+#define ASM_X86__PTRACE_H
 #include <linux/compiler.h>     /* For __user */
 #include <asm/ptrace-abi.h>
@@ -127,14 +127,48 @@ struct pt_regs {
 #endif /* __KERNEL__ */
 #endif /* !__i386__ */
+#ifdef CONFIG_X86_PTRACE_BTS
+/* a branch trace record entry
+ *
+ * In order to unify the interface between various processor versions,
+ * we use the below data structure for all processors.
+ */
+enum bts_qualifier {
+        BTS_INVALID = 0,
+        BTS_BRANCH,
+        BTS_TASK_ARRIVES,
+        BTS_TASK_DEPARTS
+};
+struct bts_struct {
+        __u64 qualifier;
+        union {
+                /* BTS_BRANCH */
+                struct {
+                        __u64 from_ip;
+                        __u64 to_ip;
+                } lbr;
+                /* BTS_TASK_ARRIVES or
+                   BTS_TASK_DEPARTS */
+                __u64 jiffies;
+        } variant;
+};
+#endif /* CONFIG_X86_PTRACE_BTS */
 #ifdef __KERNEL__
-/* the DS BTS struct is used for ptrace as well */
+#include <linux/init.h>
-#include <asm/ds.h>
+struct cpuinfo_x86;
 struct task_struct;
+#ifdef CONFIG_X86_PTRACE_BTS
+extern void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *);
 extern void ptrace_bts_take_timestamp(struct task_struct *, enum bts_qualifier);
+#else
+#define ptrace_bts_init_intel(config) do {} while (0)
+#endif /* CONFIG_X86_PTRACE_BTS */
 extern unsigned long profile_pc(struct pt_regs *regs);
@@ -143,11 +177,14 @@ convert_ip_to_linear(struct task_struct *child, struct pt_regs *regs);
 #ifdef CONFIG_X86_32
 extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
-                         int error_code);
+                         int error_code, int si_code);
-#else
-void signal_fault(struct pt_regs *regs, void __user *frame, char *where);
 #endif
+void signal_fault(struct pt_regs *regs, void __user *frame, char *where);
+extern long syscall_trace_enter(struct pt_regs *);
+extern void syscall_trace_leave(struct pt_regs *);
 static inline unsigned long regs_return_value(struct pt_regs *regs)
 {
        return regs->ax;
@@ -213,6 +250,11 @@ static inline unsigned long frame_pointer(struct pt_regs *regs)
        return regs->bp;
 }
+static inline unsigned long user_stack_pointer(struct pt_regs *regs)
+{
+        return regs->sp;
+}
 /*
 * These are defined as per linux/ptrace.h, which see.
 */
@@ -239,4 +281,4 @@ extern int do_set_thread_area(struct task_struct *p, int idx,
 #endif /* !__ASSEMBLY__ */
-#endif
+#endif /* ASM_X86__PTRACE_H */
diff --git a/include/asm-x86/pvclock-abi.h b/include/asm-x86/pvclock-abi.h
index 6857f840b243..edb3b4ecfc81 100644
--- a/include/asm-x86/pvclock-abi.h
+++ b/include/asm-x86/pvclock-abi.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PVCLOCK_ABI_H_
+#ifndef ASM_X86__PVCLOCK_ABI_H
-#define _ASM_X86_PVCLOCK_ABI_H_
+#define ASM_X86__PVCLOCK_ABI_H
 #ifndef __ASSEMBLY__
 /*
@@ -39,4 +39,4 @@ struct pvclock_wall_clock {
 } __attribute__((__packed__));
 #endif /* __ASSEMBLY__ */
-#endif /* _ASM_X86_PVCLOCK_ABI_H_ */
+#endif /* ASM_X86__PVCLOCK_ABI_H */
diff --git a/include/asm-x86/pvclock.h b/include/asm-x86/pvclock.h
index 85b1bba8e0a3..1a38f6834800 100644
--- a/include/asm-x86/pvclock.h
+++ b/include/asm-x86/pvclock.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_PVCLOCK_H_
+#ifndef ASM_X86__PVCLOCK_H
-#define _ASM_X86_PVCLOCK_H_
+#define ASM_X86__PVCLOCK_H
 #include <linux/clocksource.h>
 #include <asm/pvclock-abi.h>
@@ -10,4 +10,4 @@ void pvclock_read_wallclock(struct pvclock_wall_clock *wall,
                            struct pvclock_vcpu_time_info *vcpu,
                            struct timespec *ts);
-#endif /* _ASM_X86_PVCLOCK_H_ */
+#endif /* ASM_X86__PVCLOCK_H */
diff --git a/include/asm-x86/reboot.h b/include/asm-x86/reboot.h
index 206f355786dc..1c2f0ce9e31e 100644
--- a/include/asm-x86/reboot.h
+++ b/include/asm-x86/reboot.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_REBOOT_H
+#ifndef ASM_X86__REBOOT_H
-#define _ASM_REBOOT_H
+#define ASM_X86__REBOOT_H
 struct pt_regs;
@@ -18,4 +18,4 @@ void native_machine_crash_shutdown(struct pt_regs *regs);
 void native_machine_shutdown(void);
 void machine_real_restart(const unsigned char *code, int length);
-#endif  /* _ASM_REBOOT_H */
+#endif /* ASM_X86__REBOOT_H */
diff --git a/include/asm-x86/reboot_fixups.h b/include/asm-x86/reboot_fixups.h
index 0cb7d87c2b68..2c2987d97570 100644
--- a/include/asm-x86/reboot_fixups.h
+++ b/include/asm-x86/reboot_fixups.h
@@ -1,6 +1,6 @@
-#ifndef _LINUX_REBOOT_FIXUPS_H
+#ifndef ASM_X86__REBOOT_FIXUPS_H
-#define _LINUX_REBOOT_FIXUPS_H
+#define ASM_X86__REBOOT_FIXUPS_H
 extern void mach_reboot_fixups(void);
-#endif /* _LINUX_REBOOT_FIXUPS_H */
+#endif /* ASM_X86__REBOOT_FIXUPS_H */
diff --git a/include/asm-x86/required-features.h b/include/asm-x86/required-features.h
index adec887dd7cd..a01c4e376331 100644
--- a/include/asm-x86/required-features.h
+++ b/include/asm-x86/required-features.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_REQUIRED_FEATURES_H
+#ifndef ASM_X86__REQUIRED_FEATURES_H
-#define _ASM_REQUIRED_FEATURES_H 1
+#define ASM_X86__REQUIRED_FEATURES_H
 /* Define minimum CPUID feature set for kernel These bits are checked
   really early to actually display a visible error message before the
@@ -41,6 +41,12 @@
 # define NEED_3DNOW     0
 #endif
+#if defined(CONFIG_X86_P6_NOP) || defined(CONFIG_X86_64)
+# define NEED_NOPL      (1<<(X86_FEATURE_NOPL & 31))
+#else
+# define NEED_NOPL      0
+#endif
 #ifdef CONFIG_X86_64
 #define NEED_PSE        0
 #define NEED_MSR        (1<<(X86_FEATURE_MSR & 31))
@@ -67,10 +73,10 @@
 #define REQUIRED_MASK1  (NEED_LM|NEED_3DNOW)
 #define REQUIRED_MASK2  0
-#define REQUIRED_MASK3  0
+#define REQUIRED_MASK3  (NEED_NOPL)
 #define REQUIRED_MASK4  0
 #define REQUIRED_MASK5  0
 #define REQUIRED_MASK6  0
 #define REQUIRED_MASK7  0
-#endif
+#endif /* ASM_X86__REQUIRED_FEATURES_H */
diff --git a/include/asm-x86/resume-trace.h b/include/asm-x86/resume-trace.h
index 8d9f0b41ee86..e39376d7de50 100644
--- a/include/asm-x86/resume-trace.h
+++ b/include/asm-x86/resume-trace.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_RESUME_TRACE_H
+#ifndef ASM_X86__RESUME_TRACE_H
-#define _ASM_X86_RESUME_TRACE_H
+#define ASM_X86__RESUME_TRACE_H
 #include <asm/asm.h>
@@ -7,7 +7,7 @@
 do {                                                            \
        if (pm_trace_enabled) {                                 \
                const void *tracedata;                          \
-                asm volatile(_ASM_MOV_UL " $1f,%0\n"            \
+                asm volatile(_ASM_MOV " $1f,%0\n"               \
                             ".section .tracedata,\"a\"\n"      \
                             "1:\t.word %c1\n\t"                \
                             _ASM_PTR " %c2\n"                  \
@@ -18,4 +18,4 @@ do {								\
        }                                                       \
 } while (0)
-#endif
+#endif /* ASM_X86__RESUME_TRACE_H */
diff --git a/include/asm-x86/rio.h b/include/asm-x86/rio.h
index c9448bd8968f..5e1256bdee83 100644
--- a/include/asm-x86/rio.h
+++ b/include/asm-x86/rio.h
@@ -5,8 +5,8 @@
 * Author: Laurent Vivier <Laurent.Vivier@bull.net>
 */
-#ifndef __ASM_RIO_H
+#ifndef ASM_X86__RIO_H
-#define __ASM_RIO_H
+#define ASM_X86__RIO_H
 #define RIO_TABLE_VERSION       3
@@ -60,4 +60,4 @@ enum {
        ALT_CALGARY     = 5,    /* Second Planar Calgary      */
 };
-#endif /* __ASM_RIO_H */
+#endif /* ASM_X86__RIO_H */
diff --git a/include/asm-x86/rwlock.h b/include/asm-x86/rwlock.h
index 6a8c0d645108..48a3109e1a7d 100644
--- a/include/asm-x86/rwlock.h
+++ b/include/asm-x86/rwlock.h
@@ -1,8 +1,8 @@
-#ifndef _ASM_X86_RWLOCK_H
+#ifndef ASM_X86__RWLOCK_H
-#define _ASM_X86_RWLOCK_H
+#define ASM_X86__RWLOCK_H
 #define RW_LOCK_BIAS             0x01000000
 /* Actual code is in asm/spinlock.h or in arch/x86/lib/rwlock.S */
-#endif /* _ASM_X86_RWLOCK_H */
+#endif /* ASM_X86__RWLOCK_H */
diff --git a/include/asm-x86/rwsem.h b/include/asm-x86/rwsem.h
index 750f2a3542b3..3ff3015b71a8 100644
--- a/include/asm-x86/rwsem.h
+++ b/include/asm-x86/rwsem.h
@@ -29,8 +29,8 @@
 * front, then they'll all be woken up, but no other readers will be.
 */
-#ifndef _I386_RWSEM_H
+#ifndef ASM_X86__RWSEM_H
-#define _I386_RWSEM_H
+#define ASM_X86__RWSEM_H
 #ifndef _LINUX_RWSEM_H
 #error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
@@ -262,4 +262,4 @@ static inline int rwsem_is_locked(struct rw_semaphore *sem)
 }
 #endif /* __KERNEL__ */
-#endif /* _I386_RWSEM_H */
+#endif /* ASM_X86__RWSEM_H */
diff --git a/include/asm-x86/scatterlist.h b/include/asm-x86/scatterlist.h
index c0432061f81a..ee48f880005d 100644
--- a/include/asm-x86/scatterlist.h
+++ b/include/asm-x86/scatterlist.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SCATTERLIST_H
+#ifndef ASM_X86__SCATTERLIST_H
-#define _ASM_X86_SCATTERLIST_H
+#define ASM_X86__SCATTERLIST_H
 #include <asm/types.h>
@@ -30,4 +30,4 @@ struct scatterlist {
 # define sg_dma_len(sg)         ((sg)->dma_length)
 #endif
-#endif
+#endif /* ASM_X86__SCATTERLIST_H */
diff --git a/include/asm-x86/seccomp_32.h b/include/asm-x86/seccomp_32.h
index 36e71c5f306f..cf9ab2dbcef1 100644
--- a/include/asm-x86/seccomp_32.h
+++ b/include/asm-x86/seccomp_32.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_SECCOMP_H
+#ifndef ASM_X86__SECCOMP_32_H
-#define _ASM_SECCOMP_H
+#define ASM_X86__SECCOMP_32_H
 #include <linux/thread_info.h>
@@ -14,4 +14,4 @@
 #define __NR_seccomp_exit __NR_exit
 #define __NR_seccomp_sigreturn __NR_sigreturn
-#endif /* _ASM_SECCOMP_H */
+#endif /* ASM_X86__SECCOMP_32_H */
diff --git a/include/asm-x86/seccomp_64.h b/include/asm-x86/seccomp_64.h
index 76cfe69aa63c..03274cea751f 100644
--- a/include/asm-x86/seccomp_64.h
+++ b/include/asm-x86/seccomp_64.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_SECCOMP_H
+#ifndef ASM_X86__SECCOMP_64_H
-#define _ASM_SECCOMP_H
+#define ASM_X86__SECCOMP_64_H
 #include <linux/thread_info.h>
@@ -22,4 +22,4 @@
 #define __NR_seccomp_exit_32 __NR_ia32_exit
 #define __NR_seccomp_sigreturn_32 __NR_ia32_sigreturn
-#endif /* _ASM_SECCOMP_H */
+#endif /* ASM_X86__SECCOMP_64_H */
diff --git a/include/asm-x86/segment.h b/include/asm-x86/segment.h
index 646452ea9ea3..ea5f0a8686f7 100644
--- a/include/asm-x86/segment.h
+++ b/include/asm-x86/segment.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SEGMENT_H_
+#ifndef ASM_X86__SEGMENT_H
-#define _ASM_X86_SEGMENT_H_
+#define ASM_X86__SEGMENT_H
 /* Constructor for a conventional segment GDT (or LDT) entry */
 /* This is a macro so it can be used in initializers */
@@ -212,4 +212,4 @@ extern const char early_idt_handlers[NUM_EXCEPTION_VECTORS][10];
 #endif
 #endif
-#endif
+#endif /* ASM_X86__SEGMENT_H */
diff --git a/include/asm-x86/sembuf.h b/include/asm-x86/sembuf.h
index ee50c801f7b7..81f06b7e5a3f 100644
--- a/include/asm-x86/sembuf.h
+++ b/include/asm-x86/sembuf.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SEMBUF_H
+#ifndef ASM_X86__SEMBUF_H
-#define _ASM_X86_SEMBUF_H
+#define ASM_X86__SEMBUF_H
 /*
 * The semid64_ds structure for x86 architecture.
@@ -21,4 +21,4 @@ struct semid64_ds {
        unsigned long   __unused4;
 };
-#endif /* _ASM_X86_SEMBUF_H */
+#endif /* ASM_X86__SEMBUF_H */
diff --git a/include/asm-x86/serial.h b/include/asm-x86/serial.h
index 628c801535ea..303660b671e5 100644
--- a/include/asm-x86/serial.h
+++ b/include/asm-x86/serial.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SERIAL_H
+#ifndef ASM_X86__SERIAL_H
-#define _ASM_X86_SERIAL_H
+#define ASM_X86__SERIAL_H
 /*
 * This assumes you have a 1.8432 MHz clock for your UART.
@@ -26,4 +26,4 @@
        { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS },      /* ttyS2 */     \
        { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS },     /* ttyS3 */
-#endif /* _ASM_X86_SERIAL_H */
+#endif /* ASM_X86__SERIAL_H */
diff --git a/include/asm-x86/setup.h b/include/asm-x86/setup.h
index a07c6f1c01e1..11b6cc14b289 100644
--- a/include/asm-x86/setup.h
+++ b/include/asm-x86/setup.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SETUP_H
+#ifndef ASM_X86__SETUP_H
-#define _ASM_X86_SETUP_H
+#define ASM_X86__SETUP_H
 #define COMMAND_LINE_SIZE 2048
@@ -38,9 +38,11 @@ struct x86_quirks {
        void (*mpc_oem_pci_bus)(struct mpc_config_bus *m);
        void (*smp_read_mpc_oem)(struct mp_config_oemtable *oemtable,
                                    unsigned short oemsize);
+        int (*setup_ioapic_ids)(void);
 };
 extern struct x86_quirks *x86_quirks;
+extern unsigned long saved_video_mode;
 #ifndef CONFIG_PARAVIRT
 #define paravirt_post_allocator_init()  do {} while (0)
@@ -100,4 +102,4 @@ void __init x86_64_start_reservations(char *real_mode_data);
 #endif /* __ASSEMBLY__ */
 #endif  /*  __KERNEL__  */
-#endif /* _ASM_X86_SETUP_H */
+#endif /* ASM_X86__SETUP_H */
diff --git a/include/asm-x86/shmbuf.h b/include/asm-x86/shmbuf.h
index b51413b74971..f51aec2298e9 100644
--- a/include/asm-x86/shmbuf.h
+++ b/include/asm-x86/shmbuf.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SHMBUF_H
+#ifndef ASM_X86__SHMBUF_H
-#define _ASM_X86_SHMBUF_H
+#define ASM_X86__SHMBUF_H
 /*
 * The shmid64_ds structure for x86 architecture.
@@ -48,4 +48,4 @@ struct shminfo64 {
        unsigned long   __unused4;
 };
-#endif /* _ASM_X86_SHMBUF_H */
+#endif /* ASM_X86__SHMBUF_H */
diff --git a/include/asm-x86/shmparam.h b/include/asm-x86/shmparam.h
index 0880cf0917b9..a83a1fd96a0e 100644
--- a/include/asm-x86/shmparam.h
+++ b/include/asm-x86/shmparam.h
@@ -1,6 +1,6 @@
-#ifndef _ASM_X86_SHMPARAM_H
+#ifndef ASM_X86__SHMPARAM_H
-#define _ASM_X86_SHMPARAM_H
+#define ASM_X86__SHMPARAM_H
 #define SHMLBA PAGE_SIZE         /* attach addr a multiple of this */
-#endif /* _ASM_X86_SHMPARAM_H */
+#endif /* ASM_X86__SHMPARAM_H */
diff --git a/include/asm-x86/sigcontext.h b/include/asm-x86/sigcontext.h
index 2f9c884d2c0f..ee813f4fe5d5 100644
--- a/include/asm-x86/sigcontext.h
+++ b/include/asm-x86/sigcontext.h
@@ -1,9 +1,43 @@
-#ifndef _ASM_X86_SIGCONTEXT_H
+#ifndef ASM_X86__SIGCONTEXT_H
-#define _ASM_X86_SIGCONTEXT_H
+#define ASM_X86__SIGCONTEXT_H
 #include <linux/compiler.h>
 #include <asm/types.h>
+#define FP_XSTATE_MAGIC1        0x46505853U
+#define FP_XSTATE_MAGIC2        0x46505845U
+#define FP_XSTATE_MAGIC2_SIZE   sizeof(FP_XSTATE_MAGIC2)
+/*
+ * bytes 464..511 in the current 512byte layout of fxsave/fxrstor frame
+ * are reserved for SW usage. On cpu's supporting xsave/xrstor, these bytes
+ * are used to extended the fpstate pointer in the sigcontext, which now
+ * includes the extended state information along with fpstate information.
+ *
+ * Presence of FP_XSTATE_MAGIC1 at the beginning of this SW reserved
+ * area and FP_XSTATE_MAGIC2 at the end of memory layout
+ * (extended_size - FP_XSTATE_MAGIC2_SIZE) indicates the presence of the
+ * extended state information in the memory layout pointed by the fpstate
+ * pointer in sigcontext.
+ */
+struct _fpx_sw_bytes {
+        __u32 magic1;           /* FP_XSTATE_MAGIC1 */
+        __u32 extended_size;    /* total size of the layout referred by
+                                 * fpstate pointer in the sigcontext.
+                                 */
+        __u64 xstate_bv;
+                                /* feature bit mask (including fp/sse/extended
+                                 * state) that is present in the memory
+                                 * layout.
+                                 */
+        __u32 xstate_size;      /* actual xsave state size, based on the
+                                 * features saved in the layout.
+                                 * 'extended_size' will be greater than
+                                 * 'xstate_size'.
+                                 */
+        __u32 padding[7];       /*  for future use. */
+};
 #ifdef __i386__
 /*
 * As documented in the iBCS2 standard..
@@ -53,7 +87,13 @@ struct _fpstate {
        unsigned long   reserved;
        struct _fpxreg  _fxsr_st[8];    /* FXSR FPU reg data is ignored */
        struct _xmmreg  _xmm[8];
-        unsigned long   padding[56];
+        unsigned long   padding1[44];
+        union {
+                unsigned long   padding2[12];
+                struct _fpx_sw_bytes sw_reserved; /* represents the extended
+                                                   * state info */
+        };
 };
 #define X86_FXSR_MAGIC          0x0000
@@ -79,7 +119,15 @@ struct sigcontext {
        unsigned long flags;
        unsigned long sp_at_signal;
        unsigned short ss, __ssh;
-        struct _fpstate __user *fpstate;
+        /*
+         * fpstate is really (struct _fpstate *) or (struct _xstate *)
+         * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
+         * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
+         * of extended memory layout. See comments at the defintion of
+         * (struct _fpx_sw_bytes)
+         */
+        void __user *fpstate;           /* zero when no FPU/extended context */
        unsigned long oldmask;
        unsigned long cr2;
 };
@@ -130,7 +178,12 @@ struct _fpstate {
        __u32   mxcsr_mask;
        __u32   st_space[32];   /* 8*16 bytes for each FP-reg */
        __u32   xmm_space[64];  /* 16*16 bytes for each XMM-reg  */
-        __u32   reserved2[24];
+        __u32   reserved2[12];
+        union {
+                __u32   reserved3[12];
+                struct _fpx_sw_bytes sw_reserved; /* represents the extended
+                                                   * state information */
+        };
 };
 #ifdef __KERNEL__
@@ -161,7 +214,15 @@ struct sigcontext {
        unsigned long trapno;
        unsigned long oldmask;
        unsigned long cr2;
-        struct _fpstate __user *fpstate;        /* zero when no FPU context */
+        /*
+         * fpstate is really (struct _fpstate *) or (struct _xstate *)
+         * depending on the FP_XSTATE_MAGIC1 encoded in the SW reserved
+         * bytes of (struct _fpstate) and FP_XSTATE_MAGIC2 present at the end
+         * of extended memory layout. See comments at the defintion of
+         * (struct _fpx_sw_bytes)
+         */
+        void __user *fpstate;           /* zero when no FPU/extended context */
        unsigned long reserved1[8];
 };
 #else /* __KERNEL__ */
@@ -202,4 +263,22 @@ struct sigcontext {
 #endif /* !__i386__ */
-#endif
+struct _xsave_hdr {
+        __u64 xstate_bv;
+        __u64 reserved1[2];
+        __u64 reserved2[5];
+};
+/*
+ * Extended state pointed by the fpstate pointer in the sigcontext.
+ * In addition to the fpstate, information encoded in the xstate_hdr
+ * indicates the presence of other extended state information
+ * supported by the processor and OS.
+ */
+struct _xstate {
+        struct _fpstate fpstate;
+        struct _xsave_hdr xstate_hdr;
+        /* new processor state extensions go here */
+};
+#endif /* ASM_X86__SIGCONTEXT_H */
diff --git a/include/asm-x86/sigcontext32.h b/include/asm-x86/sigcontext32.h
index 57a9686fb491..8c347032c2f2 100644
--- a/include/asm-x86/sigcontext32.h
+++ b/include/asm-x86/sigcontext32.h
@@ -1,5 +1,5 @@
-#ifndef _SIGCONTEXT32_H
+#ifndef ASM_X86__SIGCONTEXT32_H
-#define _SIGCONTEXT32_H 1
+#define ASM_X86__SIGCONTEXT32_H
 /* signal context for 32bit programs. */
@@ -40,7 +40,11 @@ struct _fpstate_ia32 {
        __u32   reserved;
        struct _fpxreg  _fxsr_st[8];
        struct _xmmreg  _xmm[8];        /* It's actually 16 */
-        __u32   padding[56];
+        __u32   padding[44];
+        union {
+                __u32 padding2[12];
+                struct _fpx_sw_bytes sw_reserved;
+        };
 };
 struct sigcontext_ia32 {
@@ -68,4 +72,4 @@ struct sigcontext_ia32 {
       unsigned int cr2;
 };
-#endif
+#endif /* ASM_X86__SIGCONTEXT32_H */
diff --git a/include/asm-x86/siginfo.h b/include/asm-x86/siginfo.h
index a477bea0c2a1..808bdfb2958c 100644
--- a/include/asm-x86/siginfo.h
+++ b/include/asm-x86/siginfo.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SIGINFO_H
+#ifndef ASM_X86__SIGINFO_H
-#define _ASM_X86_SIGINFO_H
+#define ASM_X86__SIGINFO_H
 #ifdef __x86_64__
 # define __ARCH_SI_PREAMBLE_SIZE        (4 * sizeof(int))
@@ -7,4 +7,4 @@
 #include <asm-generic/siginfo.h>
-#endif
+#endif /* ASM_X86__SIGINFO_H */
diff --git a/include/asm-x86/signal.h b/include/asm-x86/signal.h
index 6dac49364e95..65acc82d267a 100644
--- a/include/asm-x86/signal.h
+++ b/include/asm-x86/signal.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SIGNAL_H
+#ifndef ASM_X86__SIGNAL_H
-#define _ASM_X86_SIGNAL_H
+#define ASM_X86__SIGNAL_H
 #ifndef __ASSEMBLY__
 #include <linux/types.h>
@@ -140,6 +140,9 @@ struct sigaction {
 struct k_sigaction {
        struct sigaction sa;
 };
+extern void do_notify_resume(struct pt_regs *, void *, __u32);
 # else /* __KERNEL__ */
 /* Here we must cater to libcs that poke about in kernel headers.  */
@@ -256,4 +259,4 @@ struct pt_regs;
 #endif /* __KERNEL__ */
 #endif /* __ASSEMBLY__ */
-#endif
+#endif /* ASM_X86__SIGNAL_H */
diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
index 3c877f74f279..6df2615f9138 100644
--- a/include/asm-x86/smp.h
+++ b/include/asm-x86/smp.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SMP_H_
+#ifndef ASM_X86__SMP_H
-#define _ASM_X86_SMP_H_
+#define ASM_X86__SMP_H
 #ifndef __ASSEMBLY__
 #include <linux/cpumask.h>
 #include <linux/init.h>
@@ -34,6 +34,9 @@ extern cpumask_t cpu_initialized;
 DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
 DECLARE_PER_CPU(cpumask_t, cpu_core_map);
 DECLARE_PER_CPU(u16, cpu_llc_id);
+#ifdef CONFIG_X86_32
+DECLARE_PER_CPU(int, cpu_number);
+#endif
 DECLARE_EARLY_PER_CPU(u16, x86_cpu_to_apicid);
 DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
@@ -47,12 +50,16 @@ extern struct {
 struct smp_ops {
        void (*smp_prepare_boot_cpu)(void);
        void (*smp_prepare_cpus)(unsigned max_cpus);
-        int (*cpu_up)(unsigned cpu);
        void (*smp_cpus_done)(unsigned max_cpus);
        void (*smp_send_stop)(void);
        void (*smp_send_reschedule)(int cpu);
+        int (*cpu_up)(unsigned cpu);
+        int (*cpu_disable)(void);
+        void (*cpu_die)(unsigned int cpu);
+        void (*play_dead)(void);
        void (*send_call_func_ipi)(cpumask_t mask);
        void (*send_call_func_single_ipi)(int cpu);
 };
@@ -91,6 +98,21 @@ static inline int __cpu_up(unsigned int cpu)
        return smp_ops.cpu_up(cpu);
 }
+static inline int __cpu_disable(void)
+{
+        return smp_ops.cpu_disable();
+}
+static inline void __cpu_die(unsigned int cpu)
+{
+        smp_ops.cpu_die(cpu);
+}
+static inline void play_dead(void)
+{
+        smp_ops.play_dead();
+}
 static inline void smp_send_reschedule(int cpu)
 {
        smp_ops.smp_send_reschedule(cpu);
@@ -106,16 +128,19 @@ static inline void arch_send_call_function_ipi(cpumask_t mask)
        smp_ops.send_call_func_ipi(mask);
 }
+void cpu_disable_common(void);
 void native_smp_prepare_boot_cpu(void);
 void native_smp_prepare_cpus(unsigned int max_cpus);
 void native_smp_cpus_done(unsigned int max_cpus);
 int native_cpu_up(unsigned int cpunum);
+int native_cpu_disable(void);
+void native_cpu_die(unsigned int cpu);
+void native_play_dead(void);
+void play_dead_common(void);
 void native_send_call_func_ipi(cpumask_t mask);
 void native_send_call_func_single_ipi(int cpu);
-extern int __cpu_disable(void);
-extern void __cpu_die(unsigned int cpu);
 void smp_store_cpu_info(int id);
 #define cpu_physical_id(cpu)    per_cpu(x86_cpu_to_apicid, cpu)
@@ -142,7 +167,6 @@ extern unsigned disabled_cpus __cpuinitdata;
 * from the initial startup. We map APIC_BASE very early in page_setup(),
 * so this is correct in the x86 case.
 */
-DECLARE_PER_CPU(int, cpu_number);
 #define raw_smp_processor_id() (x86_read_percpu(cpu_number))
 extern int safe_smp_processor_id(void);
@@ -165,30 +189,33 @@ extern int safe_smp_processor_id(void);
 #ifdef CONFIG_X86_LOCAL_APIC
+#ifndef CONFIG_X86_64
 static inline int logical_smp_processor_id(void)
 {
        /* we don't want to mark this access volatile - bad code generation */
        return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
 }
-#ifndef CONFIG_X86_64
+#include <mach_apicdef.h>
 static inline unsigned int read_apic_id(void)
 {
-        return *(u32 *)(APIC_BASE + APIC_ID);
+        unsigned int reg;
+        reg = *(u32 *)(APIC_BASE + APIC_ID);
+        return GET_APIC_ID(reg);
 }
-#else
-extern unsigned int read_apic_id(void);
 #endif
-# ifdef APIC_DEFINITION
+# if defined(APIC_DEFINITION) || defined(CONFIG_X86_64)
 extern int hard_smp_processor_id(void);
 # else
-#  include <mach_apicdef.h>
+#include <mach_apicdef.h>
 static inline int hard_smp_processor_id(void)
 {
        /* we don't want to mark this access volatile - bad code generation */
-        return GET_APIC_ID(read_apic_id());
+        return read_apic_id();
 }
 # endif /* APIC_DEFINITION */
@@ -200,9 +227,5 @@ static inline int hard_smp_processor_id(void)
 #endif /* CONFIG_X86_LOCAL_APIC */
-#ifdef CONFIG_HOTPLUG_CPU
-extern void cpu_uninit(void);
-#endif
 #endif /* __ASSEMBLY__ */
-#endif
+#endif /* ASM_X86__SMP_H */
diff --git a/include/asm-x86/socket.h b/include/asm-x86/socket.h
index 80af9c4ccad7..db73274c83c3 100644
--- a/include/asm-x86/socket.h
+++ b/include/asm-x86/socket.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_SOCKET_H
+#ifndef ASM_X86__SOCKET_H
-#define _ASM_SOCKET_H
+#define ASM_X86__SOCKET_H
 #include <asm/sockios.h>
@@ -54,4 +54,4 @@
 #define SO_MARK                 36
-#endif /* _ASM_SOCKET_H */
+#endif /* ASM_X86__SOCKET_H */
diff --git a/include/asm-x86/sockios.h b/include/asm-x86/sockios.h
index 49cc72b5d3c9..a006704fdc84 100644
--- a/include/asm-x86/sockios.h
+++ b/include/asm-x86/sockios.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SOCKIOS_H
+#ifndef ASM_X86__SOCKIOS_H
-#define _ASM_X86_SOCKIOS_H
+#define ASM_X86__SOCKIOS_H
 /* Socket-level I/O control calls. */
 #define FIOSETOWN       0x8901
@@ -10,4 +10,4 @@
 #define SIOCGSTAMP      0x8906          /* Get stamp (timeval) */
 #define SIOCGSTAMPNS    0x8907          /* Get stamp (timespec) */
-#endif /* _ASM_X86_SOCKIOS_H */
+#endif /* ASM_X86__SOCKIOS_H */
diff --git a/include/asm-x86/sparsemem.h b/include/asm-x86/sparsemem.h
index 9bd48b0a534b..38f8e6bc3186 100644
--- a/include/asm-x86/sparsemem.h
+++ b/include/asm-x86/sparsemem.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SPARSEMEM_H
+#ifndef ASM_X86__SPARSEMEM_H
-#define _ASM_X86_SPARSEMEM_H
+#define ASM_X86__SPARSEMEM_H
 #ifdef CONFIG_SPARSEMEM
 /*
@@ -31,4 +31,4 @@
 #endif
 #endif /* CONFIG_SPARSEMEM */
-#endif
+#endif /* ASM_X86__SPARSEMEM_H */
diff --git a/include/asm-x86/spinlock.h b/include/asm-x86/spinlock.h
index 4f9a9861799a..157ff7fab97a 100644
--- a/include/asm-x86/spinlock.h
+++ b/include/asm-x86/spinlock.h
@@ -1,5 +1,5 @@
-#ifndef _X86_SPINLOCK_H_
+#ifndef ASM_X86__SPINLOCK_H
-#define _X86_SPINLOCK_H_
+#define ASM_X86__SPINLOCK_H
 #include <asm/atomic.h>
 #include <asm/rwlock.h>
@@ -21,8 +21,10 @@
 #ifdef CONFIG_X86_32
 # define LOCK_PTR_REG "a"
+# define REG_PTR_MODE "k"
 #else
 # define LOCK_PTR_REG "D"
+# define REG_PTR_MODE "q"
 #endif
 #if defined(CONFIG_X86_32) && \
@@ -54,19 +56,7 @@
 * much between them in performance though, especially as locks are out of line.
 */
 #if (NR_CPUS < 256)
-static inline int __ticket_spin_is_locked(raw_spinlock_t *lock)
+#define TICKET_SHIFT 8
-{
-        int tmp = ACCESS_ONCE(lock->slock);
-        return (((tmp >> 8) & 0xff) != (tmp & 0xff));
-}
-static inline int __ticket_spin_is_contended(raw_spinlock_t *lock)
-{
-        int tmp = ACCESS_ONCE(lock->slock);
-        return (((tmp >> 8) & 0xff) - (tmp & 0xff)) > 1;
-}
 static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock)
 {
@@ -89,19 +79,17 @@ static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock)
 static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock)
 {
-        int tmp;
+        int tmp, new;
-        short new;
-        asm volatile("movw %2,%w0\n\t"
+        asm volatile("movzwl %2, %0\n\t"
                     "cmpb %h0,%b0\n\t"
+                     "leal 0x100(%" REG_PTR_MODE "0), %1\n\t"
                     "jne 1f\n\t"
-                     "movw %w0,%w1\n\t"
+                     LOCK_PREFIX "cmpxchgw %w1,%2\n\t"
-                     "incb %h1\n\t"
-                     "lock ; cmpxchgw %w1,%2\n\t"
                     "1:"
                     "sete %b1\n\t"
                     "movzbl %b1,%0\n\t"
-                     : "=&a" (tmp), "=Q" (new), "+m" (lock->slock)
+                     : "=&a" (tmp), "=&q" (new), "+m" (lock->slock)
                     :
                     : "memory", "cc");
@@ -116,26 +104,14 @@ static __always_inline void __ticket_spin_unlock(raw_spinlock_t *lock)
                     : "memory", "cc");
 }
 #else
-static inline int __ticket_spin_is_locked(raw_spinlock_t *lock)
+#define TICKET_SHIFT 16
-{
-        int tmp = ACCESS_ONCE(lock->slock);
-        return (((tmp >> 16) & 0xffff) != (tmp & 0xffff));
-}
-static inline int __ticket_spin_is_contended(raw_spinlock_t *lock)
-{
-        int tmp = ACCESS_ONCE(lock->slock);
-        return (((tmp >> 16) & 0xffff) - (tmp & 0xffff)) > 1;
-}
 static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock)
 {
        int inc = 0x00010000;
        int tmp;
-        asm volatile("lock ; xaddl %0, %1\n"
+        asm volatile(LOCK_PREFIX "xaddl %0, %1\n"
                     "movzwl %w0, %2\n\t"
                     "shrl $16, %0\n\t"
                     "1:\t"
@@ -146,7 +122,7 @@ static __always_inline void __ticket_spin_lock(raw_spinlock_t *lock)
                     /* don't need lfence here, because loads are in-order */
                     "jmp 1b\n"
                     "2:"
-                     : "+Q" (inc), "+m" (lock->slock), "=r" (tmp)
+                     : "+r" (inc), "+m" (lock->slock), "=&r" (tmp)
                     :
                     : "memory", "cc");
 }
@@ -160,13 +136,13 @@ static __always_inline int __ticket_spin_trylock(raw_spinlock_t *lock)
                     "movl %0,%1\n\t"
                     "roll $16, %0\n\t"
                     "cmpl %0,%1\n\t"
+                     "leal 0x00010000(%" REG_PTR_MODE "0), %1\n\t"
                     "jne 1f\n\t"
-                     "addl $0x00010000, %1\n\t"
+                     LOCK_PREFIX "cmpxchgl %1,%2\n\t"
-                     "lock ; cmpxchgl %1,%2\n\t"
                     "1:"
                     "sete %b1\n\t"
                     "movzbl %b1,%0\n\t"
-                     : "=&a" (tmp), "=r" (new), "+m" (lock->slock)
+                     : "=&a" (tmp), "=&q" (new), "+m" (lock->slock)
                     :
                     : "memory", "cc");
@@ -182,7 +158,19 @@ static __always_inline void __ticket_spin_unlock(raw_spinlock_t *lock)
 }
 #endif
-#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
+static inline int __ticket_spin_is_locked(raw_spinlock_t *lock)
+{
+        int tmp = ACCESS_ONCE(lock->slock);
+        return !!(((tmp >> TICKET_SHIFT) ^ tmp) & ((1 << TICKET_SHIFT) - 1));
+}
+static inline int __ticket_spin_is_contended(raw_spinlock_t *lock)
+{
+        int tmp = ACCESS_ONCE(lock->slock);
+        return (((tmp >> TICKET_SHIFT) - tmp) & ((1 << TICKET_SHIFT) - 1)) > 1;
+}
 #ifdef CONFIG_PARAVIRT
 /*
@@ -272,6 +260,13 @@ static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock)
 {
        __ticket_spin_unlock(lock);
 }
+static __always_inline void __raw_spin_lock_flags(raw_spinlock_t *lock,
+                                                  unsigned long flags)
+{
+        __raw_spin_lock(lock);
+}
 #endif  /* CONFIG_PARAVIRT */
 static inline void __raw_spin_unlock_wait(raw_spinlock_t *lock)
@@ -366,4 +361,4 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw)
 #define _raw_read_relax(lock)   cpu_relax()
 #define _raw_write_relax(lock)  cpu_relax()
-#endif
+#endif /* ASM_X86__SPINLOCK_H */
diff --git a/include/asm-x86/spinlock_types.h b/include/asm-x86/spinlock_types.h
index 06c071c9eee9..6aa9b562c508 100644
--- a/include/asm-x86/spinlock_types.h
+++ b/include/asm-x86/spinlock_types.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_SPINLOCK_TYPES_H
+#ifndef ASM_X86__SPINLOCK_TYPES_H
-#define __ASM_SPINLOCK_TYPES_H
+#define ASM_X86__SPINLOCK_TYPES_H
 #ifndef __LINUX_SPINLOCK_TYPES_H
 # error "please don't include this file directly"
@@ -17,4 +17,4 @@ typedef struct {
 #define __RAW_RW_LOCK_UNLOCKED          { RW_LOCK_BIAS }
-#endif
+#endif /* ASM_X86__SPINLOCK_TYPES_H */
diff --git a/include/asm-x86/srat.h b/include/asm-x86/srat.h
index 774c919dc232..5363e4f7e1cd 100644
--- a/include/asm-x86/srat.h
+++ b/include/asm-x86/srat.h
@@ -24,8 +24,8 @@
 * Send feedback to Pat Gaughen <gone@us.ibm.com>
 */
-#ifndef _ASM_SRAT_H_
+#ifndef ASM_X86__SRAT_H
-#define _ASM_SRAT_H_
+#define ASM_X86__SRAT_H
 #ifdef CONFIG_ACPI_NUMA
 extern int get_memcfg_from_srat(void);
@@ -36,4 +36,4 @@ static inline int get_memcfg_from_srat(void)
 }
 #endif
-#endif /* _ASM_SRAT_H_ */
+#endif /* ASM_X86__SRAT_H */
diff --git a/include/asm-x86/stacktrace.h b/include/asm-x86/stacktrace.h
index 30f82526a8e2..f43517e28532 100644
--- a/include/asm-x86/stacktrace.h
+++ b/include/asm-x86/stacktrace.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_STACKTRACE_H
+#ifndef ASM_X86__STACKTRACE_H
-#define _ASM_STACKTRACE_H 1
+#define ASM_X86__STACKTRACE_H
 extern int kstack_depth_to_print;
@@ -18,4 +18,4 @@ void dump_trace(struct task_struct *tsk, struct pt_regs *regs,
                unsigned long *stack, unsigned long bp,
                const struct stacktrace_ops *ops, void *data);
-#endif
+#endif /* ASM_X86__STACKTRACE_H */
diff --git a/include/asm-x86/stat.h b/include/asm-x86/stat.h
index 5c22dcb5d17e..1e120f628905 100644
--- a/include/asm-x86/stat.h
+++ b/include/asm-x86/stat.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_STAT_H
+#ifndef ASM_X86__STAT_H
-#define _ASM_X86_STAT_H
+#define ASM_X86__STAT_H
 #define STAT_HAVE_NSEC 1
@@ -111,4 +111,4 @@ struct __old_kernel_stat {
 #endif
 };
-#endif
+#endif /* ASM_X86__STAT_H */
diff --git a/include/asm-x86/statfs.h b/include/asm-x86/statfs.h
index 7c651aa97252..3f005bc3aa5b 100644
--- a/include/asm-x86/statfs.h
+++ b/include/asm-x86/statfs.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_STATFS_H
+#ifndef ASM_X86__STATFS_H
-#define _ASM_X86_STATFS_H
+#define ASM_X86__STATFS_H
 #ifdef __i386__
 #include <asm-generic/statfs.h>
@@ -60,4 +60,4 @@ struct compat_statfs64 {
 } __attribute__((packed));
 #endif /* !__i386__ */
-#endif
+#endif /* ASM_X86__STATFS_H */
diff --git a/include/asm-x86/string_32.h b/include/asm-x86/string_32.h
index 193578cd1fd9..487843ed245a 100644
--- a/include/asm-x86/string_32.h
+++ b/include/asm-x86/string_32.h
@@ -1,5 +1,5 @@
-#ifndef _I386_STRING_H_
+#ifndef ASM_X86__STRING_32_H
-#define _I386_STRING_H_
+#define ASM_X86__STRING_32_H
 #ifdef __KERNEL__
@@ -323,4 +323,4 @@ extern void *memscan(void *addr, int c, size_t size);
 #endif /* __KERNEL__ */
-#endif
+#endif /* ASM_X86__STRING_32_H */
diff --git a/include/asm-x86/string_64.h b/include/asm-x86/string_64.h
index 52b5ab383395..a2add11d3b66 100644
--- a/include/asm-x86/string_64.h
+++ b/include/asm-x86/string_64.h
@@ -1,5 +1,5 @@
-#ifndef _X86_64_STRING_H_
+#ifndef ASM_X86__STRING_64_H
-#define _X86_64_STRING_H_
+#define ASM_X86__STRING_64_H
 #ifdef __KERNEL__
@@ -57,4 +57,4 @@ int strcmp(const char *cs, const char *ct);
 #endif /* __KERNEL__ */
-#endif
+#endif /* ASM_X86__STRING_64_H */
diff --git a/include/asm-x86/mach-summit/mach_apic.h b/include/asm-x86/summit/apic.h
index 75d2c95005d7..c5b2e4b10358 100644
--- a/include/asm-x86/mach-summit/mach_apic.h
+++ b/include/asm-x86/summit/apic.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_APIC_H
+#ifndef __ASM_SUMMIT_APIC_H
-#define __ASM_MACH_APIC_H
+#define __ASM_SUMMIT_APIC_H
 #include <asm/smp.h>
@@ -21,7 +21,7 @@ static inline cpumask_t target_cpus(void)
         * Just start on cpu 0.  IRQ balancing will spread load
         */
        return cpumask_of_cpu(0);
-} 
+}
 #define TARGET_CPUS     (target_cpus())
 #define INT_DELIVERY_MODE (dest_LowestPrio)
@@ -30,10 +30,10 @@ static inline cpumask_t target_cpus(void)
 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
 {
        return 0;
-} 
+}
 /* we don't use the phys_cpu_present_map to indicate apicid presence */
-static inline unsigned long check_apicid_present(int bit) 
+static inline unsigned long check_apicid_present(int bit)
 {
        return 1;
 }
@@ -143,22 +143,22 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
        int num_bits_set;
        int cpus_found = 0;
        int cpu;
-        int apicid;     
+        int apicid;
        num_bits_set = cpus_weight(cpumask);
        /* Return id to all */
        if (num_bits_set == NR_CPUS)
                return (int) 0xFF;
-        /* 
+        /*
-         * The cpus in the mask must all be on the apic cluster.  If are not 
+         * The cpus in the mask must all be on the apic cluster.  If are not
-         * on the same apicid cluster return default value of TARGET_CPUS. 
+         * on the same apicid cluster return default value of TARGET_CPUS.
         */
        cpu = first_cpu(cpumask);
        apicid = cpu_to_logical_apicid(cpu);
        while (cpus_found < num_bits_set) {
                if (cpu_isset(cpu, cpumask)) {
                        int new_apicid = cpu_to_logical_apicid(cpu);
-                        if (apicid_cluster(apicid) != 
+                        if (apicid_cluster(apicid) !=
                                        apicid_cluster(new_apicid)){
                                printk ("%s: Not a valid mask!\n",__FUNCTION__);
                                return 0xFF;
@@ -182,4 +182,4 @@ static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
        return hard_smp_processor_id() >> index_msb;
 }
-#endif /* __ASM_MACH_APIC_H */
+#endif /* __ASM_SUMMIT_APIC_H */
diff --git a/include/asm-x86/summit/apicdef.h b/include/asm-x86/summit/apicdef.h
new file mode 100644
index 000000000000..f3fbca1f61c1
--- /dev/null
+++ b/include/asm-x86/summit/apicdef.h
@@ -0,0 +1,13 @@
+#ifndef __ASM_SUMMIT_APICDEF_H
+#define __ASM_SUMMIT_APICDEF_H
+#define         APIC_ID_MASK            (0xFF<<24)
+static inline unsigned get_apic_id(unsigned long x)
+{
+        return (x>>24)&0xFF;
+}
+#define         GET_APIC_ID(x)  get_apic_id(x)
+#endif
diff --git a/include/asm-x86/mach-summit/mach_ipi.h b/include/asm-x86/summit/ipi.h
index 9404c535b7ec..53bd1e7bd7b4 100644
--- a/include/asm-x86/mach-summit/mach_ipi.h
+++ b/include/asm-x86/summit/ipi.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_MACH_IPI_H
+#ifndef __ASM_SUMMIT_IPI_H
-#define __ASM_MACH_IPI_H
+#define __ASM_SUMMIT_IPI_H
 void send_IPI_mask_sequence(cpumask_t mask, int vector);
@@ -22,4 +22,4 @@ static inline void send_IPI_all(int vector)
        send_IPI_mask(cpu_online_map, vector);
 }
-#endif /* __ASM_MACH_IPI_H */
+#endif /* __ASM_SUMMIT_IPI_H */
diff --git a/include/asm-x86/mach-summit/irq_vectors_limits.h b/include/asm-x86/summit/irq_vectors_limits.h
index 890ce3f5e09a..890ce3f5e09a 100644
--- a/include/asm-x86/mach-summit/irq_vectors_limits.h
+++ b/include/asm-x86/summit/irq_vectors_limits.h
diff --git a/include/asm-x86/mach-summit/mach_mpparse.h b/include/asm-x86/summit/mpparse.h
index fdf591701339..013ce6fab2d5 100644
--- a/include/asm-x86/mach-summit/mach_mpparse.h
+++ b/include/asm-x86/summit/mpparse.h
@@ -1,7 +1,6 @@
-#ifndef __ASM_MACH_MPPARSE_H
+#ifndef __ASM_SUMMIT_MPPARSE_H
-#define __ASM_MACH_MPPARSE_H
+#define __ASM_SUMMIT_MPPARSE_H
-#include <mach_apic.h>
 #include <asm/tsc.h>
 extern int use_cyclone;
@@ -12,11 +11,11 @@ extern void setup_summit(void);
 #define setup_summit()  {}
 #endif
-static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, 
+static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
                char *productid)
 {
-        if (!strncmp(oem, "IBM ENSW", 8) && 
+        if (!strncmp(oem, "IBM ENSW", 8) &&
-                        (!strncmp(productid, "VIGIL SMP", 9) 
+                        (!strncmp(productid, "VIGIL SMP", 9)
                         || !strncmp(productid, "EXA", 3)
                         || !strncmp(productid, "RUTHLESS SMP", 12))){
                mark_tsc_unstable("Summit based system");
@@ -107,4 +106,4 @@ static inline int is_WPEG(struct rio_detail *rio){
                rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
 }
-#endif /* __ASM_MACH_MPPARSE_H */
+#endif /* __ASM_SUMMIT_MPPARSE_H */
diff --git a/include/asm-x86/suspend_32.h b/include/asm-x86/suspend_32.h
index 8675c6782a7d..acb6d4d491f4 100644
--- a/include/asm-x86/suspend_32.h
+++ b/include/asm-x86/suspend_32.h
@@ -3,8 +3,8 @@
 * Based on code
 * Copyright 2001 Patrick Mochel <mochel@osdl.org>
 */
-#ifndef __ASM_X86_32_SUSPEND_H
+#ifndef ASM_X86__SUSPEND_32_H
-#define __ASM_X86_32_SUSPEND_H
+#define ASM_X86__SUSPEND_32_H
 #include <asm/desc.h>
 #include <asm/i387.h>
@@ -48,4 +48,4 @@ static inline void acpi_save_register_state(unsigned long return_point)
 extern int acpi_save_state_mem(void);
 #endif
-#endif /* __ASM_X86_32_SUSPEND_H */
+#endif /* ASM_X86__SUSPEND_32_H */
diff --git a/include/asm-x86/suspend_64.h b/include/asm-x86/suspend_64.h
index dc3262b43072..cf821dd310e8 100644
--- a/include/asm-x86/suspend_64.h
+++ b/include/asm-x86/suspend_64.h
@@ -3,8 +3,8 @@
 * Based on code
 * Copyright 2001 Patrick Mochel <mochel@osdl.org>
 */
-#ifndef __ASM_X86_64_SUSPEND_H
+#ifndef ASM_X86__SUSPEND_64_H
-#define __ASM_X86_64_SUSPEND_H
+#define ASM_X86__SUSPEND_64_H
 #include <asm/desc.h>
 #include <asm/i387.h>
@@ -49,4 +49,4 @@ extern int acpi_save_state_mem(void);
 extern char core_restore_code;
 extern char restore_registers;
-#endif /* __ASM_X86_64_SUSPEND_H */
+#endif /* ASM_X86__SUSPEND_64_H */
diff --git a/include/asm-x86/swiotlb.h b/include/asm-x86/swiotlb.h
index c706a7442633..1e20adbcad4b 100644
--- a/include/asm-x86/swiotlb.h
+++ b/include/asm-x86/swiotlb.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_SWIOTLB_H
+#ifndef ASM_X86__SWIOTLB_H
-#define _ASM_SWIOTLB_H 1
+#define ASM_X86__SWIOTLB_H
 #include <asm/dma-mapping.h>
@@ -35,7 +35,7 @@ extern int swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg,
                          int nents, int direction);
 extern void swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg,
                             int nents, int direction);
-extern int swiotlb_dma_mapping_error(dma_addr_t dma_addr);
+extern int swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr);
 extern void swiotlb_free_coherent(struct device *hwdev, size_t size,
                                  void *vaddr, dma_addr_t dma_handle);
 extern int swiotlb_dma_supported(struct device *hwdev, u64 mask);
@@ -55,4 +55,4 @@ static inline void pci_swiotlb_init(void)
 static inline void dma_mark_clean(void *addr, size_t size) {}
-#endif /* _ASM_SWIOTLB_H */
+#endif /* ASM_X86__SWIOTLB_H */
diff --git a/include/asm-x86/sync_bitops.h b/include/asm-x86/sync_bitops.h
index b47a1d0b8a83..b689bee71104 100644
--- a/include/asm-x86/sync_bitops.h
+++ b/include/asm-x86/sync_bitops.h
@@ -1,5 +1,5 @@
-#ifndef _I386_SYNC_BITOPS_H
+#ifndef ASM_X86__SYNC_BITOPS_H
-#define _I386_SYNC_BITOPS_H
+#define ASM_X86__SYNC_BITOPS_H
 /*
 * Copyright 1992, Linus Torvalds.
@@ -127,4 +127,4 @@ static inline int sync_test_and_change_bit(int nr, volatile unsigned long *addr)
 #undef ADDR
-#endif /* _I386_SYNC_BITOPS_H */
+#endif /* ASM_X86__SYNC_BITOPS_H */
diff --git a/include/asm-x86/syscall.h b/include/asm-x86/syscall.h
new file mode 100644
index 000000000000..04c47dc5597c
--- /dev/null
+++ b/include/asm-x86/syscall.h
@@ -0,0 +1,211 @@
+/*
+ * Access to user system call parameters and results
+ *
+ * Copyright (C) 2008 Red Hat, Inc.  All rights reserved.
+ *
+ * This copyrighted material is made available to anyone wishing to use,
+ * modify, copy, or redistribute it subject to the terms and conditions
+ * of the GNU General Public License v.2.
+ *
+ * See asm-generic/syscall.h for descriptions of what we must do here.
+ */
+#ifndef _ASM_SYSCALL_H
+#define _ASM_SYSCALL_H  1
+#include <linux/sched.h>
+#include <linux/err.h>
+static inline long syscall_get_nr(struct task_struct *task,
+                                  struct pt_regs *regs)
+{
+        /*
+         * We always sign-extend a -1 value being set here,
+         * so this is always either -1L or a syscall number.
+         */
+        return regs->orig_ax;
+}
+static inline void syscall_rollback(struct task_struct *task,
+                                    struct pt_regs *regs)
+{
+        regs->ax = regs->orig_ax;
+}
+static inline long syscall_get_error(struct task_struct *task,
+                                     struct pt_regs *regs)
+{
+        unsigned long error = regs->ax;
+#ifdef CONFIG_IA32_EMULATION
+        /*
+         * TS_COMPAT is set for 32-bit syscall entries and then
+         * remains set until we return to user mode.
+         */
+        if (task_thread_info(task)->status & TS_COMPAT)
+                /*
+                 * Sign-extend the value so (int)-EFOO becomes (long)-EFOO
+                 * and will match correctly in comparisons.
+                 */
+                error = (long) (int) error;
+#endif
+        return IS_ERR_VALUE(error) ? error : 0;
+}
+static inline long syscall_get_return_value(struct task_struct *task,
+                                            struct pt_regs *regs)
+{
+        return regs->ax;
+}
+static inline void syscall_set_return_value(struct task_struct *task,
+                                            struct pt_regs *regs,
+                                            int error, long val)
+{
+        regs->ax = (long) error ?: val;
+}
+#ifdef CONFIG_X86_32
+static inline void syscall_get_arguments(struct task_struct *task,
+                                         struct pt_regs *regs,
+                                         unsigned int i, unsigned int n,
+                                         unsigned long *args)
+{
+        BUG_ON(i + n > 6);
+        memcpy(args, &regs->bx + i, n * sizeof(args[0]));
+}
+static inline void syscall_set_arguments(struct task_struct *task,
+                                         struct pt_regs *regs,
+                                         unsigned int i, unsigned int n,
+                                         const unsigned long *args)
+{
+        BUG_ON(i + n > 6);
+        memcpy(&regs->bx + i, args, n * sizeof(args[0]));
+}
+#else    /* CONFIG_X86_64 */
+static inline void syscall_get_arguments(struct task_struct *task,
+                                         struct pt_regs *regs,
+                                         unsigned int i, unsigned int n,
+                                         unsigned long *args)
+{
+# ifdef CONFIG_IA32_EMULATION
+        if (task_thread_info(task)->status & TS_COMPAT)
+                switch (i + n) {
+                case 6:
+                        if (!n--) break;
+                        *args++ = regs->bp;
+                case 5:
+                        if (!n--) break;
+                        *args++ = regs->di;
+                case 4:
+                        if (!n--) break;
+                        *args++ = regs->si;
+                case 3:
+                        if (!n--) break;
+                        *args++ = regs->dx;
+                case 2:
+                        if (!n--) break;
+                        *args++ = regs->cx;
+                case 1:
+                        if (!n--) break;
+                        *args++ = regs->bx;
+                case 0:
+                        if (!n--) break;
+                default:
+                        BUG();
+                        break;
+                }
+        else
+# endif
+                switch (i + n) {
+                case 6:
+                        if (!n--) break;
+                        *args++ = regs->r9;
+                case 5:
+                        if (!n--) break;
+                        *args++ = regs->r8;
+                case 4:
+                        if (!n--) break;
+                        *args++ = regs->r10;
+                case 3:
+                        if (!n--) break;
+                        *args++ = regs->dx;
+                case 2:
+                        if (!n--) break;
+                        *args++ = regs->si;
+                case 1:
+                        if (!n--) break;
+                        *args++ = regs->di;
+                case 0:
+                        if (!n--) break;
+                default:
+                        BUG();
+                        break;
+                }
+}
+static inline void syscall_set_arguments(struct task_struct *task,
+                                         struct pt_regs *regs,
+                                         unsigned int i, unsigned int n,
+                                         const unsigned long *args)
+{
+# ifdef CONFIG_IA32_EMULATION
+        if (task_thread_info(task)->status & TS_COMPAT)
+                switch (i + n) {
+                case 6:
+                        if (!n--) break;
+                        regs->bp = *args++;
+                case 5:
+                        if (!n--) break;
+                        regs->di = *args++;
+                case 4:
+                        if (!n--) break;
+                        regs->si = *args++;
+                case 3:
+                        if (!n--) break;
+                        regs->dx = *args++;
+                case 2:
+                        if (!n--) break;
+                        regs->cx = *args++;
+                case 1:
+                        if (!n--) break;
+                        regs->bx = *args++;
+                case 0:
+                        if (!n--) break;
+                default:
+                        BUG();
+                }
+        else
+# endif
+                switch (i + n) {
+                case 6:
+                        if (!n--) break;
+                        regs->r9 = *args++;
+                case 5:
+                        if (!n--) break;
+                        regs->r8 = *args++;
+                case 4:
+                        if (!n--) break;
+                        regs->r10 = *args++;
+                case 3:
+                        if (!n--) break;
+                        regs->dx = *args++;
+                case 2:
+                        if (!n--) break;
+                        regs->si = *args++;
+                case 1:
+                        if (!n--) break;
+                        regs->di = *args++;
+                case 0:
+                        if (!n--) break;
+                default:
+                        BUG();
+                }
+}
+#endif  /* CONFIG_X86_32 */
+#endif  /* _ASM_SYSCALL_H */
diff --git a/include/asm-x86/syscalls.h b/include/asm-x86/syscalls.h
new file mode 100644
index 000000000000..87803da44010
--- /dev/null
+++ b/include/asm-x86/syscalls.h
@@ -0,0 +1,93 @@
+/*
+ * syscalls.h - Linux syscall interfaces (arch-specific)
+ *
+ * Copyright (c) 2008 Jaswinder Singh
+ *
+ * This file is released under the GPLv2.
+ * See the file COPYING for more details.
+ */
+#ifndef _ASM_X86_SYSCALLS_H
+#define _ASM_X86_SYSCALLS_H
+#include <linux/compiler.h>
+#include <linux/linkage.h>
+#include <linux/types.h>
+#include <linux/signal.h>
+/* Common in X86_32 and X86_64 */
+/* kernel/ioport.c */
+asmlinkage long sys_ioperm(unsigned long, unsigned long, int);
+/* X86_32 only */
+#ifdef CONFIG_X86_32
+/* kernel/process_32.c */
+asmlinkage int sys_fork(struct pt_regs);
+asmlinkage int sys_clone(struct pt_regs);
+asmlinkage int sys_vfork(struct pt_regs);
+asmlinkage int sys_execve(struct pt_regs);
+/* kernel/signal_32.c */
+asmlinkage int sys_sigsuspend(int, int, old_sigset_t);
+asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
+                             struct old_sigaction __user *);
+asmlinkage int sys_sigaltstack(unsigned long);
+asmlinkage unsigned long sys_sigreturn(unsigned long);
+asmlinkage int sys_rt_sigreturn(unsigned long);
+/* kernel/ioport.c */
+asmlinkage long sys_iopl(unsigned long);
+/* kernel/ldt.c */
+asmlinkage int sys_modify_ldt(int, void __user *, unsigned long);
+/* kernel/sys_i386_32.c */
+asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
+                          unsigned long, unsigned long, unsigned long);
+struct mmap_arg_struct;
+asmlinkage int old_mmap(struct mmap_arg_struct __user *);
+struct sel_arg_struct;
+asmlinkage int old_select(struct sel_arg_struct __user *);
+asmlinkage int sys_ipc(uint, int, int, int, void __user *, long);
+struct old_utsname;
+asmlinkage int sys_uname(struct old_utsname __user *);
+struct oldold_utsname;
+asmlinkage int sys_olduname(struct oldold_utsname __user *);
+/* kernel/tls.c */
+asmlinkage int sys_set_thread_area(struct user_desc __user *);
+asmlinkage int sys_get_thread_area(struct user_desc __user *);
+/* kernel/vm86_32.c */
+asmlinkage int sys_vm86old(struct pt_regs);
+asmlinkage int sys_vm86(struct pt_regs);
+#else /* CONFIG_X86_32 */
+/* X86_64 only */
+/* kernel/process_64.c */
+asmlinkage long sys_fork(struct pt_regs *);
+asmlinkage long sys_clone(unsigned long, unsigned long,
+                          void __user *, void __user *,
+                          struct pt_regs *);
+asmlinkage long sys_vfork(struct pt_regs *);
+asmlinkage long sys_execve(char __user *, char __user * __user *,
+                           char __user * __user *,
+                           struct pt_regs *);
+/* kernel/ioport.c */
+asmlinkage long sys_iopl(unsigned int, struct pt_regs *);
+/* kernel/signal_64.c */
+asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *,
+                                struct pt_regs *);
+asmlinkage long sys_rt_sigreturn(struct pt_regs *);
+/* kernel/sys_x86_64.c */
+asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,
+                         unsigned long, unsigned long, unsigned long);
+struct new_utsname;
+asmlinkage long sys_uname(struct new_utsname __user *);
+#endif /* CONFIG_X86_32 */
+#endif /* _ASM_X86_SYSCALLS_H */
diff --git a/include/asm-x86/system.h b/include/asm-x86/system.h
index 983ce37c491f..34505dd7b24d 100644
--- a/include/asm-x86/system.h
+++ b/include/asm-x86/system.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_SYSTEM_H_
+#ifndef ASM_X86__SYSTEM_H
-#define _ASM_X86_SYSTEM_H_
+#define ASM_X86__SYSTEM_H
 #include <asm/asm.h>
 #include <asm/segment.h>
@@ -419,4 +419,4 @@ static inline void rdtsc_barrier(void)
        alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
 }
-#endif
+#endif /* ASM_X86__SYSTEM_H */
diff --git a/include/asm-x86/system_64.h b/include/asm-x86/system_64.h
index 97fa251ccb2b..5aedb8bffc5a 100644
--- a/include/asm-x86/system_64.h
+++ b/include/asm-x86/system_64.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_SYSTEM_H
+#ifndef ASM_X86__SYSTEM_64_H
-#define __ASM_SYSTEM_H
+#define ASM_X86__SYSTEM_64_H
 #include <asm/segment.h>
 #include <asm/cmpxchg.h>
@@ -19,4 +19,4 @@ static inline void write_cr8(unsigned long val)
 #include <linux/irqflags.h>
-#endif
+#endif /* ASM_X86__SYSTEM_64_H */
diff --git a/include/asm-x86/tce.h b/include/asm-x86/tce.h
index b1a4ea00df78..e7932d7fbbab 100644
--- a/include/asm-x86/tce.h
+++ b/include/asm-x86/tce.h
@@ -21,8 +21,8 @@
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */
-#ifndef _ASM_X86_64_TCE_H
+#ifndef ASM_X86__TCE_H
-#define _ASM_X86_64_TCE_H
+#define ASM_X86__TCE_H
 extern unsigned int specified_table_size;
 struct iommu_table;
@@ -45,4 +45,4 @@ extern void * __init alloc_tce_table(void);
 extern void __init free_tce_table(void *tbl);
 extern int __init build_tce_table(struct pci_dev *dev, void __iomem *bbar);
-#endif /* _ASM_X86_64_TCE_H */
+#endif /* ASM_X86__TCE_H */
diff --git a/include/asm-x86/termbits.h b/include/asm-x86/termbits.h
index af1b70ea440f..3d00dc5e0c71 100644
--- a/include/asm-x86/termbits.h
+++ b/include/asm-x86/termbits.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_TERMBITS_H
+#ifndef ASM_X86__TERMBITS_H
-#define _ASM_X86_TERMBITS_H
+#define ASM_X86__TERMBITS_H
 #include <linux/posix_types.h>
@@ -195,4 +195,4 @@ struct ktermios {
 #define TCSADRAIN       1
 #define TCSAFLUSH       2
-#endif /* _ASM_X86_TERMBITS_H */
+#endif /* ASM_X86__TERMBITS_H */
diff --git a/include/asm-x86/termios.h b/include/asm-x86/termios.h
index f72956331c49..e235db248071 100644
--- a/include/asm-x86/termios.h
+++ b/include/asm-x86/termios.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_TERMIOS_H
+#ifndef ASM_X86__TERMIOS_H
-#define _ASM_X86_TERMIOS_H
+#define ASM_X86__TERMIOS_H
 #include <asm/termbits.h>
 #include <asm/ioctls.h>
@@ -110,4 +110,4 @@ static inline int kernel_termios_to_user_termios_1(struct termios __user *u,
 #endif  /* __KERNEL__ */
-#endif /* _ASM_X86_TERMIOS_H */
+#endif /* ASM_X86__TERMIOS_H */
diff --git a/include/asm-x86/therm_throt.h b/include/asm-x86/therm_throt.h
index 399bf6026b16..1c7f57b6b66e 100644
--- a/include/asm-x86/therm_throt.h
+++ b/include/asm-x86/therm_throt.h
@@ -1,9 +1,9 @@
-#ifndef __ASM_I386_THERM_THROT_H__
+#ifndef ASM_X86__THERM_THROT_H
-#define __ASM_I386_THERM_THROT_H__ 1
+#define ASM_X86__THERM_THROT_H
 #include <asm/atomic.h>
 extern atomic_t therm_throt_en;
 int therm_throt_process(int curr);
-#endif /* __ASM_I386_THERM_THROT_H__ */
+#endif /* ASM_X86__THERM_THROT_H */
diff --git a/include/asm-x86/thread_info.h b/include/asm-x86/thread_info.h
index da0a675adf94..3f4e52bb77f5 100644
--- a/include/asm-x86/thread_info.h
+++ b/include/asm-x86/thread_info.h
@@ -4,8 +4,8 @@
 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
 */
-#ifndef _ASM_X86_THREAD_INFO_H
+#ifndef ASM_X86__THREAD_INFO_H
-#define _ASM_X86_THREAD_INFO_H
+#define ASM_X86__THREAD_INFO_H
 #include <linux/compiler.h>
 #include <asm/page.h>
@@ -71,6 +71,7 @@ struct thread_info {
 * Warning: layout of LSW is hardcoded in entry.S
 */
 #define TIF_SYSCALL_TRACE       0       /* syscall trace active */
+#define TIF_NOTIFY_RESUME       1       /* callback before returning to user */
 #define TIF_SIGPENDING          2       /* signal pending */
 #define TIF_NEED_RESCHED        3       /* rescheduling necessary */
 #define TIF_SINGLESTEP          4       /* reenable singlestep on user return*/
@@ -93,6 +94,7 @@ struct thread_info {
 #define TIF_BTS_TRACE_TS        27      /* record scheduling event timestamps */
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
+#define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
 #define _TIF_SINGLESTEP         (1 << TIF_SINGLESTEP)
 #define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
@@ -133,7 +135,7 @@ struct thread_info {
 /* Only used for 64 bit */
 #define _TIF_DO_NOTIFY_MASK                                             \
-        (_TIF_SIGPENDING|_TIF_MCE_NOTIFY)
+        (_TIF_SIGPENDING|_TIF_MCE_NOTIFY|_TIF_NOTIFY_RESUME)
 /* flags to check in __switch_to() */
 #define _TIF_WORK_CTXSW                                                 \
@@ -239,6 +241,7 @@ static inline struct thread_info *stack_thread_info(void)
 #define TS_POLLING              0x0004  /* true if in idle loop
                                           and not sleeping */
 #define TS_RESTORE_SIGMASK      0x0008  /* restore signal mask in do_signal() */
+#define TS_XSAVE                0x0010  /* Use xsave/xrstor */
 #define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING)
@@ -258,4 +261,4 @@ extern void free_thread_info(struct thread_info *ti);
 extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
 #define arch_task_cache_init arch_task_cache_init
 #endif
-#endif /* _ASM_X86_THREAD_INFO_H */
+#endif /* ASM_X86__THREAD_INFO_H */
diff --git a/include/asm-x86/time.h b/include/asm-x86/time.h
index a17fa473e91d..3e724eef7ac4 100644
--- a/include/asm-x86/time.h
+++ b/include/asm-x86/time.h
@@ -1,5 +1,5 @@
-#ifndef _ASMX86_TIME_H
+#ifndef ASM_X86__TIME_H
-#define _ASMX86_TIME_H
+#define ASM_X86__TIME_H
 extern void hpet_time_init(void);
@@ -46,6 +46,8 @@ static inline int native_set_wallclock(unsigned long nowtime)
 #endif
+extern void time_init(void);
 #ifdef CONFIG_PARAVIRT
 #include <asm/paravirt.h>
 #else /* !CONFIG_PARAVIRT */
@@ -58,4 +60,4 @@ static inline int native_set_wallclock(unsigned long nowtime)
 extern unsigned long __init calibrate_cpu(void);
-#endif
+#endif /* ASM_X86__TIME_H */
diff --git a/include/asm-x86/timer.h b/include/asm-x86/timer.h
index fb2a4ddddf3d..d0babce4b47a 100644
--- a/include/asm-x86/timer.h
+++ b/include/asm-x86/timer.h
@@ -1,5 +1,5 @@
-#ifndef _ASMi386_TIMER_H
+#ifndef ASM_X86__TIMER_H
-#define _ASMi386_TIMER_H
+#define ASM_X86__TIMER_H
 #include <linux/init.h>
 #include <linux/pm.h>
 #include <linux/percpu.h>
@@ -9,9 +9,12 @@
 unsigned long long native_sched_clock(void);
 unsigned long native_calibrate_tsc(void);
+#ifdef CONFIG_X86_32
 extern int timer_ack;
-extern int no_timer_check;
 extern int recalibrate_cpu_khz(void);
+#endif /* CONFIG_X86_32 */
+extern int no_timer_check;
 #ifndef CONFIG_PARAVIRT
 #define calibrate_tsc() native_calibrate_tsc()
@@ -60,4 +63,4 @@ static inline unsigned long long cycles_2_ns(unsigned long long cyc)
        return ns;
 }
-#endif
+#endif /* ASM_X86__TIMER_H */
diff --git a/include/asm-x86/timex.h b/include/asm-x86/timex.h
index 43e5a78500c5..d1ce2416a5da 100644
--- a/include/asm-x86/timex.h
+++ b/include/asm-x86/timex.h
@@ -1,6 +1,6 @@
 /* x86 architecture timex specifications */
-#ifndef _ASM_X86_TIMEX_H
+#ifndef ASM_X86__TIMEX_H
-#define _ASM_X86_TIMEX_H
+#define ASM_X86__TIMEX_H
 #include <asm/processor.h>
 #include <asm/tsc.h>
@@ -16,4 +16,4 @@
 #define ARCH_HAS_READ_CURRENT_TIMER
-#endif
+#endif /* ASM_X86__TIMEX_H */
diff --git a/include/asm-x86/tlb.h b/include/asm-x86/tlb.h
index e4e9e2d07a93..db36e9e89e87 100644
--- a/include/asm-x86/tlb.h
+++ b/include/asm-x86/tlb.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_TLB_H
+#ifndef ASM_X86__TLB_H
-#define _ASM_X86_TLB_H
+#define ASM_X86__TLB_H
 #define tlb_start_vma(tlb, vma) do { } while (0)
 #define tlb_end_vma(tlb, vma) do { } while (0)
@@ -8,4 +8,4 @@
 #include <asm-generic/tlb.h>
-#endif
+#endif /* ASM_X86__TLB_H */
diff --git a/include/asm-x86/tlbflush.h b/include/asm-x86/tlbflush.h
index 35c76ceb9f40..3cdd08b5bdb7 100644
--- a/include/asm-x86/tlbflush.h
+++ b/include/asm-x86/tlbflush.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_TLBFLUSH_H
+#ifndef ASM_X86__TLBFLUSH_H
-#define _ASM_X86_TLBFLUSH_H
+#define ASM_X86__TLBFLUSH_H
 #include <linux/mm.h>
 #include <linux/sched.h>
@@ -119,6 +119,10 @@ static inline void native_flush_tlb_others(const cpumask_t *cpumask,
 {
 }
+static inline void reset_lazy_tlbstate(void)
+{
+}
 #else  /* SMP */
 #include <asm/smp.h>
@@ -151,6 +155,12 @@ struct tlb_state {
        char __cacheline_padding[L1_CACHE_BYTES-8];
 };
 DECLARE_PER_CPU(struct tlb_state, cpu_tlbstate);
+void reset_lazy_tlbstate(void);
+#else
+static inline void reset_lazy_tlbstate(void)
+{
+}
 #endif
 #endif  /* SMP */
@@ -165,4 +175,4 @@ static inline void flush_tlb_kernel_range(unsigned long start,
        flush_tlb_all();
 }
-#endif /* _ASM_X86_TLBFLUSH_H */
+#endif /* ASM_X86__TLBFLUSH_H */
diff --git a/include/asm-x86/topology.h b/include/asm-x86/topology.h
index 90ac7718469a..7eca9bc022b2 100644
--- a/include/asm-x86/topology.h
+++ b/include/asm-x86/topology.h
@@ -22,8 +22,8 @@
 *
 * Send feedback to <colpatch@us.ibm.com>
 */
-#ifndef _ASM_X86_TOPOLOGY_H
+#ifndef ASM_X86__TOPOLOGY_H
-#define _ASM_X86_TOPOLOGY_H
+#define ASM_X86__TOPOLOGY_H
 #ifdef CONFIG_X86_32
 # ifdef CONFIG_X86_HT
@@ -255,4 +255,4 @@ static inline void set_mp_bus_to_node(int busnum, int node)
 }
 #endif
-#endif /* _ASM_X86_TOPOLOGY_H */
+#endif /* ASM_X86__TOPOLOGY_H */
diff --git a/include/asm-x86/trampoline.h b/include/asm-x86/trampoline.h
index b156b08d0131..0406bbd898a9 100644
--- a/include/asm-x86/trampoline.h
+++ b/include/asm-x86/trampoline.h
@@ -1,5 +1,5 @@
-#ifndef __TRAMPOLINE_HEADER
+#ifndef ASM_X86__TRAMPOLINE_H
-#define __TRAMPOLINE_HEADER
+#define ASM_X86__TRAMPOLINE_H
 #ifndef __ASSEMBLY__
@@ -18,4 +18,4 @@ extern unsigned long setup_trampoline(void);
 #endif /* __ASSEMBLY__ */
-#endif /* __TRAMPOLINE_HEADER */
+#endif /* ASM_X86__TRAMPOLINE_H */
diff --git a/include/asm-x86/traps.h b/include/asm-x86/traps.h
index a4b65a71bd66..7a692baa51ae 100644
--- a/include/asm-x86/traps.h
+++ b/include/asm-x86/traps.h
@@ -1,5 +1,7 @@
-#ifndef _ASM_X86_TRAPS_H
+#ifndef ASM_X86__TRAPS_H
-#define _ASM_X86_TRAPS_H
+#define ASM_X86__TRAPS_H
+#include <asm/debugreg.h>
 /* Common in X86_32 and X86_64 */
 asmlinkage void divide_error(void);
@@ -36,6 +38,16 @@ void do_invalid_op(struct pt_regs *, long);
 void do_general_protection(struct pt_regs *, long);
 void do_nmi(struct pt_regs *, long);
+static inline int get_si_code(unsigned long condition)
+{
+        if (condition & DR_STEP)
+                return TRAP_TRACE;
+        else if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3))
+                return TRAP_HWBKPT;
+        else
+                return TRAP_BRKPT;
+}
 extern int panic_on_unrecovered_nmi;
 extern int kstack_depth_to_print;
@@ -51,6 +63,8 @@ void do_spurious_interrupt_bug(struct pt_regs *, long);
 unsigned long patch_espfix_desc(unsigned long, unsigned long);
 asmlinkage void math_emulate(long);
+void do_page_fault(struct pt_regs *regs, unsigned long error_code);
 #else /* CONFIG_X86_32 */
 asmlinkage void double_fault(void);
@@ -62,5 +76,7 @@ asmlinkage void do_coprocessor_error(struct pt_regs *);
 asmlinkage void do_simd_coprocessor_error(struct pt_regs *);
 asmlinkage void do_spurious_interrupt_bug(struct pt_regs *);
+asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code);
 #endif /* CONFIG_X86_32 */
-#endif /* _ASM_X86_TRAPS_H */
+#endif /* ASM_X86__TRAPS_H */
diff --git a/include/asm-x86/tsc.h b/include/asm-x86/tsc.h
index cb6f6ee45b8f..ad0f5c41e78c 100644
--- a/include/asm-x86/tsc.h
+++ b/include/asm-x86/tsc.h
@@ -1,8 +1,8 @@
 /*
 * x86 TSC related functions
 */
-#ifndef _ASM_X86_TSC_H
+#ifndef ASM_X86__TSC_H
-#define _ASM_X86_TSC_H
+#define ASM_X86__TSC_H
 #include <asm/processor.h>
@@ -59,4 +59,4 @@ extern void check_tsc_sync_target(void);
 extern int notsc_setup(char *);
-#endif
+#endif /* ASM_X86__TSC_H */
diff --git a/include/asm-x86/types.h b/include/asm-x86/types.h
index 1ac80cd9acf8..e78b52e17444 100644
--- a/include/asm-x86/types.h
+++ b/include/asm-x86/types.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_TYPES_H
+#ifndef ASM_X86__TYPES_H
-#define _ASM_X86_TYPES_H
+#define ASM_X86__TYPES_H
 #include <asm-generic/int-ll64.h>
@@ -33,4 +33,4 @@ typedef u32 dma_addr_t;
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
-#endif
+#endif /* ASM_X86__TYPES_H */
diff --git a/include/asm-x86/uaccess.h b/include/asm-x86/uaccess.h
index f6fa4d841bbc..48ebc0ad40ec 100644
--- a/include/asm-x86/uaccess.h
+++ b/include/asm-x86/uaccess.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_UACCES_H_
+#ifndef ASM_X86__UACCESS_H
-#define _ASM_UACCES_H_
+#define ASM_X86__UACCESS_H
 /*
 * User space memory access functions
 */
@@ -450,4 +450,5 @@ extern struct movsl_mask {
 # include "uaccess_64.h"
 #endif
-#endif
+#endif /* ASM_X86__UACCESS_H */
diff --git a/include/asm-x86/uaccess_32.h b/include/asm-x86/uaccess_32.h
index 6fdef39a0bcb..6b5b57d9c6d1 100644
--- a/include/asm-x86/uaccess_32.h
+++ b/include/asm-x86/uaccess_32.h
@@ -1,5 +1,5 @@
-#ifndef __i386_UACCESS_H
+#ifndef ASM_X86__UACCESS_32_H
-#define __i386_UACCESS_H
+#define ASM_X86__UACCESS_32_H
 /*
 * User space memory access functions
@@ -215,4 +215,4 @@ long strnlen_user(const char __user *str, long n);
 unsigned long __must_check clear_user(void __user *mem, unsigned long len);
 unsigned long __must_check __clear_user(void __user *mem, unsigned long len);
-#endif /* __i386_UACCESS_H */
+#endif /* ASM_X86__UACCESS_32_H */
diff --git a/include/asm-x86/uaccess_64.h b/include/asm-x86/uaccess_64.h
index 515d4dce96b5..c96c1f5d07a2 100644
--- a/include/asm-x86/uaccess_64.h
+++ b/include/asm-x86/uaccess_64.h
@@ -1,5 +1,5 @@
-#ifndef __X86_64_UACCESS_H
+#ifndef ASM_X86__UACCESS_64_H
-#define __X86_64_UACCESS_H
+#define ASM_X86__UACCESS_64_H
 /*
 * User space memory access functions
@@ -7,6 +7,7 @@
 #include <linux/compiler.h>
 #include <linux/errno.h>
 #include <linux/prefetch.h>
+#include <linux/lockdep.h>
 #include <asm/page.h>
 /*
@@ -198,4 +199,4 @@ static inline int __copy_from_user_inatomic_nocache(void *dst,
 unsigned long
 copy_user_handle_tail(char *to, char *from, unsigned len, unsigned zerorest);
-#endif /* __X86_64_UACCESS_H */
+#endif /* ASM_X86__UACCESS_64_H */
diff --git a/include/asm-x86/ucontext.h b/include/asm-x86/ucontext.h
index 50a79f7fcde9..89eaa5456a7e 100644
--- a/include/asm-x86/ucontext.h
+++ b/include/asm-x86/ucontext.h
@@ -1,5 +1,11 @@
-#ifndef _ASM_X86_UCONTEXT_H
+#ifndef ASM_X86__UCONTEXT_H
-#define _ASM_X86_UCONTEXT_H
+#define ASM_X86__UCONTEXT_H
+#define UC_FP_XSTATE    0x1     /* indicates the presence of extended state
+                                 * information in the memory layout pointed
+                                 * by the fpstate pointer in the ucontext's
+                                 * sigcontext struct (uc_mcontext).
+                                 */
 struct ucontext {
        unsigned long     uc_flags;
@@ -9,4 +15,4 @@ struct ucontext {
        sigset_t          uc_sigmask;   /* mask last for extensibility */
 };
-#endif /* _ASM_X86_UCONTEXT_H */
+#endif /* ASM_X86__UCONTEXT_H */
diff --git a/include/asm-x86/unaligned.h b/include/asm-x86/unaligned.h
index a7bd416b4763..59dcdec37160 100644
--- a/include/asm-x86/unaligned.h
+++ b/include/asm-x86/unaligned.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_UNALIGNED_H
+#ifndef ASM_X86__UNALIGNED_H
-#define _ASM_X86_UNALIGNED_H
+#define ASM_X86__UNALIGNED_H
 /*
 * The x86 can do unaligned accesses itself.
@@ -11,4 +11,4 @@
 #define get_unaligned __get_unaligned_le
 #define put_unaligned __put_unaligned_le
-#endif /* _ASM_X86_UNALIGNED_H */
+#endif /* ASM_X86__UNALIGNED_H */
diff --git a/include/asm-x86/unistd_32.h b/include/asm-x86/unistd_32.h
index d7394673b772..017f4a87c913 100644
--- a/include/asm-x86/unistd_32.h
+++ b/include/asm-x86/unistd_32.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_I386_UNISTD_H_
+#ifndef ASM_X86__UNISTD_32_H
-#define _ASM_I386_UNISTD_H_
+#define ASM_X86__UNISTD_32_H
 /*
 * This file contains the system call numbers.
@@ -376,4 +376,4 @@
 #endif
 #endif /* __KERNEL__ */
-#endif /* _ASM_I386_UNISTD_H_ */
+#endif /* ASM_X86__UNISTD_32_H */
diff --git a/include/asm-x86/unistd_64.h b/include/asm-x86/unistd_64.h
index 3a341d791792..ace83f1f6787 100644
--- a/include/asm-x86/unistd_64.h
+++ b/include/asm-x86/unistd_64.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_64_UNISTD_H_
+#ifndef ASM_X86__UNISTD_64_H
-#define _ASM_X86_64_UNISTD_H_
+#define ASM_X86__UNISTD_64_H
 #ifndef __SYSCALL
 #define __SYSCALL(a, b)
@@ -690,4 +690,4 @@ __SYSCALL(__NR_inotify_init1, sys_inotify_init1)
 #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
 #endif  /* __KERNEL__ */
-#endif /* _ASM_X86_64_UNISTD_H_ */
+#endif /* ASM_X86__UNISTD_64_H */
diff --git a/include/asm-x86/unwind.h b/include/asm-x86/unwind.h
index 8b064bd9c553..a2151567db44 100644
--- a/include/asm-x86/unwind.h
+++ b/include/asm-x86/unwind.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_UNWIND_H
+#ifndef ASM_X86__UNWIND_H
-#define _ASM_X86_UNWIND_H
+#define ASM_X86__UNWIND_H
 #define UNW_PC(frame) ((void)(frame), 0UL)
 #define UNW_SP(frame) ((void)(frame), 0UL)
@@ -10,4 +10,4 @@ static inline int arch_unw_user_mode(const void *info)
        return 0;
 }
-#endif /* _ASM_X86_UNWIND_H */
+#endif /* ASM_X86__UNWIND_H */
diff --git a/include/asm-x86/user32.h b/include/asm-x86/user32.h
index a3d910047879..aa66c1857f06 100644
--- a/include/asm-x86/user32.h
+++ b/include/asm-x86/user32.h
@@ -1,5 +1,5 @@
-#ifndef USER32_H
+#ifndef ASM_X86__USER32_H
-#define USER32_H 1
+#define ASM_X86__USER32_H
 /* IA32 compatible user structures for ptrace.
 * These should be used for 32bit coredumps too. */
@@ -67,4 +67,4 @@ struct user32 {
 };
-#endif
+#endif /* ASM_X86__USER32_H */
diff --git a/include/asm-x86/user_32.h b/include/asm-x86/user_32.h
index d6e51edc259d..e0fe2f55f1a6 100644
--- a/include/asm-x86/user_32.h
+++ b/include/asm-x86/user_32.h
@@ -1,5 +1,5 @@
-#ifndef _I386_USER_H
+#ifndef ASM_X86__USER_32_H
-#define _I386_USER_H
+#define ASM_X86__USER_32_H
 #include <asm/page.h>
 /* Core file format: The core file is written in such a way that gdb
@@ -128,4 +128,4 @@ struct user{
 #define HOST_TEXT_START_ADDR (u.start_code)
 #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
-#endif /* _I386_USER_H */
+#endif /* ASM_X86__USER_32_H */
diff --git a/include/asm-x86/user_64.h b/include/asm-x86/user_64.h
index 6037b634c77f..38b5799863b4 100644
--- a/include/asm-x86/user_64.h
+++ b/include/asm-x86/user_64.h
@@ -1,5 +1,5 @@
-#ifndef _X86_64_USER_H
+#ifndef ASM_X86__USER_64_H
-#define _X86_64_USER_H
+#define ASM_X86__USER_64_H
 #include <asm/types.h>
 #include <asm/page.h>
@@ -134,4 +134,4 @@ struct user {
 #define HOST_TEXT_START_ADDR (u.start_code)
 #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
-#endif /* _X86_64_USER_H */
+#endif /* ASM_X86__USER_64_H */
diff --git a/include/asm-x86/uv/bios.h b/include/asm-x86/uv/bios.h
index aa73362ff5df..7cd6d7ec1308 100644
--- a/include/asm-x86/uv/bios.h
+++ b/include/asm-x86/uv/bios.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_BIOS_H
+#ifndef ASM_X86__UV__BIOS_H
-#define _ASM_X86_BIOS_H
+#define ASM_X86__UV__BIOS_H
 /*
 * BIOS layer definitions.
@@ -65,4 +65,4 @@ x86_bios_freq_base(unsigned long which, unsigned long *ticks_per_second,
                   unsigned long *drift_info);
 extern const char *x86_bios_strerror(long status);
-#endif /* _ASM_X86_BIOS_H */
+#endif /* ASM_X86__UV__BIOS_H */
diff --git a/include/asm-x86/uv/uv_bau.h b/include/asm-x86/uv/uv_bau.h
index 91ac0dfb7588..77153fb18f5e 100644
--- a/include/asm-x86/uv/uv_bau.h
+++ b/include/asm-x86/uv/uv_bau.h
@@ -8,8 +8,8 @@
 * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
 */
-#ifndef __ASM_X86_UV_BAU__
+#ifndef ASM_X86__UV__UV_BAU_H
-#define __ASM_X86_UV_BAU__
+#define ASM_X86__UV__UV_BAU_H
 #include <linux/bitmap.h>
 #define BITSPERBYTE 8
@@ -40,11 +40,6 @@
 #define UV_ACTIVATION_DESCRIPTOR_SIZE   32
 #define UV_DISTRIBUTION_SIZE            256
 #define UV_SW_ACK_NPENDING              8
-#define UV_BAU_MESSAGE                  200
-/*
- * Messaging irq; see irq_64.h and include/asm-x86/hw_irq_64.h
- * To be dynamically allocated in the future
- */
 #define UV_NET_ENDPOINT_INTD            0x38
 #define UV_DESC_BASE_PNODE_SHIFT        49
 #define UV_PAYLOADQ_PNODE_SHIFT         49
@@ -334,4 +329,4 @@ extern int uv_flush_tlb_others(cpumask_t *, struct mm_struct *, unsigned long);
 extern void uv_bau_message_intr1(void);
 extern void uv_bau_timeout_intr1(void);
-#endif /* __ASM_X86_UV_BAU__ */
+#endif /* ASM_X86__UV__UV_BAU_H */
diff --git a/include/asm-x86/uv/uv_hub.h b/include/asm-x86/uv/uv_hub.h
index a4ef26e5850b..bdb5b01afbf5 100644
--- a/include/asm-x86/uv/uv_hub.h
+++ b/include/asm-x86/uv/uv_hub.h
@@ -8,8 +8,8 @@
 * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved.
 */
-#ifndef __ASM_X86_UV_HUB_H__
+#ifndef ASM_X86__UV__UV_HUB_H
-#define __ASM_X86_UV_HUB_H__
+#define ASM_X86__UV__UV_HUB_H
 #include <linux/numa.h>
 #include <linux/percpu.h>
@@ -350,5 +350,5 @@ static inline int uv_num_possible_blades(void)
        return uv_possible_blades;
 }
-#endif /* __ASM_X86_UV_HUB__ */
+#endif /* ASM_X86__UV__UV_HUB_H */
diff --git a/include/asm-x86/uv/uv_mmrs.h b/include/asm-x86/uv/uv_mmrs.h
index 151fd7fcb809..8b03d89d2459 100644
--- a/include/asm-x86/uv/uv_mmrs.h
+++ b/include/asm-x86/uv/uv_mmrs.h
@@ -8,8 +8,8 @@
 * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved.
 */
-#ifndef __ASM_X86_UV_MMRS__
+#ifndef ASM_X86__UV__UV_MMRS_H
-#define __ASM_X86_UV_MMRS__
+#define ASM_X86__UV__UV_MMRS_H
 #define UV_MMR_ENABLE           (1UL << 63)
@@ -1292,4 +1292,4 @@ union uvh_si_alias2_overlay_config_u {
 };
-#endif /* __ASM_X86_UV_MMRS__ */
+#endif /* ASM_X86__UV__UV_MMRS_H */
diff --git a/include/asm-x86/vdso.h b/include/asm-x86/vdso.h
index 8e18fb80f5e6..4ab320913ea3 100644
--- a/include/asm-x86/vdso.h
+++ b/include/asm-x86/vdso.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_VDSO_H
+#ifndef ASM_X86__VDSO_H
-#define _ASM_X86_VDSO_H 1
+#define ASM_X86__VDSO_H
 #ifdef CONFIG_X86_64
 extern const char VDSO64_PRELINK[];
@@ -44,4 +44,4 @@ extern const char vdso32_int80_start, vdso32_int80_end;
 extern const char vdso32_syscall_start, vdso32_syscall_end;
 extern const char vdso32_sysenter_start, vdso32_sysenter_end;
-#endif  /* asm-x86/vdso.h */
+#endif /* ASM_X86__VDSO_H */
diff --git a/include/asm-x86/vga.h b/include/asm-x86/vga.h
index 0ccf804377e6..b9e493d07d07 100644
--- a/include/asm-x86/vga.h
+++ b/include/asm-x86/vga.h
@@ -4,8 +4,8 @@
 *      (c) 1998 Martin Mares <mj@ucw.cz>
 */
-#ifndef _LINUX_ASM_VGA_H_
+#ifndef ASM_X86__VGA_H
-#define _LINUX_ASM_VGA_H_
+#define ASM_X86__VGA_H
 /*
 *      On the PC, we can just recalculate addresses and then
@@ -17,4 +17,4 @@
 #define vga_readb(x) (*(x))
 #define vga_writeb(x, y) (*(y) = (x))
-#endif
+#endif /* ASM_X86__VGA_H */
diff --git a/include/asm-x86/vgtod.h b/include/asm-x86/vgtod.h
index 3301f0929342..38fd13364021 100644
--- a/include/asm-x86/vgtod.h
+++ b/include/asm-x86/vgtod.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_VGTOD_H
+#ifndef ASM_X86__VGTOD_H
-#define _ASM_VGTOD_H 1
+#define ASM_X86__VGTOD_H
 #include <asm/vsyscall.h>
 #include <linux/clocksource.h>
@@ -26,4 +26,4 @@ extern struct vsyscall_gtod_data __vsyscall_gtod_data
 __section_vsyscall_gtod_data;
 extern struct vsyscall_gtod_data vsyscall_gtod_data;
-#endif
+#endif /* ASM_X86__VGTOD_H */
diff --git a/include/asm-x86/visws/cobalt.h b/include/asm-x86/visws/cobalt.h
index 995258831b7f..9627a8fe84e9 100644
--- a/include/asm-x86/visws/cobalt.h
+++ b/include/asm-x86/visws/cobalt.h
@@ -1,5 +1,5 @@
-#ifndef __I386_SGI_COBALT_H
+#ifndef ASM_X86__VISWS__COBALT_H
-#define __I386_SGI_COBALT_H
+#define ASM_X86__VISWS__COBALT_H
 #include <asm/fixmap.h>
@@ -122,4 +122,4 @@ extern char visws_board_type;
 extern char visws_board_rev;
-#endif /* __I386_SGI_COBALT_H */
+#endif /* ASM_X86__VISWS__COBALT_H */
diff --git a/include/asm-x86/visws/lithium.h b/include/asm-x86/visws/lithium.h
index dfcd4f07ab85..b36d3b378c63 100644
--- a/include/asm-x86/visws/lithium.h
+++ b/include/asm-x86/visws/lithium.h
@@ -1,5 +1,5 @@
-#ifndef __I386_SGI_LITHIUM_H
+#ifndef ASM_X86__VISWS__LITHIUM_H
-#define __I386_SGI_LITHIUM_H
+#define ASM_X86__VISWS__LITHIUM_H
 #include <asm/fixmap.h>
@@ -49,5 +49,5 @@ static inline unsigned short li_pcib_read16(unsigned long reg)
        return *((volatile unsigned short *)(LI_PCIB_VADDR+reg));
 }
-#endif
+#endif /* ASM_X86__VISWS__LITHIUM_H */
diff --git a/include/asm-x86/visws/piix4.h b/include/asm-x86/visws/piix4.h
index 83ea4f46e419..61c938045ec9 100644
--- a/include/asm-x86/visws/piix4.h
+++ b/include/asm-x86/visws/piix4.h
@@ -1,5 +1,5 @@
-#ifndef __I386_SGI_PIIX_H
+#ifndef ASM_X86__VISWS__PIIX4_H
-#define __I386_SGI_PIIX_H
+#define ASM_X86__VISWS__PIIX4_H
 /*
 * PIIX4 as used on SGI Visual Workstations
@@ -104,4 +104,4 @@
 */
 #define PIIX_GPI_STPCLK         0x4     // STPCLK signal routed back in
-#endif
+#endif /* ASM_X86__VISWS__PIIX4_H */
diff --git a/include/asm-x86/vm86.h b/include/asm-x86/vm86.h
index 5ce351325e01..998bd18eb737 100644
--- a/include/asm-x86/vm86.h
+++ b/include/asm-x86/vm86.h
@@ -1,5 +1,5 @@
-#ifndef _LINUX_VM86_H
+#ifndef ASM_X86__VM86_H
-#define _LINUX_VM86_H
+#define ASM_X86__VM86_H
 /*
 * I'm guessing at the VIF/VIP flag usage, but hope that this is how
@@ -205,4 +205,4 @@ static inline int handle_vm86_trap(struct kernel_vm86_regs *a, long b, int c)
 #endif /* __KERNEL__ */
-#endif
+#endif /* ASM_X86__VM86_H */
diff --git a/include/asm-x86/vmi_time.h b/include/asm-x86/vmi_time.h
index c3118c385156..b2d39e6a08b7 100644
--- a/include/asm-x86/vmi_time.h
+++ b/include/asm-x86/vmi_time.h
@@ -22,8 +22,8 @@
 *
 */
-#ifndef __VMI_TIME_H
+#ifndef ASM_X86__VMI_TIME_H
-#define __VMI_TIME_H
+#define ASM_X86__VMI_TIME_H
 /*
 * Raw VMI call indices for timer functions
@@ -95,4 +95,4 @@ extern void __devinit vmi_time_ap_init(void);
 #define CONFIG_VMI_ALARM_HZ     100
-#endif
+#endif /* ASM_X86__VMI_TIME_H */
diff --git a/include/asm-x86/vsyscall.h b/include/asm-x86/vsyscall.h
index 6b66ff905af0..dcd4682413de 100644
--- a/include/asm-x86/vsyscall.h
+++ b/include/asm-x86/vsyscall.h
@@ -1,5 +1,5 @@
-#ifndef _ASM_X86_64_VSYSCALL_H_
+#ifndef ASM_X86__VSYSCALL_H
-#define _ASM_X86_64_VSYSCALL_H_
+#define ASM_X86__VSYSCALL_H
 enum vsyscall_num {
        __NR_vgettimeofday,
@@ -41,4 +41,4 @@ extern void map_vsyscall(void);
 #endif /* __KERNEL__ */
-#endif /* _ASM_X86_64_VSYSCALL_H_ */
+#endif /* ASM_X86__VSYSCALL_H */
diff --git a/include/asm-x86/xcr.h b/include/asm-x86/xcr.h
new file mode 100644
index 000000000000..f2cba4e79a23
--- /dev/null
+++ b/include/asm-x86/xcr.h
@@ -0,0 +1,49 @@
+/* -*- linux-c -*- ------------------------------------------------------- *
+ *
+ *   Copyright 2008 rPath, Inc. - All Rights Reserved
+ *
+ *   This file is part of the Linux kernel, and is made available under
+ *   the terms of the GNU General Public License version 2 or (at your
+ *   option) any later version; incorporated herein by reference.
+ *
+ * ----------------------------------------------------------------------- */
+/*
+ * asm-x86/xcr.h
+ *
+ * Definitions for the eXtended Control Register instructions
+ */
+#ifndef _ASM_X86_XCR_H
+#define _ASM_X86_XCR_H
+#define XCR_XFEATURE_ENABLED_MASK       0x00000000
+#ifdef __KERNEL__
+# ifndef __ASSEMBLY__
+#include <linux/types.h>
+static inline u64 xgetbv(u32 index)
+{
+        u32 eax, edx;
+        asm volatile(".byte 0x0f,0x01,0xd0" /* xgetbv */
+                     : "=a" (eax), "=d" (edx)
+                     : "c" (index));
+        return eax + ((u64)edx << 32);
+}
+static inline void xsetbv(u32 index, u64 value)
+{
+        u32 eax = value;
+        u32 edx = value >> 32;
+        asm volatile(".byte 0x0f,0x01,0xd1" /* xsetbv */
+                     : : "a" (eax), "d" (edx), "c" (index));
+}
+# endif /* __ASSEMBLY__ */
+#endif /* __KERNEL__ */
+#endif /* _ASM_X86_XCR_H */
diff --git a/include/asm-x86/xen/events.h b/include/asm-x86/xen/events.h
index 8ded74720024..8151f5b8b6cb 100644
--- a/include/asm-x86/xen/events.h
+++ b/include/asm-x86/xen/events.h
@@ -1,5 +1,5 @@
-#ifndef __XEN_EVENTS_H
+#ifndef ASM_X86__XEN__EVENTS_H
-#define __XEN_EVENTS_H
+#define ASM_X86__XEN__EVENTS_H
 enum ipi_vector {
        XEN_RESCHEDULE_VECTOR,
@@ -21,4 +21,4 @@ static inline void xen_do_IRQ(int irq, struct pt_regs *regs)
        do_IRQ(regs);
 }
-#endif /* __XEN_EVENTS_H */
+#endif /* ASM_X86__XEN__EVENTS_H */
diff --git a/include/asm-x86/xen/grant_table.h b/include/asm-x86/xen/grant_table.h
index 2444d4593a3b..c4baab4d2b68 100644
--- a/include/asm-x86/xen/grant_table.h
+++ b/include/asm-x86/xen/grant_table.h
@@ -1,7 +1,7 @@
-#ifndef __XEN_GRANT_TABLE_H
+#ifndef ASM_X86__XEN__GRANT_TABLE_H
-#define __XEN_GRANT_TABLE_H
+#define ASM_X86__XEN__GRANT_TABLE_H
 #define xen_alloc_vm_area(size) alloc_vm_area(size)
 #define xen_free_vm_area(area)  free_vm_area(area)
-#endif /* __XEN_GRANT_TABLE_H */
+#endif /* ASM_X86__XEN__GRANT_TABLE_H */
diff --git a/include/asm-x86/xen/hypercall.h b/include/asm-x86/xen/hypercall.h
index 91cb7fd5c123..44f4259bee3f 100644
--- a/include/asm-x86/xen/hypercall.h
+++ b/include/asm-x86/xen/hypercall.h
@@ -30,8 +30,8 @@
 * IN THE SOFTWARE.
 */
-#ifndef __HYPERCALL_H__
+#ifndef ASM_X86__XEN__HYPERCALL_H
-#define __HYPERCALL_H__
+#define ASM_X86__XEN__HYPERCALL_H
 #include <linux/errno.h>
 #include <linux/string.h>
@@ -524,4 +524,4 @@ MULTI_stack_switch(struct multicall_entry *mcl,
        mcl->args[1] = esp;
 }
-#endif /* __HYPERCALL_H__ */
+#endif /* ASM_X86__XEN__HYPERCALL_H */
diff --git a/include/asm-x86/xen/hypervisor.h b/include/asm-x86/xen/hypervisor.h
index 8e15dd28c91f..445a24759560 100644
--- a/include/asm-x86/xen/hypervisor.h
+++ b/include/asm-x86/xen/hypervisor.h
@@ -30,12 +30,11 @@
 * IN THE SOFTWARE.
 */
-#ifndef __HYPERVISOR_H__
+#ifndef ASM_X86__XEN__HYPERVISOR_H
-#define __HYPERVISOR_H__
+#define ASM_X86__XEN__HYPERVISOR_H
 #include <linux/types.h>
 #include <linux/kernel.h>
-#include <linux/version.h>
 #include <xen/interface/xen.h>
 #include <xen/interface/version.h>
@@ -55,7 +54,6 @@
 /* arch/i386/kernel/setup.c */
 extern struct shared_info *HYPERVISOR_shared_info;
 extern struct start_info *xen_start_info;
-#define is_initial_xendomain() (xen_start_info->flags & SIF_INITDOMAIN)
 /* arch/i386/mach-xen/evtchn.c */
 /* Force a proper event-channel callback from Xen. */
@@ -68,6 +66,17 @@ u64 jiffies_to_st(unsigned long jiffies);
 #define MULTI_UVMFLAGS_INDEX 3
 #define MULTI_UVMDOMID_INDEX 4
-#define is_running_on_xen()     (xen_start_info ? 1 : 0)
+enum xen_domain_type {
+        XEN_NATIVE,
+        XEN_PV_DOMAIN,
+        XEN_HVM_DOMAIN,
+};
-#endif /* __HYPERVISOR_H__ */
+extern enum xen_domain_type xen_domain_type;
+#define xen_domain()            (xen_domain_type != XEN_NATIVE)
+#define xen_pv_domain()         (xen_domain_type == XEN_PV_DOMAIN)
+#define xen_initial_domain()    (xen_pv_domain() && xen_start_info->flags & SIF_INITDOMAIN)
+#define xen_hvm_domain()        (xen_domain_type == XEN_HVM_DOMAIN)
+#endif /* ASM_X86__XEN__HYPERVISOR_H */
diff --git a/include/asm-x86/xen/interface.h b/include/asm-x86/xen/interface.h
index 9d810f2538a2..d077bba96da9 100644
--- a/include/asm-x86/xen/interface.h
+++ b/include/asm-x86/xen/interface.h
@@ -6,8 +6,8 @@
 * Copyright (c) 2004, K A Fraser
 */
-#ifndef __ASM_X86_XEN_INTERFACE_H
+#ifndef ASM_X86__XEN__INTERFACE_H
-#define __ASM_X86_XEN_INTERFACE_H
+#define ASM_X86__XEN__INTERFACE_H
 #ifdef __XEN__
 #define __DEFINE_GUEST_HANDLE(name, type) \
@@ -172,4 +172,4 @@ DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context);
 #define XEN_CPUID          XEN_EMULATE_PREFIX "cpuid"
 #endif
-#endif  /* __ASM_X86_XEN_INTERFACE_H */
+#endif /* ASM_X86__XEN__INTERFACE_H */
diff --git a/include/asm-x86/xen/interface_32.h b/include/asm-x86/xen/interface_32.h
index d8ac41d5db86..08167e19fc66 100644
--- a/include/asm-x86/xen/interface_32.h
+++ b/include/asm-x86/xen/interface_32.h
@@ -6,8 +6,8 @@
 * Copyright (c) 2004, K A Fraser
 */
-#ifndef __ASM_X86_XEN_INTERFACE_32_H
+#ifndef ASM_X86__XEN__INTERFACE_32_H
-#define __ASM_X86_XEN_INTERFACE_32_H
+#define ASM_X86__XEN__INTERFACE_32_H
 /*
@@ -94,4 +94,4 @@ typedef struct xen_callback xen_callback_t;
 #define xen_pfn_to_cr3(pfn) (((unsigned)(pfn) << 12) | ((unsigned)(pfn) >> 20))
 #define xen_cr3_to_pfn(cr3) (((unsigned)(cr3) >> 12) | ((unsigned)(cr3) << 20))
-#endif  /* __ASM_X86_XEN_INTERFACE_32_H */
+#endif /* ASM_X86__XEN__INTERFACE_32_H */
diff --git a/include/asm-x86/xen/interface_64.h b/include/asm-x86/xen/interface_64.h
index 842266ce96e6..046c0f1e01d4 100644
--- a/include/asm-x86/xen/interface_64.h
+++ b/include/asm-x86/xen/interface_64.h
@@ -1,5 +1,5 @@
-#ifndef __ASM_X86_XEN_INTERFACE_64_H
+#ifndef ASM_X86__XEN__INTERFACE_64_H
-#define __ASM_X86_XEN_INTERFACE_64_H
+#define ASM_X86__XEN__INTERFACE_64_H
 /*
 * 64-bit segment selectors
@@ -156,4 +156,4 @@ typedef unsigned long xen_callback_t;
 #endif /* !__ASSEMBLY__ */
-#endif  /* __ASM_X86_XEN_INTERFACE_64_H */
+#endif /* ASM_X86__XEN__INTERFACE_64_H */
diff --git a/include/asm-x86/xen/page.h b/include/asm-x86/xen/page.h
index 7b3835d3b77d..c50185dccec1 100644
--- a/include/asm-x86/xen/page.h
+++ b/include/asm-x86/xen/page.h
@@ -1,5 +1,5 @@
-#ifndef __XEN_PAGE_H
+#ifndef ASM_X86__XEN__PAGE_H
-#define __XEN_PAGE_H
+#define ASM_X86__XEN__PAGE_H
 #include <linux/pfn.h>
@@ -162,4 +162,4 @@ xmaddr_t arbitrary_virt_to_machine(void *address);
 void make_lowmem_page_readonly(void *vaddr);
 void make_lowmem_page_readwrite(void *vaddr);
-#endif /* __XEN_PAGE_H */
+#endif /* ASM_X86__XEN__PAGE_H */
diff --git a/include/asm-x86/xsave.h b/include/asm-x86/xsave.h
new file mode 100644
index 000000000000..08e9a1ac07a9
--- /dev/null
+++ b/include/asm-x86/xsave.h
@@ -0,0 +1,118 @@
+#ifndef __ASM_X86_XSAVE_H
+#define __ASM_X86_XSAVE_H
+#include <linux/types.h>
+#include <asm/processor.h>
+#include <asm/i387.h>
+#define XSTATE_FP       0x1
+#define XSTATE_SSE      0x2
+#define XSTATE_FPSSE    (XSTATE_FP | XSTATE_SSE)
+#define FXSAVE_SIZE     512
+/*
+ * These are the features that the OS can handle currently.
+ */
+#define XCNTXT_MASK     (XSTATE_FP | XSTATE_SSE)
+#ifdef CONFIG_X86_64
+#define REX_PREFIX      "0x48, "
+#else
+#define REX_PREFIX
+#endif
+extern unsigned int xstate_size;
+extern u64 pcntxt_mask;
+extern struct xsave_struct *init_xstate_buf;
+extern void xsave_cntxt_init(void);
+extern void xsave_init(void);
+extern int init_fpu(struct task_struct *child);
+extern int check_for_xstate(struct i387_fxsave_struct __user *buf,
+                            void __user *fpstate,
+                            struct _fpx_sw_bytes *sw);
+static inline int xrstor_checking(struct xsave_struct *fx)
+{
+        int err;
+        asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
+                     "2:\n"
+                     ".section .fixup,\"ax\"\n"
+                     "3:  movl $-1,%[err]\n"
+                     "    jmp  2b\n"
+                     ".previous\n"
+                     _ASM_EXTABLE(1b, 3b)
+                     : [err] "=r" (err)
+                     : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
+                     : "memory");
+        return err;
+}
+static inline int xsave_user(struct xsave_struct __user *buf)
+{
+        int err;
+        __asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x27\n"
+                             "2:\n"
+                             ".section .fixup,\"ax\"\n"
+                             "3:  movl $-1,%[err]\n"
+                             "    jmp  2b\n"
+                             ".previous\n"
+                             ".section __ex_table,\"a\"\n"
+                             _ASM_ALIGN "\n"
+                             _ASM_PTR "1b,3b\n"
+                             ".previous"
+                             : [err] "=r" (err)
+                             : "D" (buf), "a" (-1), "d" (-1), "0" (0)
+                             : "memory");
+        if (unlikely(err) && __clear_user(buf, xstate_size))
+                err = -EFAULT;
+        /* No need to clear here because the caller clears USED_MATH */
+        return err;
+}
+static inline int xrestore_user(struct xsave_struct __user *buf, u64 mask)
+{
+        int err;
+        struct xsave_struct *xstate = ((__force struct xsave_struct *)buf);
+        u32 lmask = mask;
+        u32 hmask = mask >> 32;
+        __asm__ __volatile__("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n"
+                             "2:\n"
+                             ".section .fixup,\"ax\"\n"
+                             "3:  movl $-1,%[err]\n"
+                             "    jmp  2b\n"
+                             ".previous\n"
+                             ".section __ex_table,\"a\"\n"
+                             _ASM_ALIGN "\n"
+                             _ASM_PTR "1b,3b\n"
+                             ".previous"
+                             : [err] "=r" (err)
+                             : "D" (xstate), "a" (lmask), "d" (hmask), "0" (0)
+                             : "memory");       /* memory required? */
+        return err;
+}
+static inline void xrstor_state(struct xsave_struct *fx, u64 mask)
+{
+        u32 lmask = mask;
+        u32 hmask = mask >> 32;
+        asm volatile(".byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
+                     : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
+                     :   "memory");
+}
+static inline void xsave(struct task_struct *tsk)
+{
+        /* This, however, we can work around by forcing the compiler to select
+           an addressing mode that doesn't require extended registers. */
+        __asm__ __volatile__(".byte " REX_PREFIX "0x0f,0xae,0x27"
+                             : : "D" (&(tsk->thread.xstate->xsave)),
+                                 "a" (-1), "d"(-1) : "memory");
+}
+#endif