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-rw-r--r--include/asm-x86/pgtable-3level.h11
1 files changed, 7 insertions, 4 deletions
diff --git a/include/asm-x86/pgtable-3level.h b/include/asm-x86/pgtable-3level.h
index ed4c6f0e57ec..ad71960bca3a 100644
--- a/include/asm-x86/pgtable-3level.h
+++ b/include/asm-x86/pgtable-3level.h
@@ -93,17 +93,20 @@ static inline void native_pmd_clear(pmd_t *pmd)
93 93
94static inline void pud_clear(pud_t *pudp) 94static inline void pud_clear(pud_t *pudp)
95{ 95{
96 unsigned long pgd;
97
96 set_pud(pudp, __pud(0)); 98 set_pud(pudp, __pud(0));
97 99
98 /* 100 /*
99 * Pentium-II erratum A13: in PAE mode we explicitly have to flush 101 * Pentium-II erratum A13: in PAE mode we explicitly have to flush
100 * the TLB via cr3 if the top-level pgd is changed... 102 * the TLB via cr3 if the top-level pgd is changed...
101 * 103 *
102 * XXX I don't think we need to worry about this here, since 104 * Make sure the pud entry we're updating is within the
103 * when clearing the pud, the calling code needs to flush the 105 * current pgd to avoid unnecessary TLB flushes.
104 * tlb anyway. But do it now for safety's sake. - jsgf
105 */ 106 */
106 write_cr3(read_cr3()); 107 pgd = read_cr3();
108 if (__pa(pudp) >= pgd && __pa(pudp) < (pgd + sizeof(pgd_t)*PTRS_PER_PGD))
109 write_cr3(pgd);
107} 110}
108 111
109#define pud_page(pud) \ 112#define pud_page(pud) \