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Diffstat (limited to 'include/asm-x86/mach-default/mach_apic.h')
-rw-r--r--include/asm-x86/mach-default/mach_apic.h15
1 files changed, 14 insertions, 1 deletions
diff --git a/include/asm-x86/mach-default/mach_apic.h b/include/asm-x86/mach-default/mach_apic.h
index 2a330a41b3dd..3c66f2cdaec1 100644
--- a/include/asm-x86/mach-default/mach_apic.h
+++ b/include/asm-x86/mach-default/mach_apic.h
@@ -85,6 +85,20 @@ static inline int apicid_to_node(int logical_apicid)
85 return 0; 85 return 0;
86#endif 86#endif
87} 87}
88
89static inline cpumask_t vector_allocation_domain(int cpu)
90{
91 /* Careful. Some cpus do not strictly honor the set of cpus
92 * specified in the interrupt destination when using lowest
93 * priority interrupt delivery mode.
94 *
95 * In particular there was a hyperthreading cpu observed to
96 * deliver interrupts to the wrong hyperthread when only one
97 * hyperthread was specified in the interrupt desitination.
98 */
99 cpumask_t domain = { { [0] = APIC_ALL_CPUS, } };
100 return domain;
101}
88#endif 102#endif
89 103
90static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid) 104static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
@@ -138,6 +152,5 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
138static inline void enable_apic_mode(void) 152static inline void enable_apic_mode(void)
139{ 153{
140} 154}
141
142#endif /* CONFIG_X86_LOCAL_APIC */ 155#endif /* CONFIG_X86_LOCAL_APIC */
143#endif /* ASM_X86__MACH_DEFAULT__MACH_APIC_H */ 156#endif /* ASM_X86__MACH_DEFAULT__MACH_APIC_H */