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-rw-r--r--include/asm-x86/irq_vectors.h173
1 files changed, 173 insertions, 0 deletions
diff --git a/include/asm-x86/irq_vectors.h b/include/asm-x86/irq_vectors.h
new file mode 100644
index 000000000000..90b1d1f12f08
--- /dev/null
+++ b/include/asm-x86/irq_vectors.h
@@ -0,0 +1,173 @@
1#ifndef _ASM_IRQ_VECTORS_H
2#define _ASM_IRQ_VECTORS_H
3
4#include <linux/threads.h>
5
6#define NMI_VECTOR 0x02
7
8/*
9 * IDT vectors usable for external interrupt sources start
10 * at 0x20:
11 */
12#define FIRST_EXTERNAL_VECTOR 0x20
13
14#ifdef CONFIG_X86_32
15# define SYSCALL_VECTOR 0x80
16#else
17# define IA32_SYSCALL_VECTOR 0x80
18#endif
19
20/*
21 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
22 * cleanup after irq migration on 64 bit.
23 */
24#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
25
26/*
27 * Vectors 0x20-0x2f are used for ISA interrupts on 32 bit.
28 * Vectors 0x30-0x3f are used for ISA interrupts on 64 bit.
29 */
30#ifdef CONFIG_X86_32
31#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR)
32#else
33#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
34#endif
35#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
36#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
37#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
38#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
39#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
40#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
41#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
42#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
43#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
44#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
45#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
46#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
47#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
48#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
49#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
50
51/*
52 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
53 *
54 * some of the following vectors are 'rare', they are merged
55 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
56 * TLB, reschedule and local APIC vectors are performance-critical.
57 *
58 * Vectors 0xf0-0xfa are free (reserved for future Linux use).
59 */
60#ifdef CONFIG_X86_32
61
62# define SPURIOUS_APIC_VECTOR 0xff
63# define ERROR_APIC_VECTOR 0xfe
64# define INVALIDATE_TLB_VECTOR 0xfd
65# define RESCHEDULE_VECTOR 0xfc
66# define CALL_FUNCTION_VECTOR 0xfb
67# define CALL_FUNCTION_SINGLE_VECTOR 0xfa
68# define THERMAL_APIC_VECTOR 0xf0
69
70#else
71
72#define SPURIOUS_APIC_VECTOR 0xff
73#define ERROR_APIC_VECTOR 0xfe
74#define RESCHEDULE_VECTOR 0xfd
75#define CALL_FUNCTION_VECTOR 0xfc
76#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
77#define THERMAL_APIC_VECTOR 0xfa
78#define THRESHOLD_APIC_VECTOR 0xf9
79#define INVALIDATE_TLB_VECTOR_END 0xf7
80#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
81
82#define NUM_INVALIDATE_TLB_VECTORS 8
83
84#endif
85
86/*
87 * Local APIC timer IRQ vector is on a different priority level,
88 * to work around the 'lost local interrupt if more than 2 IRQ
89 * sources per level' errata.
90 */
91#define LOCAL_TIMER_VECTOR 0xef
92
93/*
94 * First APIC vector available to drivers: (vectors 0x30-0xee) we
95 * start at 0x31(0x41) to spread out vectors evenly between priority
96 * levels. (0x80 is the syscall vector)
97 */
98#ifdef CONFIG_X86_32
99# define FIRST_DEVICE_VECTOR 0x31
100#else
101# define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
102#endif
103
104#define NR_VECTORS 256
105
106#define FPU_IRQ 13
107
108#define FIRST_VM86_IRQ 3
109#define LAST_VM86_IRQ 15
110#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
111
112#if !defined(CONFIG_X86_VOYAGER)
113
114# if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) || defined(CONFIG_X86_VISWS)
115
116# define NR_IRQS 224
117
118# if (224 >= 32 * NR_CPUS)
119# define NR_IRQ_VECTORS NR_IRQS
120# else
121# define NR_IRQ_VECTORS (32 * NR_CPUS)
122# endif
123
124# else /* IO_APIC || PARAVIRT */
125
126# define NR_IRQS 16
127# define NR_IRQ_VECTORS NR_IRQS
128
129# endif
130
131#else /* !VISWS && !VOYAGER */
132
133# define NR_IRQS 224
134# define NR_IRQ_VECTORS NR_IRQS
135
136#endif /* VISWS */
137
138/* Voyager specific defines */
139/* These define the CPIs we use in linux */
140#define VIC_CPI_LEVEL0 0
141#define VIC_CPI_LEVEL1 1
142/* now the fake CPIs */
143#define VIC_TIMER_CPI 2
144#define VIC_INVALIDATE_CPI 3
145#define VIC_RESCHEDULE_CPI 4
146#define VIC_ENABLE_IRQ_CPI 5
147#define VIC_CALL_FUNCTION_CPI 6
148#define VIC_CALL_FUNCTION_SINGLE_CPI 7
149
150/* Now the QIC CPIs: Since we don't need the two initial levels,
151 * these are 2 less than the VIC CPIs */
152#define QIC_CPI_OFFSET 1
153#define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
154#define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
155#define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
156#define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
157#define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
158#define QIC_CALL_FUNCTION_SINGLE_CPI (VIC_CALL_FUNCTION_SINGLE_CPI - QIC_CPI_OFFSET)
159
160#define VIC_START_FAKE_CPI VIC_TIMER_CPI
161#define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_SINGLE_CPI
162
163/* this is the SYS_INT CPI. */
164#define VIC_SYS_INT 8
165#define VIC_CMN_INT 15
166
167/* This is the boot CPI for alternate processors. It gets overwritten
168 * by the above once the system has activated all available processors */
169#define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
170#define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
171
172
173#endif /* _ASM_IRQ_VECTORS_H */