1 files changed, 11 insertions, 5 deletions

diff --git a/include/asm-x86/ipi.h b/include/asm-x86/ipi.h
index c1b226797518..30a692cfaff8 100644
--- a/include/asm-x86/ipi.h
+++ b/include/asm-x86/ipi.h
@@ -49,6 +49,12 @@ static inline int __prepare_ICR2(unsigned int mask)
         return SET_APIC_DEST_FIELD(mask);
 }
 
+static inline void __xapic_wait_icr_idle(void)
+{
+        while (native_apic_mem_read(APIC_ICR) & APIC_ICR_BUSY)
+                cpu_relax();
+}
+
 static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
                                        unsigned int dest)
 {
@@ -64,7 +70,7 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
         /*
          * Wait for idle.
          */
-        apic_wait_icr_idle();
+        __xapic_wait_icr_idle();
 
         /*
          * No need to touch the target chip field
@@ -74,7 +80,7 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector,
         /*
          * Send the IPI. The write to APIC_ICR fires this off.
          */
-        apic_write(APIC_ICR, cfg);
+        native_apic_mem_write(APIC_ICR, cfg);
 }
 
 /*
@@ -92,13 +98,13 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector,
         if (unlikely(vector == NMI_VECTOR))
                 safe_apic_wait_icr_idle();
         else
-                apic_wait_icr_idle();
+                __xapic_wait_icr_idle();
 
         /*
          * prepare target chip field
          */
         cfg = __prepare_ICR2(mask);
-        apic_write(APIC_ICR2, cfg);
+        native_apic_mem_write(APIC_ICR2, cfg);
 
         /*
          * program the ICR
@@ -108,7 +114,7 @@ static inline void __send_IPI_dest_field(unsigned int mask, int vector,
         /*
          * Send the IPI. The write to APIC_ICR fires this off.
          */
-        apic_write(APIC_ICR, cfg);
+        native_apic_mem_write(APIC_ICR, cfg);
 }
 
 static inline void send_IPI_mask_sequence(cpumask_t mask, int vector)