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-rw-r--r--include/asm-x86/io_32.h15
1 files changed, 12 insertions, 3 deletions
diff --git a/include/asm-x86/io_32.h b/include/asm-x86/io_32.h
index 2a04bd17eac5..db3978846379 100644
--- a/include/asm-x86/io_32.h
+++ b/include/asm-x86/io_32.h
@@ -111,18 +111,27 @@ extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsign
111 * make bus memory CPU accessible via the readb/readw/readl/writeb/ 111 * make bus memory CPU accessible via the readb/readw/readl/writeb/
112 * writew/writel functions and the other mmio helpers. The returned 112 * writew/writel functions and the other mmio helpers. The returned
113 * address is not guaranteed to be usable directly as a virtual 113 * address is not guaranteed to be usable directly as a virtual
114 * address. 114 * address.
115 * 115 *
116 * If the area you are trying to map is a PCI BAR you should have a 116 * If the area you are trying to map is a PCI BAR you should have a
117 * look at pci_iomap(). 117 * look at pci_iomap().
118 */ 118 */
119extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
119 120
120static inline void __iomem * ioremap(unsigned long offset, unsigned long size) 121static inline void __iomem *
122ioremap_cache(unsigned long offset, unsigned long size)
121{ 123{
122 return __ioremap(offset, size, 0); 124 return __ioremap(offset, size, 0);
123} 125}
124 126
125extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size); 127/*
128 * The default ioremap() behavior is non-cached:
129 */
130static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
131{
132 return ioremap_nocache(offset, size);
133}
134
126extern void iounmap(volatile void __iomem *addr); 135extern void iounmap(volatile void __iomem *addr);
127 136
128/* 137/*