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-rw-r--r--include/asm-x86/gart.h68
1 files changed, 66 insertions, 2 deletions
diff --git a/include/asm-x86/gart.h b/include/asm-x86/gart.h
index 90958ed993fa..417f76ea677b 100644
--- a/include/asm-x86/gart.h
+++ b/include/asm-x86/gart.h
@@ -1,16 +1,20 @@
1#ifndef _ASM_X8664_IOMMU_H 1#ifndef _ASM_X8664_IOMMU_H
2#define _ASM_X8664_IOMMU_H 1 2#define _ASM_X8664_IOMMU_H 1
3 3
4#include <asm/e820.h>
5
4extern void pci_iommu_shutdown(void); 6extern void pci_iommu_shutdown(void);
5extern void no_iommu_init(void); 7extern void no_iommu_init(void);
6extern int force_iommu, no_iommu; 8extern int force_iommu, no_iommu;
7extern int iommu_detected; 9extern int iommu_detected;
10extern int agp_amd64_init(void);
8#ifdef CONFIG_GART_IOMMU 11#ifdef CONFIG_GART_IOMMU
9extern void gart_iommu_init(void); 12extern void gart_iommu_init(void);
10extern void gart_iommu_shutdown(void); 13extern void gart_iommu_shutdown(void);
11extern void __init gart_parse_options(char *); 14extern void __init gart_parse_options(char *);
12extern void early_gart_iommu_check(void); 15extern void early_gart_iommu_check(void);
13extern void gart_iommu_hole_init(void); 16extern void gart_iommu_hole_init(void);
17extern void set_up_gart_resume(u32, u32);
14extern int fallback_aper_order; 18extern int fallback_aper_order;
15extern int fallback_aper_force; 19extern int fallback_aper_force;
16extern int gart_iommu_aperture; 20extern int gart_iommu_aperture;
@@ -18,8 +22,9 @@ extern int gart_iommu_aperture_allowed;
18extern int gart_iommu_aperture_disabled; 22extern int gart_iommu_aperture_disabled;
19extern int fix_aperture; 23extern int fix_aperture;
20#else 24#else
21#define gart_iommu_aperture 0 25#define gart_iommu_aperture 0
22#define gart_iommu_aperture_allowed 0 26#define gart_iommu_aperture_allowed 0
27#define gart_iommu_aperture_disabled 1
23 28
24static inline void early_gart_iommu_check(void) 29static inline void early_gart_iommu_check(void)
25{ 30{
@@ -31,4 +36,63 @@ static inline void gart_iommu_shutdown(void)
31 36
32#endif 37#endif
33 38
39/* PTE bits. */
40#define GPTE_VALID 1
41#define GPTE_COHERENT 2
42
43/* Aperture control register bits. */
44#define GARTEN (1<<0)
45#define DISGARTCPU (1<<4)
46#define DISGARTIO (1<<5)
47
48/* GART cache control register bits. */
49#define INVGART (1<<0)
50#define GARTPTEERR (1<<1)
51
52/* K8 On-cpu GART registers */
53#define AMD64_GARTAPERTURECTL 0x90
54#define AMD64_GARTAPERTUREBASE 0x94
55#define AMD64_GARTTABLEBASE 0x98
56#define AMD64_GARTCACHECTL 0x9c
57#define AMD64_GARTEN (1<<0)
58
59static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
60{
61 u32 tmp, ctl;
62
63 /* address of the mappings table */
64 addr >>= 12;
65 tmp = (u32) addr<<4;
66 tmp &= ~0xf;
67 pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp);
68
69 /* Enable GART translation for this hammer. */
70 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
71 ctl |= GARTEN;
72 ctl &= ~(DISGARTCPU | DISGARTIO);
73 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
74}
75
76static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
77{
78 if (!aper_base)
79 return 0;
80
81 if (aper_base + aper_size > 0x100000000ULL) {
82 printk(KERN_ERR "Aperture beyond 4GB. Ignoring.\n");
83 return 0;
84 }
85 if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) {
86 printk(KERN_ERR "Aperture pointing to e820 RAM. Ignoring.\n");
87 return 0;
88 }
89 if (aper_size < min_size) {
90 printk(KERN_ERR "Aperture too small (%d MB) than (%d MB)\n",
91 aper_size>>20, min_size>>20);
92 return 0;
93 }
94
95 return 1;
96}
97
34#endif 98#endif