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-rw-r--r--include/asm-x86/apic.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h
index 6fda195337c5..bb54928373ca 100644
--- a/include/asm-x86/apic.h
+++ b/include/asm-x86/apic.h
@@ -7,6 +7,8 @@
7#include <asm/apicdef.h> 7#include <asm/apicdef.h>
8#include <asm/processor.h> 8#include <asm/processor.h>
9#include <asm/system.h> 9#include <asm/system.h>
10#include <asm/cpufeature.h>
11#include <asm/msr.h>
10 12
11#define ARCH_APICTIMER_STOPS_ON_C3 1 13#define ARCH_APICTIMER_STOPS_ON_C3 1
12 14
@@ -73,6 +75,26 @@ static inline u32 native_apic_mem_read(u32 reg)
73 return *((volatile u32 *)(APIC_BASE + reg)); 75 return *((volatile u32 *)(APIC_BASE + reg));
74} 76}
75 77
78static inline void native_apic_msr_write(u32 reg, u32 v)
79{
80 if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR ||
81 reg == APIC_LVR)
82 return;
83
84 wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
85}
86
87static inline u32 native_apic_msr_read(u32 reg)
88{
89 u32 low, high;
90
91 if (reg == APIC_DFR)
92 return -1;
93
94 rdmsr(APIC_BASE_MSR + (reg >> 4), low, high);
95 return low;
96}
97
76#ifdef CONFIG_X86_32 98#ifdef CONFIG_X86_32
77extern void apic_wait_icr_idle(void); 99extern void apic_wait_icr_idle(void);
78extern u32 safe_apic_wait_icr_idle(void); 100extern u32 safe_apic_wait_icr_idle(void);