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Diffstat (limited to 'include/asm-x86/agp.h')
-rw-r--r--include/asm-x86/agp.h43
1 files changed, 39 insertions, 4 deletions
diff --git a/include/asm-x86/agp.h b/include/asm-x86/agp.h
index 9348f1e4f6f1..62df2a9e7130 100644
--- a/include/asm-x86/agp.h
+++ b/include/asm-x86/agp.h
@@ -1,5 +1,40 @@
1#ifdef CONFIG_X86_32 1#ifndef _ASM_X86_AGP_H
2# include "agp_32.h" 2#define _ASM_X86_AGP_H
3#else 3
4# include "agp_64.h" 4#include <asm/pgtable.h>
5#include <asm/cacheflush.h>
6
7/*
8 * Functions to keep the agpgart mappings coherent with the MMU. The
9 * GART gives the CPU a physical alias of pages in memory. The alias
10 * region is mapped uncacheable. Make sure there are no conflicting
11 * mappings with different cachability attributes for the same
12 * page. This avoids data corruption on some CPUs.
13 */
14
15/*
16 * Caller's responsibility to call global_flush_tlb() for performance
17 * reasons
18 */
19#define map_page_into_agp(page) change_page_attr(page, 1, PAGE_KERNEL_NOCACHE)
20#define unmap_page_from_agp(page) change_page_attr(page, 1, PAGE_KERNEL)
21#define flush_agp_mappings() global_flush_tlb()
22
23/*
24 * Could use CLFLUSH here if the cpu supports it. But then it would
25 * need to be called for each cacheline of the whole page so it may
26 * not be worth it. Would need a page for it.
27 */
28#define flush_agp_cache() wbinvd()
29
30/* Convert a physical address to an address suitable for the GART. */
31#define phys_to_gart(x) (x)
32#define gart_to_phys(x) (x)
33
34/* GATT allocation. Returns/accepts GATT kernel virtual address. */
35#define alloc_gatt_pages(order) \
36 ((char *)__get_free_pages(GFP_KERNEL, (order)))
37#define free_gatt_pages(table, order) \
38 free_pages((unsigned long)(table), (order))
39
5#endif 40#endif