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-rw-r--r--include/asm-v850/a.out.h21
-rw-r--r--include/asm-v850/anna.h143
-rw-r--r--include/asm-v850/as85ep1.h158
-rw-r--r--include/asm-v850/asm.h32
-rw-r--r--include/asm-v850/atomic.h99
-rw-r--r--include/asm-v850/bitops.h355
-rw-r--r--include/asm-v850/bug.h22
-rw-r--r--include/asm-v850/bugs.h16
-rw-r--r--include/asm-v850/byteorder.h48
-rw-r--r--include/asm-v850/cache.h25
-rw-r--r--include/asm-v850/cacheflush.h69
-rw-r--r--include/asm-v850/checksum.h115
-rw-r--r--include/asm-v850/clinkage.h26
-rw-r--r--include/asm-v850/cputime.h6
-rw-r--r--include/asm-v850/current.h47
-rw-r--r--include/asm-v850/delay.h47
-rw-r--r--include/asm-v850/div64.h1
-rw-r--r--include/asm-v850/dma-mapping.h12
-rw-r--r--include/asm-v850/dma.h18
-rw-r--r--include/asm-v850/elf.h101
-rw-r--r--include/asm-v850/entry.h113
-rw-r--r--include/asm-v850/errno.h6
-rw-r--r--include/asm-v850/fcntl.h87
-rw-r--r--include/asm-v850/flat.h131
-rw-r--r--include/asm-v850/fpga85e2c.h88
-rw-r--r--include/asm-v850/gbus_int.h97
-rw-r--r--include/asm-v850/hardirq.h25
-rw-r--r--include/asm-v850/highres_timer.h44
-rw-r--r--include/asm-v850/hw_irq.h8
-rw-r--r--include/asm-v850/io.h133
-rw-r--r--include/asm-v850/ioctl.h80
-rw-r--r--include/asm-v850/ioctls.h80
-rw-r--r--include/asm-v850/ipc.h1
-rw-r--r--include/asm-v850/ipcbuf.h29
-rw-r--r--include/asm-v850/irq.h69
-rw-r--r--include/asm-v850/kmap_types.h19
-rw-r--r--include/asm-v850/linkage.h6
-rw-r--r--include/asm-v850/local.h6
-rw-r--r--include/asm-v850/ma.h101
-rw-r--r--include/asm-v850/ma1.h50
-rw-r--r--include/asm-v850/machdep.h61
-rw-r--r--include/asm-v850/macrology.h17
-rw-r--r--include/asm-v850/me2.h182
-rw-r--r--include/asm-v850/mman.h40
-rw-r--r--include/asm-v850/mmu.h22
-rw-r--r--include/asm-v850/mmu_context.h11
-rw-r--r--include/asm-v850/module.h62
-rw-r--r--include/asm-v850/msgbuf.h31
-rw-r--r--include/asm-v850/namei.h17
-rw-r--r--include/asm-v850/page.h146
-rw-r--r--include/asm-v850/param.h32
-rw-r--r--include/asm-v850/pci.h88
-rw-r--r--include/asm-v850/percpu.h14
-rw-r--r--include/asm-v850/pgalloc.h22
-rw-r--r--include/asm-v850/pgtable.h58
-rw-r--r--include/asm-v850/poll.h23
-rw-r--r--include/asm-v850/posix_types.h76
-rw-r--r--include/asm-v850/processor.h120
-rw-r--r--include/asm-v850/ptrace.h121
-rw-r--r--include/asm-v850/resource.h6
-rw-r--r--include/asm-v850/rte_cb.h85
-rw-r--r--include/asm-v850/rte_ma1_cb.h128
-rw-r--r--include/asm-v850/rte_mb_a_pci.h56
-rw-r--r--include/asm-v850/rte_me2_cb.h202
-rw-r--r--include/asm-v850/rte_nb85e_cb.h111
-rw-r--r--include/asm-v850/scatterlist.h26
-rw-r--r--include/asm-v850/sections.h6
-rw-r--r--include/asm-v850/segment.h36
-rw-r--r--include/asm-v850/semaphore.h88
-rw-r--r--include/asm-v850/sembuf.h25
-rw-r--r--include/asm-v850/serial.h57
-rw-r--r--include/asm-v850/setup.h6
-rw-r--r--include/asm-v850/shmbuf.h42
-rw-r--r--include/asm-v850/shmparam.h6
-rw-r--r--include/asm-v850/sigcontext.h25
-rw-r--r--include/asm-v850/siginfo.h6
-rw-r--r--include/asm-v850/signal.h195
-rw-r--r--include/asm-v850/sim.h52
-rw-r--r--include/asm-v850/sim85e2.h75
-rw-r--r--include/asm-v850/sim85e2c.h26
-rw-r--r--include/asm-v850/sim85e2s.h28
-rw-r--r--include/asm-v850/simsyscall.h99
-rw-r--r--include/asm-v850/socket.h50
-rw-r--r--include/asm-v850/sockios.h12
-rw-r--r--include/asm-v850/stat.h73
-rw-r--r--include/asm-v850/statfs.h6
-rw-r--r--include/asm-v850/string.h25
-rw-r--r--include/asm-v850/system.h113
-rw-r--r--include/asm-v850/teg.h101
-rw-r--r--include/asm-v850/termbits.h175
-rw-r--r--include/asm-v850/termios.h106
-rw-r--r--include/asm-v850/thread_info.h132
-rw-r--r--include/asm-v850/timex.h18
-rw-r--r--include/asm-v850/tlb.h21
-rw-r--r--include/asm-v850/tlbflush.h70
-rw-r--r--include/asm-v850/topology.h6
-rw-r--r--include/asm-v850/types.h68
-rw-r--r--include/asm-v850/uaccess.h165
-rw-r--r--include/asm-v850/ucontext.h14
-rw-r--r--include/asm-v850/unaligned.h130
-rw-r--r--include/asm-v850/unistd.h477
-rw-r--r--include/asm-v850/user.h56
-rw-r--r--include/asm-v850/v850e.h21
-rw-r--r--include/asm-v850/v850e2.h69
-rw-r--r--include/asm-v850/v850e2_cache.h74
-rw-r--r--include/asm-v850/v850e_cache.h48
-rw-r--r--include/asm-v850/v850e_intc.h133
-rw-r--r--include/asm-v850/v850e_timer_c.h48
-rw-r--r--include/asm-v850/v850e_timer_d.h62
-rw-r--r--include/asm-v850/v850e_uart.h77
-rw-r--r--include/asm-v850/v850e_uarta.h278
-rw-r--r--include/asm-v850/v850e_uartb.h262
-rw-r--r--include/asm-v850/v850e_utils.h35
113 files changed, 7988 insertions, 0 deletions
diff --git a/include/asm-v850/a.out.h b/include/asm-v850/a.out.h
new file mode 100644
index 000000000000..e9439a0708f6
--- /dev/null
+++ b/include/asm-v850/a.out.h
@@ -0,0 +1,21 @@
1#ifndef __V850_A_OUT_H__
2#define __V850_A_OUT_H__
3
4struct exec
5{
6 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
7 unsigned a_text; /* length of text, in bytes */
8 unsigned a_data; /* length of data, in bytes */
9 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
10 unsigned a_syms; /* length of symbol table data in file, in bytes */
11 unsigned a_entry; /* start address */
12 unsigned a_trsize; /* length of relocation info for text, in bytes */
13 unsigned a_drsize; /* length of relocation info for data, in bytes */
14};
15
16#define N_TRSIZE(a) ((a).a_trsize)
17#define N_DRSIZE(a) ((a).a_drsize)
18#define N_SYMSIZE(a) ((a).a_syms)
19
20
21#endif /* __V850_A_OUT_H__ */
diff --git a/include/asm-v850/anna.h b/include/asm-v850/anna.h
new file mode 100644
index 000000000000..3be77d5ecfce
--- /dev/null
+++ b/include/asm-v850/anna.h
@@ -0,0 +1,143 @@
1/*
2 * include/asm-v850/anna.h -- Anna V850E2 evaluation cpu chip/board
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_ANNA_H__
15#define __V850_ANNA_H__
16
17#include <asm/v850e2.h> /* Based on V850E2 core. */
18
19
20#define CPU_MODEL "v850e2/anna"
21#define CPU_MODEL_LONG "NEC V850E2/Anna"
22#define PLATFORM "anna"
23#define PLATFORM_LONG "NEC/Midas lab V850E2/Anna evaluation board"
24
25#define CPU_CLOCK_FREQ 200000000 /* 200MHz */
26#define SYS_CLOCK_FREQ 33300000 /* 33.3MHz */
27
28
29/* 1MB of static RAM. This memory is mirrored 64 times. */
30#define SRAM_ADDR 0x04000000
31#define SRAM_SIZE 0x00100000 /* 1MB */
32/* 64MB of DRAM. */
33#define SDRAM_ADDR 0x08000000
34#define SDRAM_SIZE 0x04000000 /* 64MB */
35
36
37/* For <asm/page.h> */
38#define PAGE_OFFSET SRAM_ADDR
39
40/* We use on-chip RAM, for a few miscellaneous variables that must be
41 accessible using a load instruction relative to R0. The Anna chip has
42 128K of `dLB' ram nominally located at 0xFFF00000, but it's mirrored
43 every 128K, so we can use the `last mirror' (except for the portion at
44 the top which is overridden by I/O space). In addition, the early
45 sample chip we're using has lots of memory errors in the dLB ram, so we
46 use a specially chosen location that has at least 20 bytes of contiguous
47 valid memory (xxxF0020 - xxxF003F). */
48#define R0_RAM_ADDR 0xFFFF8020
49
50
51/* Anna specific control registers. */
52#define ANNA_ILBEN_ADDR 0xFFFFF7F2
53#define ANNA_ILBEN (*(volatile u16 *)ANNA_ILBEN_ADDR)
54
55
56/* I/O port P0-P3. */
57/* Direct I/O. Bits 0-7 are pins Pn0-Pn7. */
58#define ANNA_PORT_IO_ADDR(n) (0xFFFFF400 + (n) * 2)
59#define ANNA_PORT_IO(n) (*(volatile u8 *)ANNA_PORT_IO_ADDR(n))
60/* Port mode (for direct I/O, 0 = output, 1 = input). */
61#define ANNA_PORT_PM_ADDR(n) (0xFFFFF410 + (n) * 2)
62#define ANNA_PORT_PM(n) (*(volatile u8 *)ANNA_PORT_PM_ADDR(n))
63
64
65/* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */
66#define IRQ_INTP(n) (n) /* Pnnn (pin) interrupts 0-15 */
67#define IRQ_INTP_NUM 16
68#define IRQ_INTOV(n) (0x10 + (n)) /* 0-2 */
69#define IRQ_INTOV_NUM 2
70#define IRQ_INTCCC(n) (0x12 + (n))
71#define IRQ_INTCCC_NUM 4
72#define IRQ_INTCMD(n) (0x16 + (n)) /* interval timer interrupts 0-5 */
73#define IRQ_INTCMD_NUM 6
74#define IRQ_INTDMA(n) (0x1C + (n)) /* DMA interrupts 0-3 */
75#define IRQ_INTDMA_NUM 4
76#define IRQ_INTDMXER 0x20
77#define IRQ_INTSRE(n) (0x21 + (n)*3) /* UART 0-1 reception error */
78#define IRQ_INTSRE_NUM 2
79#define IRQ_INTSR(n) (0x22 + (n)*3) /* UART 0-1 reception completion */
80#define IRQ_INTSR_NUM 2
81#define IRQ_INTST(n) (0x23 + (n)*3) /* UART 0-1 transmission completion */
82#define IRQ_INTST_NUM 2
83
84#define NUM_CPU_IRQS 64
85
86#ifndef __ASSEMBLY__
87/* Initialize chip interrupts. */
88extern void anna_init_irqs (void);
89#endif
90
91
92/* Anna UART details (basically the same as the V850E/MA1, but 2 channels). */
93#define V850E_UART_NUM_CHANNELS 2
94#define V850E_UART_BASE_FREQ (SYS_CLOCK_FREQ / 2)
95#define V850E_UART_CHIP_NAME "V850E2/NA85E2A"
96
97/* This is the UART channel that's actually connected on the board. */
98#define V850E_UART_CONSOLE_CHANNEL 1
99
100/* This is a function that gets called before configuring the UART. */
101#define V850E_UART_PRE_CONFIGURE anna_uart_pre_configure
102#ifndef __ASSEMBLY__
103extern void anna_uart_pre_configure (unsigned chan,
104 unsigned cflags, unsigned baud);
105#endif
106
107/* This board supports RTS/CTS for the on-chip UART, but only for channel 1. */
108
109/* CTS for UART channel 1 is pin P37 (bit 7 of port 3). */
110#define V850E_UART_CTS(chan) ((chan) == 1 ? !(ANNA_PORT_IO(3) & 0x80) : 1)
111/* RTS for UART channel 1 is pin P07 (bit 7 of port 0). */
112#define V850E_UART_SET_RTS(chan, val) \
113 do { \
114 if (chan == 1) { \
115 unsigned old = ANNA_PORT_IO(0); \
116 if (val) \
117 ANNA_PORT_IO(0) = old & ~0x80; \
118 else \
119 ANNA_PORT_IO(0) = old | 0x80; \
120 } \
121 } while (0)
122
123
124/* Timer C details. */
125#define V850E_TIMER_C_BASE_ADDR 0xFFFFF600
126
127/* Timer D details (the Anna actually has 5 of these; should change later). */
128#define V850E_TIMER_D_BASE_ADDR 0xFFFFF540
129#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
130#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2)
131#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
132
133#define V850E_TIMER_D_BASE_FREQ SYS_CLOCK_FREQ
134#define V850E_TIMER_D_TMCD_CS_MIN 1 /* min 2^1 divider */
135
136
137/* For <asm/param.h> */
138#ifndef HZ
139#define HZ 100
140#endif
141
142
143#endif /* __V850_ANNA_H__ */
diff --git a/include/asm-v850/as85ep1.h b/include/asm-v850/as85ep1.h
new file mode 100644
index 000000000000..659bc910ffd7
--- /dev/null
+++ b/include/asm-v850/as85ep1.h
@@ -0,0 +1,158 @@
1/*
2 * include/asm-v850/as85ep1.h -- AS85EP1 evaluation CPU chip/board
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_AS85EP1_H__
15#define __V850_AS85EP1_H__
16
17#include <asm/v850e.h>
18
19
20#define CPU_MODEL "as85ep1"
21#define CPU_MODEL_LONG "NEC V850E/AS85EP1"
22#define PLATFORM "AS85EP1"
23#define PLATFORM_LONG "NEC V850E/AS85EP1 evaluation board"
24
25#define CPU_CLOCK_FREQ 96000000 /* 96MHz */
26#define SYS_CLOCK_FREQ CPU_CLOCK_FREQ
27
28
29/* 1MB of static RAM. */
30#define SRAM_ADDR 0x00400000
31#define SRAM_SIZE 0x00100000 /* 1MB */
32/* About 58MB of DRAM. This can actually be at one of two positions,
33 determined by jump JP3; we have to use the first position because the
34 second is partially out of processor instruction addressing range
35 (though in the second position there's actually 64MB available). */
36#define SDRAM_ADDR 0x00600000
37#define SDRAM_SIZE 0x039F8000 /* approx 58MB */
38
39/* For <asm/page.h> */
40#define PAGE_OFFSET SRAM_ADDR
41
42/* We use on-chip RAM, for a few miscellaneous variables that must be
43 accessible using a load instruction relative to R0. The AS85EP1 chip
44 16K of internal RAM located slightly before I/O space. */
45#define R0_RAM_ADDR 0xFFFF8000
46
47
48/* AS85EP1 specific control registers. */
49#define AS85EP1_CSC_ADDR(n) (0xFFFFF060 + (n) * 2)
50#define AS85EP1_CSC(n) (*(volatile u16 *)AS85EP1_CSC_ADDR(n))
51#define AS85EP1_BSC_ADDR 0xFFFFF066
52#define AS85EP1_BSC (*(volatile u16 *)AS85EP1_BSC_ADDR)
53#define AS85EP1_BCT_ADDR(n) (0xFFFFF480 + (n) * 2)
54#define AS85EP1_BCT(n) (*(volatile u16 *)AS85EP1_BCT_ADDR(n))
55#define AS85EP1_DWC_ADDR(n) (0xFFFFF484 + (n) * 2)
56#define AS85EP1_DWC(n) (*(volatile u16 *)AS85EP1_DWC_ADDR(n))
57#define AS85EP1_BCC_ADDR 0xFFFFF488
58#define AS85EP1_BCC (*(volatile u16 *)AS85EP1_BCC_ADDR)
59#define AS85EP1_ASC_ADDR 0xFFFFF48A
60#define AS85EP1_ASC (*(volatile u16 *)AS85EP1_ASC_ADDR)
61#define AS85EP1_BCP_ADDR 0xFFFFF48C
62#define AS85EP1_BCP (*(volatile u16 *)AS85EP1_BCP_ADDR)
63#define AS85EP1_LBS_ADDR 0xFFFFF48E
64#define AS85EP1_LBS (*(volatile u16 *)AS85EP1_LBS_ADDR)
65#define AS85EP1_BMC_ADDR 0xFFFFF498
66#define AS85EP1_BMC (*(volatile u16 *)AS85EP1_BMC_ADDR)
67#define AS85EP1_PRC_ADDR 0xFFFFF49A
68#define AS85EP1_PRC (*(volatile u16 *)AS85EP1_PRC_ADDR)
69#define AS85EP1_SCR_ADDR(n) (0xFFFFF4A0 + (n) * 4)
70#define AS85EP1_SCR(n) (*(volatile u16 *)AS85EP1_SCR_ADDR(n))
71#define AS85EP1_RFS_ADDR(n) (0xFFFFF4A2 + (n) * 4)
72#define AS85EP1_RFS(n) (*(volatile u16 *)AS85EP1_RFS_ADDR(n))
73#define AS85EP1_IRAMM_ADDR 0xFFFFF80A
74#define AS85EP1_IRAMM (*(volatile u8 *)AS85EP1_IRAMM_ADDR)
75
76
77
78/* I/O port P0-P13. */
79/* Direct I/O. Bits 0-7 are pins Pn0-Pn7. */
80#define AS85EP1_PORT_IO_ADDR(n) (0xFFFFF400 + (n) * 2)
81#define AS85EP1_PORT_IO(n) (*(volatile u8 *)AS85EP1_PORT_IO_ADDR(n))
82/* Port mode (for direct I/O, 0 = output, 1 = input). */
83#define AS85EP1_PORT_PM_ADDR(n) (0xFFFFF420 + (n) * 2)
84#define AS85EP1_PORT_PM(n) (*(volatile u8 *)AS85EP1_PORT_PM_ADDR(n))
85/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
86#define AS85EP1_PORT_PMC_ADDR(n) (0xFFFFF440 + (n) * 2)
87#define AS85EP1_PORT_PMC(n) (*(volatile u8 *)AS85EP1_PORT_PMC_ADDR(n))
88
89
90/* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */
91#define IRQ_INTCCC(n) (0x0C + (n))
92#define IRQ_INTCCC_NUM 8
93#define IRQ_INTCMD(n) (0x14 + (n)) /* interval timer interrupts 0-5 */
94#define IRQ_INTCMD_NUM 6
95#define IRQ_INTSRE(n) (0x1E + (n)*3) /* UART 0-1 reception error */
96#define IRQ_INTSRE_NUM 2
97#define IRQ_INTSR(n) (0x1F + (n)*3) /* UART 0-1 reception completion */
98#define IRQ_INTSR_NUM 2
99#define IRQ_INTST(n) (0x20 + (n)*3) /* UART 0-1 transmission completion */
100#define IRQ_INTST_NUM 2
101
102#define NUM_CPU_IRQS 64
103
104#ifndef __ASSEMBLY__
105/* Initialize chip interrupts. */
106extern void as85ep1_init_irqs (void);
107#endif
108
109
110/* AS85EP1 UART details (basically the same as the V850E/MA1, but 2 channels). */
111#define V850E_UART_NUM_CHANNELS 2
112#define V850E_UART_BASE_FREQ (SYS_CLOCK_FREQ / 4)
113#define V850E_UART_CHIP_NAME "V850E/NA85E"
114
115/* This is a function that gets called before configuring the UART. */
116#define V850E_UART_PRE_CONFIGURE as85ep1_uart_pre_configure
117#ifndef __ASSEMBLY__
118extern void as85ep1_uart_pre_configure (unsigned chan,
119 unsigned cflags, unsigned baud);
120#endif
121
122/* This board supports RTS/CTS for the on-chip UART, but only for channel 1. */
123
124/* CTS for UART channel 1 is pin P54 (bit 4 of port 5). */
125#define V850E_UART_CTS(chan) ((chan) == 1 ? !(AS85EP1_PORT_IO(5) & 0x10) : 1)
126/* RTS for UART channel 1 is pin P53 (bit 3 of port 5). */
127#define V850E_UART_SET_RTS(chan, val) \
128 do { \
129 if (chan == 1) { \
130 unsigned old = AS85EP1_PORT_IO(5); \
131 if (val) \
132 AS85EP1_PORT_IO(5) = old & ~0x8; \
133 else \
134 AS85EP1_PORT_IO(5) = old | 0x8; \
135 } \
136 } while (0)
137
138
139/* Timer C details. */
140#define V850E_TIMER_C_BASE_ADDR 0xFFFFF600
141
142/* Timer D details (the AS85EP1 actually has 5 of these; should change later). */
143#define V850E_TIMER_D_BASE_ADDR 0xFFFFF540
144#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
145#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2)
146#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
147
148#define V850E_TIMER_D_BASE_FREQ SYS_CLOCK_FREQ
149#define V850E_TIMER_D_TMCD_CS_MIN 2 /* min 2^2 divider */
150
151
152/* For <asm/param.h> */
153#ifndef HZ
154#define HZ 100
155#endif
156
157
158#endif /* __V850_AS85EP1_H__ */
diff --git a/include/asm-v850/asm.h b/include/asm-v850/asm.h
new file mode 100644
index 000000000000..bf1e785a5dde
--- /dev/null
+++ b/include/asm-v850/asm.h
@@ -0,0 +1,32 @@
1/*
2 * include/asm-v850/asm.h -- Macros for writing assembly code
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#define G_ENTRY(name) \
15 .balign 4; \
16 .globl name; \
17 .type name,@function; \
18 name
19#define G_DATA(name) \
20 .globl name; \
21 .type name,@object; \
22 name
23#define END(name) \
24 .size name,.-name
25
26#define L_ENTRY(name) \
27 .balign 4; \
28 .type name,@function; \
29 name
30#define L_DATA(name) \
31 .type name,@object; \
32 name
diff --git a/include/asm-v850/atomic.h b/include/asm-v850/atomic.h
new file mode 100644
index 000000000000..8284aa7363f2
--- /dev/null
+++ b/include/asm-v850/atomic.h
@@ -0,0 +1,99 @@
1/*
2 * include/asm-v850/atomic.h -- Atomic operations
3 *
4 * Copyright (C) 2001,02 NEC Corporation
5 * Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_ATOMIC_H__
15#define __V850_ATOMIC_H__
16
17#include <linux/config.h>
18
19#include <asm/system.h>
20
21#ifdef CONFIG_SMP
22#error SMP not supported
23#endif
24
25typedef struct { int counter; } atomic_t;
26
27#define ATOMIC_INIT(i) { (i) }
28
29#ifdef __KERNEL__
30
31#define atomic_read(v) ((v)->counter)
32#define atomic_set(v,i) (((v)->counter) = (i))
33
34extern __inline__ int atomic_add_return (int i, volatile atomic_t *v)
35{
36 unsigned long flags;
37 int res;
38
39 local_irq_save (flags);
40 res = v->counter + i;
41 v->counter = res;
42 local_irq_restore (flags);
43
44 return res;
45}
46
47static __inline__ int atomic_sub_return (int i, volatile atomic_t *v)
48{
49 unsigned long flags;
50 int res;
51
52 local_irq_save (flags);
53 res = v->counter - i;
54 v->counter = res;
55 local_irq_restore (flags);
56
57 return res;
58}
59
60static __inline__ void atomic_clear_mask (unsigned long mask, unsigned long *addr)
61{
62 unsigned long flags;
63
64 local_irq_save (flags);
65 *addr &= ~mask;
66 local_irq_restore (flags);
67}
68
69#endif
70
71#define atomic_add(i, v) atomic_add_return ((i), (v))
72#define atomic_sub(i, v) atomic_sub_return ((i), (v))
73
74#define atomic_dec_return(v) atomic_sub_return (1, (v))
75#define atomic_inc_return(v) atomic_add_return (1, (v))
76#define atomic_inc(v) atomic_inc_return (v)
77#define atomic_dec(v) atomic_dec_return (v)
78
79/*
80 * atomic_inc_and_test - increment and test
81 * @v: pointer of type atomic_t
82 *
83 * Atomically increments @v by 1
84 * and returns true if the result is zero, or false for all
85 * other cases.
86 */
87#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
88
89#define atomic_sub_and_test(i,v) (atomic_sub_return ((i), (v)) == 0)
90#define atomic_dec_and_test(v) (atomic_sub_return (1, (v)) == 0)
91#define atomic_add_negative(i,v) (atomic_add_return ((i), (v)) < 0)
92
93/* Atomic operations are already serializing on ARM */
94#define smp_mb__before_atomic_dec() barrier()
95#define smp_mb__after_atomic_dec() barrier()
96#define smp_mb__before_atomic_inc() barrier()
97#define smp_mb__after_atomic_inc() barrier()
98
99#endif /* __V850_ATOMIC_H__ */
diff --git a/include/asm-v850/bitops.h b/include/asm-v850/bitops.h
new file mode 100644
index 000000000000..7c4ecaf5151c
--- /dev/null
+++ b/include/asm-v850/bitops.h
@@ -0,0 +1,355 @@
1/*
2 * include/asm-v850/bitops.h -- Bit operations
3 *
4 * Copyright (C) 2001,02,03,04 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03,04 Miles Bader <miles@gnu.org>
6 * Copyright (C) 1992 Linus Torvalds.
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 */
12
13#ifndef __V850_BITOPS_H__
14#define __V850_BITOPS_H__
15
16
17#include <linux/config.h>
18#include <linux/compiler.h> /* unlikely */
19#include <asm/byteorder.h> /* swab32 */
20#include <asm/system.h> /* interrupt enable/disable */
21
22
23#ifdef __KERNEL__
24
25/*
26 * The __ functions are not atomic
27 */
28
29/*
30 * ffz = Find First Zero in word. Undefined if no zero exists,
31 * so code should check against ~0UL first..
32 */
33extern __inline__ unsigned long ffz (unsigned long word)
34{
35 unsigned long result = 0;
36
37 while (word & 1) {
38 result++;
39 word >>= 1;
40 }
41 return result;
42}
43
44
45/* In the following constant-bit-op macros, a "g" constraint is used when
46 we really need an integer ("i" constraint). This is to avoid
47 warnings/errors from the compiler in the case where the associated
48 operand _isn't_ an integer, and shouldn't produce bogus assembly because
49 use of that form is protected by a guard statement that checks for
50 constants, and should otherwise be removed by the optimizer. This
51 _usually_ works -- however, __builtin_constant_p returns true for a
52 variable with a known constant value too, and unfortunately gcc will
53 happily put the variable in a register and use the register for the "g"
54 constraint'd asm operand. To avoid the latter problem, we add a
55 constant offset to the operand and subtract it back in the asm code;
56 forcing gcc to do arithmetic on the value is usually enough to get it
57 to use a real constant value. This is horrible, and ultimately
58 unreliable too, but it seems to work for now (hopefully gcc will offer
59 us more control in the future, so we can do a better job). */
60
61#define __const_bit_op(op, nr, addr) \
62 ({ __asm__ (op " (%0 - 0x123), %1" \
63 :: "g" (((nr) & 0x7) + 0x123), \
64 "m" (*((char *)(addr) + ((nr) >> 3))) \
65 : "memory"); })
66#define __var_bit_op(op, nr, addr) \
67 ({ int __nr = (nr); \
68 __asm__ (op " %0, [%1]" \
69 :: "r" (__nr & 0x7), \
70 "r" ((char *)(addr) + (__nr >> 3)) \
71 : "memory"); })
72#define __bit_op(op, nr, addr) \
73 ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
74 ? __const_bit_op (op, nr, addr) \
75 : __var_bit_op (op, nr, addr))
76
77#define __set_bit(nr, addr) __bit_op ("set1", nr, addr)
78#define __clear_bit(nr, addr) __bit_op ("clr1", nr, addr)
79#define __change_bit(nr, addr) __bit_op ("not1", nr, addr)
80
81/* The bit instructions used by `non-atomic' variants are actually atomic. */
82#define set_bit __set_bit
83#define clear_bit __clear_bit
84#define change_bit __change_bit
85
86
87#define __const_tns_bit_op(op, nr, addr) \
88 ({ int __tns_res; \
89 __asm__ __volatile__ ( \
90 "tst1 (%1 - 0x123), %2; setf nz, %0; " op " (%1 - 0x123), %2" \
91 : "=&r" (__tns_res) \
92 : "g" (((nr) & 0x7) + 0x123), \
93 "m" (*((char *)(addr) + ((nr) >> 3))) \
94 : "memory"); \
95 __tns_res; \
96 })
97#define __var_tns_bit_op(op, nr, addr) \
98 ({ int __nr = (nr); \
99 int __tns_res; \
100 __asm__ __volatile__ ( \
101 "tst1 %1, [%2]; setf nz, %0; " op " %1, [%2]" \
102 : "=&r" (__tns_res) \
103 : "r" (__nr & 0x7), \
104 "r" ((char *)(addr) + (__nr >> 3)) \
105 : "memory"); \
106 __tns_res; \
107 })
108#define __tns_bit_op(op, nr, addr) \
109 ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
110 ? __const_tns_bit_op (op, nr, addr) \
111 : __var_tns_bit_op (op, nr, addr))
112#define __tns_atomic_bit_op(op, nr, addr) \
113 ({ int __tns_atomic_res, __tns_atomic_flags; \
114 local_irq_save (__tns_atomic_flags); \
115 __tns_atomic_res = __tns_bit_op (op, nr, addr); \
116 local_irq_restore (__tns_atomic_flags); \
117 __tns_atomic_res; \
118 })
119
120#define __test_and_set_bit(nr, addr) __tns_bit_op ("set1", nr, addr)
121#define test_and_set_bit(nr, addr) __tns_atomic_bit_op ("set1", nr, addr)
122
123#define __test_and_clear_bit(nr, addr) __tns_bit_op ("clr1", nr, addr)
124#define test_and_clear_bit(nr, addr) __tns_atomic_bit_op ("clr1", nr, addr)
125
126#define __test_and_change_bit(nr, addr) __tns_bit_op ("not1", nr, addr)
127#define test_and_change_bit(nr, addr) __tns_atomic_bit_op ("not1", nr, addr)
128
129
130#define __const_test_bit(nr, addr) \
131 ({ int __test_bit_res; \
132 __asm__ __volatile__ ("tst1 (%1 - 0x123), %2; setf nz, %0" \
133 : "=r" (__test_bit_res) \
134 : "g" (((nr) & 0x7) + 0x123), \
135 "m" (*((const char *)(addr) + ((nr) >> 3)))); \
136 __test_bit_res; \
137 })
138extern __inline__ int __test_bit (int nr, const void *addr)
139{
140 int res;
141 __asm__ __volatile__ ("tst1 %1, [%2]; setf nz, %0"
142 : "=r" (res)
143 : "r" (nr & 0x7), "r" (addr + (nr >> 3)));
144 return res;
145}
146#define test_bit(nr,addr) \
147 ((__builtin_constant_p (nr) && (unsigned)(nr) <= 0x7FFFF) \
148 ? __const_test_bit ((nr), (addr)) \
149 : __test_bit ((nr), (addr)))
150
151
152/* clear_bit doesn't provide any barrier for the compiler. */
153#define smp_mb__before_clear_bit() barrier ()
154#define smp_mb__after_clear_bit() barrier ()
155
156
157#define find_first_zero_bit(addr, size) \
158 find_next_zero_bit ((addr), (size), 0)
159
160extern __inline__ int find_next_zero_bit (void *addr, int size, int offset)
161{
162 unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
163 unsigned long result = offset & ~31UL;
164 unsigned long tmp;
165
166 if (offset >= size)
167 return size;
168 size -= result;
169 offset &= 31UL;
170 if (offset) {
171 tmp = * (p++);
172 tmp |= ~0UL >> (32-offset);
173 if (size < 32)
174 goto found_first;
175 if (~tmp)
176 goto found_middle;
177 size -= 32;
178 result += 32;
179 }
180 while (size & ~31UL) {
181 if (~ (tmp = * (p++)))
182 goto found_middle;
183 result += 32;
184 size -= 32;
185 }
186 if (!size)
187 return result;
188 tmp = *p;
189
190 found_first:
191 tmp |= ~0UL >> size;
192 found_middle:
193 return result + ffz (tmp);
194}
195
196
197/* This is the same as generic_ffs, but we can't use that because it's
198 inline and the #include order mucks things up. */
199static inline int generic_ffs_for_find_next_bit(int x)
200{
201 int r = 1;
202
203 if (!x)
204 return 0;
205 if (!(x & 0xffff)) {
206 x >>= 16;
207 r += 16;
208 }
209 if (!(x & 0xff)) {
210 x >>= 8;
211 r += 8;
212 }
213 if (!(x & 0xf)) {
214 x >>= 4;
215 r += 4;
216 }
217 if (!(x & 3)) {
218 x >>= 2;
219 r += 2;
220 }
221 if (!(x & 1)) {
222 x >>= 1;
223 r += 1;
224 }
225 return r;
226}
227
228/*
229 * Find next one bit in a bitmap reasonably efficiently.
230 */
231static __inline__ unsigned long find_next_bit(const unsigned long *addr,
232 unsigned long size, unsigned long offset)
233{
234 unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
235 unsigned int result = offset & ~31UL;
236 unsigned int tmp;
237
238 if (offset >= size)
239 return size;
240 size -= result;
241 offset &= 31UL;
242 if (offset) {
243 tmp = *p++;
244 tmp &= ~0UL << offset;
245 if (size < 32)
246 goto found_first;
247 if (tmp)
248 goto found_middle;
249 size -= 32;
250 result += 32;
251 }
252 while (size >= 32) {
253 if ((tmp = *p++) != 0)
254 goto found_middle;
255 result += 32;
256 size -= 32;
257 }
258 if (!size)
259 return result;
260 tmp = *p;
261
262found_first:
263 tmp &= ~0UL >> (32 - size);
264 if (tmp == 0UL) /* Are any bits set? */
265 return result + size; /* Nope. */
266found_middle:
267 return result + generic_ffs_for_find_next_bit(tmp);
268}
269
270/*
271 * find_first_bit - find the first set bit in a memory region
272 */
273#define find_first_bit(addr, size) \
274 find_next_bit((addr), (size), 0)
275
276
277#define ffs(x) generic_ffs (x)
278#define fls(x) generic_fls (x)
279#define __ffs(x) ffs(x)
280
281
282/*
283 * This is just `generic_ffs' from <linux/bitops.h>, except that it assumes
284 * that at least one bit is set, and returns the real index of the bit
285 * (rather than the bit index + 1, like ffs does).
286 */
287static inline int sched_ffs(int x)
288{
289 int r = 0;
290
291 if (!(x & 0xffff)) {
292 x >>= 16;
293 r += 16;
294 }
295 if (!(x & 0xff)) {
296 x >>= 8;
297 r += 8;
298 }
299 if (!(x & 0xf)) {
300 x >>= 4;
301 r += 4;
302 }
303 if (!(x & 3)) {
304 x >>= 2;
305 r += 2;
306 }
307 if (!(x & 1)) {
308 x >>= 1;
309 r += 1;
310 }
311 return r;
312}
313
314/*
315 * Every architecture must define this function. It's the fastest
316 * way of searching a 140-bit bitmap where the first 100 bits are
317 * unlikely to be set. It's guaranteed that at least one of the 140
318 * bits is set.
319 */
320static inline int sched_find_first_bit(unsigned long *b)
321{
322 unsigned offs = 0;
323 while (! *b) {
324 b++;
325 offs += 32;
326 }
327 return sched_ffs (*b) + offs;
328}
329
330/*
331 * hweightN: returns the hamming weight (i.e. the number
332 * of bits set) of a N-bit word
333 */
334#define hweight32(x) generic_hweight32 (x)
335#define hweight16(x) generic_hweight16 (x)
336#define hweight8(x) generic_hweight8 (x)
337
338#define ext2_set_bit test_and_set_bit
339#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a)
340#define ext2_clear_bit test_and_clear_bit
341#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a)
342#define ext2_test_bit test_bit
343#define ext2_find_first_zero_bit find_first_zero_bit
344#define ext2_find_next_zero_bit find_next_zero_bit
345
346/* Bitmap functions for the minix filesystem. */
347#define minix_test_and_set_bit test_and_set_bit
348#define minix_set_bit set_bit
349#define minix_test_and_clear_bit test_and_clear_bit
350#define minix_test_bit test_bit
351#define minix_find_first_zero_bit find_first_zero_bit
352
353#endif /* __KERNEL__ */
354
355#endif /* __V850_BITOPS_H__ */
diff --git a/include/asm-v850/bug.h b/include/asm-v850/bug.h
new file mode 100644
index 000000000000..c778916bf7f2
--- /dev/null
+++ b/include/asm-v850/bug.h
@@ -0,0 +1,22 @@
1/*
2 * include/asm-v850/bug.h -- Bug reporting
3 *
4 * Copyright (C) 2003 NEC Electronics Corporation
5 * Copyright (C) 2003 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_BUG_H__
15#define __V850_BUG_H__
16
17extern void __bug (void) __attribute__ ((noreturn));
18#define BUG() __bug()
19#define HAVE_ARCH_BUG
20#include <asm-generic/bug.h>
21
22#endif /* __V850_BUG_H__ */
diff --git a/include/asm-v850/bugs.h b/include/asm-v850/bugs.h
new file mode 100644
index 000000000000..71110a65c1d7
--- /dev/null
+++ b/include/asm-v850/bugs.h
@@ -0,0 +1,16 @@
1/*
2 * include/asm-v850e/bugs.h
3 *
4 * Copyright (C) 1994 Linus Torvalds
5 */
6
7/*
8 * This is included by init/main.c to check for architecture-dependent bugs.
9 *
10 * Needs:
11 * void check_bugs(void);
12 */
13
14static void check_bugs(void)
15{
16}
diff --git a/include/asm-v850/byteorder.h b/include/asm-v850/byteorder.h
new file mode 100644
index 000000000000..a6f07530050e
--- /dev/null
+++ b/include/asm-v850/byteorder.h
@@ -0,0 +1,48 @@
1/*
2 * include/asm-v850/byteorder.h -- Endian id and conversion ops
3 *
4 * Copyright (C) 2001 NEC Corporation
5 * Copyright (C) 2001 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_BYTEORDER_H__
15#define __V850_BYTEORDER_H__
16
17#include <asm/types.h>
18#include <linux/compiler.h>
19
20#ifdef __GNUC__
21
22static __inline__ __attribute_const__ __u32 ___arch__swab32 (__u32 word)
23{
24 __u32 res;
25 __asm__ ("bsw %1, %0" : "=r" (res) : "r" (word));
26 return res;
27}
28
29static __inline__ __attribute_const__ __u16 ___arch__swab16 (__u16 half_word)
30{
31 __u16 res;
32 __asm__ ("bsh %1, %0" : "=r" (res) : "r" (half_word));
33 return res;
34}
35
36#define __arch__swab32(x) ___arch__swab32(x)
37#define __arch__swab16(x) ___arch__swab16(x)
38
39#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
40# define __BYTEORDER_HAS_U64__
41# define __SWAB_64_THRU_32__
42#endif
43
44#endif /* __GNUC__ */
45
46#include <linux/byteorder/little_endian.h>
47
48#endif /* __V850_BYTEORDER_H__ */
diff --git a/include/asm-v850/cache.h b/include/asm-v850/cache.h
new file mode 100644
index 000000000000..027f8c9090cd
--- /dev/null
+++ b/include/asm-v850/cache.h
@@ -0,0 +1,25 @@
1/*
2 * include/asm-v850/cache.h -- Cache operations
3 *
4 * Copyright (C) 2001 NEC Corporation
5 * Copyright (C) 2001 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_CACHE_H__
15#define __V850_CACHE_H__
16
17/* All cache operations are machine-dependent. */
18#include <asm/machdep.h>
19
20#ifndef L1_CACHE_BYTES
21/* This processor has no cache, so just choose an arbitrary value. */
22#define L1_CACHE_BYTES 16
23#endif
24
25#endif /* __V850_CACHE_H__ */
diff --git a/include/asm-v850/cacheflush.h b/include/asm-v850/cacheflush.h
new file mode 100644
index 000000000000..e1a87f82f1a4
--- /dev/null
+++ b/include/asm-v850/cacheflush.h
@@ -0,0 +1,69 @@
1/*
2 * include/asm-v850/cacheflush.h
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_CACHEFLUSH_H__
15#define __V850_CACHEFLUSH_H__
16
17/* Somebody depends on this; sigh... */
18#include <linux/mm.h>
19
20#include <asm/machdep.h>
21
22
23/* The following are all used by the kernel in ways that only affect
24 systems with MMUs, so we don't need them. */
25#define flush_cache_all() ((void)0)
26#define flush_cache_mm(mm) ((void)0)
27#define flush_cache_range(vma, start, end) ((void)0)
28#define flush_cache_page(vma, vmaddr, pfn) ((void)0)
29#define flush_dcache_page(page) ((void)0)
30#define flush_dcache_mmap_lock(mapping) ((void)0)
31#define flush_dcache_mmap_unlock(mapping) ((void)0)
32#define flush_cache_vmap(start, end) ((void)0)
33#define flush_cache_vunmap(start, end) ((void)0)
34
35#ifdef CONFIG_NO_CACHE
36
37/* Some systems have no cache at all, in which case we don't need these
38 either. */
39#define flush_icache() ((void)0)
40#define flush_icache_range(start, end) ((void)0)
41#define flush_icache_page(vma,pg) ((void)0)
42#define flush_icache_user_range(vma,pg,adr,len) ((void)0)
43#define flush_cache_sigtramp(vaddr) ((void)0)
44
45#else /* !CONFIG_NO_CACHE */
46
47struct page;
48struct mm_struct;
49struct vm_area_struct;
50
51/* Otherwise, somebody had better define them. */
52extern void flush_icache (void);
53extern void flush_icache_range (unsigned long start, unsigned long end);
54extern void flush_icache_page (struct vm_area_struct *vma, struct page *page);
55extern void flush_icache_user_range (struct vm_area_struct *vma,
56 struct page *page,
57 unsigned long adr, int len);
58extern void flush_cache_sigtramp (unsigned long addr);
59
60#endif /* CONFIG_NO_CACHE */
61
62#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
63do { memcpy(dst, src, len); \
64 flush_icache_user_range(vma, page, vaddr, len); \
65} while (0)
66#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
67 memcpy(dst, src, len)
68
69#endif /* __V850_CACHEFLUSH_H__ */
diff --git a/include/asm-v850/checksum.h b/include/asm-v850/checksum.h
new file mode 100644
index 000000000000..d3aedb7bfc5c
--- /dev/null
+++ b/include/asm-v850/checksum.h
@@ -0,0 +1,115 @@
1/*
2 * include/asm-v850/checksum.h -- Checksum ops
3 *
4 * Copyright (C) 2001 NEC Corporation
5 * Copyright (C) 2001 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_CHECKSUM_H__
15#define __V850_CHECKSUM_H__
16
17/*
18 * computes the checksum of a memory block at buff, length len,
19 * and adds in "sum" (32-bit)
20 *
21 * returns a 32-bit number suitable for feeding into itself
22 * or csum_tcpudp_magic
23 *
24 * this function must be called with even lengths, except
25 * for the last fragment, which may be odd
26 *
27 * it's best to have buff aligned on a 32-bit boundary
28 */
29extern unsigned int csum_partial (const unsigned char * buff, int len,
30 unsigned int sum);
31
32/*
33 * the same as csum_partial, but copies from src while it
34 * checksums
35 *
36 * here even more important to align src and dst on a 32-bit (or even
37 * better 64-bit) boundary
38 */
39extern unsigned csum_partial_copy (const char *src, char *dst, int len,
40 unsigned sum);
41
42
43/*
44 * the same as csum_partial_copy, but copies from user space.
45 *
46 * here even more important to align src and dst on a 32-bit (or even
47 * better 64-bit) boundary
48 */
49extern unsigned csum_partial_copy_from_user (const char *src, char *dst,
50 int len, unsigned sum,
51 int *csum_err);
52
53#define csum_partial_copy_nocheck(src, dst, len, sum) \
54 csum_partial_copy ((src), (dst), (len), (sum))
55
56unsigned short ip_fast_csum (unsigned char *iph, unsigned int ihl);
57
58/*
59 * Fold a partial checksum
60 */
61static inline unsigned int csum_fold (unsigned long sum)
62{
63 unsigned int result;
64 /*
65 %0 %1
66 hsw %1, %0 H L L H
67 add %1, %0 H L H+L+C H+L
68 */
69 asm ("hsw %1, %0; add %1, %0" : "=&r" (result) : "r" (sum));
70 return (~result) >> 16;
71}
72
73
74/*
75 * computes the checksum of the TCP/UDP pseudo-header
76 * returns a 16-bit checksum, already complemented
77 */
78static inline unsigned int
79csum_tcpudp_nofold (unsigned long saddr, unsigned long daddr,
80 unsigned short len,
81 unsigned short proto, unsigned int sum)
82{
83 int __carry;
84 __asm__ ("add %2, %0;"
85 "setf c, %1;"
86 "add %1, %0;"
87 "add %3, %0;"
88 "setf c, %1;"
89 "add %1, %0;"
90 "add %4, %0;"
91 "setf c, %1;"
92 "add %1, %0"
93 : "=&r" (sum), "=&r" (__carry)
94 : "r" (daddr), "r" (saddr),
95 "r" (ntohs (len) + (proto << 8)),
96 "0" (sum));
97 return sum;
98}
99
100static inline unsigned short int
101csum_tcpudp_magic (unsigned long saddr, unsigned long daddr,
102 unsigned short len,
103 unsigned short proto, unsigned int sum)
104{
105 return csum_fold (csum_tcpudp_nofold (saddr, daddr, len, proto, sum));
106}
107
108/*
109 * this routine is used for miscellaneous IP-like checksums, mainly
110 * in icmp.c
111 */
112extern unsigned short ip_compute_csum (const unsigned char * buff, int len);
113
114
115#endif /* __V850_CHECKSUM_H__ */
diff --git a/include/asm-v850/clinkage.h b/include/asm-v850/clinkage.h
new file mode 100644
index 000000000000..2b622adccae5
--- /dev/null
+++ b/include/asm-v850/clinkage.h
@@ -0,0 +1,26 @@
1/*
2 * include/asm-v850/clinkage.h -- Macros to reflect C symbol-naming conventions
3 *
4 * Copyright (C) 2001,02 NEC Corporatione
5 * Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __CLINKAGE_H__
15#define __V850_CLINKAGE_H__
16
17#include <asm/macrology.h>
18#include <asm/asm.h>
19
20#define C_SYMBOL_NAME(name) macrology_paste(_, name)
21#define C_SYMBOL_STRING(name) macrology_stringify(C_SYMBOL_NAME(name))
22#define C_ENTRY(name) G_ENTRY(C_SYMBOL_NAME(name))
23#define C_DATA(name) G_DATA(C_SYMBOL_NAME(name))
24#define C_END(name) END(C_SYMBOL_NAME(name))
25
26#endif /* __V850_CLINKAGE_H__ */
diff --git a/include/asm-v850/cputime.h b/include/asm-v850/cputime.h
new file mode 100644
index 000000000000..7c799c33b8a9
--- /dev/null
+++ b/include/asm-v850/cputime.h
@@ -0,0 +1,6 @@
1#ifndef __V850_CPUTIME_H
2#define __V850_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __V850_CPUTIME_H */
diff --git a/include/asm-v850/current.h b/include/asm-v850/current.h
new file mode 100644
index 000000000000..30aae5673770
--- /dev/null
+++ b/include/asm-v850/current.h
@@ -0,0 +1,47 @@
1/*
2 * include/asm-v850/current.h -- Current task
3 *
4 * Copyright (C) 2001,02 NEC Corporation
5 * Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_CURRENT_H__
15#define __V850_CURRENT_H__
16
17#ifndef __ASSEMBLY__ /* <linux/thread_info.h> is not asm-safe. */
18#include <linux/thread_info.h>
19#endif
20
21#include <asm/macrology.h>
22
23
24/* Register used to hold the current task pointer while in the kernel.
25 Any `call clobbered' register without a special meaning should be OK,
26 but check asm/v850/kernel/entry.S to be sure. */
27#define CURRENT_TASK_REGNUM 16
28#define CURRENT_TASK macrology_paste (r, CURRENT_TASK_REGNUM)
29
30
31#ifdef __ASSEMBLY__
32
33/* Put a pointer to the current task structure into REG. */
34#define GET_CURRENT_TASK(reg) \
35 GET_CURRENT_THREAD(reg); \
36 ld.w TI_TASK[reg], reg
37
38#else /* !__ASSEMBLY__ */
39
40/* A pointer to the current task. */
41register struct task_struct *current \
42 __asm__ (macrology_stringify (CURRENT_TASK));
43
44#endif /* __ASSEMBLY__ */
45
46
47#endif /* _V850_CURRENT_H */
diff --git a/include/asm-v850/delay.h b/include/asm-v850/delay.h
new file mode 100644
index 000000000000..1ce65d48a7c5
--- /dev/null
+++ b/include/asm-v850/delay.h
@@ -0,0 +1,47 @@
1/*
2 * include/asm-v850/delay.h -- Delay routines, using a pre-computed
3 * "loops_per_second" value
4 *
5 * Copyright (C) 2001,03 NEC Corporation
6 * Copyright (C) 2001,03 Miles Bader <miles@gnu.org>
7 * Copyright (C) 1994 Hamish Macdonald
8 *
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file COPYING in the main directory of this
11 * archive for more details.
12 */
13
14#ifndef __V850_DELAY_H__
15#define __V850_DELAY_H__
16
17#include <asm/param.h>
18
19extern __inline__ void __delay(unsigned long loops)
20{
21 if (loops)
22 __asm__ __volatile__ ("1: add -1, %0; bnz 1b"
23 : "=r" (loops) : "0" (loops));
24}
25
26/*
27 * Use only for very small delays ( < 1 msec). Should probably use a
28 * lookup table, really, as the multiplications take much too long with
29 * short delays. This is a "reasonable" implementation, though (and the
30 * first constant multiplications gets optimized away if the delay is
31 * a constant)
32 */
33
34extern unsigned long loops_per_jiffy;
35
36extern __inline__ void udelay(unsigned long usecs)
37{
38 register unsigned long full_loops, part_loops;
39
40 full_loops = ((usecs * HZ) / 1000000) * loops_per_jiffy;
41 usecs %= (1000000 / HZ);
42 part_loops = (usecs * HZ * loops_per_jiffy) / 1000000;
43
44 __delay(full_loops + part_loops);
45}
46
47#endif /* __V850_DELAY_H__ */
diff --git a/include/asm-v850/div64.h b/include/asm-v850/div64.h
new file mode 100644
index 000000000000..6cd978cefb28
--- /dev/null
+++ b/include/asm-v850/div64.h
@@ -0,0 +1 @@
#include <asm-generic/div64.h>
diff --git a/include/asm-v850/dma-mapping.h b/include/asm-v850/dma-mapping.h
new file mode 100644
index 000000000000..c63fb50ec9ef
--- /dev/null
+++ b/include/asm-v850/dma-mapping.h
@@ -0,0 +1,12 @@
1#ifndef __V850_DMA_MAPPING_H__
2#define __V850_DMA_MAPPING_H__
3
4#include <linux/config.h>
5
6#ifdef CONFIG_PCI
7#include <asm-generic/dma-mapping.h>
8#else
9#include <asm-generic/dma-mapping-broken.h>
10#endif
11
12#endif /* __V850_DMA_MAPPING_H__ */
diff --git a/include/asm-v850/dma.h b/include/asm-v850/dma.h
new file mode 100644
index 000000000000..2369849e2d0a
--- /dev/null
+++ b/include/asm-v850/dma.h
@@ -0,0 +1,18 @@
1#ifndef __V850_DMA_H__
2#define __V850_DMA_H__
3
4/* What should this be? */
5#define MAX_DMA_ADDRESS 0xFFFFFFFF
6
7/* reserve a DMA channel */
8extern int request_dma (unsigned int dmanr, const char * device_id);
9/* release it again */
10extern void free_dma (unsigned int dmanr);
11
12#ifdef CONFIG_PCI
13extern int isa_dma_bridge_buggy;
14#else
15#define isa_dma_bridge_buggy (0)
16#endif
17
18#endif /* __V850_DMA_H__ */
diff --git a/include/asm-v850/elf.h b/include/asm-v850/elf.h
new file mode 100644
index 000000000000..7db8edffb1c6
--- /dev/null
+++ b/include/asm-v850/elf.h
@@ -0,0 +1,101 @@
1#ifndef __V850_ELF_H__
2#define __V850_ELF_H__
3
4/*
5 * ELF register definitions..
6 */
7
8#include <asm/ptrace.h>
9#include <asm/user.h>
10#include <asm/byteorder.h>
11
12typedef unsigned long elf_greg_t;
13
14#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
15typedef elf_greg_t elf_gregset_t[ELF_NGREG];
16
17typedef struct user_fpu_struct elf_fpregset_t;
18
19/*
20 * This is used to ensure we don't load something for the wrong architecture.
21 */
22#define elf_check_arch(x) \
23 ((x)->e_machine == EM_V850 || (x)->e_machine == EM_CYGNUS_V850)
24
25
26/* v850 relocation types. */
27#define R_V850_NONE 0
28#define R_V850_9_PCREL 1
29#define R_V850_22_PCREL 2
30#define R_V850_HI16_S 3
31#define R_V850_HI16 4
32#define R_V850_LO16 5
33#define R_V850_32 6
34#define R_V850_16 7
35#define R_V850_8 8
36#define R_V850_SDA_16_16_OFFSET 9 /* For ld.b, st.b, set1, clr1,
37 not1, tst1, movea, movhi */
38#define R_V850_SDA_15_16_OFFSET 10 /* For ld.w, ld.h, ld.hu, st.w, st.h */
39#define R_V850_ZDA_16_16_OFFSET 11 /* For ld.b, st.b, set1, clr1,
40 not1, tst1, movea, movhi */
41#define R_V850_ZDA_15_16_OFFSET 12 /* For ld.w, ld.h, ld.hu, st.w, st.h */
42#define R_V850_TDA_6_8_OFFSET 13 /* For sst.w, sld.w */
43#define R_V850_TDA_7_8_OFFSET 14 /* For sst.h, sld.h */
44#define R_V850_TDA_7_7_OFFSET 15 /* For sst.b, sld.b */
45#define R_V850_TDA_16_16_OFFSET 16 /* For set1, clr1, not1, tst1,
46 movea, movhi */
47#define R_V850_NUM 17
48
49
50/*
51 * These are used to set parameters in the core dumps.
52 */
53#define ELF_CLASS ELFCLASS32
54#ifdef __LITTLE_ENDIAN__
55#define ELF_DATA ELFDATA2LSB
56#else
57#define ELF_DATA ELFDATA2MSB
58#endif
59#define ELF_ARCH EM_V850
60
61#define USE_ELF_CORE_DUMP
62#define ELF_EXEC_PAGESIZE 4096
63
64
65#define ELF_CORE_COPY_REGS(_dest,_regs) \
66 memcpy((char *) &_dest, (char *) _regs, \
67 sizeof(struct pt_regs));
68
69/* This yields a mask that user programs can use to figure out what
70 instruction set this CPU supports. This could be done in user space,
71 but it's not easy, and we've already done it here. */
72
73#define ELF_HWCAP (0)
74
75/* This yields a string that ld.so will use to load implementation
76 specific libraries for optimization. This is more specific in
77 intent than poking at uname or /proc/cpuinfo.
78
79 For the moment, we have only optimizations for the Intel generations,
80 but that could change... */
81
82#define ELF_PLATFORM (NULL)
83
84#define ELF_PLAT_INIT(_r, load_addr) \
85 do { \
86 _r->gpr[0] = _r->gpr[1] = _r->gpr[2] = _r->gpr[3] = \
87 _r->gpr[4] = _r->gpr[5] = _r->gpr[6] = _r->gpr[7] = \
88 _r->gpr[8] = _r->gpr[9] = _r->gpr[10] = _r->gpr[11] = \
89 _r->gpr[12] = _r->gpr[13] = _r->gpr[14] = _r->gpr[15] = \
90 _r->gpr[16] = _r->gpr[17] = _r->gpr[18] = _r->gpr[19] = \
91 _r->gpr[20] = _r->gpr[21] = _r->gpr[22] = _r->gpr[23] = \
92 _r->gpr[24] = _r->gpr[25] = _r->gpr[26] = _r->gpr[27] = \
93 _r->gpr[28] = _r->gpr[29] = _r->gpr[30] = _r->gpr[31] = \
94 0; \
95 } while (0)
96
97#ifdef __KERNEL__
98#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
99#endif
100
101#endif /* __V850_ELF_H__ */
diff --git a/include/asm-v850/entry.h b/include/asm-v850/entry.h
new file mode 100644
index 000000000000..d9df8ac48584
--- /dev/null
+++ b/include/asm-v850/entry.h
@@ -0,0 +1,113 @@
1/*
2 * include/asm-v850/entry.h -- Definitions used by low-level trap handlers
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_ENTRY_H__
15#define __V850_ENTRY_H__
16
17
18#include <asm/ptrace.h>
19#include <asm/machdep.h>
20
21
22/* These are special variables using by the kernel trap/interrupt code
23 to save registers in, at a time when there are no spare registers we
24 can use to do so, and we can't depend on the value of the stack
25 pointer. This means that they must be within a signed 16-bit
26 displacement of 0x00000000. */
27
28#define KERNEL_VAR_SPACE_ADDR R0_RAM_ADDR
29
30#ifdef __ASSEMBLY__
31#define KERNEL_VAR(addr) addr[r0]
32#else
33#define KERNEL_VAR(addr) (*(volatile unsigned long *)(addr))
34#endif
35
36/* Kernel stack pointer, 4 bytes. */
37#define KSP_ADDR (KERNEL_VAR_SPACE_ADDR + 0)
38#define KSP KERNEL_VAR (KSP_ADDR)
39/* 1 if in kernel-mode, 0 if in user mode, 1 byte. */
40#define KM_ADDR (KERNEL_VAR_SPACE_ADDR + 4)
41#define KM KERNEL_VAR (KM_ADDR)
42/* Temporary storage for interrupt handlers, 4 bytes. */
43#define INT_SCRATCH_ADDR (KERNEL_VAR_SPACE_ADDR + 8)
44#define INT_SCRATCH KERNEL_VAR (INT_SCRATCH_ADDR)
45/* Where the stack-pointer is saved when jumping to various sorts of
46 interrupt handlers. ENTRY_SP is used by everything except NMIs,
47 which have their own location. Higher-priority NMIs can clobber the
48 value written by a lower priority NMI, since they can't be disabled,
49 but that's OK, because only NMI0 (the lowest-priority one) is allowed
50 to return. */
51#define ENTRY_SP_ADDR (KERNEL_VAR_SPACE_ADDR + 12)
52#define ENTRY_SP KERNEL_VAR (ENTRY_SP_ADDR)
53#define NMI_ENTRY_SP_ADDR (KERNEL_VAR_SPACE_ADDR + 16)
54#define NMI_ENTRY_SP KERNEL_VAR (NMI_ENTRY_SP_ADDR)
55
56#ifdef CONFIG_RESET_GUARD
57/* Used to detect unexpected resets (since the v850 has no MMU, any call
58 through a null pointer will jump to the reset vector). We detect
59 such resets by checking for a magic value, RESET_GUARD_ACTIVE, in
60 this location. Properly resetting the machine stores zero there, so
61 it shouldn't trigger the guard; the power-on value is uncertain, but
62 it's unlikely to be RESET_GUARD_ACTIVE. */
63#define RESET_GUARD_ADDR (KERNEL_VAR_SPACE_ADDR + 28)
64#define RESET_GUARD KERNEL_VAR (RESET_GUARD_ADDR)
65#define RESET_GUARD_ACTIVE 0xFAB4BEEF
66#endif /* CONFIG_RESET_GUARD */
67
68#ifdef CONFIG_V850E_HIGHRES_TIMER
69#define HIGHRES_TIMER_SLOW_TICKS_ADDR (KERNEL_VAR_SPACE_ADDR + 32)
70#define HIGHRES_TIMER_SLOW_TICKS KERNEL_VAR (HIGHRES_TIMER_SLOW_TICKS_ADDR)
71#endif /* CONFIG_V850E_HIGHRES_TIMER */
72
73#ifndef __ASSEMBLY__
74
75#ifdef CONFIG_RESET_GUARD
76/* Turn off reset guard, so that resetting the machine works normally.
77 This should be called in the various machine_halt, etc., functions. */
78static inline void disable_reset_guard (void)
79{
80 RESET_GUARD = 0;
81}
82#endif /* CONFIG_RESET_GUARD */
83
84#endif /* !__ASSEMBLY__ */
85
86
87/* A `state save frame' is a struct pt_regs preceded by some extra space
88 suitable for a function call stack frame. */
89
90/* Amount of room on the stack reserved for arguments and to satisfy the
91 C calling conventions, in addition to the space used by the struct
92 pt_regs that actually holds saved values. */
93#define STATE_SAVE_ARG_SPACE (6*4) /* Up to six arguments. */
94
95
96#ifdef __ASSEMBLY__
97
98/* The size of a state save frame. */
99#define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE)
100
101#else /* !__ASSEMBLY__ */
102
103/* The size of a state save frame. */
104#define STATE_SAVE_SIZE (sizeof (struct pt_regs) + STATE_SAVE_ARG_SPACE)
105
106#endif /* __ASSEMBLY__ */
107
108
109/* Offset of the struct pt_regs in a state save frame. */
110#define STATE_SAVE_PT_OFFSET STATE_SAVE_ARG_SPACE
111
112
113#endif /* __V850_ENTRY_H__ */
diff --git a/include/asm-v850/errno.h b/include/asm-v850/errno.h
new file mode 100644
index 000000000000..31c91df01205
--- /dev/null
+++ b/include/asm-v850/errno.h
@@ -0,0 +1,6 @@
1#ifndef __V850_ERRNO_H__
2#define __V850_ERRNO_H__
3
4#include <asm-generic/errno.h>
5
6#endif /* __V850_ERRNO_H__ */
diff --git a/include/asm-v850/fcntl.h b/include/asm-v850/fcntl.h
new file mode 100644
index 000000000000..31d4b5961221
--- /dev/null
+++ b/include/asm-v850/fcntl.h
@@ -0,0 +1,87 @@
1#ifndef __V850_FCNTL_H__
2#define __V850_FCNTL_H__
3
4/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
5 located on an ext2 file system */
6#define O_ACCMODE 0003
7#define O_RDONLY 00
8#define O_WRONLY 01
9#define O_RDWR 02
10#define O_CREAT 0100 /* not fcntl */
11#define O_EXCL 0200 /* not fcntl */
12#define O_NOCTTY 0400 /* not fcntl */
13#define O_TRUNC 01000 /* not fcntl */
14#define O_APPEND 02000
15#define O_NONBLOCK 04000
16#define O_NDELAY O_NONBLOCK
17#define O_SYNC 010000
18#define FASYNC 020000 /* fcntl, for BSD compatibility */
19#define O_DIRECTORY 040000 /* must be a directory */
20#define O_NOFOLLOW 0100000 /* don't follow links */
21#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */
22#define O_LARGEFILE 0400000
23#define O_NOATIME 01000000
24
25#define F_DUPFD 0 /* dup */
26#define F_GETFD 1 /* get close_on_exec */
27#define F_SETFD 2 /* set/clear close_on_exec */
28#define F_GETFL 3 /* get file->f_flags */
29#define F_SETFL 4 /* set file->f_flags */
30#define F_GETLK 5
31#define F_SETLK 6
32#define F_SETLKW 7
33
34#define F_SETOWN 8 /* for sockets. */
35#define F_GETOWN 9 /* for sockets. */
36#define F_SETSIG 10 /* for sockets. */
37#define F_GETSIG 11 /* for sockets. */
38
39#define F_GETLK64 12 /* using 'struct flock64' */
40#define F_SETLK64 13
41#define F_SETLKW64 14
42
43/* for F_[GET|SET]FL */
44#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
45
46/* for posix fcntl() and lockf() */
47#define F_RDLCK 0
48#define F_WRLCK 1
49#define F_UNLCK 2
50
51/* for old implementation of bsd flock () */
52#define F_EXLCK 4 /* or 3 */
53#define F_SHLCK 8 /* or 4 */
54
55/* for leases */
56#define F_INPROGRESS 16
57
58/* operations for bsd flock(), also used by the kernel implementation */
59#define LOCK_SH 1 /* shared lock */
60#define LOCK_EX 2 /* exclusive lock */
61#define LOCK_NB 4 /* or'd with one of the above to prevent
62 blocking */
63#define LOCK_UN 8 /* remove lock */
64
65#define LOCK_MAND 32 /* This is a mandatory flock */
66#define LOCK_READ 64 /* ... Which allows concurrent read operations */
67#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */
68#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */
69
70struct flock {
71 short l_type;
72 short l_whence;
73 off_t l_start;
74 off_t l_len;
75 pid_t l_pid;
76};
77
78struct flock64 {
79 short l_type;
80 short l_whence;
81 loff_t l_start;
82 loff_t l_len;
83 pid_t l_pid;
84};
85
86#define F_LINUX_SPECIFIC_BASE 1024
87#endif /* __V850_FCNTL_H__ */
diff --git a/include/asm-v850/flat.h b/include/asm-v850/flat.h
new file mode 100644
index 000000000000..3888f59d6881
--- /dev/null
+++ b/include/asm-v850/flat.h
@@ -0,0 +1,131 @@
1/*
2 * include/asm-v850/flat.h -- uClinux flat-format executables
3 *
4 * Copyright (C) 2002,03 NEC Electronics Corporation
5 * Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_FLAT_H__
15#define __V850_FLAT_H__
16
17/* The amount by which a relocation can exceed the program image limits
18 without being regarded as an error. On the v850, the relocations of
19 some base-pointers can be offset by 0x8000 (to allow better usage of the
20 space offered by 16-bit signed offsets -- in most cases the offsets used
21 with such a base-pointer will be negative). */
22
23#define flat_reloc_valid(reloc, size) ((reloc) <= (size + 0x8000))
24
25#define flat_stack_align(sp) /* nothing needed */
26#define flat_argvp_envp_on_stack() 0
27#define flat_old_ram_flag(flags) (flags)
28
29/* We store the type of relocation in the top 4 bits of the `relval.' */
30
31/* Convert a relocation entry into an address. */
32static inline unsigned long
33flat_get_relocate_addr (unsigned long relval)
34{
35 return relval & 0x0fffffff; /* Mask out top 4-bits */
36}
37
38#define flat_v850_get_reloc_type(relval) ((relval) >> 28)
39
40#define FLAT_V850_R_32 0 /* Normal 32-bit reloc */
41#define FLAT_V850_R_HI16S_LO15 1 /* High 16-bits + signed 15-bit low field */
42#define FLAT_V850_R_HI16S_LO16 2 /* High 16-bits + signed 16-bit low field */
43
44/* Extract the address to be relocated from the symbol reference at RP;
45 RELVAL is the raw relocation-table entry from which RP is derived.
46 For the v850, RP should always be half-word aligned. */
47static inline unsigned long flat_get_addr_from_rp (unsigned long *rp,
48 unsigned long relval,
49 unsigned long flags)
50{
51 short *srp = (short *)rp;
52
53 switch (flat_v850_get_reloc_type (relval))
54 {
55 case FLAT_V850_R_32:
56 /* Simple 32-bit address. */
57 return srp[0] | (srp[1] << 16);
58
59 case FLAT_V850_R_HI16S_LO16:
60 /* The high and low halves of the address are in the 16
61 bits at RP, and the 2nd word of the 32-bit instruction
62 following that, respectively. The low half is _signed_
63 so we have to sign-extend it and add it to the upper
64 half instead of simply or-ing them together.
65
66 Unlike most relocated address, this one is stored in
67 native (little-endian) byte-order to avoid problems with
68 trashing the low-order bit, so we have to convert to
69 network-byte-order before returning, as that's what the
70 caller expects. */
71 return htonl ((srp[0] << 16) + srp[2]);
72
73 case FLAT_V850_R_HI16S_LO15:
74 /* The high and low halves of the address are in the 16
75 bits at RP, and the upper 15 bits of the 2nd word of the
76 32-bit instruction following that, respectively. The
77 low half is _signed_ so we have to sign-extend it and
78 add it to the upper half instead of simply or-ing them
79 together. The lowest bit is always zero.
80
81 Unlike most relocated address, this one is stored in
82 native (little-endian) byte-order to avoid problems with
83 trashing the low-order bit, so we have to convert to
84 network-byte-order before returning, as that's what the
85 caller expects. */
86 return htonl ((srp[0] << 16) + (srp[2] & ~0x1));
87
88 default:
89 return ~0; /* bogus value */
90 }
91}
92
93/* Insert the address ADDR into the symbol reference at RP;
94 RELVAL is the raw relocation-table entry from which RP is derived.
95 For the v850, RP should always be half-word aligned. */
96static inline void flat_put_addr_at_rp (unsigned long *rp, unsigned long addr,
97 unsigned long relval)
98{
99 short *srp = (short *)rp;
100
101 switch (flat_v850_get_reloc_type (relval)) {
102 case FLAT_V850_R_32:
103 /* Simple 32-bit address. */
104 srp[0] = addr & 0xFFFF;
105 srp[1] = (addr >> 16);
106 break;
107
108 case FLAT_V850_R_HI16S_LO16:
109 /* The high and low halves of the address are in the 16
110 bits at RP, and the 2nd word of the 32-bit instruction
111 following that, respectively. The low half is _signed_
112 so we must carry its sign bit to the upper half before
113 writing the upper half. */
114 srp[0] = (addr >> 16) + ((addr >> 15) & 0x1);
115 srp[2] = addr & 0xFFFF;
116 break;
117
118 case FLAT_V850_R_HI16S_LO15:
119 /* The high and low halves of the address are in the 16
120 bits at RP, and the upper 15 bits of the 2nd word of the
121 32-bit instruction following that, respectively. The
122 low half is _signed_ so we must carry its sign bit to
123 the upper half before writing the upper half. The
124 lowest bit we preserve from the existing instruction. */
125 srp[0] = (addr >> 16) + ((addr >> 15) & 0x1);
126 srp[2] = (addr & 0xFFFE) | (srp[2] & 0x1);
127 break;
128 }
129}
130
131#endif /* __V850_FLAT_H__ */
diff --git a/include/asm-v850/fpga85e2c.h b/include/asm-v850/fpga85e2c.h
new file mode 100644
index 000000000000..d32f04504b13
--- /dev/null
+++ b/include/asm-v850/fpga85e2c.h
@@ -0,0 +1,88 @@
1/*
2 * include/asm-v850/fpga85e2c.h -- Machine-dependent defs for
3 * FPGA implementation of V850E2/NA85E2C
4 *
5 * Copyright (C) 2002,03 NEC Electronics Corporation
6 * Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 *
12 * Written by Miles Bader <miles@gnu.org>
13 */
14
15#ifndef __V850_FPGA85E2C_H__
16#define __V850_FPGA85E2C_H__
17
18#include <asm/v850e2.h>
19#include <asm/clinkage.h>
20
21
22#define CPU_MODEL "v850e2/fpga85e2c"
23#define CPU_MODEL_LONG "NEC V850E2/NA85E2C"
24#define PLATFORM "fpga85e2c"
25#define PLATFORM_LONG "NA85E2C FPGA implementation"
26
27
28/* `external ram'. */
29#define ERAM_ADDR 0
30#define ERAM_SIZE 0x00100000 /* 1MB */
31
32
33/* FPGA specific control registers. */
34
35/* Writing a non-zero value to FLGREG(0) will signal the controlling CPU
36 to stop execution. */
37#define FLGREG_ADDR(n) (0xFFE80100 + 2*(n))
38#define FLGREG(n) (*(volatile unsigned char *)FLGREG_ADDR (n))
39#define FLGREG_NUM 2
40
41#define CSDEV_ADDR(n) (0xFFE80110 + 2*(n))
42#define CSDEV(n) (*(volatile unsigned char *)CSDEV_ADDR (n))
43
44
45/* Timer interrupts 0-3, interrupt at intervals from CLK/4096 to CLK/16384. */
46#define IRQ_RPU(n) (60 + (n))
47#define IRQ_RPU_NUM 4
48
49/* For <asm/irq.h> */
50#define NUM_CPU_IRQS 64
51
52
53/* General-purpose timer. */
54/* control/status register (can only be read/written via bit insns) */
55#define RPU_GTMC_ADDR 0xFFFFFB00
56#define RPU_GTMC (*(volatile unsigned char *)RPU_GTMC_ADDR)
57#define RPU_GTMC_CE_BIT 7 /* clock enable (control) */
58#define RPU_GTMC_OV_BIT 6 /* overflow (status) */
59#define RPU_GTMC_CLK_BIT 1 /* 0 = .5 MHz CLK, 1 = 1 Mhz (control) */
60/* 32-bit count (8 least-significant bits are always zero). */
61#define RPU_GTM_ADDR 0xFFFFFB28
62#define RPU_GTM (*(volatile unsigned long *)RPU_GTMC_ADDR)
63
64
65/* For <asm/page.h> */
66#define PAGE_OFFSET ERAM_ADDR /* minimum allocatable address */
67
68
69/* For <asm/entry.h> */
70/* `R0 RAM', used for a few miscellaneous variables that must be accessible
71 using a load instruction relative to R0. The FPGA implementation
72 actually has no on-chip RAM, so we use part of main ram just after the
73 interrupt vectors. */
74#ifdef __ASSEMBLY__
75#define R0_RAM_ADDR lo(C_SYMBOL_NAME(_r0_ram))
76#else
77extern char _r0_ram;
78#define R0_RAM_ADDR ((unsigned long)&_r0_ram);
79#endif
80
81
82/* For <asm/param.h> */
83#ifndef HZ
84#define HZ 122 /* actually, 8.192ms ticks =~ 122.07 */
85#endif
86
87
88#endif /* __V850_FPGA85E2C_H__ */
diff --git a/include/asm-v850/gbus_int.h b/include/asm-v850/gbus_int.h
new file mode 100644
index 000000000000..0c4bce753c7e
--- /dev/null
+++ b/include/asm-v850/gbus_int.h
@@ -0,0 +1,97 @@
1/*
2 * include/asm-v850/gbus_int.h -- Midas labs GBUS interrupt support
3 *
4 * Copyright (C) 2001,02 NEC Corporation
5 * Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_GBUS_INT_H__
15#define __V850_GBUS_INT_H__
16
17
18/* The GBUS interrupt interface has 32 interrupts shared among 4
19 processor interrupts. The 32 GBUS interrupts are divided into two
20 sets of 16 each, for allocating among control registers, etc (there
21 are two of each control register, with bits 0-15 controlling an
22 interrupt each). */
23
24/* The GBUS interrupts themselves. */
25#define IRQ_GBUS_INT(n) (GBUS_INT_BASE_IRQ + (n))
26#define IRQ_GBUS_INT_NUM 32
27
28/* Control registers. */
29#define GBUS_INT_STATUS_ADDR(w) (GBUS_INT_BASE_ADDR + (w)*0x40)
30#define GBUS_INT_STATUS(w) (*(volatile u16 *)GBUS_INT_STATUS_ADDR(w))
31#define GBUS_INT_CLEAR_ADDR(w) (GBUS_INT_BASE_ADDR + 0x10 + (w)*0x40)
32#define GBUS_INT_CLEAR(w) (*(volatile u16 *)GBUS_INT_CLEAR_ADDR(w))
33#define GBUS_INT_EDGE_ADDR(w) (GBUS_INT_BASE_ADDR + 0x20 + (w)*0x40)
34#define GBUS_INT_EDGE(w) (*(volatile u16 *)GBUS_INT_EDGE_ADDR(w))
35#define GBUS_INT_POLARITY_ADDR(w) (GBUS_INT_BASE_ADDR + 0x30 + (w)*0x40)
36#define GBUS_INT_POLARITY(w) (*(volatile u16 *)GBUS_INT_POLARITY_ADDR(w))
37/* This allows enabling interrupt bits in word W for interrupt GINTn. */
38#define GBUS_INT_ENABLE_ADDR(w, n) \
39 (GBUS_INT_BASE_ADDR + 0x100 + (w)*0x10 + (n)*0x20)
40#define GBUS_INT_ENABLE(w, n) (*(volatile u16 *)GBUS_INT_ENABLE_ADDR(w, n))
41
42/* Mapping between kernel interrupt numbers and hardware control regs/bits. */
43#define GBUS_INT_BITS_PER_WORD 16
44#define GBUS_INT_NUM_WORDS (IRQ_GBUS_INT_NUM / GBUS_INT_BITS_PER_WORD)
45#define GBUS_INT_IRQ_WORD(irq) (((irq) - GBUS_INT_BASE_IRQ) >> 4)
46#define GBUS_INT_IRQ_BIT(irq) (((irq) - GBUS_INT_BASE_IRQ) & 0xF)
47#define GBUS_INT_IRQ_MASK(irq) (1 << GBUS_INT_IRQ_BIT(irq))
48
49
50/* Possible priorities for GBUS interrupts. */
51#define GBUS_INT_PRIORITY_HIGH 2
52#define GBUS_INT_PRIORITY_MEDIUM 4
53#define GBUS_INT_PRIORITY_LOW 6
54
55
56#ifndef __ASSEMBLY__
57
58/* Enable interrupt handling for interrupt IRQ. */
59extern void gbus_int_enable_irq (unsigned irq);
60/* Disable interrupt handling for interrupt IRQ. Note that any
61 interrupts received while disabled will be delivered once the
62 interrupt is enabled again, unless they are explicitly cleared using
63 `gbus_int_clear_pending_irq'. */
64extern void gbus_int_disable_irq (unsigned irq);
65/* Return true if interrupt handling for interrupt IRQ is enabled. */
66extern int gbus_int_irq_enabled (unsigned irq);
67/* Disable all GBUS irqs. */
68extern void gbus_int_disable_irqs (void);
69/* Clear any pending interrupts for IRQ. */
70extern void gbus_int_clear_pending_irq (unsigned irq);
71/* Return true if interrupt IRQ is pending (but disabled). */
72extern int gbus_int_irq_pending (unsigned irq);
73
74
75struct gbus_int_irq_init {
76 const char *name; /* name of interrupt type */
77
78 /* Range of kernel irq numbers for this type:
79 BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM */
80 unsigned base, num, interval;
81
82 unsigned priority; /* interrupt priority to assign */
83};
84struct hw_interrupt_type; /* fwd decl */
85
86/* Initialize HW_IRQ_TYPES for GBUS irqs described in array
87 INITS (which is terminated by an entry with the name field == 0). */
88extern void gbus_int_init_irq_types (struct gbus_int_irq_init *inits,
89 struct hw_interrupt_type *hw_irq_types);
90
91/* Initialize GBUS interrupts. */
92extern void gbus_int_init_irqs (void);
93
94#endif /* !__ASSEMBLY__ */
95
96
97#endif /* __V850_GBUS_INT_H__ */
diff --git a/include/asm-v850/hardirq.h b/include/asm-v850/hardirq.h
new file mode 100644
index 000000000000..5dfca8047cbe
--- /dev/null
+++ b/include/asm-v850/hardirq.h
@@ -0,0 +1,25 @@
1#ifndef __V850_HARDIRQ_H__
2#define __V850_HARDIRQ_H__
3
4#include <linux/config.h>
5#include <linux/threads.h>
6#include <linux/cache.h>
7
8typedef struct {
9 unsigned int __softirq_pending;
10} ____cacheline_aligned irq_cpustat_t;
11
12#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
13
14#define HARDIRQ_BITS 8
15
16/*
17 * The hardirq mask has to be large enough to have
18 * space for potentially all IRQ sources in the system
19 * nesting on a single CPU:
20 */
21#if (1 << HARDIRQ_BITS) < NR_IRQS
22# error HARDIRQ_BITS is too low!
23#endif
24
25#endif /* __V850_HARDIRQ_H__ */
diff --git a/include/asm-v850/highres_timer.h b/include/asm-v850/highres_timer.h
new file mode 100644
index 000000000000..486fb49ceab6
--- /dev/null
+++ b/include/asm-v850/highres_timer.h
@@ -0,0 +1,44 @@
1/*
2 * include/asm-v850/highres_timer.h -- High resolution timing routines
3 *
4 * Copyright (C) 2001,03 NEC Electronics Corporation
5 * Copyright (C) 2001,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_HIGHRES_TIMER_H__
15#define __V850_HIGHRES_TIMER_H__
16
17#ifndef __ASSEMBLY__
18#include <linux/time.h>
19#endif
20
21#include <asm/entry.h>
22
23
24/* Frequency of the `slow ticks' (one tick each time the fast-tick
25 counter overflows). */
26#define HIGHRES_TIMER_SLOW_TICK_RATE 25
27
28/* Which timer in the V850E `Timer D' we use. */
29#define HIGHRES_TIMER_TIMER_D_UNIT 3
30
31
32#ifndef __ASSEMBLY__
33
34extern void highres_timer_start (void), highres_timer_stop (void);
35extern void highres_timer_reset (void);
36extern void highres_timer_read_ticks (u32 *slow_ticks, u32 *fast_ticks);
37extern void highres_timer_ticks_to_timeval (u32 slow_ticks, u32 fast_ticks,
38 struct timeval *tv);
39extern void highres_timer_read (struct timeval *tv);
40
41#endif /* !__ASSEMBLY__ */
42
43
44#endif /* __V850_HIGHRES_TIMER_H__ */
diff --git a/include/asm-v850/hw_irq.h b/include/asm-v850/hw_irq.h
new file mode 100644
index 000000000000..4bdc98edb9f8
--- /dev/null
+++ b/include/asm-v850/hw_irq.h
@@ -0,0 +1,8 @@
1#ifndef __V850_HW_IRQ_H__
2#define __V850_HW_IRQ_H__
3
4extern inline void hw_resend_irq (struct hw_interrupt_type *h, unsigned int i)
5{
6}
7
8#endif /* __V850_HW_IRQ_H__ */
diff --git a/include/asm-v850/io.h b/include/asm-v850/io.h
new file mode 100644
index 000000000000..bb5efd1b4b7d
--- /dev/null
+++ b/include/asm-v850/io.h
@@ -0,0 +1,133 @@
1/*
2 * include/asm-v850/io.h -- Misc I/O operations
3 *
4 * Copyright (C) 2001,02,03,04 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03,04 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_IO_H__
15#define __V850_IO_H__
16
17#define IO_SPACE_LIMIT 0xFFFFFFFF
18
19#define readb(addr) \
20 ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
21#define readw(addr) \
22 ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
23#define readl(addr) \
24 ({ unsigned long __v = (*(volatile unsigned long *) (addr)); __v; })
25
26#define readb_relaxed(a) readb(a)
27#define readw_relaxed(a) readw(a)
28#define readl_relaxed(a) readl(a)
29
30#define writeb(b, addr) \
31 (void)((*(volatile unsigned char *) (addr)) = (b))
32#define writew(b, addr) \
33 (void)((*(volatile unsigned short *) (addr)) = (b))
34#define writel(b, addr) \
35 (void)((*(volatile unsigned int *) (addr)) = (b))
36
37#define __raw_readb readb
38#define __raw_readw readw
39#define __raw_readl readl
40#define __raw_writeb writeb
41#define __raw_writew writew
42#define __raw_writel writel
43
44#define inb(addr) readb (addr)
45#define inw(addr) readw (addr)
46#define inl(addr) readl (addr)
47#define outb(x, addr) ((void) writeb (x, addr))
48#define outw(x, addr) ((void) writew (x, addr))
49#define outl(x, addr) ((void) writel (x, addr))
50
51#define inb_p(port) inb((port))
52#define outb_p(val, port) outb((val), (port))
53#define inw_p(port) inw((port))
54#define outw_p(val, port) outw((val), (port))
55#define inl_p(port) inl((port))
56#define outl_p(val, port) outl((val), (port))
57
58static inline void insb (unsigned long port, void *dst, unsigned long count)
59{
60 unsigned char *p = dst;
61 while (count--)
62 *p++ = inb (port);
63}
64static inline void insw (unsigned long port, void *dst, unsigned long count)
65{
66 unsigned short *p = dst;
67 while (count--)
68 *p++ = inw (port);
69}
70static inline void insl (unsigned long port, void *dst, unsigned long count)
71{
72 unsigned long *p = dst;
73 while (count--)
74 *p++ = inl (port);
75}
76
77static inline void
78outsb (unsigned long port, const void *src, unsigned long count)
79{
80 const unsigned char *p = src;
81 while (count--)
82 outb (*p++, port);
83}
84static inline void
85outsw (unsigned long port, const void *src, unsigned long count)
86{
87 const unsigned short *p = src;
88 while (count--)
89 outw (*p++, port);
90}
91static inline void
92outsl (unsigned long port, const void *src, unsigned long count)
93{
94 const unsigned long *p = src;
95 while (count--)
96 outl (*p++, port);
97}
98
99#define iounmap(addr) ((void)0)
100#define ioremap(physaddr, size) (physaddr)
101#define ioremap_nocache(physaddr, size) (physaddr)
102#define ioremap_writethrough(physaddr, size) (physaddr)
103#define ioremap_fullcache(physaddr, size) (physaddr)
104
105#define mmiowb()
106
107#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
108#if 0
109/* This is really stupid; don't define it. */
110#define page_to_bus(page) page_to_phys (page)
111#endif
112
113/* Conversion between virtual and physical mappings. */
114#define mm_ptov(addr) ((void *)__phys_to_virt (addr))
115#define mm_vtop(addr) ((unsigned long)__virt_to_phys (addr))
116#define phys_to_virt(addr) ((void *)__phys_to_virt (addr))
117#define virt_to_phys(addr) ((unsigned long)__virt_to_phys (addr))
118
119#define memcpy_fromio(dst, src, len) memcpy (dst, (void *)src, len)
120#define memcpy_toio(dst, src, len) memcpy ((void *)dst, src, len)
121
122/*
123 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
124 * access
125 */
126#define xlate_dev_mem_ptr(p) __va(p)
127
128/*
129 * Convert a virtual cached pointer to an uncached pointer
130 */
131#define xlate_dev_kmem_ptr(p) p
132
133#endif /* __V850_IO_H__ */
diff --git a/include/asm-v850/ioctl.h b/include/asm-v850/ioctl.h
new file mode 100644
index 000000000000..1765df6c7b87
--- /dev/null
+++ b/include/asm-v850/ioctl.h
@@ -0,0 +1,80 @@
1/* $Id: ioctl.h,v 1.1 2002/09/28 14:58:41 gerg Exp $
2 *
3 * linux/ioctl.h for Linux by H.H. Bergman.
4 */
5
6#ifndef _V850_IOCTL_H
7#define _V850_IOCTL_H
8
9/* ioctl command encoding: 32 bits total, command in lower 16 bits,
10 * size of the parameter structure in the lower 14 bits of the
11 * upper 16 bits.
12 * Encoding the size of the parameter structure in the ioctl request
13 * is useful for catching programs compiled with old versions
14 * and to avoid overwriting user space outside the user buffer area.
15 * The highest 2 bits are reserved for indicating the ``access mode''.
16 * NOTE: This limits the max parameter size to 16kB -1 !
17 */
18
19/*
20 * I don't really have any idea about what this should look like, so
21 * for the time being, this is heavily based on the PC definitions.
22 */
23
24/*
25 * The following is for compatibility across the various Linux
26 * platforms. The i386 ioctl numbering scheme doesn't really enforce
27 * a type field. De facto, however, the top 8 bits of the lower 16
28 * bits are indeed used as a type field, so we might just as well make
29 * this explicit here. Please be sure to use the decoding macros
30 * below from now on.
31 */
32#define _IOC_NRBITS 8
33#define _IOC_TYPEBITS 8
34#define _IOC_SIZEBITS 14
35#define _IOC_DIRBITS 2
36
37#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1)
38#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1)
39#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1)
40#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1)
41
42#define _IOC_NRSHIFT 0
43#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS)
44#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS)
45#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS)
46
47/*
48 * Direction bits.
49 */
50#define _IOC_NONE 0U
51#define _IOC_WRITE 1U
52#define _IOC_READ 2U
53
54#define _IOC(dir,type,nr,size) \
55 (((dir) << _IOC_DIRSHIFT) | \
56 ((type) << _IOC_TYPESHIFT) | \
57 ((nr) << _IOC_NRSHIFT) | \
58 ((size) << _IOC_SIZESHIFT))
59
60/* used to create numbers */
61#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
62#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
63#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
64#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
65
66/* used to decode ioctl numbers.. */
67#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
68#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
69#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
70#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
71
72/* ...and for the drivers/sound files... */
73
74#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT)
75#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT)
76#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
77#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT)
78#define IOCSIZE_SHIFT (_IOC_SIZESHIFT)
79
80#endif /* __V850_IOCTL_H__ */
diff --git a/include/asm-v850/ioctls.h b/include/asm-v850/ioctls.h
new file mode 100644
index 000000000000..05c0dc9ce1ea
--- /dev/null
+++ b/include/asm-v850/ioctls.h
@@ -0,0 +1,80 @@
1#ifndef __V850_IOCTLS_H__
2#define __V850_IOCTLS_H__
3
4#include <asm/ioctl.h>
5
6/* 0x54 is just a magic number to make these relatively unique ('T') */
7
8#define TCGETS 0x5401
9#define TCSETS 0x5402
10#define TCSETSW 0x5403
11#define TCSETSF 0x5404
12#define TCGETA 0x5405
13#define TCSETA 0x5406
14#define TCSETAW 0x5407
15#define TCSETAF 0x5408
16#define TCSBRK 0x5409
17#define TCXONC 0x540A
18#define TCFLSH 0x540B
19#define TIOCEXCL 0x540C
20#define TIOCNXCL 0x540D
21#define TIOCSCTTY 0x540E
22#define TIOCGPGRP 0x540F
23#define TIOCSPGRP 0x5410
24#define TIOCOUTQ 0x5411
25#define TIOCSTI 0x5412
26#define TIOCGWINSZ 0x5413
27#define TIOCSWINSZ 0x5414
28#define TIOCMGET 0x5415
29#define TIOCMBIS 0x5416
30#define TIOCMBIC 0x5417
31#define TIOCMSET 0x5418
32#define TIOCGSOFTCAR 0x5419
33#define TIOCSSOFTCAR 0x541A
34#define FIONREAD 0x541B
35#define TIOCINQ FIONREAD
36#define TIOCLINUX 0x541C
37#define TIOCCONS 0x541D
38#define TIOCGSERIAL 0x541E
39#define TIOCSSERIAL 0x541F
40#define TIOCPKT 0x5420
41#define FIONBIO 0x5421
42#define TIOCNOTTY 0x5422
43#define TIOCSETD 0x5423
44#define TIOCGETD 0x5424
45#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */
46#define TIOCSBRK 0x5427 /* BSD compatibility */
47#define TIOCCBRK 0x5428 /* BSD compatibility */
48#define TIOCGSID 0x5429 /* Return the session ID of FD */
49#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
50#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
51
52#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
53#define FIOCLEX 0x5451
54#define FIOASYNC 0x5452
55#define TIOCSERCONFIG 0x5453
56#define TIOCSERGWILD 0x5454
57#define TIOCSERSWILD 0x5455
58#define TIOCGLCKTRMIOS 0x5456
59#define TIOCSLCKTRMIOS 0x5457
60#define TIOCSERGSTRUCT 0x5458 /* For debugging only */
61#define TIOCSERGETLSR 0x5459 /* Get line status register */
62#define TIOCSERGETMULTI 0x545A /* Get multiport config */
63#define TIOCSERSETMULTI 0x545B /* Set multiport config */
64
65#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */
66#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */
67#define FIOQSIZE 0x545E
68
69/* Used for packet mode */
70#define TIOCPKT_DATA 0
71#define TIOCPKT_FLUSHREAD 1
72#define TIOCPKT_FLUSHWRITE 2
73#define TIOCPKT_STOP 4
74#define TIOCPKT_START 8
75#define TIOCPKT_NOSTOP 16
76#define TIOCPKT_DOSTOP 32
77
78#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
79
80#endif /* __V850_IOCTLS_H__ */
diff --git a/include/asm-v850/ipc.h b/include/asm-v850/ipc.h
new file mode 100644
index 000000000000..a46e3d9c2a3f
--- /dev/null
+++ b/include/asm-v850/ipc.h
@@ -0,0 +1 @@
#include <asm-generic/ipc.h>
diff --git a/include/asm-v850/ipcbuf.h b/include/asm-v850/ipcbuf.h
new file mode 100644
index 000000000000..d8cbe9886d95
--- /dev/null
+++ b/include/asm-v850/ipcbuf.h
@@ -0,0 +1,29 @@
1#ifndef __V850E_IPCBUF_H__
2#define __V850E_IPCBUF_H__
3
4/*
5 * The user_ipc_perm structure for v850e architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 32-bit mode_t and seq
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct ipc64_perm
15{
16 __kernel_key_t key;
17 __kernel_uid32_t uid;
18 __kernel_gid32_t gid;
19 __kernel_uid32_t cuid;
20 __kernel_gid32_t cgid;
21 __kernel_mode_t mode;
22 unsigned short __pad1;
23 unsigned short seq;
24 unsigned short __pad2;
25 unsigned long __unused1;
26 unsigned long __unused2;
27};
28
29#endif /* __V850E_IPCBUF_H__ */
diff --git a/include/asm-v850/irq.h b/include/asm-v850/irq.h
new file mode 100644
index 000000000000..44431152b36d
--- /dev/null
+++ b/include/asm-v850/irq.h
@@ -0,0 +1,69 @@
1/*
2 * include/asm-v850/irq.h -- Machine interrupt handling
3 *
4 * Copyright (C) 2001,02,04 NEC Electronics Corporation
5 * Copyright (C) 2001,02,04 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_IRQ_H__
15#define __V850_IRQ_H__
16
17#include <asm/machdep.h>
18
19/* Default NUM_MACH_IRQS. */
20#ifndef NUM_MACH_IRQS
21#define NUM_MACH_IRQS NUM_CPU_IRQS
22#endif
23
24/* NMIs have IRQ numbers from FIRST_NMI to FIRST_NMI+NUM_NMIS-1. */
25#define FIRST_NMI NUM_MACH_IRQS
26#define IRQ_NMI(n) (FIRST_NMI + (n))
27/* v850 processors have 3 non-maskable interrupts. */
28#define NUM_NMIS 3
29
30/* Includes both maskable and non-maskable irqs. */
31#define NR_IRQS (NUM_MACH_IRQS + NUM_NMIS)
32
33
34#ifndef __ASSEMBLY__
35
36struct pt_regs;
37struct hw_interrupt_type;
38struct irqaction;
39
40#define irq_canonicalize(irq) (irq)
41
42/* Initialize irq handling for IRQs.
43 BASE_IRQ, BASE_IRQ+INTERVAL, ..., BASE_IRQ+NUM*INTERVAL
44 to IRQ_TYPE. An IRQ_TYPE of 0 means to use a generic interrupt type. */
45extern void
46init_irq_handlers (int base_irq, int num, int interval,
47 struct hw_interrupt_type *irq_type);
48
49typedef void (*irq_handler_t)(int irq, void *data, struct pt_regs *regs);
50
51/* Handle interrupt IRQ. REGS are the registers at the time of ther
52 interrupt. */
53extern unsigned int handle_irq (int irq, struct pt_regs *regs);
54
55
56/* Enable interrupt handling on an irq. */
57extern void enable_irq(unsigned int irq);
58
59/* Disable an irq and wait for completion. */
60extern void disable_irq (unsigned int irq);
61
62/* Disable an irq without waiting. */
63extern void disable_irq_nosync (unsigned int irq);
64
65extern int handle_IRQ_event(unsigned int, struct pt_regs *, struct irqaction *);
66
67#endif /* !__ASSEMBLY__ */
68
69#endif /* __V850_IRQ_H__ */
diff --git a/include/asm-v850/kmap_types.h b/include/asm-v850/kmap_types.h
new file mode 100644
index 000000000000..3288976b161f
--- /dev/null
+++ b/include/asm-v850/kmap_types.h
@@ -0,0 +1,19 @@
1#ifndef __V850_KMAP_TYPES_H__
2#define __V850_KMAP_TYPES_H__
3
4enum km_type {
5 KM_BOUNCE_READ,
6 KM_SKB_SUNRPC_DATA,
7 KM_SKB_DATA_SOFTIRQ,
8 KM_USER0,
9 KM_USER1,
10 KM_BIO_SRC_IRQ,
11 KM_BIO_DST_IRQ,
12 KM_PTE0,
13 KM_PTE1,
14 KM_IRQ0,
15 KM_IRQ1,
16 KM_TYPE_NR
17};
18
19#endif /* __V850_KMAP_TYPES_H__ */
diff --git a/include/asm-v850/linkage.h b/include/asm-v850/linkage.h
new file mode 100644
index 000000000000..291c2d01c44f
--- /dev/null
+++ b/include/asm-v850/linkage.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_LINKAGE_H
2#define __ASM_LINKAGE_H
3
4/* Nothing to see here... */
5
6#endif
diff --git a/include/asm-v850/local.h b/include/asm-v850/local.h
new file mode 100644
index 000000000000..705148abe276
--- /dev/null
+++ b/include/asm-v850/local.h
@@ -0,0 +1,6 @@
1#ifndef __V850_LOCAL_H__
2#define __V850_LOCAL_H__
3
4#include <asm-generic/local.h>
5
6#endif /* __V850_LOCAL_H__ */
diff --git a/include/asm-v850/ma.h b/include/asm-v850/ma.h
new file mode 100644
index 000000000000..89e66473a176
--- /dev/null
+++ b/include/asm-v850/ma.h
@@ -0,0 +1,101 @@
1/*
2 * include/asm-v850/ma.h -- V850E/MA series of cpu chips
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_MA_H__
15#define __V850_MA_H__
16
17/* The MA series uses the V850E cpu core. */
18#include <asm/v850e.h>
19
20
21/* For <asm/entry.h> */
22/* We use on-chip RAM, for a few miscellaneous variables that must be
23 accessible using a load instruction relative to R0. The amount
24 varies between chip models, but there's always at least 4K, and it
25 should always start at FFFFC000. */
26#define R0_RAM_ADDR 0xFFFFC000
27
28
29/* MA series UART details. */
30#define V850E_UART_BASE_FREQ CPU_CLOCK_FREQ
31
32/* This is a function that gets called before configuring the UART. */
33#define V850E_UART_PRE_CONFIGURE ma_uart_pre_configure
34#ifndef __ASSEMBLY__
35extern void ma_uart_pre_configure (unsigned chan,
36 unsigned cflags, unsigned baud);
37#endif
38
39
40/* MA series timer C details. */
41#define V850E_TIMER_C_BASE_ADDR 0xFFFFF600
42
43
44/* MA series timer D details. */
45#define V850E_TIMER_D_BASE_ADDR 0xFFFFF540
46#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
47#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2)
48#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
49
50#define V850E_TIMER_D_BASE_FREQ CPU_CLOCK_FREQ
51
52
53/* Port 0 */
54/* Direct I/O. Bits 0-7 are pins P00-P07. */
55#define MA_PORT0_IO_ADDR 0xFFFFF400
56#define MA_PORT0_IO (*(volatile u8 *)MA_PORT0_IO_ADDR)
57/* Port mode (for direct I/O, 0 = output, 1 = input). */
58#define MA_PORT0_PM_ADDR 0xFFFFF420
59#define MA_PORT0_PM (*(volatile u8 *)MA_PORT0_PM_ADDR)
60/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
61#define MA_PORT0_PMC_ADDR 0xFFFFF440
62#define MA_PORT0_PMC (*(volatile u8 *)MA_PORT0_PMC_ADDR)
63/* Port function control (for P04-P07, 0 = IRQ, 1 = DMARQ). */
64#define MA_PORT0_PFC_ADDR 0xFFFFF460
65#define MA_PORT0_PFC (*(volatile u8 *)MA_PORT0_PFC_ADDR)
66
67/* Port 1 */
68/* Direct I/O. Bits 0-3 are pins P10-P13. */
69#define MA_PORT1_IO_ADDR 0xFFFFF402
70#define MA_PORT1_IO (*(volatile u8 *)MA_PORT1_IO_ADDR)
71/* Port mode (for direct I/O, 0 = output, 1 = input). */
72#define MA_PORT1_PM_ADDR 0xFFFFF420
73#define MA_PORT1_PM (*(volatile u8 *)MA_PORT1_PM_ADDR)
74/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
75#define MA_PORT1_PMC_ADDR 0xFFFFF442
76#define MA_PORT1_PMC (*(volatile u8 *)MA_PORT1_PMC_ADDR)
77
78/* Port 4 */
79/* Direct I/O. Bits 0-5 are pins P40-P45. */
80#define MA_PORT4_IO_ADDR 0xFFFFF408
81#define MA_PORT4_IO (*(volatile u8 *)MA_PORT4_IO_ADDR)
82/* Port mode (for direct I/O, 0 = output, 1 = input). */
83#define MA_PORT4_PM_ADDR 0xFFFFF428
84#define MA_PORT4_PM (*(volatile u8 *)MA_PORT4_PM_ADDR)
85/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
86#define MA_PORT4_PMC_ADDR 0xFFFFF448
87#define MA_PORT4_PMC (*(volatile u8 *)MA_PORT4_PMC_ADDR)
88/* Port function control (for serial interfaces, 0 = CSI, 1 = UART). */
89#define MA_PORT4_PFC_ADDR 0xFFFFF468
90#define MA_PORT4_PFC (*(volatile u8 *)MA_PORT4_PFC_ADDR)
91
92
93#ifndef __ASSEMBLY__
94
95/* Initialize MA chip interrupts. */
96extern void ma_init_irqs (void);
97
98#endif /* !__ASSEMBLY__ */
99
100
101#endif /* __V850_MA_H__ */
diff --git a/include/asm-v850/ma1.h b/include/asm-v850/ma1.h
new file mode 100644
index 000000000000..ede1f1de2b7a
--- /dev/null
+++ b/include/asm-v850/ma1.h
@@ -0,0 +1,50 @@
1/*
2 * include/asm-v850/ma1.h -- V850E/MA1 cpu chip
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_MA1_H__
15#define __V850_MA1_H__
16
17/* Inherit more generic details from MA series. */
18#include <asm/ma.h>
19
20
21#define CPU_MODEL "v850e/ma1"
22#define CPU_MODEL_LONG "NEC V850E/MA1"
23
24
25/* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */
26#define IRQ_INTOV(n) (n) /* 0-3 */
27#define IRQ_INTOV_NUM 4
28#define IRQ_INTP(n) (0x4 + (n)) /* Pnnn (pin) interrupts */
29#define IRQ_INTP_NUM 24
30#define IRQ_INTCMD(n) (0x1c + (n)) /* interval timer interrupts 0-3 */
31#define IRQ_INTCMD_NUM 4
32#define IRQ_INTDMA(n) (0x20 + (n)) /* DMA interrupts 0-3 */
33#define IRQ_INTDMA_NUM 4
34#define IRQ_INTCSI(n) (0x24 + (n)*4)/* CSI 0-2 transmit/receive completion */
35#define IRQ_INTCSI_NUM 3
36#define IRQ_INTSER(n) (0x25 + (n)*4) /* UART 0-2 reception error */
37#define IRQ_INTSER_NUM 3
38#define IRQ_INTSR(n) (0x26 + (n)*4) /* UART 0-2 reception completion */
39#define IRQ_INTSR_NUM 3
40#define IRQ_INTST(n) (0x27 + (n)*4) /* UART 0-2 transmission completion */
41#define IRQ_INTST_NUM 3
42
43#define NUM_CPU_IRQS 0x30
44
45
46/* The MA1 has a UART with 3 channels. */
47#define V850E_UART_NUM_CHANNELS 3
48
49
50#endif /* __V850_MA1_H__ */
diff --git a/include/asm-v850/machdep.h b/include/asm-v850/machdep.h
new file mode 100644
index 000000000000..98d8bf63970e
--- /dev/null
+++ b/include/asm-v850/machdep.h
@@ -0,0 +1,61 @@
1/*
2 * include/asm-v850/machdep.h -- Machine-dependent definitions
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_MACHDEP_H__
15#define __V850_MACHDEP_H__
16
17#include <linux/config.h>
18
19/* chips */
20#ifdef CONFIG_V850E_MA1
21#include <asm/ma1.h>
22#endif
23#ifdef CONFIG_V850E_ME2
24#include <asm/me2.h>
25#endif
26#ifdef CONFIG_V850E_TEG
27#include <asm/teg.h>
28#endif
29
30/* These are both chips _and_ platforms, so put them in the middle... */
31#ifdef CONFIG_V850E2_ANNA
32#include <asm/anna.h>
33#endif
34#ifdef CONFIG_V850E_AS85EP1
35#include <asm/as85ep1.h>
36#endif
37
38/* platforms */
39#ifdef CONFIG_RTE_CB_MA1
40#include <asm/rte_ma1_cb.h>
41#endif
42#ifdef CONFIG_RTE_CB_ME2
43#include <asm/rte_me2_cb.h>
44#endif
45#ifdef CONFIG_RTE_CB_NB85E
46#include <asm/rte_nb85e_cb.h>
47#endif
48#ifdef CONFIG_V850E_SIM
49#include <asm/sim.h>
50#endif
51#ifdef CONFIG_V850E2_SIM85E2C
52#include <asm/sim85e2c.h>
53#endif
54#ifdef CONFIG_V850E2_SIM85E2S
55#include <asm/sim85e2s.h>
56#endif
57#ifdef CONFIG_V850E2_FPGA85E2C
58#include <asm/fpga85e2c.h>
59#endif
60
61#endif /* __V850_MACHDEP_H__ */
diff --git a/include/asm-v850/macrology.h b/include/asm-v850/macrology.h
new file mode 100644
index 000000000000..37abf874832c
--- /dev/null
+++ b/include/asm-v850/macrology.h
@@ -0,0 +1,17 @@
1/*
2 * include/asm-v850/macrology.h -- Various useful CPP macros
3 *
4 * Copyright (C) 2001 NEC Corporation
5 * Copyright (C) 2001 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#define macrology_paste(arg1, arg2) macrology_paste_1(arg1, arg2)
15#define macrology_paste_1(arg1, arg2) arg1 ## arg2
16#define macrology_stringify(sym) macrology_stringify_1(sym)
17#define macrology_stringify_1(sym) #sym
diff --git a/include/asm-v850/me2.h b/include/asm-v850/me2.h
new file mode 100644
index 000000000000..ac7c9ce0bdc1
--- /dev/null
+++ b/include/asm-v850/me2.h
@@ -0,0 +1,182 @@
1/*
2 * include/asm-v850/me2.h -- V850E/ME2 cpu chip
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_ME2_H__
15#define __V850_ME2_H__
16
17#include <asm/v850e.h>
18#include <asm/v850e_cache.h>
19
20
21#define CPU_MODEL "v850e/me2"
22#define CPU_MODEL_LONG "NEC V850E/ME2"
23
24
25/* Hardware-specific interrupt numbers (in the kernel IRQ namespace). */
26#define IRQ_INTP(n) (n) /* Pnnn (pin) interrupts */
27#define IRQ_INTP_NUM 31
28#define IRQ_INTCMD(n) (0x31 + (n)) /* interval timer interrupts 0-3 */
29#define IRQ_INTCMD_NUM 4
30#define IRQ_INTDMA(n) (0x41 + (n)) /* DMA interrupts 0-3 */
31#define IRQ_INTDMA_NUM 4
32#define IRQ_INTUBTIRE(n) (0x49 + (n)*5)/* UARTB 0-1 reception error */
33#define IRQ_INTUBTIRE_NUM 2
34#define IRQ_INTUBTIR(n) (0x4a + (n)*5) /* UARTB 0-1 reception complete */
35#define IRQ_INTUBTIR_NUM 2
36#define IRQ_INTUBTIT(n) (0x4b + (n)*5) /* UARTB 0-1 transmission complete */
37#define IRQ_INTUBTIT_NUM 2
38#define IRQ_INTUBTIF(n) (0x4c + (n)*5) /* UARTB 0-1 FIFO trans. complete */
39#define IRQ_INTUBTIF_NUM 2
40#define IRQ_INTUBTITO(n) (0x4d + (n)*5) /* UARTB 0-1 reception timeout */
41#define IRQ_INTUBTITO_NUM 2
42
43/* For <asm/irq.h> */
44#define NUM_CPU_IRQS 0x59 /* V850E/ME2 */
45
46
47/* For <asm/entry.h> */
48/* We use on-chip RAM, for a few miscellaneous variables that must be
49 accessible using a load instruction relative to R0. */
50#define R0_RAM_ADDR 0xFFFFB000 /* V850E/ME2 */
51
52
53/* V850E/ME2 UARTB details.*/
54#define V850E_UART_NUM_CHANNELS 2
55#define V850E_UARTB_BASE_FREQ (CPU_CLOCK_FREQ / 4)
56
57/* This is a function that gets called before configuring the UART. */
58#define V850E_UART_PRE_CONFIGURE me2_uart_pre_configure
59#ifndef __ASSEMBLY__
60extern void me2_uart_pre_configure (unsigned chan,
61 unsigned cflags, unsigned baud);
62#endif /* __ASSEMBLY__ */
63
64
65/* V850E/ME2 timer C details. */
66#define V850E_TIMER_C_BASE_ADDR 0xFFFFF600
67
68
69/* V850E/ME2 timer D details. */
70#define V850E_TIMER_D_BASE_ADDR 0xFFFFF540
71#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
72#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x2)
73#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
74
75#define V850E_TIMER_D_BASE_FREQ (CPU_CLOCK_FREQ / 2)
76
77
78/* Select iRAM mode. */
79#define ME2_IRAMM_ADDR 0xFFFFF80A
80#define ME2_IRAMM (*(volatile u8*)ME2_IRAMM_ADDR)
81
82
83/* Interrupt edge-detection configuration. INTF(n) and INTR(n) are only
84 valid for n == 1, 2, or 5. */
85#define ME2_INTF_ADDR(n) (0xFFFFFC00 + (n) * 0x2)
86#define ME2_INTF(n) (*(volatile u8*)ME2_INTF_ADDR(n))
87#define ME2_INTR_ADDR(n) (0xFFFFFC20 + (n) * 0x2)
88#define ME2_INTR(n) (*(volatile u8*)ME2_INTR_ADDR(n))
89#define ME2_INTFAL_ADDR 0xFFFFFC10
90#define ME2_INTFAL (*(volatile u8*)ME2_INTFAL_ADDR)
91#define ME2_INTRAL_ADDR 0xFFFFFC30
92#define ME2_INTRAL (*(volatile u8*)ME2_INTRAL_ADDR)
93#define ME2_INTFDH_ADDR 0xFFFFFC16
94#define ME2_INTFDH (*(volatile u16*)ME2_INTFDH_ADDR)
95#define ME2_INTRDH_ADDR 0xFFFFFC36
96#define ME2_INTRDH (*(volatile u16*)ME2_INTRDH_ADDR)
97#define ME2_SESC_ADDR(n) (0xFFFFF609 + (n) * 0x10)
98#define ME2_SESC(n) (*(volatile u8*)ME2_SESC_ADDR(n))
99#define ME2_SESA10_ADDR 0xFFFFF5AD
100#define ME2_SESA10 (*(volatile u8*)ME2_SESA10_ADDR)
101#define ME2_SESA11_ADDR 0xFFFFF5DD
102#define ME2_SESA11 (*(volatile u8*)ME2_SESA11_ADDR)
103
104
105/* Port 1 */
106/* Direct I/O. Bits 0-3 are pins P10-P13. */
107#define ME2_PORT1_IO_ADDR 0xFFFFF402
108#define ME2_PORT1_IO (*(volatile u8 *)ME2_PORT1_IO_ADDR)
109/* Port mode (for direct I/O, 0 = output, 1 = input). */
110#define ME2_PORT1_PM_ADDR 0xFFFFF422
111#define ME2_PORT1_PM (*(volatile u8 *)ME2_PORT1_PM_ADDR)
112/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
113#define ME2_PORT1_PMC_ADDR 0xFFFFF442
114#define ME2_PORT1_PMC (*(volatile u8 *)ME2_PORT1_PMC_ADDR)
115/* Port function control (for serial interfaces, 0 = CSI30, 1 = UARTB0 ). */
116#define ME2_PORT1_PFC_ADDR 0xFFFFF462
117#define ME2_PORT1_PFC (*(volatile u8 *)ME2_PORT1_PFC_ADDR)
118
119/* Port 2 */
120/* Direct I/O. Bits 0-3 are pins P20-P25. */
121#define ME2_PORT2_IO_ADDR 0xFFFFF404
122#define ME2_PORT2_IO (*(volatile u8 *)ME2_PORT2_IO_ADDR)
123/* Port mode (for direct I/O, 0 = output, 1 = input). */
124#define ME2_PORT2_PM_ADDR 0xFFFFF424
125#define ME2_PORT2_PM (*(volatile u8 *)ME2_PORT2_PM_ADDR)
126/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
127#define ME2_PORT2_PMC_ADDR 0xFFFFF444
128#define ME2_PORT2_PMC (*(volatile u8 *)ME2_PORT2_PMC_ADDR)
129/* Port function control (for serial interfaces, 0 = INTP2x, 1 = UARTB1 ). */
130#define ME2_PORT2_PFC_ADDR 0xFFFFF464
131#define ME2_PORT2_PFC (*(volatile u8 *)ME2_PORT2_PFC_ADDR)
132
133/* Port 5 */
134/* Direct I/O. Bits 0-5 are pins P50-P55. */
135#define ME2_PORT5_IO_ADDR 0xFFFFF40A
136#define ME2_PORT5_IO (*(volatile u8 *)ME2_PORT5_IO_ADDR)
137/* Port mode (for direct I/O, 0 = output, 1 = input). */
138#define ME2_PORT5_PM_ADDR 0xFFFFF42A
139#define ME2_PORT5_PM (*(volatile u8 *)ME2_PORT5_PM_ADDR)
140/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
141#define ME2_PORT5_PMC_ADDR 0xFFFFF44A
142#define ME2_PORT5_PMC (*(volatile u8 *)ME2_PORT5_PMC_ADDR)
143/* Port function control (). */
144#define ME2_PORT5_PFC_ADDR 0xFFFFF46A
145#define ME2_PORT5_PFC (*(volatile u8 *)ME2_PORT5_PFC_ADDR)
146
147/* Port 6 */
148/* Direct I/O. Bits 5-7 are pins P65-P67. */
149#define ME2_PORT6_IO_ADDR 0xFFFFF40C
150#define ME2_PORT6_IO (*(volatile u8 *)ME2_PORT6_IO_ADDR)
151/* Port mode (for direct I/O, 0 = output, 1 = input). */
152#define ME2_PORT6_PM_ADDR 0xFFFFF42C
153#define ME2_PORT6_PM (*(volatile u8 *)ME2_PORT6_PM_ADDR)
154/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
155#define ME2_PORT6_PMC_ADDR 0xFFFFF44C
156#define ME2_PORT6_PMC (*(volatile u8 *)ME2_PORT6_PMC_ADDR)
157/* Port function control (). */
158#define ME2_PORT6_PFC_ADDR 0xFFFFF46C
159#define ME2_PORT6_PFC (*(volatile u8 *)ME2_PORT6_PFC_ADDR)
160
161/* Port 7 */
162/* Direct I/O. Bits 2-7 are pins P72-P77. */
163#define ME2_PORT7_IO_ADDR 0xFFFFF40E
164#define ME2_PORT7_IO (*(volatile u8 *)ME2_PORT7_IO_ADDR)
165/* Port mode (for direct I/O, 0 = output, 1 = input). */
166#define ME2_PORT7_PM_ADDR 0xFFFFF42E
167#define ME2_PORT7_PM (*(volatile u8 *)ME2_PORT7_PM_ADDR)
168/* Port mode control (0 = direct I/O mode, 1 = alternative I/O mode). */
169#define ME2_PORT7_PMC_ADDR 0xFFFFF44E
170#define ME2_PORT7_PMC (*(volatile u8 *)ME2_PORT7_PMC_ADDR)
171/* Port function control (). */
172#define ME2_PORT7_PFC_ADDR 0xFFFFF46E
173#define ME2_PORT7_PFC (*(volatile u8 *)ME2_PORT7_PFC_ADDR)
174
175
176#ifndef __ASSEMBLY__
177/* Initialize V850E/ME2 chip interrupts. */
178extern void me2_init_irqs (void);
179#endif /* !__ASSEMBLY__ */
180
181
182#endif /* __V850_ME2_H__ */
diff --git a/include/asm-v850/mman.h b/include/asm-v850/mman.h
new file mode 100644
index 000000000000..e2b90081b56f
--- /dev/null
+++ b/include/asm-v850/mman.h
@@ -0,0 +1,40 @@
1#ifndef __V850_MMAN_H__
2#define __V850_MMAN_H__
3
4#define PROT_READ 0x1 /* page can be read */
5#define PROT_WRITE 0x2 /* page can be written */
6#define PROT_EXEC 0x4 /* page can be executed */
7#define PROT_NONE 0x0 /* page can not be accessed */
8#define PROT_GROWSDOWN 0x01000000 /* mprotect flag: extend change to start of growsdown vma */
9#define PROT_GROWSUP 0x02000000 /* mprotect flag: extend change to end of growsup vma */
10
11#define MAP_SHARED 0x01 /* Share changes */
12#define MAP_PRIVATE 0x02 /* Changes are private */
13#define MAP_TYPE 0x0f /* Mask for type of mapping */
14#define MAP_FIXED 0x10 /* Interpret addr exactly */
15#define MAP_ANONYMOUS 0x20 /* don't use a file */
16
17#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
18#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
19#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
20#define MAP_LOCKED 0x2000 /* pages are locked */
21#define MAP_NORESERVE 0x4000 /* don't check for reservations */
22
23#define MS_ASYNC 1 /* sync memory asynchronously */
24#define MS_INVALIDATE 2 /* invalidate the caches */
25#define MS_SYNC 4 /* synchronous memory sync */
26
27#define MCL_CURRENT 1 /* lock all current mappings */
28#define MCL_FUTURE 2 /* lock all future mappings */
29
30#define MADV_NORMAL 0x0 /* default page-in behavior */
31#define MADV_RANDOM 0x1 /* page-in minimum required */
32#define MADV_SEQUENTIAL 0x2 /* read-ahead aggressively */
33#define MADV_WILLNEED 0x3 /* pre-fault pages */
34#define MADV_DONTNEED 0x4 /* discard these pages */
35
36/* compatibility flags */
37#define MAP_ANON MAP_ANONYMOUS
38#define MAP_FILE 0
39
40#endif /* __V850_MMAN_H__ */
diff --git a/include/asm-v850/mmu.h b/include/asm-v850/mmu.h
new file mode 100644
index 000000000000..e30a52becfd6
--- /dev/null
+++ b/include/asm-v850/mmu.h
@@ -0,0 +1,22 @@
1/* Copyright (C) 2002, David McCullough <davidm@snapgear.com> */
2
3#ifndef __V850_MMU_H__
4#define __V850_MMU_H__
5
6struct mm_rblock_struct {
7 int size;
8 int refcount;
9 void *kblock;
10};
11
12struct mm_tblock_struct {
13 struct mm_rblock_struct *rblock;
14 struct mm_tblock_struct *next;
15};
16
17typedef struct {
18 struct mm_tblock_struct tblock;
19 unsigned long end_brk;
20} mm_context_t;
21
22#endif /* __V850_MMU_H__ */
diff --git a/include/asm-v850/mmu_context.h b/include/asm-v850/mmu_context.h
new file mode 100644
index 000000000000..f521c8050d3c
--- /dev/null
+++ b/include/asm-v850/mmu_context.h
@@ -0,0 +1,11 @@
1#ifndef __V850_MMU_CONTEXT_H__
2#define __V850_MMU_CONTEXT_H__
3
4#define destroy_context(mm) ((void)0)
5#define init_new_context(tsk,mm) 0
6#define switch_mm(prev,next,tsk) ((void)0)
7#define deactivate_mm(tsk,mm) do { } while (0)
8#define activate_mm(prev,next) ((void)0)
9#define enter_lazy_tlb(mm,tsk) ((void)0)
10
11#endif /* __V850_MMU_CONTEXT_H__ */
diff --git a/include/asm-v850/module.h b/include/asm-v850/module.h
new file mode 100644
index 000000000000..2c2f4944f09f
--- /dev/null
+++ b/include/asm-v850/module.h
@@ -0,0 +1,62 @@
1/*
2 * include/asm-v850/module.h -- Architecture-specific module hooks
3 *
4 * Copyright (C) 2001,02,03,04 NEC Corporation
5 * Copyright (C) 2001,02,03,04 Miles Bader <miles@gnu.org>
6 * Copyright (C) 2001,03 Rusty Russell
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 *
12 * Written by Miles Bader <miles@gnu.org>
13 *
14 * Derived in part from include/asm-ppc/module.h
15 */
16
17#ifndef __V850_MODULE_H__
18#define __V850_MODULE_H__
19
20#define MODULE_SYMBOL_PREFIX "_"
21
22struct v850_plt_entry
23{
24 /* Indirect jump instruction sequence (6-byte mov + 2-byte jr). */
25 unsigned long tramp[2];
26};
27
28struct mod_arch_specific
29{
30 /* Indices of PLT sections within module. */
31 unsigned int core_plt_section, init_plt_section;
32};
33
34#define Elf_Shdr Elf32_Shdr
35#define Elf_Sym Elf32_Sym
36#define Elf_Ehdr Elf32_Ehdr
37
38/* Make empty sections for module_frob_arch_sections to expand. */
39#ifdef MODULE
40asm(".section .plt,\"ax\",@nobits; .align 3; .previous");
41asm(".section .init.plt,\"ax\",@nobits; .align 3; .previous");
42#endif
43
44/* We don't do exception tables. */
45struct exception_table_entry;
46static inline const struct exception_table_entry *
47search_extable(const struct exception_table_entry *first,
48 const struct exception_table_entry *last,
49 unsigned long value)
50{
51 return 0;
52}
53#define ARCH_HAS_SEARCH_EXTABLE
54static inline void
55sort_extable(struct exception_table_entry *start,
56 struct exception_table_entry *finish)
57{
58 /* nada */
59}
60#define ARCH_HAS_SORT_EXTABLE
61
62#endif /* __V850_MODULE_H__ */
diff --git a/include/asm-v850/msgbuf.h b/include/asm-v850/msgbuf.h
new file mode 100644
index 000000000000..ed07dbd01637
--- /dev/null
+++ b/include/asm-v850/msgbuf.h
@@ -0,0 +1,31 @@
1#ifndef __V850_MSGBUF_H__
2#define __V850_MSGBUF_H__
3
4/*
5 * The msqid64_ds structure for v850 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct msqid64_ds {
15 struct ipc64_perm msg_perm;
16 __kernel_time_t msg_stime; /* last msgsnd time */
17 unsigned long __unused1;
18 __kernel_time_t msg_rtime; /* last msgrcv time */
19 unsigned long __unused2;
20 __kernel_time_t msg_ctime; /* last change time */
21 unsigned long __unused3;
22 unsigned long msg_cbytes; /* current number of bytes on queue */
23 unsigned long msg_qnum; /* number of messages in queue */
24 unsigned long msg_qbytes; /* max number of bytes on queue */
25 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
26 __kernel_pid_t msg_lrpid; /* last receive pid */
27 unsigned long __unused4;
28 unsigned long __unused5;
29};
30
31#endif /* __V850_MSGBUF_H__ */
diff --git a/include/asm-v850/namei.h b/include/asm-v850/namei.h
new file mode 100644
index 000000000000..ee8339b23843
--- /dev/null
+++ b/include/asm-v850/namei.h
@@ -0,0 +1,17 @@
1/*
2 * linux/include/asm-v850/namei.h
3 *
4 * Included from linux/fs/namei.c
5 */
6
7#ifndef __V850_NAMEI_H__
8#define __V850_NAMEI_H__
9
10/* This dummy routine maybe changed to something useful
11 * for /usr/gnemul/ emulation stuff.
12 * Look at asm-sparc/namei.h for details.
13 */
14
15#define __emul_prefix() NULL
16
17#endif /* __V850_NAMEI_H__ */
diff --git a/include/asm-v850/page.h b/include/asm-v850/page.h
new file mode 100644
index 000000000000..06085b0c043e
--- /dev/null
+++ b/include/asm-v850/page.h
@@ -0,0 +1,146 @@
1/*
2 * include/asm-v850/page.h -- VM ops
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_PAGE_H__
15#define __V850_PAGE_H__
16
17#include <asm/machdep.h>
18
19
20#define PAGE_SHIFT 12
21#define PAGE_SIZE (1UL << PAGE_SHIFT)
22#define PAGE_MASK (~(PAGE_SIZE-1))
23
24
25/*
26 * PAGE_OFFSET -- the first address of the first page of memory. For archs with
27 * no MMU this corresponds to the first free page in physical memory (aligned
28 * on a page boundary).
29 */
30#ifndef PAGE_OFFSET
31#define PAGE_OFFSET 0x0000000
32#endif
33
34
35#ifdef __KERNEL__
36#ifndef __ASSEMBLY__
37
38#define STRICT_MM_TYPECHECKS
39
40#define clear_page(page) memset ((void *)(page), 0, PAGE_SIZE)
41#define copy_page(to, from) memcpy ((void *)(to), (void *)from, PAGE_SIZE)
42
43#define clear_user_page(addr, vaddr, page) \
44 do { clear_page(addr); \
45 flush_dcache_page(page); \
46 } while (0)
47#define copy_user_page(to, from, vaddr, page) \
48 do { copy_page(to, from); \
49 flush_dcache_page(page); \
50 } while (0)
51
52#ifdef STRICT_MM_TYPECHECKS
53/*
54 * These are used to make use of C type-checking..
55 */
56
57typedef struct { unsigned long pte; } pte_t;
58typedef struct { unsigned long pmd; } pmd_t;
59typedef struct { unsigned long pgd; } pgd_t;
60typedef struct { unsigned long pgprot; } pgprot_t;
61
62#define pte_val(x) ((x).pte)
63#define pmd_val(x) ((x).pmd)
64#define pgd_val(x) ((x).pgd)
65#define pgprot_val(x) ((x).pgprot)
66
67#define __pte(x) ((pte_t) { (x) } )
68#define __pmd(x) ((pmd_t) { (x) } )
69#define __pgd(x) ((pgd_t) { (x) } )
70#define __pgprot(x) ((pgprot_t) { (x) } )
71
72#else /* !STRICT_MM_TYPECHECKS */
73/*
74 * .. while these make it easier on the compiler
75 */
76
77typedef unsigned long pte_t;
78typedef unsigned long pmd_t;
79typedef unsigned long pgd_t;
80typedef unsigned long pgprot_t;
81
82#define pte_val(x) (x)
83#define pmd_val(x) (x)
84#define pgd_val(x) (x)
85#define pgprot_val(x) (x)
86
87#define __pte(x) (x)
88#define __pmd(x) (x)
89#define __pgd(x) (x)
90#define __pgprot(x) (x)
91
92#endif /* STRICT_MM_TYPECHECKS */
93
94#endif /* !__ASSEMBLY__ */
95
96
97/* to align the pointer to the (next) page boundary */
98#define PAGE_ALIGN(addr) (((addr) + PAGE_SIZE - 1) & PAGE_MASK)
99
100
101#ifndef __ASSEMBLY__
102
103/* Pure 2^n version of get_order */
104extern __inline__ int get_order (unsigned long size)
105{
106 int order;
107
108 size = (size-1) >> (PAGE_SHIFT-1);
109 order = -1;
110 do {
111 size >>= 1;
112 order++;
113 } while (size);
114 return order;
115}
116
117#endif /* !__ASSEMBLY__ */
118
119
120/* No current v850 processor has virtual memory. */
121#define __virt_to_phys(addr) (addr)
122#define __phys_to_virt(addr) (addr)
123
124#define virt_to_pfn(kaddr) (__virt_to_phys (kaddr) >> PAGE_SHIFT)
125#define pfn_to_virt(pfn) __phys_to_virt ((pfn) << PAGE_SHIFT)
126
127#define MAP_NR(kaddr) \
128 (((unsigned long)(kaddr) - PAGE_OFFSET) >> PAGE_SHIFT)
129#define virt_to_page(kaddr) (mem_map + MAP_NR (kaddr))
130#define page_to_virt(page) \
131 ((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET)
132
133#define pfn_to_page(pfn) virt_to_page (pfn_to_virt (pfn))
134#define page_to_pfn(page) virt_to_pfn (page_to_virt (page))
135
136#define virt_addr_valid(kaddr) \
137 (((void *)(kaddr) >= (void *)PAGE_OFFSET) && MAP_NR (kaddr) < max_mapnr)
138
139
140#define __pa(x) __virt_to_phys ((unsigned long)(x))
141#define __va(x) ((void *)__phys_to_virt ((unsigned long)(x)))
142
143
144#endif /* KERNEL */
145
146#endif /* __V850_PAGE_H__ */
diff --git a/include/asm-v850/param.h b/include/asm-v850/param.h
new file mode 100644
index 000000000000..8d796e4bff52
--- /dev/null
+++ b/include/asm-v850/param.h
@@ -0,0 +1,32 @@
1/*
2 * include/asm-v850/param.h -- Varions kernel parameters
3 *
4 * Copyright (C) 2001,02 NEC Corporation
5 * Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_PARAM_H__
15#define __V850_PARAM_H__
16
17#include <asm/machdep.h> /* For HZ */
18
19#define EXEC_PAGESIZE 4096
20
21#ifndef NOGROUP
22#define NOGROUP (-1)
23#endif
24
25#define MAXHOSTNAMELEN 64 /* max length of hostname */
26
27#ifdef __KERNEL__
28# define USER_HZ 100
29# define CLOCKS_PER_SEC USER_HZ
30#endif
31
32#endif /* __V850_PARAM_H__ */
diff --git a/include/asm-v850/pci.h b/include/asm-v850/pci.h
new file mode 100644
index 000000000000..e41941447b49
--- /dev/null
+++ b/include/asm-v850/pci.h
@@ -0,0 +1,88 @@
1/*
2 * include/asm-v850/pci.h -- PCI support
3 *
4 * Copyright (C) 2001,02 NEC Corporation
5 * Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_PCI_H__
15#define __V850_PCI_H__
16
17/* Get any platform-dependent definitions. */
18#include <asm/machdep.h>
19
20#define pcibios_scan_all_fns(a, b) 0
21
22/* Generic declarations. */
23
24struct scatterlist;
25
26extern void pcibios_set_master (struct pci_dev *dev);
27
28/* `Grant' to PDEV the memory block at CPU_ADDR, for doing DMA. The
29 32-bit PCI bus mastering address to use is returned. the device owns
30 this memory until either pci_unmap_single or pci_dma_sync_single_for_cpu is
31 performed. */
32extern dma_addr_t
33pci_map_single (struct pci_dev *pdev, void *cpu_addr, size_t size, int dir);
34
35/* Return to the CPU the PCI DMA memory block previously `granted' to
36 PDEV, at DMA_ADDR. */
37extern void
38pci_unmap_single (struct pci_dev *pdev, dma_addr_t dma_addr, size_t size,
39 int dir);
40
41/* Make physical memory consistent for a single streaming mode DMA
42 translation after a transfer.
43
44 If you perform a pci_map_single() but wish to interrogate the
45 buffer using the cpu, yet do not wish to teardown the PCI dma
46 mapping, you must call this function before doing so. At the next
47 point you give the PCI dma address back to the card, you must first
48 perform a pci_dma_sync_for_device, and then the device again owns
49 the buffer. */
50extern void
51pci_dma_sync_single_for_cpu (struct pci_dev *dev, dma_addr_t dma_addr, size_t size,
52 int dir);
53
54extern void
55pci_dma_sync_single_for_device (struct pci_dev *dev, dma_addr_t dma_addr, size_t size,
56 int dir);
57
58
59/* Do multiple DMA mappings at once. */
60extern int
61pci_map_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len, int dir);
62
63/* Unmap multiple DMA mappings at once. */
64extern void
65pci_unmap_sg (struct pci_dev *pdev, struct scatterlist *sg, int sg_len,
66 int dir);
67
68/* Allocate and map kernel buffer using consistent mode DMA for PCI
69 device. Returns non-NULL cpu-view pointer to the buffer if
70 successful and sets *DMA_ADDR to the pci side dma address as well,
71 else DMA_ADDR is undefined. */
72extern void *
73pci_alloc_consistent (struct pci_dev *pdev, size_t size, dma_addr_t *dma_addr);
74
75/* Free and unmap a consistent DMA buffer. CPU_ADDR and DMA_ADDR must
76 be values that were returned from pci_alloc_consistent. SIZE must be
77 the same as what as passed into pci_alloc_consistent. References to
78 the memory and mappings assosciated with CPU_ADDR or DMA_ADDR past
79 this call are illegal. */
80extern void
81pci_free_consistent (struct pci_dev *pdev, size_t size, void *cpu_addr,
82 dma_addr_t dma_addr);
83
84static inline void pcibios_add_platform_entries(struct pci_dev *dev)
85{
86}
87
88#endif /* __V850_PCI_H__ */
diff --git a/include/asm-v850/percpu.h b/include/asm-v850/percpu.h
new file mode 100644
index 000000000000..755ac6522b63
--- /dev/null
+++ b/include/asm-v850/percpu.h
@@ -0,0 +1,14 @@
1#ifndef __V850_PERCPU_H__
2#define __V850_PERCPU_H__
3
4#include <asm-generic/percpu.h>
5
6/* This is a stupid hack to satisfy some grotty implicit include-file
7 dependency; basically, <linux/smp.h> uses BUG_ON, which calls BUG, but
8 doesn't include the necessary headers to define it. In the twisted
9 festering mess of includes this must all be resolved somehow on other
10 platforms, but I haven't the faintest idea how, and don't care; here will
11 do, even though doesn't actually make any sense. */
12#include <asm/page.h>
13
14#endif /* __V850_PERCPU_H__ */
diff --git a/include/asm-v850/pgalloc.h b/include/asm-v850/pgalloc.h
new file mode 100644
index 000000000000..b91eb2d02bfd
--- /dev/null
+++ b/include/asm-v850/pgalloc.h
@@ -0,0 +1,22 @@
1/*
2 * include/asm-v850/pgalloc.h
3 *
4 * Copyright (C) 2001,02 NEC Corporation
5 * Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_PGALLOC_H__
15#define __V850_PGALLOC_H__
16
17#include <linux/mm.h> /* some crap code expects this */
18
19/* ... and then, there was one. */
20#define check_pgt_cache() ((void)0)
21
22#endif /* __V850_PGALLOC_H__ */
diff --git a/include/asm-v850/pgtable.h b/include/asm-v850/pgtable.h
new file mode 100644
index 000000000000..76e380e481e9
--- /dev/null
+++ b/include/asm-v850/pgtable.h
@@ -0,0 +1,58 @@
1#ifndef __V850_PGTABLE_H__
2#define __V850_PGTABLE_H__
3
4#include <asm-generic/4level-fixup.h>
5
6#include <linux/config.h>
7#include <asm/page.h>
8
9
10#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
11#define pgd_none(pgd) (0)
12#define pgd_bad(pgd) (0)
13#define pgd_clear(pgdp) ((void)0)
14
15#define pmd_offset(a, b) ((void *)0)
16
17#define kern_addr_valid(addr) (1)
18
19
20#define __swp_type(x) (0)
21#define __swp_offset(x) (0)
22#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
23#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
24#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
25
26
27/* These mean nothing to !CONFIG_MMU. */
28#define PAGE_NONE __pgprot(0)
29#define PAGE_SHARED __pgprot(0)
30#define PAGE_COPY __pgprot(0)
31#define PAGE_READONLY __pgprot(0)
32#define PAGE_KERNEL __pgprot(0)
33
34
35/*
36 * ZERO_PAGE is a global shared page that is always zero: used
37 * for zero-mapped memory areas etc. When CONFIG_MMU is not defined, this
38 * should never actually be used, so just define it to something that's
39 * will hopefully cause a bus error if it is.
40 */
41#define ZERO_PAGE(vaddr) ((void *)0x87654321)
42
43
44/* Some bogus code in procfs uses these; whatever. */
45#define VMALLOC_START 0
46#define VMALLOC_END (~0)
47
48
49extern void paging_init (void);
50#define swapper_pg_dir ((pgd_t *) 0)
51
52#define pgtable_cache_init() ((void)0)
53
54
55extern unsigned int kobjsize(const void *objp);
56
57
58#endif /* __V850_PGTABLE_H__ */
diff --git a/include/asm-v850/poll.h b/include/asm-v850/poll.h
new file mode 100644
index 000000000000..0369562c7e15
--- /dev/null
+++ b/include/asm-v850/poll.h
@@ -0,0 +1,23 @@
1#ifndef __V850_POLL_H__
2#define __V850_POLL_H__
3
4#define POLLIN 0x0001
5#define POLLPRI 0x0002
6#define POLLOUT 0x0004
7#define POLLERR 0x0008
8#define POLLHUP 0x0010
9#define POLLNVAL 0x0020
10#define POLLRDNORM 0x0040
11#define POLLWRNORM POLLOUT
12#define POLLRDBAND 0x0080
13#define POLLWRBAND 0x0100
14#define POLLMSG 0x0400
15#define POLLREMOVE 0x1000
16
17struct pollfd {
18 int fd;
19 short events;
20 short revents;
21};
22
23#endif /* __V850_POLL_H__ */
diff --git a/include/asm-v850/posix_types.h b/include/asm-v850/posix_types.h
new file mode 100644
index 000000000000..ccb7297a0edc
--- /dev/null
+++ b/include/asm-v850/posix_types.h
@@ -0,0 +1,76 @@
1/*
2 * include/asm-v850/posix_types.h -- Kernel versions of standard types
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_POSIX_TYPES_H__
15#define __V850_POSIX_TYPES_H__
16
17typedef unsigned long __kernel_ino_t;
18typedef unsigned long long __kernel_ino64_t;
19typedef unsigned int __kernel_mode_t;
20typedef unsigned int __kernel_nlink_t;
21typedef long __kernel_off_t;
22typedef long long __kernel_loff_t;
23typedef int __kernel_pid_t;
24typedef unsigned short __kernel_ipc_pid_t;
25typedef unsigned int __kernel_uid_t;
26typedef unsigned int __kernel_gid_t;
27typedef unsigned int __kernel_size_t;
28typedef int __kernel_ssize_t;
29typedef int __kernel_ptrdiff_t;
30typedef long __kernel_time_t;
31typedef long __kernel_suseconds_t;
32typedef long __kernel_clock_t;
33typedef int __kernel_timer_t;
34typedef int __kernel_clockid_t;
35typedef int __kernel_daddr_t;
36typedef char * __kernel_caddr_t;
37typedef unsigned short __kernel_uid16_t;
38typedef unsigned short __kernel_gid16_t;
39typedef unsigned int __kernel_uid32_t;
40typedef unsigned int __kernel_gid32_t;
41
42/* Some bogus code depends on this; we don't care. */
43typedef __kernel_uid_t __kernel_old_uid_t;
44typedef unsigned int __kernel_old_dev_t;
45
46typedef struct {
47#if defined(__KERNEL__) || defined(__USE_ALL)
48 int val[2];
49#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
50 int __val[2];
51#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
52} __kernel_fsid_t;
53
54
55#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
56
57/* We used to include <asm/bitops.h> here, which seems the right thing, but
58 it caused nasty include-file definition order problems. Removing the
59 include seems to work, so fingers crossed... */
60
61#undef __FD_SET
62#define __FD_SET(fd, fd_set) \
63 __set_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits)
64#undef __FD_CLR
65#define __FD_CLR(fd, fd_set) \
66 __clear_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits)
67#undef __FD_ISSET
68#define __FD_ISSET(fd, fd_set) \
69 __test_bit (fd, (void *)&((__kernel_fd_set *)fd_set)->fds_bits)
70#undef __FD_ZERO
71#define __FD_ZERO(fd_set) \
72 memset (fd_set, 0, sizeof (*(fd_set *)fd_set))
73
74#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
75
76#endif /* __V850_POSIX_TYPES_H__ */
diff --git a/include/asm-v850/processor.h b/include/asm-v850/processor.h
new file mode 100644
index 000000000000..d41f925f5182
--- /dev/null
+++ b/include/asm-v850/processor.h
@@ -0,0 +1,120 @@
1/*
2 * include/asm-v850/processor.h
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_PROCESSOR_H__
15#define __V850_PROCESSOR_H__
16
17#include <linux/config.h>
18#ifndef __ASSEMBLY__ /* <linux/thread_info.h> is not asm-safe. */
19#include <linux/thread_info.h>
20#endif
21
22#include <asm/ptrace.h>
23#include <asm/entry.h>
24
25/* Some code expects `segment' stuff to be defined here. */
26#include <asm/segment.h>
27
28
29/*
30 * The only places this is used seem to be horrible bletcherous kludges,
31 * so we just define it to be as large as possible.
32 */
33#define TASK_SIZE (0xFFFFFFFF)
34
35/*
36 * This decides where the kernel will search for a free chunk of vm
37 * space during mmap's. We won't be using it.
38 */
39#define TASK_UNMAPPED_BASE 0
40
41
42#ifndef __ASSEMBLY__
43
44
45/*
46 * Default implementation of macro that returns current
47 * instruction pointer ("program counter").
48 */
49#define current_text_addr() ({ __label__ _l; _l: &&_l;})
50
51/* If you change this, you must change the associated assembly-languages
52 constants defined below, THREAD_*. */
53struct thread_struct {
54 /* kernel stack pointer (must be first field in structure) */
55 unsigned long ksp;
56};
57
58#define INIT_THREAD { sizeof init_stack + (unsigned long)init_stack }
59
60
61/* Do necessary setup to start up a newly executed thread. */
62extern inline void start_thread (struct pt_regs *regs,
63 unsigned long pc, unsigned long usp)
64{
65 regs->pc = pc;
66 regs->gpr[GPR_SP] = usp;
67 regs->kernel_mode = 0;
68}
69
70/* Free all resources held by a thread. */
71extern inline void release_thread (struct task_struct *dead_task)
72{
73}
74
75/* Prepare to copy thread state - unlazy all lazy status */
76#define prepare_to_copy(tsk) do { } while (0)
77
78extern int kernel_thread (int (*fn)(void *), void * arg, unsigned long flags);
79
80/* Free current thread data structures etc. */
81static inline void exit_thread (void)
82{
83}
84
85
86/* Return the registers saved during context-switch by the currently
87 not-running thread T. Note that this only includes some registers!
88 See entry.S for details. */
89#define thread_saved_regs(t) \
90 ((struct pt_regs*)((t)->thread.ksp + STATE_SAVE_PT_OFFSET))
91/* Return saved (kernel) PC of a blocked thread. Actually, we return the
92 LP register, because the thread is actually blocked in switch_thread,
93 and we're interested in the PC it will _return_ to. */
94#define thread_saved_pc(t) (thread_saved_regs(t)->gpr[GPR_LP])
95
96
97unsigned long get_wchan (struct task_struct *p);
98
99
100/* Return some info about the user process TASK. */
101#define task_tos(task) ((unsigned long)(task)->thread_info + THREAD_SIZE)
102#define task_regs(task) ((struct pt_regs *)task_tos (task) - 1)
103#define task_sp(task) (task_regs (task)->gpr[GPR_SP])
104#define task_pc(task) (task_regs (task)->pc)
105/* Grotty old names for some. */
106#define KSTK_EIP(task) task_pc (task)
107#define KSTK_ESP(task) task_sp (task)
108
109
110#define cpu_relax() ((void)0)
111
112
113#else /* __ASSEMBLY__ */
114
115#define THREAD_KSP 0
116
117#endif /* !__ASSEMBLY__ */
118
119
120#endif /* __V850_PROCESSOR_H__ */
diff --git a/include/asm-v850/ptrace.h b/include/asm-v850/ptrace.h
new file mode 100644
index 000000000000..7bf72bb5078c
--- /dev/null
+++ b/include/asm-v850/ptrace.h
@@ -0,0 +1,121 @@
1/*
2 * include/asm-v850/ptrace.h -- Access to CPU registers
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_PTRACE_H__
15#define __V850_PTRACE_H__
16
17
18/* v850 general purpose registers with special meanings. */
19#define GPR_ZERO 0 /* constant zero */
20#define GPR_ASM 1 /* reserved for assembler */
21#define GPR_SP 3 /* stack pointer */
22#define GPR_GP 4 /* global data pointer */
23#define GPR_TP 5 /* `text pointer' */
24#define GPR_EP 30 /* `element pointer' */
25#define GPR_LP 31 /* link pointer (current return address) */
26
27/* These aren't official names, but they make some code more descriptive. */
28#define GPR_ARG0 6
29#define GPR_ARG1 7
30#define GPR_ARG2 8
31#define GPR_ARG3 9
32#define GPR_RVAL0 10
33#define GPR_RVAL1 11
34#define GPR_RVAL GPR_RVAL0
35
36#define NUM_GPRS 32
37
38/* v850 `system' registers. */
39#define SR_EIPC 0
40#define SR_EIPSW 1
41#define SR_FEPC 2
42#define SR_FEPSW 3
43#define SR_ECR 4
44#define SR_PSW 5
45#define SR_CTPC 16
46#define SR_CTPSW 17
47#define SR_DBPC 18
48#define SR_DBPSW 19
49#define SR_CTBP 20
50#define SR_DIR 21
51#define SR_ASID 23
52
53
54#ifndef __ASSEMBLY__
55
56typedef unsigned long v850_reg_t;
57
58/* How processor state is stored on the stack during a syscall/signal.
59 If you change this structure, change the associated assembly-language
60 macros below too (PT_*)! */
61struct pt_regs
62{
63 /* General purpose registers. */
64 v850_reg_t gpr[NUM_GPRS];
65
66 v850_reg_t pc; /* program counter */
67 v850_reg_t psw; /* program status word */
68
69 /* Registers used by `callt' instruction: */
70 v850_reg_t ctpc; /* saved program counter */
71 v850_reg_t ctpsw; /* saved psw */
72 v850_reg_t ctbp; /* base pointer for callt table */
73
74 char kernel_mode; /* 1 if in `kernel mode', 0 if user mode */
75};
76
77
78#define instruction_pointer(regs) ((regs)->pc)
79#define profile_pc(regs) instruction_pointer(regs)
80#define user_mode(regs) (!(regs)->kernel_mode)
81
82/* When a struct pt_regs is used to save user state for a system call in
83 the kernel, the system call is stored in the space for R0 (since it's
84 never used otherwise, R0 being a constant 0). Non-system-calls
85 simply store 0 there. */
86#define PT_REGS_SYSCALL(regs) (regs)->gpr[0]
87#define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val))
88
89#endif /* !__ASSEMBLY__ */
90
91
92/* The number of bytes used to store each register. */
93#define _PT_REG_SIZE 4
94
95/* Offset of a general purpose register in a stuct pt_regs. */
96#define PT_GPR(num) ((num) * _PT_REG_SIZE)
97
98/* Offsets of various special registers & fields in a struct pt_regs. */
99#define PT_PC ((NUM_GPRS + 0) * _PT_REG_SIZE)
100#define PT_PSW ((NUM_GPRS + 1) * _PT_REG_SIZE)
101#define PT_CTPC ((NUM_GPRS + 2) * _PT_REG_SIZE)
102#define PT_CTPSW ((NUM_GPRS + 3) * _PT_REG_SIZE)
103#define PT_CTBP ((NUM_GPRS + 4) * _PT_REG_SIZE)
104#define PT_KERNEL_MODE ((NUM_GPRS + 5) * _PT_REG_SIZE)
105
106/* Where the current syscall number is stashed; obviously only valid in
107 the kernel! */
108#define PT_CUR_SYSCALL PT_GPR(0)
109
110/* Size of struct pt_regs, including alignment. */
111#define PT_SIZE ((NUM_GPRS + 6) * _PT_REG_SIZE)
112
113
114/* These are `magic' values for PTRACE_PEEKUSR that return info about where
115 a process is located in memory. */
116#define PT_TEXT_ADDR (PT_SIZE + 1)
117#define PT_TEXT_LEN (PT_SIZE + 2)
118#define PT_DATA_ADDR (PT_SIZE + 3)
119
120
121#endif /* __V850_PTRACE_H__ */
diff --git a/include/asm-v850/resource.h b/include/asm-v850/resource.h
new file mode 100644
index 000000000000..4b9dcd44f8d1
--- /dev/null
+++ b/include/asm-v850/resource.h
@@ -0,0 +1,6 @@
1#ifndef __V850_RESOURCE_H__
2#define __V850_RESOURCE_H__
3
4#include <asm-generic/resource.h>
5
6#endif /* __V850_RESOURCE_H__ */
diff --git a/include/asm-v850/rte_cb.h b/include/asm-v850/rte_cb.h
new file mode 100644
index 000000000000..9f7f02cb0391
--- /dev/null
+++ b/include/asm-v850/rte_cb.h
@@ -0,0 +1,85 @@
1/*
2 * include/asm-v850/rte_cb.h -- Midas labs RTE-CB series of evaluation boards
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_RTE_CB_H__
15#define __V850_RTE_CB_H__
16
17
18/* The SRAM on the Mother-A motherboard. */
19#define MB_A_SRAM_ADDR GCS0_ADDR
20#define MB_A_SRAM_SIZE 0x00200000 /* 2MB */
21
22
23#ifdef CONFIG_RTE_GBUS_INT
24/* GBUS interrupt support. */
25
26# include <asm/gbus_int.h>
27
28# define GBUS_INT_BASE_IRQ NUM_RTE_CB_IRQS
29# define GBUS_INT_BASE_ADDR (GCS2_ADDR + 0x00006000)
30
31/* Some specific interrupts. */
32# define IRQ_MB_A_LAN IRQ_GBUS_INT(10)
33# define IRQ_MB_A_PCI1(n) (IRQ_GBUS_INT(16) + (n))
34# define IRQ_MB_A_PCI1_NUM 4
35# define IRQ_MB_A_PCI2(n) (IRQ_GBUS_INT(20) + (n))
36# define IRQ_MB_A_PCI2_NUM 4
37# define IRQ_MB_A_EXT(n) (IRQ_GBUS_INT(24) + (n))
38# define IRQ_MB_A_EXT_NUM 4
39# define IRQ_MB_A_USB_OC(n) (IRQ_GBUS_INT(28) + (n))
40# define IRQ_MB_A_USB_OC_NUM 2
41# define IRQ_MB_A_PCMCIA_OC IRQ_GBUS_INT(30)
42
43/* We define NUM_MACH_IRQS to include extra interrupts from the GBUS. */
44# define NUM_MACH_IRQS (NUM_RTE_CB_IRQS + IRQ_GBUS_INT_NUM)
45
46#else /* !CONFIG_RTE_GBUS_INT */
47
48# define NUM_MACH_IRQS NUM_RTE_CB_IRQS
49
50#endif /* CONFIG_RTE_GBUS_INT */
51
52
53#ifdef CONFIG_RTE_MB_A_PCI
54/* Mother-A PCI bus support. */
55
56# include <asm/rte_mb_a_pci.h>
57
58/* These are the base addresses used for allocating device address
59 space. 512K of the motherboard SRAM is in the same space, so we have
60 to be careful not to let it be allocated. */
61# define PCIBIOS_MIN_MEM (MB_A_PCI_MEM_ADDR + 0x80000)
62# define PCIBIOS_MIN_IO MB_A_PCI_IO_ADDR
63
64/* As we don't really support PCI DMA to cpu memory, and use bounce-buffers
65 instead, perversely enough, this becomes always true! */
66# define pci_dma_supported(dev, mask) 1
67# define pci_dac_dma_supported(dev, mask) 0
68# define pcibios_assign_all_busses() 1
69
70#endif /* CONFIG_RTE_MB_A_PCI */
71
72
73/* For <asm/param.h> */
74#ifndef HZ
75#define HZ 100
76#endif
77
78
79#ifndef __ASSEMBLY__
80extern void rte_cb_early_init (void);
81extern void rte_cb_init_irqs (void);
82#endif /* !__ASSEMBLY__ */
83
84
85#endif /* __V850_RTE_CB_H__ */
diff --git a/include/asm-v850/rte_ma1_cb.h b/include/asm-v850/rte_ma1_cb.h
new file mode 100644
index 000000000000..bd3162ab9844
--- /dev/null
+++ b/include/asm-v850/rte_ma1_cb.h
@@ -0,0 +1,128 @@
1/*
2 * include/asm-v850/rte_ma1_cb.h -- Midas labs RTE-V850/MA1-CB board
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_RTE_MA1_CB_H__
15#define __V850_RTE_MA1_CB_H__
16
17#include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */
18
19
20#define PLATFORM "rte-v850e/ma1-cb"
21#define PLATFORM_LONG "Midas lab RTE-V850E/MA1-CB"
22
23#define CPU_CLOCK_FREQ 50000000 /* 50MHz */
24
25/* 1MB of onboard SRAM. Note that the monitor ROM uses parts of this
26 for its own purposes, so care must be taken. Some address lines are
27 not decoded, so the SRAM area is mirrored every 1MB from 0x400000 to
28 0x800000 (exclusive). */
29#define SRAM_ADDR 0x00400000
30#define SRAM_SIZE 0x00100000 /* 1MB */
31
32/* 32MB of onbard SDRAM. */
33#define SDRAM_ADDR 0x00800000
34#define SDRAM_SIZE 0x02000000 /* 32MB */
35
36
37/* CPU addresses of GBUS memory spaces. */
38#define GCS0_ADDR 0x05000000 /* GCS0 - Common SRAM (2MB) */
39#define GCS0_SIZE 0x00200000 /* 2MB */
40#define GCS1_ADDR 0x06000000 /* GCS1 - Flash ROM (8MB) */
41#define GCS1_SIZE 0x00800000 /* 8MB */
42#define GCS2_ADDR 0x07900000 /* GCS2 - I/O registers */
43#define GCS2_SIZE 0x00400000 /* 4MB */
44#define GCS5_ADDR 0x04000000 /* GCS5 - PCI bus space */
45#define GCS5_SIZE 0x01000000 /* 16MB */
46#define GCS6_ADDR 0x07980000 /* GCS6 - PCI control registers */
47#define GCS6_SIZE 0x00000200 /* 512B */
48
49
50/* For <asm/page.h> */
51#define PAGE_OFFSET SRAM_ADDR
52
53
54/* The GBUS GINT0 - GINT3 interrupts are connected to the INTP000 - INTP011
55 pins on the CPU. These are shared among the GBUS interrupts. */
56#define IRQ_GINT(n) IRQ_INTP(n)
57#define IRQ_GINT_NUM 4
58
59/* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS. */
60#define NUM_RTE_CB_IRQS NUM_CPU_IRQS
61
62
63#ifdef CONFIG_ROM_KERNEL
64/* Kernel is in ROM, starting at address 0. */
65
66#define INTV_BASE 0
67
68#else /* !CONFIG_ROM_KERNEL */
69
70#ifdef CONFIG_RTE_CB_MULTI
71/* Using RAM kernel with ROM monitor for Multi debugger. */
72
73/* The chip's real interrupt vectors are in ROM, but they jump to a
74 secondary interrupt vector table in RAM. */
75#define INTV_BASE 0x004F8000
76
77/* Scratch memory used by the ROM monitor, which shouldn't be used by
78 linux (except for the alternate interrupt vector area, defined
79 above). */
80#define MON_SCRATCH_ADDR 0x004F8000
81#define MON_SCRATCH_SIZE 0x00008000 /* 32KB */
82
83#else /* !CONFIG_RTE_CB_MULTI */
84/* Using RAM-kernel. Assume some sort of boot-loader got us loaded at
85 address 0. */
86
87#define INTV_BASE 0
88
89#endif /* CONFIG_RTE_CB_MULTI */
90
91#endif /* CONFIG_ROM_KERNEL */
92
93
94/* Some misc. on-board devices. */
95
96/* Seven-segment LED display (two digits). Write-only. */
97#define LED_ADDR(n) (0x07802000 + (n))
98#define LED(n) (*(volatile unsigned char *)LED_ADDR(n))
99#define LED_NUM_DIGITS 2
100
101
102/* Override the basic MA uart pre-initialization so that we can
103 initialize extra stuff. */
104#undef V850E_UART_PRE_CONFIGURE /* should be defined by <asm/ma.h> */
105#define V850E_UART_PRE_CONFIGURE rte_ma1_cb_uart_pre_configure
106#ifndef __ASSEMBLY__
107extern void rte_ma1_cb_uart_pre_configure (unsigned chan,
108 unsigned cflags, unsigned baud);
109#endif
110
111/* This board supports RTS/CTS for the on-chip UART, but only for channel 0. */
112
113/* CTS for UART channel 0 is pin P43 (bit 3 of port 4). */
114#define V850E_UART_CTS(chan) ((chan) == 0 ? !(MA_PORT4_IO & 0x8) : 1)
115/* RTS for UART channel 0 is pin P42 (bit 2 of port 4). */
116#define V850E_UART_SET_RTS(chan, val) \
117 do { \
118 if (chan == 0) { \
119 unsigned old = MA_PORT4_IO; \
120 if (val) \
121 MA_PORT4_IO = old & ~0x4; \
122 else \
123 MA_PORT4_IO = old | 0x4; \
124 } \
125 } while (0)
126
127
128#endif /* __V850_RTE_MA1_CB_H__ */
diff --git a/include/asm-v850/rte_mb_a_pci.h b/include/asm-v850/rte_mb_a_pci.h
new file mode 100644
index 000000000000..41ac185ca9cd
--- /dev/null
+++ b/include/asm-v850/rte_mb_a_pci.h
@@ -0,0 +1,56 @@
1/*
2 * include/asm-v850/mb_a_pci.h -- PCI support for Midas lab RTE-MOTHER-A board
3 *
4 * Copyright (C) 2001 NEC Corporation
5 * Copyright (C) 2001 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_MB_A_PCI_H__
15#define __V850_MB_A_PCI_H__
16
17
18#define MB_A_PCI_MEM_ADDR GCS5_ADDR
19#define MB_A_PCI_MEM_SIZE (GCS5_SIZE / 2)
20#define MB_A_PCI_IO_ADDR (GCS5_ADDR + MB_A_PCI_MEM_SIZE)
21#define MB_A_PCI_IO_SIZE (GCS5_SIZE / 2)
22#define MB_A_PCI_REG_BASE_ADDR GCS6_ADDR
23
24#define MB_A_PCI_PCICR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x4)
25#define MB_A_PCI_PCICR (*(volatile u16 *)MB_A_PCI_PCICR_ADDR)
26#define MB_A_PCI_PCISR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x6)
27#define MB_A_PCI_PCISR (*(volatile u16 *)MB_A_PCI_PCISR_ADDR)
28#define MB_A_PCI_PCILTR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xD)
29#define MB_A_PCI_PCILTR (*(volatile u8 *)MB_A_PCI_PCILTR_ADDR)
30#define MB_A_PCI_PCIBAR0_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x10)
31#define MB_A_PCI_PCIBAR0 (*(volatile u32 *)MB_A_PCI_PCIBAR0_ADDR)
32#define MB_A_PCI_PCIBAR1_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x14)
33#define MB_A_PCI_PCIBAR1 (*(volatile u32 *)MB_A_PCI_PCIBAR1_ADDR)
34#define MB_A_PCI_PCIBAR2_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x18)
35#define MB_A_PCI_PCIBAR2 (*(volatile u32 *)MB_A_PCI_PCIBAR2_ADDR)
36#define MB_A_PCI_VENDOR_ID_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x2C)
37#define MB_A_PCI_VENDOR_ID (*(volatile u16 *)MB_A_PCI_VENDOR_ID_ADDR)
38#define MB_A_PCI_DEVICE_ID_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x2E)
39#define MB_A_PCI_DEVICE_ID (*(volatile u16 *)MB_A_PCI_DEVICE_ID_ADDR)
40#define MB_A_PCI_DMRR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0x9C)
41#define MB_A_PCI_DMRR (*(volatile u32 *)MB_A_PCI_DMRR_ADDR)
42#define MB_A_PCI_DMLBAM_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xA0)
43#define MB_A_PCI_DMLBAM (*(volatile u32 *)MB_A_PCI_DMLBAM_ADDR)
44#define MB_A_PCI_DMLBAI_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xA4)
45#define MB_A_PCI_DMLBAI (*(volatile u32 *)MB_A_PCI_DMLBAI_ADDR)
46#define MB_A_PCI_PCIPBAM_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xA8)
47#define MB_A_PCI_PCIPBAM (*(volatile u32 *)MB_A_PCI_PCIPBAM_ADDR)
48/* `PCI Configuration Address Register for Direct Master to PCI IO/CFG' */
49#define MB_A_PCI_DMCFGA_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xAC)
50#define MB_A_PCI_DMCFGA (*(volatile u32 *)MB_A_PCI_DMCFGA_ADDR)
51/* `PCI Permanent Configuration ID Register' */
52#define MB_A_PCI_PCIHIDR_ADDR (MB_A_PCI_REG_BASE_ADDR + 0xF0)
53#define MB_A_PCI_PCIHIDR (*(volatile u32 *)MB_A_PCI_PCIHIDR_ADDR)
54
55
56#endif /* __V850_MB_A_PCI_H__ */
diff --git a/include/asm-v850/rte_me2_cb.h b/include/asm-v850/rte_me2_cb.h
new file mode 100644
index 000000000000..9922c85c85a8
--- /dev/null
+++ b/include/asm-v850/rte_me2_cb.h
@@ -0,0 +1,202 @@
1/*
2 * include/asm-v850/rte_me2_cb.h -- Midas labs RTE-V850E/ME2-CB board
3 *
4 * Copyright (C) 2001,02,03 NEC Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_RTE_ME2_CB_H__
15#define __V850_RTE_ME2_CB_H__
16
17#include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */
18
19
20#define PLATFORM "rte-v850e/me2-cb"
21#define PLATFORM_LONG "Midas lab RTE-V850E/ME2-CB"
22
23#define CPU_CLOCK_FREQ 150000000 /* 150MHz */
24#define FIXED_BOGOMIPS 50
25
26/* 32MB of onbard SDRAM. */
27#define SDRAM_ADDR 0x00800000
28#define SDRAM_SIZE 0x02000000 /* 32MB */
29
30
31/* CPU addresses of GBUS memory spaces. */
32#define GCS0_ADDR 0x04000000 /* GCS0 - Common SRAM (2MB) */
33#define GCS0_SIZE 0x00800000 /* 8MB */
34#define GCS1_ADDR 0x04800000 /* GCS1 - Flash ROM (8MB) */
35#define GCS1_SIZE 0x00800000 /* 8MB */
36#define GCS2_ADDR 0x07000000 /* GCS2 - I/O registers */
37#define GCS2_SIZE 0x00800000 /* 8MB */
38#define GCS5_ADDR 0x08000000 /* GCS5 - PCI bus space */
39#define GCS5_SIZE 0x02000000 /* 32MB */
40#define GCS6_ADDR 0x07800000 /* GCS6 - PCI control registers */
41#define GCS6_SIZE 0x00800000 /* 8MB */
42
43
44/* For <asm/page.h> */
45#define PAGE_OFFSET SDRAM_ADDR
46
47
48#ifdef CONFIG_ROM_KERNEL
49/* Kernel is in ROM, starting at address 0. */
50
51#define INTV_BASE 0
52#define ROOT_FS_IMAGE_RW 0
53
54#else /* !CONFIG_ROM_KERNEL */
55/* Using RAM-kernel. Assume some sort of boot-loader got us loaded at
56 address 0. */
57
58#define INTV_BASE 0
59#define ROOT_FS_IMAGE_RW 1
60
61#endif /* CONFIG_ROM_KERNEL */
62
63
64/* Some misc. on-board devices. */
65
66/* Seven-segment LED display (four digits). */
67#define LED_ADDR(n) (0x0FE02000 + (n))
68#define LED(n) (*(volatile unsigned char *)LED_ADDR(n))
69#define LED_NUM_DIGITS 4
70
71
72/* On-board PIC. */
73
74#define CB_PIC_BASE_ADDR 0x0FE04000
75
76#define CB_PIC_INT0M_ADDR (CB_PIC_BASE_ADDR + 0x00)
77#define CB_PIC_INT0M (*(volatile u16 *)CB_PIC_INT0M_ADDR)
78#define CB_PIC_INT1M_ADDR (CB_PIC_BASE_ADDR + 0x10)
79#define CB_PIC_INT1M (*(volatile u16 *)CB_PIC_INT1M_ADDR)
80#define CB_PIC_INTR_ADDR (CB_PIC_BASE_ADDR + 0x20)
81#define CB_PIC_INTR (*(volatile u16 *)CB_PIC_INTR_ADDR)
82#define CB_PIC_INTEN_ADDR (CB_PIC_BASE_ADDR + 0x30)
83#define CB_PIC_INTEN (*(volatile u16 *)CB_PIC_INTEN_ADDR)
84
85#define CB_PIC_INT0EN 0x0001
86#define CB_PIC_INT1EN 0x0002
87#define CB_PIC_INT0SEL 0x0080
88
89/* The PIC interrupts themselves. */
90#define CB_PIC_BASE_IRQ NUM_CPU_IRQS
91#define IRQ_CB_PIC_NUM 10
92
93/* Some specific CB_PIC interrupts. */
94#define IRQ_CB_EXTTM0 (CB_PIC_BASE_IRQ + 0)
95#define IRQ_CB_EXTSIO (CB_PIC_BASE_IRQ + 1)
96#define IRQ_CB_TOVER (CB_PIC_BASE_IRQ + 2)
97#define IRQ_CB_GINT0 (CB_PIC_BASE_IRQ + 3)
98#define IRQ_CB_USB (CB_PIC_BASE_IRQ + 4)
99#define IRQ_CB_LANC (CB_PIC_BASE_IRQ + 5)
100#define IRQ_CB_USB_VBUS_ON (CB_PIC_BASE_IRQ + 6)
101#define IRQ_CB_USB_VBUS_OFF (CB_PIC_BASE_IRQ + 7)
102#define IRQ_CB_EXTTM1 (CB_PIC_BASE_IRQ + 8)
103#define IRQ_CB_EXTTM2 (CB_PIC_BASE_IRQ + 9)
104
105/* The GBUS GINT1 - GINT3 (note, not GINT0!) interrupts are connected to
106 the INTP65 - INTP67 pins on the CPU. These are shared among the GBUS
107 interrupts. */
108#define IRQ_GINT(n) IRQ_INTP((n) + 9) /* 0 is unused! */
109#define IRQ_GINT_NUM 4 /* 0 is unused! */
110
111/* The shared interrupt line from the PIC is connected to CPU pin INTP23. */
112#define IRQ_CB_PIC IRQ_INTP(4) /* P23 */
113
114/* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS. */
115#define NUM_RTE_CB_IRQS (NUM_CPU_IRQS + IRQ_CB_PIC_NUM)
116
117
118#ifndef __ASSEMBLY__
119struct cb_pic_irq_init {
120 const char *name; /* name of interrupt type */
121
122 /* Range of kernel irq numbers for this type:
123 BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM */
124 unsigned base, num, interval;
125
126 unsigned priority; /* interrupt priority to assign */
127};
128struct hw_interrupt_type; /* fwd decl */
129
130/* Enable interrupt handling for interrupt IRQ. */
131extern void cb_pic_enable_irq (unsigned irq);
132/* Disable interrupt handling for interrupt IRQ. Note that any interrupts
133 received while disabled will be delivered once the interrupt is enabled
134 again, unless they are explicitly cleared using `cb_pic_clear_pending_irq'. */
135extern void cb_pic_disable_irq (unsigned irq);
136/* Initialize HW_IRQ_TYPES for PIC irqs described in array INITS (which is
137 terminated by an entry with the name field == 0). */
138extern void cb_pic_init_irq_types (struct cb_pic_irq_init *inits,
139 struct hw_interrupt_type *hw_irq_types);
140/* Initialize PIC interrupts. */
141extern void cb_pic_init_irqs (void);
142#endif /* __ASSEMBLY__ */
143
144
145/* TL16C550C on board UART see also asm/serial.h */
146#define CB_UART_BASE 0x0FE08000
147#define CB_UART_REG_GAP 0x10
148#define CB_UART_CLOCK 0x16000000
149
150/* CompactFlash setting */
151#define CB_CF_BASE 0x0FE0C000
152#define CB_CF_CCR_ADDR (CB_CF_BASE+0x200)
153#define CB_CF_CCR (*(volatile u8 *)CB_CF_CCR_ADDR)
154#define CB_CF_REG0_ADDR (CB_CF_BASE+0x1000)
155#define CB_CF_REG0 (*(volatile u16 *)CB_CF_REG0_ADDR)
156#define CB_CF_STS0_ADDR (CB_CF_BASE+0x1004)
157#define CB_CF_STS0 (*(volatile u16 *)CB_CF_STS0_ADDR)
158#define CB_PCATA_BASE (CB_CF_BASE+0x800)
159#define CB_IDE_BASE (CB_CF_BASE+0x9F0)
160#define CB_IDE_CTRL (CB_CF_BASE+0xBF6)
161#define CB_IDE_REG_OFFS 0x1
162
163
164/* SMSC LAN91C111 setting */
165#if defined(CONFIG_SMC91111)
166#define CB_LANC_BASE 0x0FE10300
167#define CONFIG_SMC16BITONLY
168#define ETH0_ADDR CB_LANC_BASE
169#define ETH0_IRQ IRQ_CB_LANC
170#endif /* CONFIG_SMC16BITONLY */
171
172
173#undef V850E_UART_PRE_CONFIGURE
174#define V850E_UART_PRE_CONFIGURE rte_me2_cb_uart_pre_configure
175#ifndef __ASSEMBLY__
176extern void rte_me2_cb_uart_pre_configure (unsigned chan,
177 unsigned cflags, unsigned baud);
178#endif /* __ASSEMBLY__ */
179
180/* This board supports RTS/CTS for the on-chip UART, but only for channel 0. */
181
182/* CTS for UART channel 0 is pin P22 (bit 2 of port 2). */
183#define V850E_UART_CTS(chan) ((chan) == 0 ? !(ME2_PORT2_IO & 0x4) : 1)
184/* RTS for UART channel 0 is pin P21 (bit 1 of port 2). */
185#define V850E_UART_SET_RTS(chan, val) \
186 do { \
187 if (chan == 0) { \
188 unsigned old = ME2_PORT2_IO; \
189 if (val) \
190 ME2_PORT2_IO = old & ~0x2; \
191 else \
192 ME2_PORT2_IO = old | 0x2; \
193 } \
194 } while (0)
195
196
197#ifndef __ASSEMBLY__
198extern void rte_me2_cb_init_irqs (void);
199#endif /* !__ASSEMBLY__ */
200
201
202#endif /* __V850_RTE_ME2_CB_H__ */
diff --git a/include/asm-v850/rte_nb85e_cb.h b/include/asm-v850/rte_nb85e_cb.h
new file mode 100644
index 000000000000..f56591cad90a
--- /dev/null
+++ b/include/asm-v850/rte_nb85e_cb.h
@@ -0,0 +1,111 @@
1/*
2 * include/asm-v850/rte_nb85e_cb.h -- Midas labs RTE-V850/NB85E-CB board
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_RTE_NB85E_CB_H__
15#define __V850_RTE_NB85E_CB_H__
16
17#include <asm/rte_cb.h> /* Common defs for Midas RTE-CB boards. */
18
19
20#define PLATFORM "rte-v850e/nb85e-cb"
21#define PLATFORM_LONG "Midas lab RTE-V850E/NB85E-CB"
22
23#define CPU_CLOCK_FREQ 50000000 /* 50MHz */
24
25/* 1MB of onboard SRAM. Note that the monitor ROM uses parts of this
26 for its own purposes, so care must be taken. */
27#define SRAM_ADDR 0x03C00000
28#define SRAM_SIZE 0x00100000 /* 1MB */
29
30/* 16MB of onbard SDRAM. */
31#define SDRAM_ADDR 0x01000000
32#define SDRAM_SIZE 0x01000000 /* 16MB */
33
34
35/* CPU addresses of GBUS memory spaces. */
36#define GCS0_ADDR 0x00400000 /* GCS0 - Common SRAM (2MB) */
37#define GCS0_SIZE 0x00400000 /* 4MB */
38#define GCS1_ADDR 0x02000000 /* GCS1 - Flash ROM (8MB) */
39#define GCS1_SIZE 0x00800000 /* 8MB */
40#define GCS2_ADDR 0x03900000 /* GCS2 - I/O registers */
41#define GCS2_SIZE 0x00080000 /* 512KB */
42#define GCS3_ADDR 0x02800000 /* GCS3 - EXT-bus: memory space */
43#define GCS3_SIZE 0x00800000 /* 8MB */
44#define GCS4_ADDR 0x03A00000 /* GCS4 - EXT-bus: I/O space */
45#define GCS4_SIZE 0x00200000 /* 2MB */
46#define GCS5_ADDR 0x00800000 /* GCS5 - PCI bus space */
47#define GCS5_SIZE 0x00800000 /* 8MB */
48#define GCS6_ADDR 0x03980000 /* GCS6 - PCI control registers */
49#define GCS6_SIZE 0x00010000 /* 64KB */
50
51
52/* The GBUS GINT0 - GINT3 interrupts are connected to CPU interrupts 10-12.
53 These are shared among the GBUS interrupts. */
54#define IRQ_GINT(n) (10 + (n))
55#define IRQ_GINT_NUM 3
56
57/* Used by <asm/rte_cb.h> to derive NUM_MACH_IRQS. */
58#define NUM_RTE_CB_IRQS NUM_CPU_IRQS
59
60
61#ifdef CONFIG_ROM_KERNEL
62/* Kernel is in ROM, starting at address 0. */
63
64#define INTV_BASE 0
65
66#else /* !CONFIG_ROM_KERNEL */
67/* We're using the ROM monitor. */
68
69/* The chip's real interrupt vectors are in ROM, but they jump to a
70 secondary interrupt vector table in RAM. */
71#define INTV_BASE 0x03CF8000
72
73/* Scratch memory used by the ROM monitor, which shouldn't be used by
74 linux (except for the alternate interrupt vector area, defined
75 above). */
76#define MON_SCRATCH_ADDR 0x03CE8000
77#define MON_SCRATCH_SIZE 0x00018000 /* 96KB */
78
79#endif /* CONFIG_ROM_KERNEL */
80
81
82/* Some misc. on-board devices. */
83
84/* Seven-segment LED display (two digits). Write-only. */
85#define LED_ADDR(n) (0x03802000 + (n))
86#define LED(n) (*(volatile unsigned char *)LED_ADDR(n))
87#define LED_NUM_DIGITS 4
88
89
90/* Override the basic TEG UART pre-initialization so that we can
91 initialize extra stuff. */
92#undef V850E_UART_PRE_CONFIGURE /* should be defined by <asm/teg.h> */
93#define V850E_UART_PRE_CONFIGURE rte_nb85e_cb_uart_pre_configure
94#ifndef __ASSEMBLY__
95extern void rte_nb85e_cb_uart_pre_configure (unsigned chan,
96 unsigned cflags, unsigned baud);
97#endif
98
99/* This board supports RTS/CTS for the on-chip UART. */
100
101/* CTS is pin P00. */
102#define V850E_UART_CTS(chan) (! (TEG_PORT0_IO & 0x1))
103/* RTS is pin P02. */
104#define V850E_UART_SET_RTS(chan, val) \
105 do { \
106 unsigned old = TEG_PORT0_IO; \
107 TEG_PORT0_IO = val ? (old & ~0x4) : (old | 0x4); \
108 } while (0)
109
110
111#endif /* __V850_RTE_NB85E_CB_H__ */
diff --git a/include/asm-v850/scatterlist.h b/include/asm-v850/scatterlist.h
new file mode 100644
index 000000000000..af1cba69a526
--- /dev/null
+++ b/include/asm-v850/scatterlist.h
@@ -0,0 +1,26 @@
1/*
2 * include/asm-v850/scatterlist.h
3 *
4 * Copyright (C) 2001,02 NEC Corporation
5 * Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_SCATTERLIST_H__
15#define __V850_SCATTERLIST_H__
16
17struct scatterlist {
18 struct page *page;
19 unsigned offset;
20 dma_addr_t dma_address;
21 unsigned length;
22};
23
24#define ISA_DMA_THRESHOLD (~0UL)
25
26#endif /* __V850_SCATTERLIST_H__ */
diff --git a/include/asm-v850/sections.h b/include/asm-v850/sections.h
new file mode 100644
index 000000000000..e0238253a0d0
--- /dev/null
+++ b/include/asm-v850/sections.h
@@ -0,0 +1,6 @@
1#ifndef __V850_SECTIONS_H__
2#define __V850_SECTIONS_H__
3
4#include <asm-generic/sections.h>
5
6#endif /* __V850_SECTIONS_H__ */
diff --git a/include/asm-v850/segment.h b/include/asm-v850/segment.h
new file mode 100644
index 000000000000..5e2b15dcf3d9
--- /dev/null
+++ b/include/asm-v850/segment.h
@@ -0,0 +1,36 @@
1#ifndef __V850_SEGMENT_H__
2#define __V850_SEGMENT_H__
3
4
5#ifndef __ASSEMBLY__
6
7typedef unsigned long mm_segment_t; /* domain register */
8
9#endif /* !__ASSEMBLY__ */
10
11
12#define __KERNEL_CS 0x0
13#define __KERNEL_DS 0x0
14
15#define __USER_CS 0x1
16#define __USER_DS 0x1
17
18#define KERNEL_DS __KERNEL_DS
19#define KERNEL_CS __KERNEL_CS
20#define USER_DS __USER_DS
21#define USER_CS __USER_CS
22
23#define segment_eq(a,b) ((a) == (b))
24
25#define get_ds() (KERNEL_DS)
26#define get_fs() (USER_DS)
27
28#define set_fs(seg) ((void)(seg))
29
30
31#define copy_segments(task, mm) ((void)((void)(task), (mm)))
32#define release_segments(mm) ((void)(mm))
33#define forget_segments() ((void)0)
34
35
36#endif /* __V850_SEGMENT_H__ */
diff --git a/include/asm-v850/semaphore.h b/include/asm-v850/semaphore.h
new file mode 100644
index 000000000000..c514062bb69e
--- /dev/null
+++ b/include/asm-v850/semaphore.h
@@ -0,0 +1,88 @@
1#ifndef __V850_SEMAPHORE_H__
2#define __V850_SEMAPHORE_H__
3
4#include <linux/linkage.h>
5#include <linux/spinlock.h>
6#include <linux/wait.h>
7#include <linux/rwsem.h>
8
9#include <asm/atomic.h>
10
11struct semaphore {
12 atomic_t count;
13 int sleepers;
14 wait_queue_head_t wait;
15};
16
17#define __SEMAPHORE_INITIALIZER(name,count) \
18 { ATOMIC_INIT (count), 0, \
19 __WAIT_QUEUE_HEAD_INITIALIZER ((name).wait) }
20
21#define __MUTEX_INITIALIZER(name) \
22 __SEMAPHORE_INITIALIZER (name,1)
23
24#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
25 struct semaphore name = __SEMAPHORE_INITIALIZER (name,count)
26
27#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC (name,1)
28#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC (name,0)
29
30extern inline void sema_init (struct semaphore *sem, int val)
31{
32 *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val);
33}
34
35static inline void init_MUTEX (struct semaphore *sem)
36{
37 sema_init (sem, 1);
38}
39
40static inline void init_MUTEX_LOCKED (struct semaphore *sem)
41{
42 sema_init (sem, 0);
43}
44
45/*
46 * special register calling convention
47 */
48asmlinkage void __down_failed (void);
49asmlinkage int __down_interruptible_failed (void);
50asmlinkage int __down_trylock_failed (void);
51asmlinkage void __up_wakeup (void);
52
53extern void __down (struct semaphore * sem);
54extern int __down_interruptible (struct semaphore * sem);
55extern int __down_trylock (struct semaphore * sem);
56extern void __up (struct semaphore * sem);
57
58extern inline void down (struct semaphore * sem)
59{
60 might_sleep();
61 if (atomic_dec_return (&sem->count) < 0)
62 __down (sem);
63}
64
65extern inline int down_interruptible (struct semaphore * sem)
66{
67 int ret = 0;
68 might_sleep();
69 if (atomic_dec_return (&sem->count) < 0)
70 ret = __down_interruptible (sem);
71 return ret;
72}
73
74extern inline int down_trylock (struct semaphore *sem)
75{
76 int ret = 0;
77 if (atomic_dec_return (&sem->count) < 0)
78 ret = __down_trylock (sem);
79 return ret;
80}
81
82extern inline void up (struct semaphore * sem)
83{
84 if (atomic_inc_return (&sem->count) <= 0)
85 __up (sem);
86}
87
88#endif /* __V850_SEMAPHORE_H__ */
diff --git a/include/asm-v850/sembuf.h b/include/asm-v850/sembuf.h
new file mode 100644
index 000000000000..1622231a8b85
--- /dev/null
+++ b/include/asm-v850/sembuf.h
@@ -0,0 +1,25 @@
1#ifndef __V850_SEMBUF_H__
2#define __V850_SEMBUF_H__
3
4/*
5 * The semid64_ds structure for v850 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct semid64_ds {
15 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
16 __kernel_time_t sem_otime; /* last semop time */
17 unsigned long __unused1;
18 __kernel_time_t sem_ctime; /* last change time */
19 unsigned long __unused2;
20 unsigned long sem_nsems; /* no. of semaphores in array */
21 unsigned long __unused3;
22 unsigned long __unused4;
23};
24
25#endif /* __V850_SEMBUF_H__ */
diff --git a/include/asm-v850/serial.h b/include/asm-v850/serial.h
new file mode 100644
index 000000000000..8c2a609ba2b0
--- /dev/null
+++ b/include/asm-v850/serial.h
@@ -0,0 +1,57 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1999 by Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 */
9#include <linux/config.h>
10
11#ifdef CONFIG_RTE_CB_ME2
12
13#include <asm/rte_me2_cb.h>
14
15#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
16
17#define irq_cannonicalize(x) (x)
18#define BASE_BAUD 250000 /* (16MHz / (16 * 38400)) * 9600 */
19#define SERIAL_PORT_DFNS \
20 { 0, BASE_BAUD, CB_UART_BASE, IRQ_CB_EXTSIO, STD_COM_FLAGS },
21
22/* Redefine UART register offsets. */
23#undef UART_RX
24#undef UART_TX
25#undef UART_DLL
26#undef UART_TRG
27#undef UART_DLM
28#undef UART_IER
29#undef UART_FCTR
30#undef UART_IIR
31#undef UART_FCR
32#undef UART_EFR
33#undef UART_LCR
34#undef UART_MCR
35#undef UART_LSR
36#undef UART_MSR
37#undef UART_SCR
38#undef UART_EMSR
39
40#define UART_RX (0 * CB_UART_REG_GAP)
41#define UART_TX (0 * CB_UART_REG_GAP)
42#define UART_DLL (0 * CB_UART_REG_GAP)
43#define UART_TRG (0 * CB_UART_REG_GAP)
44#define UART_DLM (1 * CB_UART_REG_GAP)
45#define UART_IER (1 * CB_UART_REG_GAP)
46#define UART_FCTR (1 * CB_UART_REG_GAP)
47#define UART_IIR (2 * CB_UART_REG_GAP)
48#define UART_FCR (2 * CB_UART_REG_GAP)
49#define UART_EFR (2 * CB_UART_REG_GAP)
50#define UART_LCR (3 * CB_UART_REG_GAP)
51#define UART_MCR (4 * CB_UART_REG_GAP)
52#define UART_LSR (5 * CB_UART_REG_GAP)
53#define UART_MSR (6 * CB_UART_REG_GAP)
54#define UART_SCR (7 * CB_UART_REG_GAP)
55#define UART_EMSR (7 * CB_UART_REG_GAP)
56
57#endif /* CONFIG_RTE_CB_ME2 */
diff --git a/include/asm-v850/setup.h b/include/asm-v850/setup.h
new file mode 100644
index 000000000000..c48a9b97d05b
--- /dev/null
+++ b/include/asm-v850/setup.h
@@ -0,0 +1,6 @@
1#ifndef _V850_SETUP_H
2#define _V850_SETUP_H
3
4#define COMMAND_LINE_SIZE 512
5
6#endif /* __SETUP_H */
diff --git a/include/asm-v850/shmbuf.h b/include/asm-v850/shmbuf.h
new file mode 100644
index 000000000000..3d085c9c418e
--- /dev/null
+++ b/include/asm-v850/shmbuf.h
@@ -0,0 +1,42 @@
1#ifndef __V850_SHMBUF_H__
2#define __V850_SHMBUF_H__
3
4/*
5 * The shmid64_ds structure for v850 architecture.
6 * Note extra padding because this structure is passed back and forth
7 * between kernel and user space.
8 *
9 * Pad space is left for:
10 * - 64-bit time_t to solve y2038 problem
11 * - 2 miscellaneous 32-bit values
12 */
13
14struct shmid64_ds {
15 struct ipc64_perm shm_perm; /* operation perms */
16 size_t shm_segsz; /* size of segment (bytes) */
17 __kernel_time_t shm_atime; /* last attach time */
18 unsigned long __unused1;
19 __kernel_time_t shm_dtime; /* last detach time */
20 unsigned long __unused2;
21 __kernel_time_t shm_ctime; /* last change time */
22 unsigned long __unused3;
23 __kernel_pid_t shm_cpid; /* pid of creator */
24 __kernel_pid_t shm_lpid; /* pid of last operator */
25 unsigned long shm_nattch; /* no. of current attaches */
26 unsigned long __unused4;
27 unsigned long __unused5;
28};
29
30struct shminfo64 {
31 unsigned long shmmax;
32 unsigned long shmmin;
33 unsigned long shmmni;
34 unsigned long shmseg;
35 unsigned long shmall;
36 unsigned long __unused1;
37 unsigned long __unused2;
38 unsigned long __unused3;
39 unsigned long __unused4;
40};
41
42#endif /* __V850_SHMBUF_H__ */
diff --git a/include/asm-v850/shmparam.h b/include/asm-v850/shmparam.h
new file mode 100644
index 000000000000..7dcb6739073e
--- /dev/null
+++ b/include/asm-v850/shmparam.h
@@ -0,0 +1,6 @@
1#ifndef __V850_SHMPARAM_H__
2#define __V850_SHMPARAM_H__
3
4#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
5
6#endif /* __V850_SHMPARAM_H__ */
diff --git a/include/asm-v850/sigcontext.h b/include/asm-v850/sigcontext.h
new file mode 100644
index 000000000000..e0890f6f4bc9
--- /dev/null
+++ b/include/asm-v850/sigcontext.h
@@ -0,0 +1,25 @@
1/*
2 * include/asm-v850/sigcontext.h -- Signal contexts
3 *
4 * Copyright (C) 2001 NEC Corporation
5 * Copyright (C) 2001 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_SIGCONTEXT_H__
15#define __V850_SIGCONTEXT_H__
16
17#include <asm/ptrace.h>
18
19struct sigcontext
20{
21 struct pt_regs regs;
22 unsigned long oldmask;
23};
24
25#endif /* __V850_SIGCONTEXT_H__ */
diff --git a/include/asm-v850/siginfo.h b/include/asm-v850/siginfo.h
new file mode 100644
index 000000000000..7eb94703dce0
--- /dev/null
+++ b/include/asm-v850/siginfo.h
@@ -0,0 +1,6 @@
1#ifndef __V850_SIGINFO_H__
2#define __V850_SIGINFO_H__
3
4#include <asm-generic/siginfo.h>
5
6#endif /* __V850_SIGINFO_H__ */
diff --git a/include/asm-v850/signal.h b/include/asm-v850/signal.h
new file mode 100644
index 000000000000..407db875899c
--- /dev/null
+++ b/include/asm-v850/signal.h
@@ -0,0 +1,195 @@
1#ifndef __V850_SIGNAL_H__
2#define __V850_SIGNAL_H__
3
4#include <linux/types.h>
5
6/* Avoid too many header ordering problems. */
7struct siginfo;
8
9
10#ifdef __KERNEL__
11
12/* Most things should be clean enough to redefine this at will, if care
13 is taken to make libc match. */
14#define _NSIG 64
15#define _NSIG_BPW 32
16#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
17
18typedef unsigned long old_sigset_t; /* at least 32 bits */
19
20typedef struct {
21 unsigned long sig[_NSIG_WORDS];
22} sigset_t;
23
24#else /* !__KERNEL__ */
25
26/* Here we must cater to libcs that poke about in kernel headers. */
27
28#define NSIG 32
29typedef unsigned long sigset_t;
30
31#endif /* __KERNEL__ */
32
33
34#define SIGHUP 1
35#define SIGINT 2
36#define SIGQUIT 3
37#define SIGILL 4
38#define SIGTRAP 5
39#define SIGABRT 6
40#define SIGIOT 6
41#define SIGBUS 7
42#define SIGFPE 8
43#define SIGKILL 9
44#define SIGUSR1 10
45#define SIGSEGV 11
46#define SIGUSR2 12
47#define SIGPIPE 13
48#define SIGALRM 14
49#define SIGTERM 15
50#define SIGSTKFLT 16
51#define SIGCHLD 17
52#define SIGCONT 18
53#define SIGSTOP 19
54#define SIGTSTP 20
55#define SIGTTIN 21
56#define SIGTTOU 22
57#define SIGURG 23
58#define SIGXCPU 24
59#define SIGXFSZ 25
60#define SIGVTALRM 26
61#define SIGPROF 27
62#define SIGWINCH 28
63#define SIGIO 29
64#define SIGPOLL SIGIO
65/*
66#define SIGLOST 29
67*/
68#define SIGPWR 30
69#define SIGSYS 31
70#define SIGUNUSED 31
71
72/* These should not be considered constants from userland. */
73#define SIGRTMIN 32
74#define SIGRTMAX _NSIG
75
76/*
77 * SA_FLAGS values:
78 *
79 * SA_ONSTACK indicates that a registered stack_t will be used.
80 * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
81 * SA_RESTART flag to get restarting signals (which were the default long ago)
82 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
83 * SA_RESETHAND clears the handler when the signal is delivered.
84 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
85 * SA_NODEFER prevents the current signal from being masked in the handler.
86 *
87 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
88 * Unix names RESETHAND and NODEFER respectively.
89 */
90#define SA_NOCLDSTOP 0x00000001
91#define SA_NOCLDWAIT 0x00000002
92#define SA_SIGINFO 0x00000004
93#define SA_ONSTACK 0x08000000
94#define SA_RESTART 0x10000000
95#define SA_NODEFER 0x40000000
96#define SA_RESETHAND 0x80000000
97
98#define SA_NOMASK SA_NODEFER
99#define SA_ONESHOT SA_RESETHAND
100#define SA_INTERRUPT 0x20000000 /* dummy -- ignored */
101
102#define SA_RESTORER 0x04000000
103
104/*
105 * sigaltstack controls
106 */
107#define SS_ONSTACK 1
108#define SS_DISABLE 2
109
110#define MINSIGSTKSZ 2048
111#define SIGSTKSZ 8192
112
113
114#ifdef __KERNEL__
115/*
116 * These values of sa_flags are used only by the kernel as part of the
117 * irq handling routines.
118 *
119 * SA_INTERRUPT is also used by the irq handling routines.
120 * SA_SHIRQ is for shared interrupt support on PCI and EISA.
121 */
122#define SA_PROBE SA_ONESHOT
123#define SA_SAMPLE_RANDOM SA_RESTART
124#define SA_SHIRQ 0x04000000
125#endif /* __KERNEL__ */
126
127
128#define SIG_BLOCK 0 /* for blocking signals */
129#define SIG_UNBLOCK 1 /* for unblocking signals */
130#define SIG_SETMASK 2 /* for setting the signal mask */
131
132/* Type of a signal handler. */
133typedef void (*__sighandler_t)(int);
134
135#define SIG_DFL ((__sighandler_t)0) /* default signal handling */
136#define SIG_IGN ((__sighandler_t)1) /* ignore signal */
137#define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
138
139
140#ifdef __KERNEL__
141
142struct old_sigaction {
143 __sighandler_t sa_handler;
144 old_sigset_t sa_mask;
145 unsigned long sa_flags;
146 void (*sa_restorer)(void);
147};
148
149struct sigaction {
150 __sighandler_t sa_handler;
151 unsigned long sa_flags;
152 void (*sa_restorer)(void);
153 sigset_t sa_mask; /* mask last for extensibility */
154};
155
156struct k_sigaction {
157 struct sigaction sa;
158};
159
160#else /* !__KERNEL__ */
161
162/* Here we must cater to libcs that poke about in kernel headers. */
163
164struct sigaction {
165 union {
166 __sighandler_t _sa_handler;
167 void (*_sa_sigaction)(int, struct siginfo *, void *);
168 } _u;
169 sigset_t sa_mask;
170 unsigned long sa_flags;
171 void (*sa_restorer)(void);
172};
173
174#define sa_handler _u._sa_handler
175#define sa_sigaction _u._sa_sigaction
176
177#endif /* __KERNEL__ */
178
179
180typedef struct sigaltstack {
181 void *ss_sp;
182 int ss_flags;
183 size_t ss_size;
184} stack_t;
185
186#ifdef __KERNEL__
187
188#include <asm/sigcontext.h>
189#undef __HAVE_ARCH_SIG_BITOPS
190
191#define ptrace_signal_deliver(regs, cookie) do { } while (0)
192
193#endif /* __KERNEL__ */
194
195#endif /* __V850_SIGNAL_H__ */
diff --git a/include/asm-v850/sim.h b/include/asm-v850/sim.h
new file mode 100644
index 000000000000..10236abbe9be
--- /dev/null
+++ b/include/asm-v850/sim.h
@@ -0,0 +1,52 @@
1/*
2 * include/asm-v850/sim.h -- Machine-dependent defs for GDB v850e simulator
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_SIM_H__
15#define __V850_SIM_H__
16
17
18#define CPU_ARCH "v850e"
19#define CPU_MODEL "v850e"
20#define CPU_MODEL_LONG "NEC V850E"
21#define PLATFORM "gdb/v850e"
22#define PLATFORM_LONG "GDB V850E simulator"
23
24
25/* We use a weird value for RAM, not just 0, for testing purposes.
26 These must match the values used in the linker script. */
27#define RAM_ADDR 0x8F000000
28#define RAM_SIZE 0x03000000
29
30
31/* For <asm/page.h> */
32#define PAGE_OFFSET RAM_ADDR
33
34
35/* For <asm/entry.h> */
36/* `R0 RAM', used for a few miscellaneous variables that must be
37 accessible using a load instruction relative to R0. On real
38 processors, this usually is on-chip RAM, but here we just
39 choose an arbitrary address that meets the above constraint. */
40#define R0_RAM_ADDR 0xFFFFF000
41
42
43/* For <asm/param.h> */
44#ifndef HZ
45#define HZ 24 /* Minimum supported frequency. */
46#endif
47
48/* For <asm/irq.h> */
49#define NUM_CPU_IRQS 6
50
51
52#endif /* __V850_SIM_H__ */
diff --git a/include/asm-v850/sim85e2.h b/include/asm-v850/sim85e2.h
new file mode 100644
index 000000000000..17dd4fa318e6
--- /dev/null
+++ b/include/asm-v850/sim85e2.h
@@ -0,0 +1,75 @@
1/*
2 * include/asm-v850/sim85e2.h -- Machine-dependent defs for
3 * V850E2 RTL simulator
4 *
5 * Copyright (C) 2002,03 NEC Electronics Corporation
6 * Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 *
12 * Written by Miles Bader <miles@gnu.org>
13 */
14
15#ifndef __V850_SIM85E2_H__
16#define __V850_SIM85E2_H__
17
18
19#include <asm/v850e2.h> /* Based on V850E2 core. */
20
21
22/* Various memory areas supported by the simulator.
23 These should match the corresponding definitions in the linker script. */
24
25/* `instruction RAM'; instruction fetches are much faster from IRAM than
26 from DRAM. */
27#define IRAM_ADDR 0
28#define IRAM_SIZE 0x00100000 /* 1MB */
29/* `data RAM', below and contiguous with the I/O space.
30 Data fetches are much faster from DRAM than from IRAM. */
31#define DRAM_ADDR 0xfff00000
32#define DRAM_SIZE 0x000ff000 /* 1020KB */
33/* `external ram'. Unlike the above RAM areas, this memory is cached,
34 so both instruction and data fetches should be (mostly) fast --
35 however, currently only write-through caching is supported, so writes
36 to ERAM will be slow. */
37#define ERAM_ADDR 0x00100000
38#define ERAM_SIZE 0x07f00000 /* 127MB (max) */
39/* Dynamic RAM; uses memory controller. */
40#define SDRAM_ADDR 0x10000000
41#define SDRAM_SIZE 0x01000000 /* 16MB */
42
43
44/* Simulator specific control registers. */
45/* NOTHAL controls whether the simulator will stop at a `halt' insn. */
46#define SIM85E2_NOTHAL_ADDR 0xffffff22
47#define SIM85E2_NOTHAL (*(volatile u8 *)SIM85E2_NOTHAL_ADDR)
48/* The simulator will stop N cycles after N is written to SIMFIN. */
49#define SIM85E2_SIMFIN_ADDR 0xffffff24
50#define SIM85E2_SIMFIN (*(volatile u16 *)SIM85E2_SIMFIN_ADDR)
51
52
53/* For <asm/irq.h> */
54#define NUM_CPU_IRQS 64
55
56
57/* For <asm/page.h> */
58#define PAGE_OFFSET SDRAM_ADDR
59
60
61/* For <asm/entry.h> */
62/* `R0 RAM', used for a few miscellaneous variables that must be accessible
63 using a load instruction relative to R0. The sim85e2 simulator
64 actually puts 1020K of RAM from FFF00000 to FFFFF000, so we arbitarily
65 choose a small portion at the end of that. */
66#define R0_RAM_ADDR 0xFFFFE000
67
68
69/* For <asm/param.h> */
70#ifndef HZ
71#define HZ 24 /* Minimum supported frequency. */
72#endif
73
74
75#endif /* __V850_SIM85E2_H__ */
diff --git a/include/asm-v850/sim85e2c.h b/include/asm-v850/sim85e2c.h
new file mode 100644
index 000000000000..eee543ff3af8
--- /dev/null
+++ b/include/asm-v850/sim85e2c.h
@@ -0,0 +1,26 @@
1/*
2 * include/asm-v850/sim85e2c.h -- Machine-dependent defs for
3 * V850E2 RTL simulator
4 *
5 * Copyright (C) 2002 NEC Corporation
6 * Copyright (C) 2002 Miles Bader <miles@gnu.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 *
12 * Written by Miles Bader <miles@gnu.org>
13 */
14
15#ifndef __V850_SIM85E2C_H__
16#define __V850_SIM85E2C_H__
17
18/* Use generic sim85e2 settings, other than the various names. */
19#include <asm/sim85e2.h>
20
21#define CPU_MODEL "v850e2"
22#define CPU_MODEL_LONG "NEC V850E2"
23#define PLATFORM "sim85e2c"
24#define PLATFORM_LONG "SIM85E2C V850E2 simulator"
25
26#endif /* __V850_SIM85E2C_H__ */
diff --git a/include/asm-v850/sim85e2s.h b/include/asm-v850/sim85e2s.h
new file mode 100644
index 000000000000..ee066d5d3c51
--- /dev/null
+++ b/include/asm-v850/sim85e2s.h
@@ -0,0 +1,28 @@
1/*
2 * include/asm-v850/sim85e2s.h -- Machine-dependent defs for
3 * V850E2 RTL simulator
4 *
5 * Copyright (C) 2003 NEC Electronics Corporation
6 * Copyright (C) 2003 Miles Bader <miles@gnu.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 *
12 * Written by Miles Bader <miles@gnu.org>
13 */
14
15#ifndef __V850_SIM85E2S_H__
16#define __V850_SIM85E2S_H__
17
18#include <asm/sim85e2.h> /* Use generic sim85e2 settings. */
19#if 0
20#include <asm/v850e2_cache.h> /* + cache */
21#endif
22
23#define CPU_MODEL "v850e2"
24#define CPU_MODEL_LONG "NEC V850E2"
25#define PLATFORM "sim85e2s"
26#define PLATFORM_LONG "SIM85E2S V850E2 simulator"
27
28#endif /* __V850_SIM85E2S_H__ */
diff --git a/include/asm-v850/simsyscall.h b/include/asm-v850/simsyscall.h
new file mode 100644
index 000000000000..4a19d5ae9d17
--- /dev/null
+++ b/include/asm-v850/simsyscall.h
@@ -0,0 +1,99 @@
1/*
2 * include/asm-v850/simsyscall.h -- `System calls' under the v850e emulator
3 *
4 * Copyright (C) 2001 NEC Corporation
5 * Copyright (C) 2001 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_SIMSYSCALL_H__
15#define __V850_SIMSYSCALL_H__
16
17#define V850_SIM_SYS_exit(a...) V850_SIM_SYSCALL_1 (1 , ##a)
18#define V850_SIM_SYS_fork(a...) V850_SIM_SYSCALL_0 (2 , ##a)
19#define V850_SIM_SYS_read(a...) V850_SIM_SYSCALL_3 (3 , ##a)
20#define V850_SIM_SYS_write(a...) V850_SIM_SYSCALL_3 (4 , ##a)
21#define V850_SIM_SYS_open(a...) V850_SIM_SYSCALL_2 (5 , ##a)
22#define V850_SIM_SYS_close(a...) V850_SIM_SYSCALL_1 (6 , ##a)
23#define V850_SIM_SYS_wait4(a...) V850_SIM_SYSCALL_4 (7 , ##a)
24/* #define V850_SIM_SYS_creat(a...) V850_SIM_SYSCALL_1 (8 , ##a) */
25/* #define V850_SIM_SYS_link(a...) V850_SIM_SYSCALL_1 (9 , ##a) */
26/* #define V850_SIM_SYS_unlink(a...) V850_SIM_SYSCALL_1 (10 , ##a) */
27#define V850_SIM_SYS_execv(a...) V850_SIM_SYSCALL_2 (11 , ##a)
28/* #define V850_SIM_SYS_chdir(a...) V850_SIM_SYSCALL_1 (12 , ##a) */
29/* #define V850_SIM_SYS_mknod(a...) V850_SIM_SYSCALL_1 (14 , ##a) */
30#define V850_SIM_SYS_chmod(a...) V850_SIM_SYSCALL_2 (15 , ##a)
31#define V850_SIM_SYS_chown(a...) V850_SIM_SYSCALL_2 (16 , ##a)
32#define V850_SIM_SYS_lseek(a...) V850_SIM_SYSCALL_3 (19 , ##a)
33/* #define V850_SIM_SYS_getpid(a...) V850_SIM_SYSCALL_1 (20 , ##a) */
34/* #define V850_SIM_SYS_isatty(a...) V850_SIM_SYSCALL_1 (21 , ##a) */
35/* #define V850_SIM_SYS_fstat(a...) V850_SIM_SYSCALL_1 (22 , ##a) */
36#define V850_SIM_SYS_time(a...) V850_SIM_SYSCALL_1 (23 , ##a)
37#define V850_SIM_SYS_poll(a...) V850_SIM_SYSCALL_3 (24 , ##a)
38#define V850_SIM_SYS_stat(a...) V850_SIM_SYSCALL_2 (38 , ##a)
39#define V850_SIM_SYS_pipe(a...) V850_SIM_SYSCALL_1 (42 , ##a)
40#define V850_SIM_SYS_times(a...) V850_SIM_SYSCALL_1 (43 , ##a)
41#define V850_SIM_SYS_execve(a...) V850_SIM_SYSCALL_3 (59 , ##a)
42#define V850_SIM_SYS_gettimeofday(a...) V850_SIM_SYSCALL_2 (116 , ##a)
43/* #define V850_SIM_SYS_utime(a...) V850_SIM_SYSCALL_2 (201 , ##a) */
44/* #define V850_SIM_SYS_wait(a...) V850_SIM_SYSCALL_1 (202 , ##a) */
45
46#define V850_SIM_SYS_make_raw(a...) V850_SIM_SYSCALL_1 (1024 , ##a)
47
48
49#define V850_SIM_SYSCALL_0(_call) \
50({ \
51 register int call __asm__ ("r6") = _call; \
52 register int rval __asm__ ("r10"); \
53 __asm__ __volatile__ ("trap 31" \
54 : "=r" (rval) \
55 : "r" (call) \
56 : "r11", "memory"); \
57 rval; \
58})
59#define V850_SIM_SYSCALL_1(_call, _arg0) \
60({ \
61 register int call __asm__ ("r6") = _call; \
62 register long arg0 __asm__ ("r7") = (long)_arg0; \
63 register int rval __asm__ ("r10"); \
64 __asm__ __volatile__ ("trap 31" \
65 : "=r" (rval) \
66 : "r" (call), "r" (arg0) \
67 : "r11", "memory"); \
68 rval; \
69})
70#define V850_SIM_SYSCALL_2(_call, _arg0, _arg1) \
71({ \
72 register int call __asm__ ("r6") = _call; \
73 register long arg0 __asm__ ("r7") = (long)_arg0; \
74 register long arg1 __asm__ ("r8") = (long)_arg1; \
75 register int rval __asm__ ("r10"); \
76 __asm__ __volatile__ ("trap 31" \
77 : "=r" (rval) \
78 : "r" (call), "r" (arg0), "r" (arg1) \
79 : "r11", "memory"); \
80 rval; \
81})
82#define V850_SIM_SYSCALL_3(_call, _arg0, _arg1, _arg2) \
83({ \
84 register int call __asm__ ("r6") = _call; \
85 register long arg0 __asm__ ("r7") = (long)_arg0; \
86 register long arg1 __asm__ ("r8") = (long)_arg1; \
87 register long arg2 __asm__ ("r9") = (long)_arg2; \
88 register int rval __asm__ ("r10"); \
89 __asm__ __volatile__ ("trap 31" \
90 : "=r" (rval) \
91 : "r" (call), "r" (arg0), "r" (arg1), "r" (arg2)\
92 : "r11", "memory"); \
93 rval; \
94})
95
96#define V850_SIM_SYSCALL(call, args...) \
97 V850_SIM_SYS_##call (args)
98
99#endif /* __V850_SIMSYSCALL_H__ */
diff --git a/include/asm-v850/socket.h b/include/asm-v850/socket.h
new file mode 100644
index 000000000000..213b852af53e
--- /dev/null
+++ b/include/asm-v850/socket.h
@@ -0,0 +1,50 @@
1#ifndef __V850_SOCKET_H__
2#define __V850_SOCKET_H__
3
4#include <asm/sockios.h>
5
6/* For setsockoptions(2) */
7#define SOL_SOCKET 1
8
9#define SO_DEBUG 1
10#define SO_REUSEADDR 2
11#define SO_TYPE 3
12#define SO_ERROR 4
13#define SO_DONTROUTE 5
14#define SO_BROADCAST 6
15#define SO_SNDBUF 7
16#define SO_RCVBUF 8
17#define SO_KEEPALIVE 9
18#define SO_OOBINLINE 10
19#define SO_NO_CHECK 11
20#define SO_PRIORITY 12
21#define SO_LINGER 13
22#define SO_BSDCOMPAT 14
23/* To add :#define SO_REUSEPORT 15 */
24#define SO_PASSCRED 16
25#define SO_PEERCRED 17
26#define SO_RCVLOWAT 18
27#define SO_SNDLOWAT 19
28#define SO_RCVTIMEO 20
29#define SO_SNDTIMEO 21
30
31/* Security levels - as per NRL IPv6 - don't actually do anything */
32#define SO_SECURITY_AUTHENTICATION 22
33#define SO_SECURITY_ENCRYPTION_TRANSPORT 23
34#define SO_SECURITY_ENCRYPTION_NETWORK 24
35
36#define SO_BINDTODEVICE 25
37
38/* Socket filtering */
39#define SO_ATTACH_FILTER 26
40#define SO_DETACH_FILTER 27
41
42#define SO_PEERNAME 28
43#define SO_TIMESTAMP 29
44#define SCM_TIMESTAMP SO_TIMESTAMP
45
46#define SO_ACCEPTCONN 30
47
48#define SO_PEERSEC 31
49
50#endif /* __V850_SOCKET_H__ */
diff --git a/include/asm-v850/sockios.h b/include/asm-v850/sockios.h
new file mode 100644
index 000000000000..cf4874c2fd8a
--- /dev/null
+++ b/include/asm-v850/sockios.h
@@ -0,0 +1,12 @@
1#ifndef __V850_SOCKIOS_H__
2#define __V850_SOCKIOS_H__
3
4/* Socket-level I/O control calls. */
5#define FIOSETOWN 0x8901
6#define SIOCSPGRP 0x8902
7#define FIOGETOWN 0x8903
8#define SIOCGPGRP 0x8904
9#define SIOCATMARK 0x8905
10#define SIOCGSTAMP 0x8906 /* Get stamp */
11
12#endif /* __V850_SOCKIOS_H__ */
diff --git a/include/asm-v850/stat.h b/include/asm-v850/stat.h
new file mode 100644
index 000000000000..c68c60d06e2f
--- /dev/null
+++ b/include/asm-v850/stat.h
@@ -0,0 +1,73 @@
1/*
2 * include/asm-v850/stat.h -- v850 stat structure
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_STAT_H__
15#define __V850_STAT_H__
16
17#include <asm/posix_types.h>
18
19struct stat {
20 unsigned int st_dev;
21 unsigned long st_ino;
22 unsigned int st_mode;
23 unsigned int st_nlink;
24 unsigned int st_uid;
25 unsigned int st_gid;
26 unsigned int st_rdev;
27 long st_size;
28 unsigned long st_blksize;
29 unsigned long st_blocks;
30 unsigned long st_atime;
31 unsigned long __unused1;
32 unsigned long st_mtime;
33 unsigned long __unused2;
34 unsigned long st_ctime;
35 unsigned long __unused3;
36 unsigned long __unused4;
37 unsigned long __unused5;
38};
39
40struct stat64 {
41 unsigned long long st_dev;
42 unsigned long __unused1;
43
44 unsigned long long st_ino;
45
46 unsigned int st_mode;
47 unsigned int st_nlink;
48
49 unsigned int st_uid;
50 unsigned int st_gid;
51
52 unsigned long long st_rdev;
53 unsigned long __unused3;
54
55 long long st_size;
56 unsigned long st_blksize;
57
58 unsigned long st_blocks; /* No. of 512-byte blocks allocated */
59 unsigned long __unused4; /* future possible st_blocks high bits */
60
61 unsigned long st_atime;
62 unsigned long st_atime_nsec;
63
64 unsigned long st_mtime;
65 unsigned long st_mtime_nsec;
66
67 unsigned long st_ctime;
68 unsigned long st_ctime_nsec;
69
70 unsigned long __unused8;
71};
72
73#endif /* __V850_STAT_H__ */
diff --git a/include/asm-v850/statfs.h b/include/asm-v850/statfs.h
new file mode 100644
index 000000000000..ea1596607f26
--- /dev/null
+++ b/include/asm-v850/statfs.h
@@ -0,0 +1,6 @@
1#ifndef __V850_STATFS_H__
2#define __V850_STATFS_H__
3
4#include <asm-generic/statfs.h>
5
6#endif /* __V850_STATFS_H__ */
diff --git a/include/asm-v850/string.h b/include/asm-v850/string.h
new file mode 100644
index 000000000000..478e234789d6
--- /dev/null
+++ b/include/asm-v850/string.h
@@ -0,0 +1,25 @@
1/*
2 * include/asm-v850/string.h -- Architecture specific string routines
3 *
4 * Copyright (C) 2001,02 NEC Corporation
5 * Copyright (C) 2001,02 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_STRING_H__
15#define __V850_STRING_H__
16
17#define __HAVE_ARCH_MEMCPY
18#define __HAVE_ARCH_MEMSET
19#define __HAVE_ARCH_MEMMOVE
20
21extern void *memcpy (void *, const void *, __kernel_size_t);
22extern void *memset (void *, int, __kernel_size_t);
23extern void *memmove (void *, const void *, __kernel_size_t);
24
25#endif /* __V850_STRING_H__ */
diff --git a/include/asm-v850/system.h b/include/asm-v850/system.h
new file mode 100644
index 000000000000..20f4c738c04e
--- /dev/null
+++ b/include/asm-v850/system.h
@@ -0,0 +1,113 @@
1/*
2 * include/asm-v850/system.h -- Low-level interrupt/thread ops
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_SYSTEM_H__
15#define __V850_SYSTEM_H__
16
17#include <linux/linkage.h>
18#include <asm/ptrace.h>
19
20
21#define prepare_to_switch() do { } while (0)
22
23/*
24 * switch_to(n) should switch tasks to task ptr, first checking that
25 * ptr isn't the current task, in which case it does nothing.
26 */
27struct thread_struct;
28extern void *switch_thread (struct thread_struct *last,
29 struct thread_struct *next);
30#define switch_to(prev,next,last) \
31 do { \
32 if (prev != next) { \
33 (last) = switch_thread (&prev->thread, &next->thread); \
34 } \
35 } while (0)
36
37
38/* Enable/disable interrupts. */
39#define local_irq_enable() __asm__ __volatile__ ("ei")
40#define local_irq_disable() __asm__ __volatile__ ("di")
41
42#define local_save_flags(flags) \
43 __asm__ __volatile__ ("stsr %1, %0" : "=r" (flags) : "i" (SR_PSW))
44#define local_restore_flags(flags) \
45 __asm__ __volatile__ ("ldsr %0, %1" :: "r" (flags), "i" (SR_PSW))
46
47/* For spinlocks etc */
48#define local_irq_save(flags) \
49 do { local_save_flags (flags); local_irq_disable (); } while (0)
50#define local_irq_restore(flags) \
51 local_restore_flags (flags);
52
53
54static inline int irqs_disabled (void)
55{
56 unsigned flags;
57 local_save_flags (flags);
58 return !!(flags & 0x20);
59}
60
61
62/*
63 * Force strict CPU ordering.
64 * Not really required on v850...
65 */
66#define nop() __asm__ __volatile__ ("nop")
67#define mb() __asm__ __volatile__ ("" ::: "memory")
68#define rmb() mb ()
69#define wmb() mb ()
70#define read_barrier_depends() ((void)0)
71#define set_rmb(var, value) do { xchg (&var, value); } while (0)
72#define set_mb(var, value) set_rmb (var, value)
73#define set_wmb(var, value) do { var = value; wmb (); } while (0)
74
75#define smp_mb() mb ()
76#define smp_rmb() rmb ()
77#define smp_wmb() wmb ()
78#define smp_read_barrier_depends() read_barrier_depends()
79
80#define xchg(ptr, with) \
81 ((__typeof__ (*(ptr)))__xchg ((unsigned long)(with), (ptr), sizeof (*(ptr))))
82#define tas(ptr) (xchg ((ptr), 1))
83
84extern inline unsigned long __xchg (unsigned long with,
85 __volatile__ void *ptr, int size)
86{
87 unsigned long tmp, flags;
88
89 local_irq_save (flags);
90
91 switch (size) {
92 case 1:
93 tmp = *(unsigned char *)ptr;
94 *(unsigned char *)ptr = with;
95 break;
96 case 2:
97 tmp = *(unsigned short *)ptr;
98 *(unsigned short *)ptr = with;
99 break;
100 case 4:
101 tmp = *(unsigned long *)ptr;
102 *(unsigned long *)ptr = with;
103 break;
104 }
105
106 local_irq_restore (flags);
107
108 return tmp;
109}
110
111#define arch_align_stack(x) (x)
112
113#endif /* __V850_SYSTEM_H__ */
diff --git a/include/asm-v850/teg.h b/include/asm-v850/teg.h
new file mode 100644
index 000000000000..acc8c7d95329
--- /dev/null
+++ b/include/asm-v850/teg.h
@@ -0,0 +1,101 @@
1/*
2 * include/asm-v850/teg.h -- NB85E-TEG cpu chip
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_TEG_H__
15#define __V850_TEG_H__
16
17
18/* The TEG uses the V850E cpu core. */
19#include <asm/v850e.h>
20#include <asm/v850e_cache.h>
21
22
23#define CPU_MODEL "v850e/nb85e-teg"
24#define CPU_MODEL_LONG "NEC V850E/NB85E TEG"
25
26
27/* For <asm/entry.h> */
28/* We use on-chip RAM, for a few miscellaneous variables that must be
29 accessible using a load instruction relative to R0. On the NB85E/TEG,
30 There's 60KB of iRAM starting at 0xFFFF0000, however we need the base
31 address to be addressable by a 16-bit signed offset, so we only use the
32 second half of it starting from 0xFFFF8000. */
33#define R0_RAM_ADDR 0xFFFF8000
34
35
36/* Hardware-specific interrupt numbers (in the kernel IRQ namespace).
37 Some of these are parameterized even though there's only a single
38 interrupt, for compatibility with some generic code that works on other
39 processor models. */
40#define IRQ_INTCMD(n) 6 /* interval timer interrupt */
41#define IRQ_INTCMD_NUM 1
42#define IRQ_INTSER(n) 16 /* UART reception error */
43#define IRQ_INTSER_NUM 1
44#define IRQ_INTSR(n) 17 /* UART reception completion */
45#define IRQ_INTSR_NUM 1
46#define IRQ_INTST(n) 18 /* UART transmission completion */
47#define IRQ_INTST_NUM 1
48
49/* For <asm/irq.h> */
50#define NUM_CPU_IRQS 64
51
52
53/* TEG UART details. */
54#define V850E_UART_BASE_ADDR(n) (0xFFFFF600 + 0x10 * (n))
55#define V850E_UART_ASIM_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x0)
56#define V850E_UART_ASIS_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x2)
57#define V850E_UART_ASIF_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x4)
58#define V850E_UART_CKSR_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x6)
59#define V850E_UART_BRGC_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x8)
60#define V850E_UART_TXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0xA)
61#define V850E_UART_RXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0xC)
62#define V850E_UART_NUM_CHANNELS 1
63#define V850E_UART_BASE_FREQ CPU_CLOCK_FREQ
64/* This is a function that gets called before configuring the UART. */
65#define V850E_UART_PRE_CONFIGURE teg_uart_pre_configure
66#ifndef __ASSEMBLY__
67extern void teg_uart_pre_configure (unsigned chan,
68 unsigned cflags, unsigned baud);
69#endif
70
71
72/* The TEG RTPU. */
73#define V850E_RTPU_BASE_ADDR 0xFFFFF210
74
75
76/* TEG series timer D details. */
77#define V850E_TIMER_D_BASE_ADDR 0xFFFFF210
78#define V850E_TIMER_D_TMCD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x0)
79#define V850E_TIMER_D_TMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x4)
80#define V850E_TIMER_D_CMD_BASE_ADDR (V850E_TIMER_D_BASE_ADDR + 0x8)
81#define V850E_TIMER_D_BASE_FREQ CPU_CLOCK_FREQ
82
83
84/* `Interrupt Source Select' control register. */
85#define TEG_ISS_ADDR 0xFFFFF7FA
86#define TEG_ISS (*(volatile u8 *)TEG_ISS_ADDR)
87
88/* Port 0 I/O register (bits 0-3 used). */
89#define TEG_PORT0_IO_ADDR 0xFFFFF7F2
90#define TEG_PORT0_IO (*(volatile u8 *)TEG_PORT0_IO_ADDR)
91/* Port 0 control register (bits 0-3 control mode, 0 = output, 1 = input). */
92#define TEG_PORT0_PM_ADDR 0xFFFFF7F4
93#define TEG_PORT0_PM (*(volatile u8 *)TEG_PORT0_PM_ADDR)
94
95
96#ifndef __ASSEMBLY__
97extern void teg_init_irqs (void);
98#endif
99
100
101#endif /* __V850_TEG_H__ */
diff --git a/include/asm-v850/termbits.h b/include/asm-v850/termbits.h
new file mode 100644
index 000000000000..212d4e279263
--- /dev/null
+++ b/include/asm-v850/termbits.h
@@ -0,0 +1,175 @@
1#ifndef __V850_TERMBITS_H__
2#define __V850_TERMBITS_H__
3
4#include <linux/posix_types.h>
5
6typedef unsigned char cc_t;
7typedef unsigned int speed_t;
8typedef unsigned int tcflag_t;
9
10#define NCCS 19
11struct termios {
12 tcflag_t c_iflag; /* input mode flags */
13 tcflag_t c_oflag; /* output mode flags */
14 tcflag_t c_cflag; /* control mode flags */
15 tcflag_t c_lflag; /* local mode flags */
16 cc_t c_line; /* line discipline */
17 cc_t c_cc[NCCS]; /* control characters */
18};
19
20/* c_cc characters */
21#define VINTR 0
22#define VQUIT 1
23#define VERASE 2
24#define VKILL 3
25#define VEOF 4
26#define VTIME 5
27#define VMIN 6
28#define VSWTC 7
29#define VSTART 8
30#define VSTOP 9
31#define VSUSP 10
32#define VEOL 11
33#define VREPRINT 12
34#define VDISCARD 13
35#define VWERASE 14
36#define VLNEXT 15
37#define VEOL2 16
38
39
40/* c_iflag bits */
41#define IGNBRK 0000001
42#define BRKINT 0000002
43#define IGNPAR 0000004
44#define PARMRK 0000010
45#define INPCK 0000020
46#define ISTRIP 0000040
47#define INLCR 0000100
48#define IGNCR 0000200
49#define ICRNL 0000400
50#define IUCLC 0001000
51#define IXON 0002000
52#define IXANY 0004000
53#define IXOFF 0010000
54#define IMAXBEL 0020000
55#define IUTF8 0040000
56
57/* c_oflag bits */
58#define OPOST 0000001
59#define OLCUC 0000002
60#define ONLCR 0000004
61#define OCRNL 0000010
62#define ONOCR 0000020
63#define ONLRET 0000040
64#define OFILL 0000100
65#define OFDEL 0000200
66#define NLDLY 0000400
67#define NL0 0000000
68#define NL1 0000400
69#define CRDLY 0003000
70#define CR0 0000000
71#define CR1 0001000
72#define CR2 0002000
73#define CR3 0003000
74#define TABDLY 0014000
75#define TAB0 0000000
76#define TAB1 0004000
77#define TAB2 0010000
78#define TAB3 0014000
79#define XTABS 0014000
80#define BSDLY 0020000
81#define BS0 0000000
82#define BS1 0020000
83#define VTDLY 0040000
84#define VT0 0000000
85#define VT1 0040000
86#define FFDLY 0100000
87#define FF0 0000000
88#define FF1 0100000
89
90/* c_cflag bit meaning */
91#define CBAUD 0010017
92#define B0 0000000 /* hang up */
93#define B50 0000001
94#define B75 0000002
95#define B110 0000003
96#define B134 0000004
97#define B150 0000005
98#define B200 0000006
99#define B300 0000007
100#define B600 0000010
101#define B1200 0000011
102#define B1800 0000012
103#define B2400 0000013
104#define B4800 0000014
105#define B9600 0000015
106#define B19200 0000016
107#define B38400 0000017
108#define EXTA B19200
109#define EXTB B38400
110#define CSIZE 0000060
111#define CS5 0000000
112#define CS6 0000020
113#define CS7 0000040
114#define CS8 0000060
115#define CSTOPB 0000100
116#define CREAD 0000200
117#define PARENB 0000400
118#define PARODD 0001000
119#define HUPCL 0002000
120#define CLOCAL 0004000
121#define CBAUDEX 0010000
122#define B57600 0010001
123#define B115200 0010002
124#define B230400 0010003
125#define B460800 0010004
126#define B500000 0010005
127#define B576000 0010006
128#define B921600 0010007
129#define B1000000 0010010
130#define B1152000 0010011
131#define B1500000 0010012
132#define B2000000 0010013
133#define B2500000 0010014
134#define B3000000 0010015
135#define B3500000 0010016
136#define B4000000 0010017
137#define CIBAUD 002003600000 /* input baud rate (not used) */
138#define CMSPAR 010000000000 /* mark or space (stick) parity */
139#define CRTSCTS 020000000000 /* flow control */
140
141/* c_lflag bits */
142#define ISIG 0000001
143#define ICANON 0000002
144#define XCASE 0000004
145#define ECHO 0000010
146#define ECHOE 0000020
147#define ECHOK 0000040
148#define ECHONL 0000100
149#define NOFLSH 0000200
150#define TOSTOP 0000400
151#define ECHOCTL 0001000
152#define ECHOPRT 0002000
153#define ECHOKE 0004000
154#define FLUSHO 0010000
155#define PENDIN 0040000
156#define IEXTEN 0100000
157
158
159/* tcflow() and TCXONC use these */
160#define TCOOFF 0
161#define TCOON 1
162#define TCIOFF 2
163#define TCION 3
164
165/* tcflush() and TCFLSH use these */
166#define TCIFLUSH 0
167#define TCOFLUSH 1
168#define TCIOFLUSH 2
169
170/* tcsetattr uses these */
171#define TCSANOW 0
172#define TCSADRAIN 1
173#define TCSAFLUSH 2
174
175#endif /* __V850_TERMBITS_H__ */
diff --git a/include/asm-v850/termios.h b/include/asm-v850/termios.h
new file mode 100644
index 000000000000..79e97b59806e
--- /dev/null
+++ b/include/asm-v850/termios.h
@@ -0,0 +1,106 @@
1#ifndef __V850_TERMIOS_H__
2#define __V850_TERMIOS_H__
3
4#include <asm/termbits.h>
5#include <asm/ioctls.h>
6
7struct winsize {
8 unsigned short ws_row;
9 unsigned short ws_col;
10 unsigned short ws_xpixel;
11 unsigned short ws_ypixel;
12};
13
14#define NCC 8
15struct termio {
16 unsigned short c_iflag; /* input mode flags */
17 unsigned short c_oflag; /* output mode flags */
18 unsigned short c_cflag; /* control mode flags */
19 unsigned short c_lflag; /* local mode flags */
20 unsigned char c_line; /* line discipline */
21 unsigned char c_cc[NCC]; /* control characters */
22};
23
24/* modem lines */
25#define TIOCM_LE 0x001
26#define TIOCM_DTR 0x002
27#define TIOCM_RTS 0x004
28#define TIOCM_ST 0x008
29#define TIOCM_SR 0x010
30#define TIOCM_CTS 0x020
31#define TIOCM_CAR 0x040
32#define TIOCM_RNG 0x080
33#define TIOCM_DSR 0x100
34#define TIOCM_CD TIOCM_CAR
35#define TIOCM_RI TIOCM_RNG
36#define TIOCM_OUT1 0x2000
37#define TIOCM_OUT2 0x4000
38#define TIOCM_LOOP 0x8000
39
40/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
41
42/* line disciplines */
43#define N_TTY 0
44#define N_SLIP 1
45#define N_MOUSE 2
46#define N_PPP 3
47#define N_STRIP 4
48#define N_AX25 5
49#define N_X25 6 /* X.25 async */
50#define N_6PACK 7
51#define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */
52#define N_R3964 9 /* Reserved for Simatic R3964 module */
53#define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */
54#define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */
55#define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards about SMS messages */
56#define N_HDLC 13 /* synchronous HDLC */
57#define N_SYNC_PPP 14 /* synchronous PPP */
58#define N_HCI 15 /* Bluetooth HCI UART */
59
60#ifdef __KERNEL__
61
62/* intr=^C quit=^\ erase=del kill=^U
63 eof=^D vtime=\0 vmin=\1 sxtc=\0
64 start=^Q stop=^S susp=^Z eol=\0
65 reprint=^R discard=^U werase=^W lnext=^V
66 eol2=\0
67*/
68#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
69
70/*
71 * Translate a "termio" structure into a "termios". Ugh.
72 */
73#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
74 unsigned short __tmp; \
75 get_user(__tmp,&(termio)->x); \
76 *(unsigned short *) &(termios)->x = __tmp; \
77}
78
79#define user_termio_to_kernel_termios(termios, termio) \
80({ \
81 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
82 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
83 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
84 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
85 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
86})
87
88/*
89 * Translate a "termios" structure into a "termio". Ugh.
90 */
91#define kernel_termios_to_user_termio(termio, termios) \
92({ \
93 put_user((termios)->c_iflag, &(termio)->c_iflag); \
94 put_user((termios)->c_oflag, &(termio)->c_oflag); \
95 put_user((termios)->c_cflag, &(termio)->c_cflag); \
96 put_user((termios)->c_lflag, &(termio)->c_lflag); \
97 put_user((termios)->c_line, &(termio)->c_line); \
98 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
99})
100
101#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
102#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
103
104#endif /* __KERNEL__ */
105
106#endif /* __V850_TERMIOS_H__ */
diff --git a/include/asm-v850/thread_info.h b/include/asm-v850/thread_info.h
new file mode 100644
index 000000000000..e2ef44593752
--- /dev/null
+++ b/include/asm-v850/thread_info.h
@@ -0,0 +1,132 @@
1/*
2 * include/asm-v850/thread_info.h -- v850 low-level thread information
3 *
4 * Copyright (C) 2002 NEC Corporation
5 * Copyright (C) 2002 Miles Bader <miles@gnu.org>
6 * Copyright (C) 2002 David Howells (dhowells@redhat.com)
7 * - Incorporating suggestions made by Linus Torvalds and Dave Miller
8 *
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file COPYING in the main directory of this
11 * archive for more details.
12 *
13 * This file was derived from the PPC version, include/asm-ppc/thread_info.h
14 * which was adapted from the i386 version by Paul Mackerras
15 */
16
17#ifndef __V850_THREAD_INFO_H__
18#define __V850_THREAD_INFO_H__
19
20#ifdef __KERNEL__
21
22#ifndef __ASSEMBLY__
23
24/*
25 * low level task data.
26 * If you change this, change the TI_* offsets below to match.
27 */
28struct thread_info {
29 struct task_struct *task; /* main task structure */
30 struct exec_domain *exec_domain; /* execution domain */
31 unsigned long flags; /* low level flags */
32 int cpu; /* cpu we're on */
33 int preempt_count;
34 struct restart_block restart_block;
35};
36
37#define INIT_THREAD_INFO(tsk) \
38{ \
39 .task = &tsk, \
40 .exec_domain = &default_exec_domain, \
41 .flags = 0, \
42 .cpu = 0, \
43 .preempt_count = 1, \
44 .restart_block = { \
45 .fn = do_no_restart_syscall, \
46 }, \
47}
48
49#define init_thread_info (init_thread_union.thread_info)
50#define init_stack (init_thread_union.stack)
51
52/*
53 * macros/functions for gaining access to the thread information structure
54 */
55
56/* thread information allocation */
57#define alloc_thread_info(tsk) ((struct thread_info *) \
58 __get_free_pages(GFP_KERNEL, 1))
59#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
60#define get_thread_info(ti) get_task_struct((ti)->task)
61#define put_thread_info(ti) put_task_struct((ti)->task)
62
63#endif /* __ASSEMBLY__ */
64
65
66/*
67 * Offsets in thread_info structure, used in assembly code
68 */
69#define TI_TASK 0
70#define TI_EXECDOMAIN 4
71#define TI_FLAGS 8
72#define TI_CPU 12
73#define TI_PREEMPT 16
74
75#define PREEMPT_ACTIVE 0x4000000
76
77/*
78 * thread information flag bit numbers
79 */
80#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
81#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */
82#define TIF_SIGPENDING 2 /* signal pending */
83#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
84#define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling
85 TIF_NEED_RESCHED */
86#define TIF_MEMDIE 5
87
88/* as above, but as bit values */
89#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
90#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
91#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
92#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
93#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
94
95
96/* Size of kernel stack for each process. */
97#define THREAD_SIZE 0x2000
98
99/* The alignment of kernel threads, with thread_info structures at their
100 base. Thus, a pointer for a task's task structure can be derived from
101 its kernel stack pointer. */
102#define THREAD_ALIGNMENT THREAD_SIZE
103#define THREAD_MASK (-THREAD_ALIGNMENT)
104
105
106#ifdef __ASSEMBLY__
107
108/* Put a pointer to the current thread_info structure into REG. Note that
109 this definition requires THREAD_MASK to be representable as a signed
110 16-bit value. */
111#define GET_CURRENT_THREAD(reg) \
112 /* Use `addi' and then `and' instead of just `andi', because \
113 `addi' sign-extends the immediate value, whereas `andi' \
114 zero-extends it. */ \
115 addi THREAD_MASK, r0, reg; \
116 and sp, reg
117
118#else
119
120/* Return a pointer to the current thread_info structure. */
121static inline struct thread_info *current_thread_info (void)
122{
123 register unsigned long sp __asm__ ("sp");
124 return (struct thread_info *)(sp & THREAD_MASK);
125}
126
127#endif /* __ASSEMBLY__ */
128
129
130#endif /* __KERNEL__ */
131
132#endif /* __V850_THREAD_INFO_H__ */
diff --git a/include/asm-v850/timex.h b/include/asm-v850/timex.h
new file mode 100644
index 000000000000..6279e5a0ee8e
--- /dev/null
+++ b/include/asm-v850/timex.h
@@ -0,0 +1,18 @@
1/*
2 * linux/include/asm-v850/timex.h
3 *
4 * v850 architecture timex specifications
5 */
6#ifndef __V850_TIMEX_H__
7#define __V850_TIMEX_H__
8
9#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
10
11typedef unsigned long cycles_t;
12
13static inline cycles_t get_cycles(void)
14{
15 return 0;
16}
17
18#endif /* __V850_TIMEX_H__ */
diff --git a/include/asm-v850/tlb.h b/include/asm-v850/tlb.h
new file mode 100644
index 000000000000..73bc9ead40dd
--- /dev/null
+++ b/include/asm-v850/tlb.h
@@ -0,0 +1,21 @@
1/*
2 * include/asm-v850/tlb.h
3 *
4 * Copyright (C) 2002 NEC Corporation
5 * Copyright (C) 2002 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_TLB_H__
15#define __V850_TLB_H__
16
17#define tlb_flush(tlb) ((void)0)
18
19#include <asm-generic/tlb.h>
20
21#endif /* __V850_TLB_H__ */
diff --git a/include/asm-v850/tlbflush.h b/include/asm-v850/tlbflush.h
new file mode 100644
index 000000000000..501e4498172c
--- /dev/null
+++ b/include/asm-v850/tlbflush.h
@@ -0,0 +1,70 @@
1/*
2 * include/asm-v850/tlbflush.h
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_TLBFLUSH_H__
15#define __V850_TLBFLUSH_H__
16
17#include <asm/machdep.h>
18
19
20/*
21 * flush all user-space atc entries.
22 */
23static inline void __flush_tlb(void)
24{
25 BUG ();
26}
27
28static inline void __flush_tlb_one(unsigned long addr)
29{
30 BUG ();
31}
32
33#define flush_tlb() __flush_tlb()
34
35/*
36 * flush all atc entries (both kernel and user-space entries).
37 */
38static inline void flush_tlb_all(void)
39{
40 BUG ();
41}
42
43static inline void flush_tlb_mm(struct mm_struct *mm)
44{
45 BUG ();
46}
47
48static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
49{
50 BUG ();
51}
52
53static inline void flush_tlb_range(struct vm_area_struct *vma,
54 unsigned long start, unsigned long end)
55{
56 BUG ();
57}
58
59extern inline void flush_tlb_kernel_page(unsigned long addr)
60{
61 BUG ();
62}
63
64extern inline void flush_tlb_pgtables(struct mm_struct *mm,
65 unsigned long start, unsigned long end)
66{
67 BUG ();
68}
69
70#endif /* __V850_TLBFLUSH_H__ */
diff --git a/include/asm-v850/topology.h b/include/asm-v850/topology.h
new file mode 100644
index 000000000000..6040e41d7945
--- /dev/null
+++ b/include/asm-v850/topology.h
@@ -0,0 +1,6 @@
1#ifndef __V850_TOPOLOGY_H__
2#define __V850_TOPOLOGY_H__
3
4#include <asm-generic/topology.h>
5
6#endif /* __V850_TOPOLOGY_H__ */
diff --git a/include/asm-v850/types.h b/include/asm-v850/types.h
new file mode 100644
index 000000000000..e7cfe5b33a10
--- /dev/null
+++ b/include/asm-v850/types.h
@@ -0,0 +1,68 @@
1#ifndef __V850_TYPES_H__
2#define __V850_TYPES_H__
3
4#ifndef __ASSEMBLY__
5
6/*
7 * This file is never included by application software unless
8 * explicitly requested (e.g., via linux/types.h) in which case the
9 * application is Linux specific so (user-) name space pollution is
10 * not a major issue. However, for interoperability, libraries still
11 * need to be careful to avoid a name clashes.
12 */
13
14typedef unsigned short umode_t;
15
16/*
17 * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
18 * header files exported to user space
19 */
20
21typedef __signed__ char __s8;
22typedef unsigned char __u8;
23
24typedef __signed__ short __s16;
25typedef unsigned short __u16;
26
27typedef __signed__ int __s32;
28typedef unsigned int __u32;
29
30#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
31typedef __signed__ long long __s64;
32typedef unsigned long long __u64;
33#endif
34
35#endif /* !__ASSEMBLY__ */
36
37/*
38 * These aren't exported outside the kernel to avoid name space clashes
39 */
40#ifdef __KERNEL__
41
42#define BITS_PER_LONG 32
43
44#ifndef __ASSEMBLY__
45
46typedef signed char s8;
47typedef unsigned char u8;
48
49typedef signed short s16;
50typedef unsigned short u16;
51
52typedef signed int s32;
53typedef unsigned int u32;
54
55typedef signed long long s64;
56typedef unsigned long long u64;
57
58/* Dma addresses are 32-bits wide. */
59
60typedef u32 dma_addr_t;
61
62typedef unsigned int kmem_bufctl_t;
63
64#endif /* !__ASSEMBLY__ */
65
66#endif /* __KERNEL__ */
67
68#endif /* __V850_TYPES_H__ */
diff --git a/include/asm-v850/uaccess.h b/include/asm-v850/uaccess.h
new file mode 100644
index 000000000000..4386cfc6a8dd
--- /dev/null
+++ b/include/asm-v850/uaccess.h
@@ -0,0 +1,165 @@
1#ifndef __V850_UACCESS_H__
2#define __V850_UACCESS_H__
3
4/*
5 * User space memory access functions
6 */
7
8#include <linux/errno.h>
9#include <linux/string.h>
10
11#include <asm/segment.h>
12#include <asm/machdep.h>
13
14#define VERIFY_READ 0
15#define VERIFY_WRITE 1
16
17extern inline int access_ok (int type, const void *addr, unsigned long size)
18{
19 /* XXX I guess we should check against real ram bounds at least, and
20 possibly make sure ADDR is not within the kernel.
21 For now we just check to make sure it's not a small positive
22 or negative value, as that will at least catch some kinds of
23 error. In particular, we make sure that ADDR's not within the
24 interrupt vector area, which we know starts at zero, or within the
25 peripheral-I/O area, which is located just _before_ zero. */
26 unsigned long val = (unsigned long)addr;
27 return val >= (0x80 + NUM_CPU_IRQS*16) && val < 0xFFFFF000;
28}
29
30/* this function will go away soon - use access_ok() instead */
31extern inline int __deprecated verify_area (int type, const void *addr, unsigned long size)
32{
33 return access_ok (type, addr, size) ? 0 : -EFAULT;
34}
35
36/*
37 * The exception table consists of pairs of addresses: the first is the
38 * address of an instruction that is allowed to fault, and the second is
39 * the address at which the program should continue. No registers are
40 * modified, so it is entirely up to the continuation code to figure out
41 * what to do.
42 *
43 * All the routines below use bits of fixup code that are out of line
44 * with the main instruction path. This means when everything is well,
45 * we don't even have to jump over them. Further, they do not intrude
46 * on our cache or tlb entries.
47 */
48
49struct exception_table_entry
50{
51 unsigned long insn, fixup;
52};
53
54/* Returns 0 if exception not found and fixup otherwise. */
55extern unsigned long search_exception_table (unsigned long);
56
57
58/*
59 * These are the main single-value transfer routines. They automatically
60 * use the right size if we just have the right pointer type.
61 */
62
63extern int bad_user_access_length (void);
64
65#define __get_user(var, ptr) \
66 ({ \
67 int __gu_err = 0; \
68 typeof(*(ptr)) __gu_val = 0; \
69 switch (sizeof (*(ptr))) { \
70 case 1: \
71 case 2: \
72 case 4: \
73 __gu_val = *(ptr); \
74 break; \
75 case 8: \
76 memcpy(&__gu_val, ptr, sizeof(__gu_val)); \
77 break; \
78 default: \
79 __gu_val = 0; \
80 __gu_err = __get_user_bad (); \
81 break; \
82 } \
83 (var) = __gu_val; \
84 __gu_err; \
85 })
86#define __get_user_bad() (bad_user_access_length (), (-EFAULT))
87
88#define __put_user(var, ptr) \
89 ({ \
90 int __pu_err = 0; \
91 switch (sizeof (*(ptr))) { \
92 case 1: \
93 case 2: \
94 case 4: \
95 *(ptr) = (var); \
96 break; \
97 case 8: { \
98 typeof(*(ptr)) __pu_val = 0; \
99 memcpy(ptr, &__pu_val, sizeof(__pu_val)); \
100 } \
101 break; \
102 default: \
103 __pu_err = __put_user_bad (); \
104 break; \
105 } \
106 __pu_err; \
107 })
108#define __put_user_bad() (bad_user_access_length (), (-EFAULT))
109
110#define put_user(x, ptr) __put_user(x, ptr)
111#define get_user(x, ptr) __get_user(x, ptr)
112
113#define __copy_from_user(to, from, n) (memcpy (to, from, n), 0)
114#define __copy_to_user(to, from, n) (memcpy(to, from, n), 0)
115
116#define __copy_to_user_inatomic __copy_to_user
117#define __copy_from_user_inatomic __copy_from_user
118
119#define copy_from_user(to, from, n) __copy_from_user (to, from, n)
120#define copy_to_user(to, from, n) __copy_to_user(to, from, n)
121
122#define copy_to_user_ret(to,from,n,retval) \
123 ({ if (copy_to_user (to,from,n)) return retval; })
124
125#define copy_from_user_ret(to,from,n,retval) \
126 ({ if (copy_from_user (to,from,n)) return retval; })
127
128/*
129 * Copy a null terminated string from userspace.
130 */
131
132static inline long
133strncpy_from_user (char *dst, const char *src, long count)
134{
135 char *tmp;
136 strncpy (dst, src, count);
137 for (tmp = dst; *tmp && count > 0; tmp++, count--)
138 ;
139 return tmp - dst;
140}
141
142/*
143 * Return the size of a string (including the ending 0)
144 *
145 * Return 0 on exception, a value greater than N if too long
146 */
147static inline long strnlen_user (const char *src, long n)
148{
149 return strlen (src) + 1;
150}
151
152#define strlen_user(str) strnlen_user (str, 32767)
153
154/*
155 * Zero Userspace
156 */
157
158static inline unsigned long
159clear_user (void *to, unsigned long n)
160{
161 memset (to, 0, n);
162 return 0;
163}
164
165#endif /* __V850_UACCESS_H__ */
diff --git a/include/asm-v850/ucontext.h b/include/asm-v850/ucontext.h
new file mode 100644
index 000000000000..303c21590cff
--- /dev/null
+++ b/include/asm-v850/ucontext.h
@@ -0,0 +1,14 @@
1#ifndef __V850_UCONTEXT_H__
2#define __V850_UCONTEXT_H__
3
4#include <asm/sigcontext.h>
5
6struct ucontext {
7 unsigned long uc_flags;
8 struct ucontext *uc_link;
9 stack_t uc_stack;
10 struct sigcontext uc_mcontext;
11 sigset_t uc_sigmask; /* mask last for extensibility */
12};
13
14#endif /* __V850_UCONTEXT_H__ */
diff --git a/include/asm-v850/unaligned.h b/include/asm-v850/unaligned.h
new file mode 100644
index 000000000000..65e38362142b
--- /dev/null
+++ b/include/asm-v850/unaligned.h
@@ -0,0 +1,130 @@
1/*
2 * include/asm-v850/unaligned.h -- Unaligned memory access
3 *
4 * Copyright (C) 2001 NEC Corporation
5 * Copyright (C) 2001 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * This file is a copy of the arm version, include/asm-arm/unaligned.h
12 *
13 * Note that some v850 chips support unaligned access, but it seems too
14 * annoying to use.
15 */
16
17#ifndef __V850_UNALIGNED_H__
18#define __V850_UNALIGNED_H__
19
20#include <asm/types.h>
21
22extern int __bug_unaligned_x(void *ptr);
23
24/*
25 * What is the most efficient way of loading/storing an unaligned value?
26 *
27 * That is the subject of this file. Efficiency here is defined as
28 * minimum code size with minimum register usage for the common cases.
29 * It is currently not believed that long longs are common, so we
30 * trade efficiency for the chars, shorts and longs against the long
31 * longs.
32 *
33 * Current stats with gcc 2.7.2.2 for these functions:
34 *
35 * ptrsize get: code regs put: code regs
36 * 1 1 1 1 2
37 * 2 3 2 3 2
38 * 4 7 3 7 3
39 * 8 20 6 16 6
40 *
41 * gcc 2.95.1 seems to code differently:
42 *
43 * ptrsize get: code regs put: code regs
44 * 1 1 1 1 2
45 * 2 3 2 3 2
46 * 4 7 4 7 4
47 * 8 19 8 15 6
48 *
49 * which may or may not be more efficient (depending upon whether
50 * you can afford the extra registers). Hopefully the gcc 2.95
51 * is inteligent enough to decide if it is better to use the
52 * extra register, but evidence so far seems to suggest otherwise.
53 *
54 * Unfortunately, gcc is not able to optimise the high word
55 * out of long long >> 32, or the low word from long long << 32
56 */
57
58#define __get_unaligned_2(__p) \
59 (__p[0] | __p[1] << 8)
60
61#define __get_unaligned_4(__p) \
62 (__p[0] | __p[1] << 8 | __p[2] << 16 | __p[3] << 24)
63
64#define get_unaligned(ptr) \
65 ({ \
66 __typeof__(*(ptr)) __v; \
67 __u8 *__p = (__u8 *)(ptr); \
68 switch (sizeof(*(ptr))) { \
69 case 1: __v = *(ptr); break; \
70 case 2: __v = __get_unaligned_2(__p); break; \
71 case 4: __v = __get_unaligned_4(__p); break; \
72 case 8: { \
73 unsigned int __v1, __v2; \
74 __v2 = __get_unaligned_4((__p+4)); \
75 __v1 = __get_unaligned_4(__p); \
76 __v = ((unsigned long long)__v2 << 32 | __v1); \
77 } \
78 break; \
79 default: __v = __bug_unaligned_x(__p); break; \
80 } \
81 __v; \
82 })
83
84
85extern inline void __put_unaligned_2(__u32 __v, register __u8 *__p)
86{
87 *__p++ = __v;
88 *__p++ = __v >> 8;
89}
90
91extern inline void __put_unaligned_4(__u32 __v, register __u8 *__p)
92{
93 __put_unaligned_2(__v >> 16, __p + 2);
94 __put_unaligned_2(__v, __p);
95}
96
97extern inline void __put_unaligned_8(const unsigned long long __v, register __u8 *__p)
98{
99 /*
100 * tradeoff: 8 bytes of stack for all unaligned puts (2
101 * instructions), or an extra register in the long long
102 * case - go for the extra register.
103 */
104 __put_unaligned_4(__v >> 32, __p+4);
105 __put_unaligned_4(__v, __p);
106}
107
108/*
109 * Try to store an unaligned value as efficiently as possible.
110 */
111#define put_unaligned(val,ptr) \
112 ({ \
113 switch (sizeof(*(ptr))) { \
114 case 1: \
115 *(ptr) = (val); \
116 break; \
117 case 2: __put_unaligned_2((val),(__u8 *)(ptr)); \
118 break; \
119 case 4: __put_unaligned_4((val),(__u8 *)(ptr)); \
120 break; \
121 case 8: __put_unaligned_8((val),(__u8 *)(ptr)); \
122 break; \
123 default: __bug_unaligned_x(ptr); \
124 break; \
125 } \
126 (void) 0; \
127 })
128
129
130#endif /* __V850_UNALIGNED_H__ */
diff --git a/include/asm-v850/unistd.h b/include/asm-v850/unistd.h
new file mode 100644
index 000000000000..3b552096c0e8
--- /dev/null
+++ b/include/asm-v850/unistd.h
@@ -0,0 +1,477 @@
1/*
2 * include/asm-v850/unistd.h -- System call numbers and invocation mechanism
3 *
4 * Copyright (C) 2001,02,03,04 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03,04 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_UNISTD_H__
15#define __V850_UNISTD_H__
16
17#include <asm/clinkage.h>
18
19#define __NR_restart_syscall 0
20#define __NR_exit 1
21#define __NR_fork 2
22#define __NR_read 3
23#define __NR_write 4
24#define __NR_open 5
25#define __NR_close 6
26#define __NR_waitpid 7
27#define __NR_creat 8
28#define __NR_link 9
29#define __NR_unlink 10
30#define __NR_execve 11
31#define __NR_chdir 12
32#define __NR_time 13
33#define __NR_mknod 14
34#define __NR_chmod 15
35#define __NR_chown 16
36#define __NR_break 17
37#define __NR_lseek 19
38#define __NR_getpid 20
39#define __NR_mount 21
40#define __NR_umount 22
41#define __NR_setuid 23
42#define __NR_getuid 24
43#define __NR_stime 25
44#define __NR_ptrace 26
45#define __NR_alarm 27
46#define __NR_pause 29
47#define __NR_utime 30
48#define __NR_stty 31
49#define __NR_gtty 32
50#define __NR_access 33
51#define __NR_nice 34
52#define __NR_ftime 35
53#define __NR_sync 36
54#define __NR_kill 37
55#define __NR_rename 38
56#define __NR_mkdir 39
57#define __NR_rmdir 40
58#define __NR_dup 41
59#define __NR_pipe 42
60#define __NR_times 43
61#define __NR_prof 44
62#define __NR_brk 45
63#define __NR_setgid 46
64#define __NR_getgid 47
65#define __NR_signal 48
66#define __NR_geteuid 49
67#define __NR_getegid 50
68#define __NR_acct 51
69#define __NR_umount2 52
70#define __NR_lock 53
71#define __NR_ioctl 54
72#define __NR_fcntl 55
73#define __NR_setpgid 57
74#define __NR_umask 60
75#define __NR_chroot 61
76#define __NR_ustat 62
77#define __NR_dup2 63
78#define __NR_getppid 64
79#define __NR_getpgrp 65
80#define __NR_setsid 66
81#define __NR_sigaction 67
82#define __NR_sgetmask 68
83#define __NR_ssetmask 69
84#define __NR_setreuid 70
85#define __NR_setregid 71
86#define __NR_sigsuspend 72
87#define __NR_sigpending 73
88#define __NR_sethostname 74
89#define __NR_setrlimit 75
90#define __NR_ugetrlimit 76
91#define __NR_getrusage 77
92#define __NR_gettimeofday 78
93#define __NR_settimeofday 79
94#define __NR_getgroups 80
95#define __NR_setgroups 81
96#define __NR_select 82
97#define __NR_symlink 83
98#define __NR_readlink 85
99#define __NR_uselib 86
100#define __NR_swapon 87
101#define __NR_reboot 88
102#define __NR_readdir 89
103#define __NR_mmap 90
104#define __NR_munmap 91
105#define __NR_truncate 92
106#define __NR_ftruncate 93
107#define __NR_fchmod 94
108#define __NR_fchown 95
109#define __NR_getpriority 96
110#define __NR_setpriority 97
111#define __NR_profil 98
112#define __NR_statfs 99
113#define __NR_fstatfs 100
114#define __NR_socketcall 102
115#define __NR_syslog 103
116#define __NR_setitimer 104
117#define __NR_getitimer 105
118#define __NR_stat 106
119#define __NR_lstat 107
120#define __NR_fstat 108
121#define __NR_vhangup 111
122#define __NR_wait4 114
123#define __NR_swapoff 115
124#define __NR_sysinfo 116
125#define __NR_ipc 117
126#define __NR_fsync 118
127#define __NR_sigreturn 119
128#define __NR_clone 120
129#define __NR_setdomainname 121
130#define __NR_uname 122
131#define __NR_cacheflush 123
132#define __NR_adjtimex 124
133#define __NR_mprotect 125
134#define __NR_sigprocmask 126
135#define __NR_create_module 127
136#define __NR_init_module 128
137#define __NR_delete_module 129
138#define __NR_get_kernel_syms 130
139#define __NR_quotactl 131
140#define __NR_getpgid 132
141#define __NR_fchdir 133
142#define __NR_bdflush 134
143#define __NR_sysfs 135
144#define __NR_personality 136
145#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
146#define __NR_setfsuid 138
147#define __NR_setfsgid 139
148#define __NR__llseek 140
149#define __NR_getdents 141
150#define __NR_flock 143
151#define __NR_msync 144
152#define __NR_readv 145
153#define __NR_writev 146
154#define __NR_getsid 147
155#define __NR_fdatasync 148
156#define __NR__sysctl 149
157#define __NR_mlock 150
158#define __NR_munlock 151
159#define __NR_mlockall 152
160#define __NR_munlockall 153
161#define __NR_sched_setparam 154
162#define __NR_sched_getparam 155
163#define __NR_sched_setscheduler 156
164#define __NR_sched_getscheduler 157
165#define __NR_sched_yield 158
166#define __NR_sched_get_priority_max 159
167#define __NR_sched_get_priority_min 160
168#define __NR_sched_rr_get_interval 161
169#define __NR_nanosleep 162
170#define __NR_mremap 163
171#define __NR_setresuid 164
172#define __NR_getresuid 165
173#define __NR_query_module 167
174#define __NR_poll 168
175#define __NR_nfsservctl 169
176#define __NR_setresgid 170
177#define __NR_getresgid 171
178#define __NR_prctl 172
179#define __NR_rt_sigreturn 173
180#define __NR_rt_sigaction 174
181#define __NR_rt_sigprocmask 175
182#define __NR_rt_sigpending 176
183#define __NR_rt_sigtimedwait 177
184#define __NR_rt_sigqueueinfo 178
185#define __NR_rt_sigsuspend 179
186#define __NR_pread 180
187#define __NR_pwrite 181
188#define __NR_lchown 182
189#define __NR_getcwd 183
190#define __NR_capget 184
191#define __NR_capset 185
192#define __NR_sigaltstack 186
193#define __NR_sendfile 187
194#define __NR_getpmsg 188 /* some people actually want streams */
195#define __NR_putpmsg 189 /* some people actually want streams */
196#define __NR_vfork 190
197#define __NR_mmap2 192
198#define __NR_truncate64 193
199#define __NR_ftruncate64 194
200#define __NR_stat64 195
201#define __NR_lstat64 196
202#define __NR_fstat64 197
203#define __NR_fcntl64 198
204#define __NR_getdents64 199
205#define __NR_pivot_root 200
206#define __NR_gettid 201
207#define __NR_tkill 202
208
209
210/* Syscall protocol:
211 Syscall number in r12, args in r6-r9, r13-r14
212 Return value in r10
213 Trap 0 for `short' syscalls, where all the args can fit in function
214 call argument registers, and trap 1 when there are additional args in
215 r13-r14. */
216
217#define SYSCALL_NUM "r12"
218#define SYSCALL_ARG0 "r6"
219#define SYSCALL_ARG1 "r7"
220#define SYSCALL_ARG2 "r8"
221#define SYSCALL_ARG3 "r9"
222#define SYSCALL_ARG4 "r13"
223#define SYSCALL_ARG5 "r14"
224#define SYSCALL_RET "r10"
225
226#define SYSCALL_SHORT_TRAP "0"
227#define SYSCALL_LONG_TRAP "1"
228
229/* Registers clobbered by any syscall. This _doesn't_ include the syscall
230 number (r12) or the `extended arg' registers (r13, r14), even though
231 they are actually clobbered too (this is because gcc's `asm' statement
232 doesn't allow a clobber to be used as an input or output). */
233#define SYSCALL_CLOBBERS "r1", "r5", "r11", "r15", "r16", \
234 "r17", "r18", "r19"
235
236/* Registers clobbered by a `short' syscall. This includes all clobbers
237 except the syscall number (r12). */
238#define SYSCALL_SHORT_CLOBBERS SYSCALL_CLOBBERS, "r13", "r14"
239
240
241/* User programs sometimes end up including this header file
242 (indirectly, via uClibc header files), so I'm a bit nervous just
243 including <linux/compiler.h>. */
244#if !defined(__builtin_expect) && __GNUC__ == 2 && __GNUC_MINOR__ < 96
245#define __builtin_expect(x, expected_value) (x)
246#endif
247
248#define __syscall_return(type, res) \
249 do { \
250 /* user-visible error numbers are in the range -1 - -124: \
251 see <asm-v850/errno.h> */ \
252 if (__builtin_expect ((unsigned long)(res) >= (unsigned long)(-125), 0)) { \
253 errno = -(res); \
254 res = -1; \
255 } \
256 return (type) (res); \
257 } while (0)
258
259
260#define _syscall0(type, name) \
261type name (void) \
262{ \
263 register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \
264 register unsigned long __ret __asm__ (SYSCALL_RET); \
265 __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP \
266 : "=r" (__ret), "=r" (__syscall) \
267 : "1" (__syscall) \
268 : SYSCALL_SHORT_CLOBBERS); \
269 __syscall_return (type, __ret); \
270}
271
272#define _syscall1(type, name, atype, a) \
273type name (atype a) \
274{ \
275 register atype __a __asm__ (SYSCALL_ARG0) = a; \
276 register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \
277 register unsigned long __ret __asm__ (SYSCALL_RET); \
278 __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP \
279 : "=r" (__ret), "=r" (__syscall) \
280 : "1" (__syscall), "r" (__a) \
281 : SYSCALL_SHORT_CLOBBERS); \
282 __syscall_return (type, __ret); \
283}
284
285#define _syscall2(type, name, atype, a, btype, b) \
286type name (atype a, btype b) \
287{ \
288 register atype __a __asm__ (SYSCALL_ARG0) = a; \
289 register btype __b __asm__ (SYSCALL_ARG1) = b; \
290 register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \
291 register unsigned long __ret __asm__ (SYSCALL_RET); \
292 __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP \
293 : "=r" (__ret), "=r" (__syscall) \
294 : "1" (__syscall), "r" (__a), "r" (__b) \
295 : SYSCALL_SHORT_CLOBBERS); \
296 __syscall_return (type, __ret); \
297}
298
299#define _syscall3(type, name, atype, a, btype, b, ctype, c) \
300type name (atype a, btype b, ctype c) \
301{ \
302 register atype __a __asm__ (SYSCALL_ARG0) = a; \
303 register btype __b __asm__ (SYSCALL_ARG1) = b; \
304 register ctype __c __asm__ (SYSCALL_ARG2) = c; \
305 register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \
306 register unsigned long __ret __asm__ (SYSCALL_RET); \
307 __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP \
308 : "=r" (__ret), "=r" (__syscall) \
309 : "1" (__syscall), "r" (__a), "r" (__b), "r" (__c) \
310 : SYSCALL_SHORT_CLOBBERS); \
311 __syscall_return (type, __ret); \
312}
313
314#define _syscall4(type, name, atype, a, btype, b, ctype, c, dtype, d) \
315type name (atype a, btype b, ctype c, dtype d) \
316{ \
317 register atype __a __asm__ (SYSCALL_ARG0) = a; \
318 register btype __b __asm__ (SYSCALL_ARG1) = b; \
319 register ctype __c __asm__ (SYSCALL_ARG2) = c; \
320 register dtype __d __asm__ (SYSCALL_ARG3) = d; \
321 register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \
322 register unsigned long __ret __asm__ (SYSCALL_RET); \
323 __asm__ __volatile__ ("trap " SYSCALL_SHORT_TRAP \
324 : "=r" (__ret), "=r" (__syscall) \
325 : "1" (__syscall), \
326 "r" (__a), "r" (__b), "r" (__c), "r" (__d) \
327 : SYSCALL_SHORT_CLOBBERS); \
328 __syscall_return (type, __ret); \
329}
330
331#define _syscall5(type, name, atype, a, btype, b, ctype, c, dtype, d, etype,e)\
332type name (atype a, btype b, ctype c, dtype d, etype e) \
333{ \
334 register atype __a __asm__ (SYSCALL_ARG0) = a; \
335 register btype __b __asm__ (SYSCALL_ARG1) = b; \
336 register ctype __c __asm__ (SYSCALL_ARG2) = c; \
337 register dtype __d __asm__ (SYSCALL_ARG3) = d; \
338 register etype __e __asm__ (SYSCALL_ARG4) = e; \
339 register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \
340 register unsigned long __ret __asm__ (SYSCALL_RET); \
341 __asm__ __volatile__ ("trap " SYSCALL_LONG_TRAP \
342 : "=r" (__ret), "=r" (__syscall), "=r" (__e) \
343 : "1" (__syscall), \
344 "r" (__a), "r" (__b), "r" (__c), "r" (__d), "2" (__e) \
345 : SYSCALL_CLOBBERS); \
346 __syscall_return (type, __ret); \
347}
348
349#if __GNUC__ < 3
350/* In older versions of gcc, `asm' statements with more than 10
351 input/output arguments produce a fatal error. To work around this
352 problem, we use two versions, one for gcc-3.x and one for earlier
353 versions of gcc (the `earlier gcc' version doesn't work with gcc-3.x
354 because gcc-3.x doesn't allow clobbers to also be input arguments). */
355#define __SYSCALL6_TRAP(syscall, ret, a, b, c, d, e, f) \
356 __asm__ __volatile__ ("trap " SYSCALL_LONG_TRAP \
357 : "=r" (ret), "=r" (syscall) \
358 : "1" (syscall), \
359 "r" (a), "r" (b), "r" (c), "r" (d), \
360 "r" (e), "r" (f) \
361 : SYSCALL_CLOBBERS, SYSCALL_ARG4, SYSCALL_ARG5);
362#else /* __GNUC__ >= 3 */
363#define __SYSCALL6_TRAP(syscall, ret, a, b, c, d, e, f) \
364 __asm__ __volatile__ ("trap " SYSCALL_LONG_TRAP \
365 : "=r" (ret), "=r" (syscall), \
366 "=r" (e), "=r" (f) \
367 : "1" (syscall), \
368 "r" (a), "r" (b), "r" (c), "r" (d), \
369 "2" (e), "3" (f) \
370 : SYSCALL_CLOBBERS);
371#endif
372
373#define _syscall6(type, name, atype, a, btype, b, ctype, c, dtype, d, etype, e, ftype, f) \
374type name (atype a, btype b, ctype c, dtype d, etype e, ftype f) \
375{ \
376 register atype __a __asm__ (SYSCALL_ARG0) = a; \
377 register btype __b __asm__ (SYSCALL_ARG1) = b; \
378 register ctype __c __asm__ (SYSCALL_ARG2) = c; \
379 register dtype __d __asm__ (SYSCALL_ARG3) = d; \
380 register etype __e __asm__ (SYSCALL_ARG4) = e; \
381 register etype __f __asm__ (SYSCALL_ARG5) = f; \
382 register unsigned long __syscall __asm__ (SYSCALL_NUM) = __NR_##name; \
383 register unsigned long __ret __asm__ (SYSCALL_RET); \
384 __SYSCALL6_TRAP(__syscall, __ret, __a, __b, __c, __d, __e, __f); \
385 __syscall_return (type, __ret); \
386}
387
388
389#ifdef __KERNEL__
390#define __ARCH_WANT_IPC_PARSE_VERSION
391#define __ARCH_WANT_OLD_READDIR
392#define __ARCH_WANT_STAT64
393#define __ARCH_WANT_SYS_ALARM
394#define __ARCH_WANT_SYS_GETHOSTNAME
395#define __ARCH_WANT_SYS_PAUSE
396#define __ARCH_WANT_SYS_SGETMASK
397#define __ARCH_WANT_SYS_SIGNAL
398#define __ARCH_WANT_SYS_TIME
399#define __ARCH_WANT_SYS_UTIME
400#define __ARCH_WANT_SYS_WAITPID
401#define __ARCH_WANT_SYS_SOCKETCALL
402#define __ARCH_WANT_SYS_FADVISE64
403#define __ARCH_WANT_SYS_GETPGRP
404#define __ARCH_WANT_SYS_LLSEEK
405#define __ARCH_WANT_SYS_NICE
406#define __ARCH_WANT_SYS_OLDUMOUNT
407#define __ARCH_WANT_SYS_SIGPENDING
408#define __ARCH_WANT_SYS_SIGPROCMASK
409#define __ARCH_WANT_SYS_RT_SIGACTION
410#endif
411
412#ifdef __KERNEL_SYSCALLS__
413
414#include <linux/compiler.h>
415#include <linux/types.h>
416
417/*
418 * we need this inline - forking from kernel space will result
419 * in NO COPY ON WRITE (!!!), until an execve is executed. This
420 * is no problem, but for the stack. This is handled by not letting
421 * main() use the stack at all after fork(). Thus, no function
422 * calls - which means inline code for fork too, as otherwise we
423 * would use the stack upon exit from 'fork()'.
424 *
425 * Actually only pause and fork are needed inline, so that there
426 * won't be any messing with the stack from main(), but we define
427 * some others too.
428 */
429#define __NR__exit __NR_exit
430extern inline _syscall0(pid_t,setsid)
431extern inline _syscall3(int,write,int,fd,const char *,buf,off_t,count)
432extern inline _syscall3(int,read,int,fd,char *,buf,off_t,count)
433extern inline _syscall3(off_t,lseek,int,fd,off_t,offset,int,count)
434extern inline _syscall1(int,dup,int,fd)
435extern inline _syscall3(int,execve,const char *,file,char **,argv,char **,envp)
436extern inline _syscall3(int,open,const char *,file,int,flag,int,mode)
437extern inline _syscall1(int,close,int,fd)
438extern inline _syscall1(int,_exit,int,exitcode)
439extern inline _syscall3(pid_t,waitpid,pid_t,pid,int *,wait_stat,int,options)
440
441extern inline pid_t wait(int * wait_stat)
442{
443 return waitpid (-1, wait_stat, 0);
444}
445
446unsigned long sys_mmap(unsigned long addr, size_t len,
447 unsigned long prot, unsigned long flags,
448 unsigned long fd, off_t offset);
449unsigned long sys_mmap2(unsigned long addr, size_t len,
450 unsigned long prot, unsigned long flags,
451 unsigned long fd, unsigned long pgoff);
452struct pt_regs;
453int sys_execve (char *name, char **argv, char **envp, struct pt_regs *regs);
454int sys_pipe (int *fildes);
455int sys_ptrace(long request, long pid, long addr, long data);
456struct sigaction;
457asmlinkage long sys_rt_sigaction(int sig,
458 const struct sigaction __user *act,
459 struct sigaction __user *oact,
460 size_t sigsetsize);
461
462#endif
463
464/*
465 * "Conditional" syscalls
466 */
467#define cond_syscall(name) \
468 asm (".weak\t" C_SYMBOL_STRING(name) ";" \
469 ".set\t" C_SYMBOL_STRING(name) "," C_SYMBOL_STRING(sys_ni_syscall))
470#if 0
471/* This doesn't work if there's a function prototype for NAME visible,
472 because the argument types probably won't match. */
473#define cond_syscall(name) \
474 void name (void) __attribute__ ((weak, alias ("sys_ni_syscall")));
475#endif
476
477#endif /* __V850_UNISTD_H__ */
diff --git a/include/asm-v850/user.h b/include/asm-v850/user.h
new file mode 100644
index 000000000000..ccf4cea6dc9c
--- /dev/null
+++ b/include/asm-v850/user.h
@@ -0,0 +1,56 @@
1#ifndef __V850_USER_H__
2#define __V850_USER_H__
3
4/* Adapted from <asm-ppc/user.h>. */
5
6#ifdef __KERNEL__
7
8#include <linux/ptrace.h>
9#include <asm/page.h>
10
11/*
12 * Core file format: The core file is written in such a way that gdb
13 * can understand it and provide useful information to the user (under
14 * linux we use the `trad-core' bfd, NOT the osf-core). The file contents
15 * are as follows:
16 *
17 * upage: 1 page consisting of a user struct that tells gdb
18 * what is present in the file. Directly after this is a
19 * copy of the task_struct, which is currently not used by gdb,
20 * but it may come in handy at some point. All of the registers
21 * are stored as part of the upage. The upage should always be
22 * only one page long.
23 * data: The data segment follows next. We use current->end_text to
24 * current->brk to pick up all of the user variables, plus any memory
25 * that may have been sbrk'ed. No attempt is made to determine if a
26 * page is demand-zero or if a page is totally unused, we just cover
27 * the entire range. All of the addresses are rounded in such a way
28 * that an integral number of pages is written.
29 * stack: We need the stack information in order to get a meaningful
30 * backtrace. We need to write the data from usp to
31 * current->start_stack, so we round each of these in order to be able
32 * to write an integer number of pages.
33 */
34struct user {
35 struct pt_regs regs; /* entire machine state */
36 size_t u_tsize; /* text size (pages) */
37 size_t u_dsize; /* data size (pages) */
38 size_t u_ssize; /* stack size (pages) */
39 unsigned long start_code; /* text starting address */
40 unsigned long start_data; /* data starting address */
41 unsigned long start_stack; /* stack starting address */
42 long int signal; /* signal causing core dump */
43 struct regs * u_ar0; /* help gdb find registers */
44 unsigned long magic; /* identifies a core file */
45 char u_comm[32]; /* user command name */
46};
47
48#define NBPG PAGE_SIZE
49#define UPAGES 1
50#define HOST_TEXT_START_ADDR (u.start_code)
51#define HOST_DATA_START_ADDR (u.start_data)
52#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
53
54#endif /* __KERNEL__ */
55
56#endif /* __V850_USER_H__ */
diff --git a/include/asm-v850/v850e.h b/include/asm-v850/v850e.h
new file mode 100644
index 000000000000..5a222eb5117f
--- /dev/null
+++ b/include/asm-v850/v850e.h
@@ -0,0 +1,21 @@
1/*
2 * include/asm-v850/v850e.h -- V850E CPU
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_V850E_H__
15#define __V850_V850E_H__
16
17#include <asm/v850e_intc.h>
18
19#define CPU_ARCH "v850e"
20
21#endif /* __V850_V850E_H__ */
diff --git a/include/asm-v850/v850e2.h b/include/asm-v850/v850e2.h
new file mode 100644
index 000000000000..48680408ab7e
--- /dev/null
+++ b/include/asm-v850/v850e2.h
@@ -0,0 +1,69 @@
1/*
2 * include/asm-v850/v850e2.h -- Machine-dependent defs for V850E2 CPUs
3 *
4 * Copyright (C) 2002,03 NEC Electronics Corporation
5 * Copyright (C) 2002,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_V850E2_H__
15#define __V850_V850E2_H__
16
17#include <asm/v850e_intc.h> /* v850e-style interrupt system. */
18
19
20#define CPU_ARCH "v850e2"
21
22
23/* Control registers. */
24
25/* Chip area select control */
26#define V850E2_CSC_ADDR(n) (0xFFFFF060 + (n) * 2)
27#define V850E2_CSC(n) (*(volatile u16 *)V850E2_CSC_ADDR(n))
28/* I/O area select control */
29#define V850E2_BPC_ADDR 0xFFFFF064
30#define V850E2_BPC (*(volatile u16 *)V850E2_BPC_ADDR)
31/* Bus size configuration */
32#define V850E2_BSC_ADDR 0xFFFFF066
33#define V850E2_BSC (*(volatile u16 *)V850E2_BSC_ADDR)
34/* Endian configuration */
35#define V850E2_BEC_ADDR 0xFFFFF068
36#define V850E2_BEC (*(volatile u16 *)V850E2_BEC_ADDR)
37/* Cache configuration */
38#define V850E2_BHC_ADDR 0xFFFFF06A
39#define V850E2_BHC (*(volatile u16 *)V850E2_BHC_ADDR)
40/* NPB strobe-wait configuration */
41#define V850E2_VSWC_ADDR 0xFFFFF06E
42#define V850E2_VSWC (*(volatile u16 *)V850E2_VSWC_ADDR)
43/* Bus cycle type */
44#define V850E2_BCT_ADDR(n) (0xFFFFF480 + (n) * 2)
45#define V850E2_BCT(n) (*(volatile u16 *)V850E2_BCT_ADDR(n))
46/* Data wait control */
47#define V850E2_DWC_ADDR(n) (0xFFFFF484 + (n) * 2)
48#define V850E2_DWC(n) (*(volatile u16 *)V850E2_DWC_ADDR(n))
49/* Bus cycle control */
50#define V850E2_BCC_ADDR 0xFFFFF488
51#define V850E2_BCC (*(volatile u16 *)V850E2_BCC_ADDR)
52/* Address wait control */
53#define V850E2_ASC_ADDR 0xFFFFF48A
54#define V850E2_ASC (*(volatile u16 *)V850E2_ASC_ADDR)
55/* Local bus sizing control */
56#define V850E2_LBS_ADDR 0xFFFFF48E
57#define V850E2_LBS (*(volatile u16 *)V850E2_LBS_ADDR)
58/* Line buffer control */
59#define V850E2_LBC_ADDR(n) (0xFFFFF490 + (n) * 2)
60#define V850E2_LBC(n) (*(volatile u16 *)V850E2_LBC_ADDR(n))
61/* SDRAM configuration */
62#define V850E2_SCR_ADDR(n) (0xFFFFF4A0 + (n) * 4)
63#define V850E2_SCR(n) (*(volatile u16 *)V850E2_SCR_ADDR(n))
64/* SDRAM refresh cycle control */
65#define V850E2_RFS_ADDR(n) (0xFFFFF4A2 + (n) * 4)
66#define V850E2_RFS(n) (*(volatile u16 *)V850E2_RFS_ADDR(n))
67
68
69#endif /* __V850_V850E2_H__ */
diff --git a/include/asm-v850/v850e2_cache.h b/include/asm-v850/v850e2_cache.h
new file mode 100644
index 000000000000..61acda1023e8
--- /dev/null
+++ b/include/asm-v850/v850e2_cache.h
@@ -0,0 +1,74 @@
1/*
2 * include/asm-v850/v850e2_cache_cache.h -- Cache control for V850E2
3 * cache memories
4 *
5 * Copyright (C) 2003 NEC Electronics Corporation
6 * Copyright (C) 2003 Miles Bader <miles@gnu.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 *
12 * Written by Miles Bader <miles@gnu.org>
13 */
14
15#ifndef __V850_V850E2_CACHE_H__
16#define __V850_V850E2_CACHE_H__
17
18#include <asm/types.h>
19
20
21/* Cache control registers. */
22
23/* Bus Transaction Control */
24#define V850E2_CACHE_BTSC_ADDR 0xFFFFF070
25#define V850E2_CACHE_BTSC (*(volatile u16 *)V850E2_CACHE_BTSC_ADDR)
26#define V850E2_CACHE_BTSC_ICM 0x0001 /* icache enable */
27#define V850E2_CACHE_BTSC_DCM0 0x0004 /* dcache enable, bit 0 */
28#define V850E2_CACHE_BTSC_DCM1 0x0008 /* dcache enable, bit 1 */
29#define V850E2_CACHE_BTSC_DCM_WT /* write-through */ \
30 V850E2_CACHE_BTSC_DCM0
31#ifdef CONFIG_V850E2_V850E2S
32# define V850E2_CACHE_BTSC_DCM_WB_NO_ALLOC /* write-back, non-alloc */ \
33 V850E2_CACHE_BTSC_DCM1
34# define V850E2_CACHE_BTSC_DCM_WB_ALLOC /* write-back, non-alloc */ \
35 (V850E2_CACHE_BTSC_DCM1 | V850E2_CACHE_BTSC_DCM0)
36# define V850E2_CACHE_BTSC_ISEQ 0x0010 /* icache `address sequence mode' */
37# define V850E2_CACHE_BTSC_DSEQ 0x0020 /* dcache `address sequence mode' */
38# define V850E2_CACHE_BTSC_IRFC 0x0030
39# define V850E2_CACHE_BTSC_ILCD 0x4000
40# define V850E2_CACHE_BTSC_VABE 0x8000
41#endif /* CONFIG_V850E2_V850E2S */
42
43/* Cache operation start address register (low-bits). */
44#define V850E2_CACHE_CADL_ADDR 0xFFFFF074
45#define V850E2_CACHE_CADL (*(volatile u16 *)V850E2_CACHE_CADL_ADDR)
46/* Cache operation start address register (high-bits). */
47#define V850E2_CACHE_CADH_ADDR 0xFFFFF076
48#define V850E2_CACHE_CADH (*(volatile u16 *)V850E2_CACHE_CADH_ADDR)
49/* Cache operation count register. */
50#define V850E2_CACHE_CCNT_ADDR 0xFFFFF078
51#define V850E2_CACHE_CCNT (*(volatile u16 *)V850E2_CACHE_CCNT_ADDR)
52/* Cache operation specification register. */
53#define V850E2_CACHE_COPR_ADDR 0xFFFFF07A
54#define V850E2_CACHE_COPR (*(volatile u16 *)V850E2_CACHE_COPR_ADDR)
55#define V850E2_CACHE_COPR_STRT 0x0001 /* start cache operation */
56#define V850E2_CACHE_COPR_LBSL 0x0100 /* 0 = icache, 1 = dcache */
57#define V850E2_CACHE_COPR_WSLE 0x0200 /* operate on cache way */
58#define V850E2_CACHE_COPR_WSL(way) ((way) * 0x0400) /* way select */
59#define V850E2_CACHE_COPR_CFC(op) ((op) * 0x1000) /* cache function code */
60
61
62/* Size of a cache line in bytes. */
63#define V850E2_CACHE_LINE_SIZE_BITS 4
64#define V850E2_CACHE_LINE_SIZE (1 << V850E2_CACHE_LINE_SIZE_BITS)
65
66/* The size of each cache `way' in lines. */
67#define V850E2_CACHE_WAY_SIZE 256
68
69
70/* For <asm/cache.h> */
71#define L1_CACHE_BYTES V850E2_CACHE_LINE_SIZE
72
73
74#endif /* __V850_V850E2_CACHE_H__ */
diff --git a/include/asm-v850/v850e_cache.h b/include/asm-v850/v850e_cache.h
new file mode 100644
index 000000000000..aa7d7eb9da50
--- /dev/null
+++ b/include/asm-v850/v850e_cache.h
@@ -0,0 +1,48 @@
1/*
2 * include/asm-v850/v850e_cache.h -- Cache control for V850E cache memories
3 *
4 * Copyright (C) 2001,03 NEC Electronics Corporation
5 * Copyright (C) 2001,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14/* This file implements cache control for the rather simple cache used on
15 some V850E CPUs, specifically the NB85E/TEG CPU-core and the V850E/ME2
16 CPU. V850E2 processors have their own (better) cache
17 implementation. */
18
19#ifndef __V850_V850E_CACHE_H__
20#define __V850_V850E_CACHE_H__
21
22#include <asm/types.h>
23
24
25/* Cache control registers. */
26#define V850E_CACHE_BHC_ADDR 0xFFFFF06A
27#define V850E_CACHE_BHC (*(volatile u16 *)V850E_CACHE_BHC_ADDR)
28#define V850E_CACHE_ICC_ADDR 0xFFFFF070
29#define V850E_CACHE_ICC (*(volatile u16 *)V850E_CACHE_ICC_ADDR)
30#define V850E_CACHE_ISI_ADDR 0xFFFFF072
31#define V850E_CACHE_ISI (*(volatile u16 *)V850E_CACHE_ISI_ADDR)
32#define V850E_CACHE_DCC_ADDR 0xFFFFF078
33#define V850E_CACHE_DCC (*(volatile u16 *)V850E_CACHE_DCC_ADDR)
34
35/* Size of a cache line in bytes. */
36#define V850E_CACHE_LINE_SIZE 16
37
38/* For <asm/cache.h> */
39#define L1_CACHE_BYTES V850E_CACHE_LINE_SIZE
40
41
42#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
43/* Set caching params via the BHC, ICC, and DCC registers. */
44void v850e_cache_enable (u16 bhc, u16 icc, u16 dcc);
45#endif /* __KERNEL__ && !__ASSEMBLY__ */
46
47
48#endif /* __V850_V850E_CACHE_H__ */
diff --git a/include/asm-v850/v850e_intc.h b/include/asm-v850/v850e_intc.h
new file mode 100644
index 000000000000..6fdf95708317
--- /dev/null
+++ b/include/asm-v850/v850e_intc.h
@@ -0,0 +1,133 @@
1/*
2 * include/asm-v850/v850e_intc.h -- V850E CPU interrupt controller (INTC)
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14#ifndef __V850_V850E_INTC_H__
15#define __V850_V850E_INTC_H__
16
17
18/* There are 4 16-bit `Interrupt Mask Registers' located contiguously
19 starting from this base. Each interrupt uses a single bit to
20 indicated enabled/disabled status. */
21#define V850E_INTC_IMR_BASE_ADDR 0xFFFFF100
22#define V850E_INTC_IMR_ADDR(irq) (V850E_INTC_IMR_BASE_ADDR + ((irq) >> 3))
23#define V850E_INTC_IMR_BIT(irq) ((irq) & 0x7)
24
25/* Each maskable interrupt has a single-byte control register at this
26 address. */
27#define V850E_INTC_IC_BASE_ADDR 0xFFFFF110
28#define V850E_INTC_IC_ADDR(irq) (V850E_INTC_IC_BASE_ADDR + ((irq) << 1))
29#define V850E_INTC_IC(irq) (*(volatile u8 *)V850E_INTC_IC_ADDR(irq))
30/* Encode priority PR for storing in an interrupt control register. */
31#define V850E_INTC_IC_PR(pr) (pr)
32/* Interrupt disable bit in an interrupt control register. */
33#define V850E_INTC_IC_MK_BIT 6
34#define V850E_INTC_IC_MK (1 << V850E_INTC_IC_MK_BIT)
35/* Interrupt pending flag in an interrupt control register. */
36#define V850E_INTC_IC_IF_BIT 7
37#define V850E_INTC_IC_IF (1 << V850E_INTC_IC_IF_BIT)
38
39/* The ISPR (In-service priority register) contains one bit for each interrupt
40 priority level, which is set to one when that level is currently being
41 serviced (and thus blocking any interrupts of equal or lesser level). */
42#define V850E_INTC_ISPR_ADDR 0xFFFFF1FA
43#define V850E_INTC_ISPR (*(volatile u8 *)V850E_INTC_ISPR_ADDR)
44
45
46#ifndef __ASSEMBLY__
47
48/* Enable interrupt handling for interrupt IRQ. */
49static inline void v850e_intc_enable_irq (unsigned irq)
50{
51 __asm__ __volatile__ ("clr1 %0, [%1]"
52 :: "r" (V850E_INTC_IMR_BIT (irq)),
53 "r" (V850E_INTC_IMR_ADDR (irq))
54 : "memory");
55}
56
57/* Disable interrupt handling for interrupt IRQ. Note that any
58 interrupts received while disabled will be delivered once the
59 interrupt is enabled again, unless they are explicitly cleared using
60 `v850e_intc_clear_pending_irq'. */
61static inline void v850e_intc_disable_irq (unsigned irq)
62{
63 __asm__ __volatile__ ("set1 %0, [%1]"
64 :: "r" (V850E_INTC_IMR_BIT (irq)),
65 "r" (V850E_INTC_IMR_ADDR (irq))
66 : "memory");
67}
68
69/* Return true if interrupt handling for interrupt IRQ is enabled. */
70static inline int v850e_intc_irq_enabled (unsigned irq)
71{
72 int rval;
73 __asm__ __volatile__ ("tst1 %1, [%2]; setf z, %0"
74 : "=r" (rval)
75 : "r" (V850E_INTC_IMR_BIT (irq)),
76 "r" (V850E_INTC_IMR_ADDR (irq)));
77 return rval;
78}
79
80/* Disable irqs from 0 until LIMIT. LIMIT must be a multiple of 8. */
81static inline void _v850e_intc_disable_irqs (unsigned limit)
82{
83 unsigned long addr;
84 for (addr = V850E_INTC_IMR_BASE_ADDR; limit >= 8; addr++, limit -= 8)
85 *(char *)addr = 0xFF;
86}
87
88/* Disable all irqs. This is purposely a macro, because NUM_MACH_IRQS
89 will be only be defined later. */
90#define v850e_intc_disable_irqs() _v850e_intc_disable_irqs (NUM_MACH_IRQS)
91
92/* Clear any pending interrupts for IRQ. */
93static inline void v850e_intc_clear_pending_irq (unsigned irq)
94{
95 __asm__ __volatile__ ("clr1 %0, 0[%1]"
96 :: "i" (V850E_INTC_IC_IF_BIT),
97 "r" (V850E_INTC_IC_ADDR (irq))
98 : "memory");
99}
100
101/* Return true if interrupt IRQ is pending (but disabled). */
102static inline int v850e_intc_irq_pending (unsigned irq)
103{
104 int rval;
105 __asm__ __volatile__ ("tst1 %1, 0[%2]; setf nz, %0"
106 : "=r" (rval)
107 : "i" (V850E_INTC_IC_IF_BIT),
108 "r" (V850E_INTC_IC_ADDR (irq)));
109 return rval;
110}
111
112
113struct v850e_intc_irq_init {
114 const char *name; /* name of interrupt type */
115
116 /* Range of kernel irq numbers for this type:
117 BASE, BASE+INTERVAL, ..., BASE+INTERVAL*NUM */
118 unsigned base, num, interval;
119
120 unsigned priority; /* interrupt priority to assign */
121};
122struct hw_interrupt_type; /* fwd decl */
123
124/* Initialize HW_IRQ_TYPES for INTC-controlled irqs described in array
125 INITS (which is terminated by an entry with the name field == 0). */
126extern void v850e_intc_init_irq_types (struct v850e_intc_irq_init *inits,
127 struct hw_interrupt_type *hw_irq_types);
128
129
130#endif /* !__ASSEMBLY__ */
131
132
133#endif /* __V850_V850E_INTC_H__ */
diff --git a/include/asm-v850/v850e_timer_c.h b/include/asm-v850/v850e_timer_c.h
new file mode 100644
index 000000000000..f70575df6ea9
--- /dev/null
+++ b/include/asm-v850/v850e_timer_c.h
@@ -0,0 +1,48 @@
1/*
2 * include/asm-v850/v850e_timer_c.h -- `Timer C' component often used
3 * with the V850E cpu core
4 *
5 * Copyright (C) 2001,03 NEC Electronics Corporation
6 * Copyright (C) 2001,03 Miles Bader <miles@gnu.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 *
12 * Written by Miles Bader <miles@gnu.org>
13 */
14
15/* NOTE: this include file currently contains only enough to allow us to
16 use timer C as an interrupt pass-through. */
17
18#ifndef __V850_V850E_TIMER_C_H__
19#define __V850_V850E_TIMER_C_H__
20
21#include <asm/types.h>
22#include <asm/machdep.h> /* Pick up chip-specific defs. */
23
24
25/* Timer C (16-bit interval timers). */
26
27/* Control register 0 for timer C. */
28#define V850E_TIMER_C_TMCC0_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x6 + 0x10 *(n))
29#define V850E_TIMER_C_TMCC0(n) (*(volatile u8 *)V850E_TIMER_C_TMCC0_ADDR(n))
30#define V850E_TIMER_C_TMCC0_CAE 0x01 /* clock action enable */
31#define V850E_TIMER_C_TMCC0_CE 0x02 /* count enable */
32/* ... */
33
34/* Control register 1 for timer C. */
35#define V850E_TIMER_C_TMCC1_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x8 + 0x10 *(n))
36#define V850E_TIMER_C_TMCC1(n) (*(volatile u8 *)V850E_TIMER_C_TMCC1_ADDR(n))
37#define V850E_TIMER_C_TMCC1_CMS0 0x01 /* capture/compare mode select (ccc0) */
38#define V850E_TIMER_C_TMCC1_CMS1 0x02 /* capture/compare mode select (ccc1) */
39/* ... */
40
41/* Interrupt edge-sensitivity control for timer C. */
42#define V850E_TIMER_C_SESC_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x9 + 0x10 *(n))
43#define V850E_TIMER_C_SESC(n) (*(volatile u8 *)V850E_TIMER_C_SESC_ADDR(n))
44
45/* ...etc... */
46
47
48#endif /* __V850_V850E_TIMER_C_H__ */
diff --git a/include/asm-v850/v850e_timer_d.h b/include/asm-v850/v850e_timer_d.h
new file mode 100644
index 000000000000..417612c5b22f
--- /dev/null
+++ b/include/asm-v850/v850e_timer_d.h
@@ -0,0 +1,62 @@
1/*
2 * include/asm-v850/v850e_timer_d.h -- `Timer D' component often used
3 * with the V850E cpu core
4 *
5 * Copyright (C) 2001,02,03 NEC Electronics Corporation
6 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 *
12 * Written by Miles Bader <miles@gnu.org>
13 */
14
15#ifndef __V850_V850E_TIMER_D_H__
16#define __V850_V850E_TIMER_D_H__
17
18#include <asm/types.h>
19#include <asm/machdep.h> /* Pick up chip-specific defs. */
20
21
22/* Timer D (16-bit interval timers). */
23
24/* Count registers for timer D. */
25#define V850E_TIMER_D_TMD_ADDR(n) (V850E_TIMER_D_TMD_BASE_ADDR + 0x10 * (n))
26#define V850E_TIMER_D_TMD(n) (*(volatile u16 *)V850E_TIMER_D_TMD_ADDR(n))
27
28/* Count compare registers for timer D. */
29#define V850E_TIMER_D_CMD_ADDR(n) (V850E_TIMER_D_CMD_BASE_ADDR + 0x10 * (n))
30#define V850E_TIMER_D_CMD(n) (*(volatile u16 *)V850E_TIMER_D_CMD_ADDR(n))
31
32/* Control registers for timer D. */
33#define V850E_TIMER_D_TMCD_ADDR(n) (V850E_TIMER_D_TMCD_BASE_ADDR + 0x10 * (n))
34#define V850E_TIMER_D_TMCD(n) (*(volatile u8 *)V850E_TIMER_D_TMCD_ADDR(n))
35/* Control bits for timer D. */
36#define V850E_TIMER_D_TMCD_CE 0x2 /* count enable */
37#define V850E_TIMER_D_TMCD_CAE 0x1 /* clock action enable */
38/* Clock divider setting (log2). */
39#define V850E_TIMER_D_TMCD_CS(divlog2) (((divlog2) - V850E_TIMER_D_TMCD_CS_MIN) << 4)
40/* Minimum clock divider setting (log2). */
41#ifndef V850E_TIMER_D_TMCD_CS_MIN /* Can be overridden by mach-specific hdrs */
42#define V850E_TIMER_D_TMCD_CS_MIN 2 /* Default is correct for the v850e/ma1 */
43#endif
44/* Maximum clock divider setting (log2). */
45#define V850E_TIMER_D_TMCD_CS_MAX (V850E_TIMER_D_TMCD_CS_MIN + 7)
46
47/* Return the clock-divider (log2) of timer D unit N. */
48#define V850E_TIMER_D_DIVLOG2(n) \
49 (((V850E_TIMER_D_TMCD(n) >> 4) & 0x7) + V850E_TIMER_D_TMCD_CS_MIN)
50
51
52#ifndef __ASSEMBLY__
53
54/* Start interval timer TIMER (0-3). The timer will issue the
55 corresponding INTCMD interrupt RATE times per second. This function
56 does not enable the interrupt. */
57extern void v850e_timer_d_configure (unsigned timer, unsigned rate);
58
59#endif /* !__ASSEMBLY__ */
60
61
62#endif /* __V850_V850E_TIMER_D_H__ */
diff --git a/include/asm-v850/v850e_uart.h b/include/asm-v850/v850e_uart.h
new file mode 100644
index 000000000000..5930d5990b19
--- /dev/null
+++ b/include/asm-v850/v850e_uart.h
@@ -0,0 +1,77 @@
1/*
2 * include/asm-v850/v850e_uart.h -- common V850E on-chip UART driver
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14/* There's not actually a single UART implementation used by V850E CPUs,
15 but rather a series of implementations that are all `close' to one
16 another. This file corresponds to the single driver which handles all
17 of them. */
18
19#ifndef __V850_V850E_UART_H__
20#define __V850_V850E_UART_H__
21
22#include <linux/config.h>
23#include <linux/termios.h>
24
25#include <asm/v850e_utils.h>
26#include <asm/types.h>
27#include <asm/machdep.h> /* Pick up chip-specific defs. */
28
29
30/* Include model-specific definitions. */
31#ifdef CONFIG_V850E_UART
32# ifdef CONFIG_V850E_UARTB
33# include <asm-v850/v850e_uartb.h>
34# else
35# include <asm-v850/v850e_uarta.h> /* original V850E UART */
36# endif
37#endif
38
39
40/* Optional capabilities some hardware provides. */
41
42/* This UART doesn't implement RTS/CTS by default, but some platforms
43 implement them externally, so check to see if <asm/machdep.h> defined
44 anything. */
45#ifdef V850E_UART_CTS
46#define v850e_uart_cts(n) V850E_UART_CTS(n)
47#else
48#define v850e_uart_cts(n) (1)
49#endif
50
51/* Do the same for RTS. */
52#ifdef V850E_UART_SET_RTS
53#define v850e_uart_set_rts(n,v) V850E_UART_SET_RTS(n,v)
54#else
55#define v850e_uart_set_rts(n,v) ((void)0)
56#endif
57
58
59/* This is the serial channel to use for the boot console (if desired). */
60#ifndef V850E_UART_CONSOLE_CHANNEL
61# define V850E_UART_CONSOLE_CHANNEL 0
62#endif
63
64
65#ifndef __ASSEMBLY__
66
67/* Setup a console using channel 0 of the builtin uart. */
68extern void v850e_uart_cons_init (unsigned chan);
69
70/* Configure and turn on uart channel CHAN, using the termios `control
71 modes' bits in CFLAGS, and a baud-rate of BAUD. */
72void v850e_uart_configure (unsigned chan, unsigned cflags, unsigned baud);
73
74#endif /* !__ASSEMBLY__ */
75
76
77#endif /* __V850_V850E_UART_H__ */
diff --git a/include/asm-v850/v850e_uarta.h b/include/asm-v850/v850e_uarta.h
new file mode 100644
index 000000000000..e483e0950725
--- /dev/null
+++ b/include/asm-v850/v850e_uarta.h
@@ -0,0 +1,278 @@
1/*
2 * include/asm-v850/v850e_uarta.h -- original V850E on-chip UART
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14/* This is the original V850E UART implementation is called just `UART' in
15 the docs, but we name this header file <asm/v850e_uarta.h> because the
16 name <asm/v850e_uart.h> is used for the common driver that handles both
17 `UART' and `UARTB' implementations. */
18
19#ifndef __V850_V850E_UARTA_H__
20#define __V850_V850E_UARTA_H__
21
22
23/* Raw hardware interface. */
24
25/* The base address of the UART control registers for channel N.
26 The default is the address used on the V850E/MA1. */
27#ifndef V850E_UART_BASE_ADDR
28#define V850E_UART_BASE_ADDR(n) (0xFFFFFA00 + 0x10 * (n))
29#endif
30
31/* Addresses of specific UART control registers for channel N.
32 The defaults are the addresses used on the V850E/MA1; if a platform
33 wants to redefine any of these, it must redefine them all. */
34#ifndef V850E_UART_ASIM_ADDR
35#define V850E_UART_ASIM_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x0)
36#define V850E_UART_RXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x2)
37#define V850E_UART_ASIS_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x3)
38#define V850E_UART_TXB_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x4)
39#define V850E_UART_ASIF_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x5)
40#define V850E_UART_CKSR_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x6)
41#define V850E_UART_BRGC_ADDR(n) (V850E_UART_BASE_ADDR(n) + 0x7)
42#endif
43
44/* UART config registers. */
45#define V850E_UART_ASIM(n) (*(volatile u8 *)V850E_UART_ASIM_ADDR(n))
46/* Control bits for config registers. */
47#define V850E_UART_ASIM_CAE 0x80 /* clock enable */
48#define V850E_UART_ASIM_TXE 0x40 /* transmit enable */
49#define V850E_UART_ASIM_RXE 0x20 /* receive enable */
50#define V850E_UART_ASIM_PS_MASK 0x18 /* mask covering parity-select bits */
51#define V850E_UART_ASIM_PS_NONE 0x00 /* no parity */
52#define V850E_UART_ASIM_PS_ZERO 0x08 /* zero parity */
53#define V850E_UART_ASIM_PS_ODD 0x10 /* odd parity */
54#define V850E_UART_ASIM_PS_EVEN 0x18 /* even parity */
55#define V850E_UART_ASIM_CL_8 0x04 /* char len is 8 bits (otherwise, 7) */
56#define V850E_UART_ASIM_SL_2 0x02 /* 2 stop bits (otherwise, 1) */
57#define V850E_UART_ASIM_ISRM 0x01 /* generate INTSR interrupt on errors
58 (otherwise, generate INTSER) */
59
60/* UART serial interface status registers. */
61#define V850E_UART_ASIS(n) (*(volatile u8 *)V850E_UART_ASIS_ADDR(n))
62/* Control bits for status registers. */
63#define V850E_UART_ASIS_PE 0x04 /* parity error */
64#define V850E_UART_ASIS_FE 0x02 /* framing error */
65#define V850E_UART_ASIS_OVE 0x01 /* overrun error */
66
67/* UART serial interface transmission status registers. */
68#define V850E_UART_ASIF(n) (*(volatile u8 *)V850E_UART_ASIF_ADDR(n))
69#define V850E_UART_ASIF_TXBF 0x02 /* transmit buffer flag (data in TXB) */
70#define V850E_UART_ASIF_TXSF 0x01 /* transmit shift flag (sending data) */
71
72/* UART receive buffer register. */
73#define V850E_UART_RXB(n) (*(volatile u8 *)V850E_UART_RXB_ADDR(n))
74
75/* UART transmit buffer register. */
76#define V850E_UART_TXB(n) (*(volatile u8 *)V850E_UART_TXB_ADDR(n))
77
78/* UART baud-rate generator control registers. */
79#define V850E_UART_CKSR(n) (*(volatile u8 *)V850E_UART_CKSR_ADDR(n))
80#define V850E_UART_CKSR_MAX 11
81#define V850E_UART_BRGC(n) (*(volatile u8 *)V850E_UART_BRGC_ADDR(n))
82#define V850E_UART_BRGC_MIN 8
83
84
85#ifndef V850E_UART_CKSR_MAX_FREQ
86#define V850E_UART_CKSR_MAX_FREQ (25*1000*1000)
87#endif
88
89/* Calculate the minimum value for CKSR on this processor. */
90static inline unsigned v850e_uart_cksr_min (void)
91{
92 int min = 0;
93 unsigned freq = V850E_UART_BASE_FREQ;
94 while (freq > V850E_UART_CKSR_MAX_FREQ) {
95 freq >>= 1;
96 min++;
97 }
98 return min;
99}
100
101
102/* Slightly abstract interface used by driver. */
103
104
105/* Interrupts used by the UART. */
106
107/* Received when the most recently transmitted character has been sent. */
108#define V850E_UART_TX_IRQ(chan) IRQ_INTST (chan)
109/* Received when a new character has been received. */
110#define V850E_UART_RX_IRQ(chan) IRQ_INTSR (chan)
111
112
113/* UART clock generator interface. */
114
115/* This type encapsulates a particular uart frequency. */
116typedef struct {
117 unsigned clk_divlog2;
118 unsigned brgen_count;
119} v850e_uart_speed_t;
120
121/* Calculate a uart speed from BAUD for this uart. */
122static inline v850e_uart_speed_t v850e_uart_calc_speed (unsigned baud)
123{
124 v850e_uart_speed_t speed;
125
126 /* Calculate the log2 clock divider and baud-rate counter values
127 (note that the UART divides the resulting clock by 2, so
128 multiply BAUD by 2 here to compensate). */
129 calc_counter_params (V850E_UART_BASE_FREQ, baud * 2,
130 v850e_uart_cksr_min(),
131 V850E_UART_CKSR_MAX, 8/*bits*/,
132 &speed.clk_divlog2, &speed.brgen_count);
133
134 return speed;
135}
136
137/* Return the current speed of uart channel CHAN. */
138static inline v850e_uart_speed_t v850e_uart_speed (unsigned chan)
139{
140 v850e_uart_speed_t speed;
141 speed.clk_divlog2 = V850E_UART_CKSR (chan);
142 speed.brgen_count = V850E_UART_BRGC (chan);
143 return speed;
144}
145
146/* Set the current speed of uart channel CHAN. */
147static inline void v850e_uart_set_speed(unsigned chan,v850e_uart_speed_t speed)
148{
149 V850E_UART_CKSR (chan) = speed.clk_divlog2;
150 V850E_UART_BRGC (chan) = speed.brgen_count;
151}
152
153static inline int
154v850e_uart_speed_eq (v850e_uart_speed_t speed1, v850e_uart_speed_t speed2)
155{
156 return speed1.clk_divlog2 == speed2.clk_divlog2
157 && speed1.brgen_count == speed2.brgen_count;
158}
159
160/* Minimum baud rate possible. */
161#define v850e_uart_min_baud() \
162 ((V850E_UART_BASE_FREQ >> V850E_UART_CKSR_MAX) / (2 * 255) + 1)
163
164/* Maximum baud rate possible. The error is quite high at max, though. */
165#define v850e_uart_max_baud() \
166 ((V850E_UART_BASE_FREQ >> v850e_uart_cksr_min()) / (2 *V850E_UART_BRGC_MIN))
167
168/* The `maximum' clock rate the uart can used, which is wanted (though not
169 really used in any useful way) by the serial framework. */
170#define v850e_uart_max_clock() \
171 ((V850E_UART_BASE_FREQ >> v850e_uart_cksr_min()) / 2)
172
173
174/* UART configuration interface. */
175
176/* Type of the uart config register; must be a scalar. */
177typedef u16 v850e_uart_config_t;
178
179/* The uart hardware config register for channel CHAN. */
180#define V850E_UART_CONFIG(chan) V850E_UART_ASIM (chan)
181
182/* This config bit set if the uart is enabled. */
183#define V850E_UART_CONFIG_ENABLED V850E_UART_ASIM_CAE
184/* If the uart _isn't_ enabled, store this value to it to do so. */
185#define V850E_UART_CONFIG_INIT V850E_UART_ASIM_CAE
186/* Store this config value to disable the uart channel completely. */
187#define V850E_UART_CONFIG_FINI 0
188
189/* Setting/clearing these bits enable/disable TX/RX, respectively (but
190 otherwise generally leave things running). */
191#define V850E_UART_CONFIG_RX_ENABLE V850E_UART_ASIM_RXE
192#define V850E_UART_CONFIG_TX_ENABLE V850E_UART_ASIM_TXE
193
194/* These masks define which config bits affect TX/RX modes, respectively. */
195#define V850E_UART_CONFIG_RX_BITS \
196 (V850E_UART_ASIM_PS_MASK | V850E_UART_ASIM_CL_8 | V850E_UART_ASIM_ISRM)
197#define V850E_UART_CONFIG_TX_BITS \
198 (V850E_UART_ASIM_PS_MASK | V850E_UART_ASIM_CL_8 | V850E_UART_ASIM_SL_2)
199
200static inline v850e_uart_config_t v850e_uart_calc_config (unsigned cflags)
201{
202 v850e_uart_config_t config = 0;
203
204 /* Figure out new configuration of control register. */
205 if (cflags & CSTOPB)
206 /* Number of stop bits, 1 or 2. */
207 config |= V850E_UART_ASIM_SL_2;
208 if ((cflags & CSIZE) == CS8)
209 /* Number of data bits, 7 or 8. */
210 config |= V850E_UART_ASIM_CL_8;
211 if (! (cflags & PARENB))
212 /* No parity check/generation. */
213 config |= V850E_UART_ASIM_PS_NONE;
214 else if (cflags & PARODD)
215 /* Odd parity check/generation. */
216 config |= V850E_UART_ASIM_PS_ODD;
217 else
218 /* Even parity check/generation. */
219 config |= V850E_UART_ASIM_PS_EVEN;
220 if (cflags & CREAD)
221 /* Reading enabled. */
222 config |= V850E_UART_ASIM_RXE;
223
224 config |= V850E_UART_ASIM_CAE;
225 config |= V850E_UART_ASIM_TXE; /* Writing is always enabled. */
226 config |= V850E_UART_ASIM_ISRM; /* Errors generate a read-irq. */
227
228 return config;
229}
230
231/* This should delay as long as necessary for a recently written config
232 setting to settle, before we turn the uart back on. */
233static inline void
234v850e_uart_config_delay (v850e_uart_config_t config, v850e_uart_speed_t speed)
235{
236 /* The UART may not be reset properly unless we wait at least 2
237 `basic-clocks' until turning on the TXE/RXE bits again.
238 A `basic clock' is the clock used by the baud-rate generator,
239 i.e., the cpu clock divided by the 2^new_clk_divlog2.
240 The loop takes 2 insns, so loop CYCLES / 2 times. */
241 register unsigned count = 1 << speed.clk_divlog2;
242 while (--count != 0)
243 /* nothing */;
244}
245
246
247/* RX/TX interface. */
248
249/* Return true if all characters awaiting transmission on uart channel N
250 have been transmitted. */
251#define v850e_uart_xmit_done(n) \
252 (! (V850E_UART_ASIF(n) & V850E_UART_ASIF_TXBF))
253/* Wait for this to be true. */
254#define v850e_uart_wait_for_xmit_done(n) \
255 do { } while (! v850e_uart_xmit_done (n))
256
257/* Return true if uart channel N is ready to transmit a character. */
258#define v850e_uart_xmit_ok(n) \
259 (v850e_uart_xmit_done(n) && v850e_uart_cts(n))
260/* Wait for this to be true. */
261#define v850e_uart_wait_for_xmit_ok(n) \
262 do { } while (! v850e_uart_xmit_ok (n))
263
264/* Write character CH to uart channel CHAN. */
265#define v850e_uart_putc(chan, ch) (V850E_UART_TXB(chan) = (ch))
266
267/* Return latest character read on channel CHAN. */
268#define v850e_uart_getc(chan) V850E_UART_RXB (chan)
269
270/* Return bit-mask of uart error status. */
271#define v850e_uart_err(chan) V850E_UART_ASIS (chan)
272/* Various error bits set in the error result. */
273#define V850E_UART_ERR_OVERRUN V850E_UART_ASIS_OVE
274#define V850E_UART_ERR_FRAME V850E_UART_ASIS_FE
275#define V850E_UART_ERR_PARITY V850E_UART_ASIS_PE
276
277
278#endif /* __V850_V850E_UARTA_H__ */
diff --git a/include/asm-v850/v850e_uartb.h b/include/asm-v850/v850e_uartb.h
new file mode 100644
index 000000000000..6d4767d5a835
--- /dev/null
+++ b/include/asm-v850/v850e_uartb.h
@@ -0,0 +1,262 @@
1/*
2 * include/asm-v850/v850e_uartb.h -- V850E on-chip `UARTB' UART
3 *
4 * Copyright (C) 2001,02,03 NEC Electronics Corporation
5 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
6 *
7 * This file is subject to the terms and conditions of the GNU General
8 * Public License. See the file COPYING in the main directory of this
9 * archive for more details.
10 *
11 * Written by Miles Bader <miles@gnu.org>
12 */
13
14/* The V850E UARTB is basically a superset of the original V850E UART, but
15 even where it's the same, the names and details have changed a bit.
16 It's similar enough to use the same driver (v850e_uart.c), but the
17 details have been abstracted slightly to do so. */
18
19#ifndef __V850_V850E_UARTB_H__
20#define __V850_V850E_UARTB_H__
21
22
23/* Raw hardware interface. */
24
25#define V850E_UARTB_BASE_ADDR(n) (0xFFFFFA00 + 0x10 * (n))
26
27/* Addresses of specific UART control registers for channel N. */
28#define V850E_UARTB_CTL0_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x0)
29#define V850E_UARTB_CTL2_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x2)
30#define V850E_UARTB_STR_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x4)
31#define V850E_UARTB_RX_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x6)
32#define V850E_UARTB_RXAP_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x6)
33#define V850E_UARTB_TX_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0x8)
34#define V850E_UARTB_FIC0_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0xA)
35#define V850E_UARTB_FIC1_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0xB)
36#define V850E_UARTB_FIC2_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0xC)
37#define V850E_UARTB_FIS0_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0xE)
38#define V850E_UARTB_FIS1_ADDR(n) (V850E_UARTB_BASE_ADDR(n) + 0xF)
39
40/* UARTB control register 0 (general config). */
41#define V850E_UARTB_CTL0(n) (*(volatile u8 *)V850E_UARTB_CTL0_ADDR(n))
42/* Control bits for config registers. */
43#define V850E_UARTB_CTL0_PWR 0x80 /* clock enable */
44#define V850E_UARTB_CTL0_TXE 0x40 /* transmit enable */
45#define V850E_UARTB_CTL0_RXE 0x20 /* receive enable */
46#define V850E_UARTB_CTL0_DIR 0x10 /* */
47#define V850E_UARTB_CTL0_PS1 0x08 /* parity */
48#define V850E_UARTB_CTL0_PS0 0x04 /* parity */
49#define V850E_UARTB_CTL0_CL 0x02 /* char len 1:8bit, 0:7bit */
50#define V850E_UARTB_CTL0_SL 0x01 /* stop bit 1:2bit, 0:1bit */
51#define V850E_UARTB_CTL0_PS_MASK 0x0C /* mask covering parity bits */
52#define V850E_UARTB_CTL0_PS_NONE 0x00 /* no parity */
53#define V850E_UARTB_CTL0_PS_ZERO 0x04 /* zero parity */
54#define V850E_UARTB_CTL0_PS_ODD 0x08 /* odd parity */
55#define V850E_UARTB_CTL0_PS_EVEN 0x0C /* even parity */
56#define V850E_UARTB_CTL0_CL_8 0x02 /* char len 1:8bit, 0:7bit */
57#define V850E_UARTB_CTL0_SL_2 0x01 /* stop bit 1:2bit, 0:1bit */
58
59/* UARTB control register 2 (clock divider). */
60#define V850E_UARTB_CTL2(n) (*(volatile u16 *)V850E_UARTB_CTL2_ADDR(n))
61#define V850E_UARTB_CTL2_MIN 4
62#define V850E_UARTB_CTL2_MAX 0xFFFF
63
64/* UARTB serial interface status register. */
65#define V850E_UARTB_STR(n) (*(volatile u8 *)V850E_UARTB_STR_ADDR(n))
66/* Control bits for status registers. */
67#define V850E_UARTB_STR_TSF 0x80 /* UBTX or FIFO exist data */
68#define V850E_UARTB_STR_OVF 0x08 /* overflow error */
69#define V850E_UARTB_STR_PE 0x04 /* parity error */
70#define V850E_UARTB_STR_FE 0x02 /* framing error */
71#define V850E_UARTB_STR_OVE 0x01 /* overrun error */
72
73/* UARTB receive data register. */
74#define V850E_UARTB_RX(n) (*(volatile u8 *)V850E_UARTB_RX_ADDR(n))
75#define V850E_UARTB_RXAP(n) (*(volatile u16 *)V850E_UARTB_RXAP_ADDR(n))
76/* Control bits for status registers. */
77#define V850E_UARTB_RXAP_PEF 0x0200 /* parity error */
78#define V850E_UARTB_RXAP_FEF 0x0100 /* framing error */
79
80/* UARTB transmit data register. */
81#define V850E_UARTB_TX(n) (*(volatile u8 *)V850E_UARTB_TX_ADDR(n))
82
83/* UARTB FIFO control register 0. */
84#define V850E_UARTB_FIC0(n) (*(volatile u8 *)V850E_UARTB_FIC0_ADDR(n))
85
86/* UARTB FIFO control register 1. */
87#define V850E_UARTB_FIC1(n) (*(volatile u8 *)V850E_UARTB_FIC1_ADDR(n))
88
89/* UARTB FIFO control register 2. */
90#define V850E_UARTB_FIC2(n) (*(volatile u16 *)V850E_UARTB_FIC2_ADDR(n))
91
92/* UARTB FIFO status register 0. */
93#define V850E_UARTB_FIS0(n) (*(volatile u8 *)V850E_UARTB_FIS0_ADDR(n))
94
95/* UARTB FIFO status register 1. */
96#define V850E_UARTB_FIS1(n) (*(volatile u8 *)V850E_UARTB_FIS1_ADDR(n))
97
98
99/* Slightly abstract interface used by driver. */
100
101
102/* Interrupts used by the UART. */
103
104/* Received when the most recently transmitted character has been sent. */
105#define V850E_UART_TX_IRQ(chan) IRQ_INTUBTIT (chan)
106/* Received when a new character has been received. */
107#define V850E_UART_RX_IRQ(chan) IRQ_INTUBTIR (chan)
108
109/* Use by serial driver for information purposes. */
110#define V850E_UART_BASE_ADDR(chan) V850E_UARTB_BASE_ADDR(chan)
111
112
113/* UART clock generator interface. */
114
115/* This type encapsulates a particular uart frequency. */
116typedef u16 v850e_uart_speed_t;
117
118/* Calculate a uart speed from BAUD for this uart. */
119static inline v850e_uart_speed_t v850e_uart_calc_speed (unsigned baud)
120{
121 v850e_uart_speed_t speed;
122
123 /*
124 * V850E/ME2 UARTB baud rate is determined by the value of UBCTL2
125 * fx = V850E_UARTB_BASE_FREQ = CPU_CLOCK_FREQ/4
126 * baud = fx / 2*speed [ speed >= 4 ]
127 */
128 speed = V850E_UARTB_CTL2_MIN;
129 while (((V850E_UARTB_BASE_FREQ / 2) / speed ) > baud)
130 speed++;
131
132 return speed;
133}
134
135/* Return the current speed of uart channel CHAN. */
136#define v850e_uart_speed(chan) V850E_UARTB_CTL2 (chan)
137
138/* Set the current speed of uart channel CHAN. */
139#define v850e_uart_set_speed(chan, speed) (V850E_UARTB_CTL2 (chan) = (speed))
140
141/* Return true if SPEED1 and SPEED2 are the same. */
142#define v850e_uart_speed_eq(speed1, speed2) ((speed1) == (speed2))
143
144/* Minimum baud rate possible. */
145#define v850e_uart_min_baud() \
146 ((V850E_UARTB_BASE_FREQ / 2) / V850E_UARTB_CTL2_MAX)
147
148/* Maximum baud rate possible. The error is quite high at max, though. */
149#define v850e_uart_max_baud() \
150 ((V850E_UARTB_BASE_FREQ / 2) / V850E_UARTB_CTL2_MIN)
151
152/* The `maximum' clock rate the uart can used, which is wanted (though not
153 really used in any useful way) by the serial framework. */
154#define v850e_uart_max_clock() \
155 (V850E_UARTB_BASE_FREQ / 2)
156
157
158/* UART configuration interface. */
159
160/* Type of the uart config register; must be a scalar. */
161typedef u16 v850e_uart_config_t;
162
163/* The uart hardware config register for channel CHAN. */
164#define V850E_UART_CONFIG(chan) V850E_UARTB_CTL0 (chan)
165
166/* This config bit set if the uart is enabled. */
167#define V850E_UART_CONFIG_ENABLED V850E_UARTB_CTL0_PWR
168/* If the uart _isn't_ enabled, store this value to it to do so. */
169#define V850E_UART_CONFIG_INIT V850E_UARTB_CTL0_PWR
170/* Store this config value to disable the uart channel completely. */
171#define V850E_UART_CONFIG_FINI 0
172
173/* Setting/clearing these bits enable/disable TX/RX, respectively (but
174 otherwise generally leave things running). */
175#define V850E_UART_CONFIG_RX_ENABLE V850E_UARTB_CTL0_RXE
176#define V850E_UART_CONFIG_TX_ENABLE V850E_UARTB_CTL0_TXE
177
178/* These masks define which config bits affect TX/RX modes, respectively. */
179#define V850E_UART_CONFIG_RX_BITS \
180 (V850E_UARTB_CTL0_PS_MASK | V850E_UARTB_CTL0_CL_8)
181#define V850E_UART_CONFIG_TX_BITS \
182 (V850E_UARTB_CTL0_PS_MASK | V850E_UARTB_CTL0_CL_8 | V850E_UARTB_CTL0_SL_2)
183
184static inline v850e_uart_config_t v850e_uart_calc_config (unsigned cflags)
185{
186 v850e_uart_config_t config = 0;
187
188 /* Figure out new configuration of control register. */
189 if (cflags & CSTOPB)
190 /* Number of stop bits, 1 or 2. */
191 config |= V850E_UARTB_CTL0_SL_2;
192 if ((cflags & CSIZE) == CS8)
193 /* Number of data bits, 7 or 8. */
194 config |= V850E_UARTB_CTL0_CL_8;
195 if (! (cflags & PARENB))
196 /* No parity check/generation. */
197 config |= V850E_UARTB_CTL0_PS_NONE;
198 else if (cflags & PARODD)
199 /* Odd parity check/generation. */
200 config |= V850E_UARTB_CTL0_PS_ODD;
201 else
202 /* Even parity check/generation. */
203 config |= V850E_UARTB_CTL0_PS_EVEN;
204 if (cflags & CREAD)
205 /* Reading enabled. */
206 config |= V850E_UARTB_CTL0_RXE;
207
208 config |= V850E_UARTB_CTL0_PWR;
209 config |= V850E_UARTB_CTL0_TXE; /* Writing is always enabled. */
210 config |= V850E_UARTB_CTL0_DIR; /* LSB first. */
211
212 return config;
213}
214
215/* This should delay as long as necessary for a recently written config
216 setting to settle, before we turn the uart back on. */
217static inline void
218v850e_uart_config_delay (v850e_uart_config_t config, v850e_uart_speed_t speed)
219{
220 /* The UART may not be reset properly unless we wait at least 2
221 `basic-clocks' until turning on the TXE/RXE bits again.
222 A `basic clock' is the clock used by the baud-rate generator,
223 i.e., the cpu clock divided by the 2^new_clk_divlog2.
224 The loop takes 2 insns, so loop CYCLES / 2 times. */
225 register unsigned count = 1 << speed;
226 while (--count != 0)
227 /* nothing */;
228}
229
230
231/* RX/TX interface. */
232
233/* Return true if all characters awaiting transmission on uart channel N
234 have been transmitted. */
235#define v850e_uart_xmit_done(n) \
236 (! (V850E_UARTB_STR(n) & V850E_UARTB_STR_TSF))
237/* Wait for this to be true. */
238#define v850e_uart_wait_for_xmit_done(n) \
239 do { } while (! v850e_uart_xmit_done (n))
240
241/* Return true if uart channel N is ready to transmit a character. */
242#define v850e_uart_xmit_ok(n) \
243 (v850e_uart_xmit_done(n) && v850e_uart_cts(n))
244/* Wait for this to be true. */
245#define v850e_uart_wait_for_xmit_ok(n) \
246 do { } while (! v850e_uart_xmit_ok (n))
247
248/* Write character CH to uart channel CHAN. */
249#define v850e_uart_putc(chan, ch) (V850E_UARTB_TX(chan) = (ch))
250
251/* Return latest character read on channel CHAN. */
252#define v850e_uart_getc(chan) V850E_UARTB_RX (chan)
253
254/* Return bit-mask of uart error status. */
255#define v850e_uart_err(chan) V850E_UARTB_STR (chan)
256/* Various error bits set in the error result. */
257#define V850E_UART_ERR_OVERRUN V850E_UARTB_STR_OVE
258#define V850E_UART_ERR_FRAME V850E_UARTB_STR_FE
259#define V850E_UART_ERR_PARITY V850E_UARTB_STR_PE
260
261
262#endif /* __V850_V850E_UARTB_H__ */
diff --git a/include/asm-v850/v850e_utils.h b/include/asm-v850/v850e_utils.h
new file mode 100644
index 000000000000..52eb72822d3d
--- /dev/null
+++ b/include/asm-v850/v850e_utils.h
@@ -0,0 +1,35 @@
1/*
2 * include/asm-v850/v850e_utils.h -- Utility functions associated with
3 * V850E CPUs
4 *
5 * Copyright (C) 2001,03 NEC Electronics Corporation
6 * Copyright (C) 2001,03 Miles Bader <miles@gnu.org>
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
11 *
12 * Written by Miles Bader <miles@gnu.org>
13 */
14
15#ifndef __V850_V850E_UTILS_H__
16#define __V850_V850E_UTILS_H__
17
18/* Calculate counter clock-divider and count values to attain the
19 desired frequency RATE from the base frequency BASE_FREQ. The
20 counter is expected to have a clock-divider, which can divide the
21 system cpu clock by a power of two value from MIN_DIVLOG2 to
22 MAX_DIV_LOG2, and a word-size of COUNTER_SIZE bits (the counter
23 counts up and resets whenever it's equal to the compare register,
24 generating an interrupt or whatever when it does so). The returned
25 values are: *DIVLOG2 -- log2 of the desired clock divider and *COUNT
26 -- the counter compare value to use. Returns true if it was possible
27 to find a reasonable value, otherwise false (and the other return
28 values will be set to be as good as possible). */
29extern int calc_counter_params (unsigned long base_freq,
30 unsigned long rate,
31 unsigned min_divlog2, unsigned max_divlog2,
32 unsigned counter_size,
33 unsigned *divlog2, unsigned *count);
34
35#endif /* __V850_V850E_UTILS_H__ */