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Diffstat (limited to 'include/asm-v850/v850e_timer_c.h')
-rw-r--r-- | include/asm-v850/v850e_timer_c.h | 48 |
1 files changed, 0 insertions, 48 deletions
diff --git a/include/asm-v850/v850e_timer_c.h b/include/asm-v850/v850e_timer_c.h deleted file mode 100644 index f70575df6ea9..000000000000 --- a/include/asm-v850/v850e_timer_c.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-v850/v850e_timer_c.h -- `Timer C' component often used | ||
3 | * with the V850E cpu core | ||
4 | * | ||
5 | * Copyright (C) 2001,03 NEC Electronics Corporation | ||
6 | * Copyright (C) 2001,03 Miles Bader <miles@gnu.org> | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General | ||
9 | * Public License. See the file COPYING in the main directory of this | ||
10 | * archive for more details. | ||
11 | * | ||
12 | * Written by Miles Bader <miles@gnu.org> | ||
13 | */ | ||
14 | |||
15 | /* NOTE: this include file currently contains only enough to allow us to | ||
16 | use timer C as an interrupt pass-through. */ | ||
17 | |||
18 | #ifndef __V850_V850E_TIMER_C_H__ | ||
19 | #define __V850_V850E_TIMER_C_H__ | ||
20 | |||
21 | #include <asm/types.h> | ||
22 | #include <asm/machdep.h> /* Pick up chip-specific defs. */ | ||
23 | |||
24 | |||
25 | /* Timer C (16-bit interval timers). */ | ||
26 | |||
27 | /* Control register 0 for timer C. */ | ||
28 | #define V850E_TIMER_C_TMCC0_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x6 + 0x10 *(n)) | ||
29 | #define V850E_TIMER_C_TMCC0(n) (*(volatile u8 *)V850E_TIMER_C_TMCC0_ADDR(n)) | ||
30 | #define V850E_TIMER_C_TMCC0_CAE 0x01 /* clock action enable */ | ||
31 | #define V850E_TIMER_C_TMCC0_CE 0x02 /* count enable */ | ||
32 | /* ... */ | ||
33 | |||
34 | /* Control register 1 for timer C. */ | ||
35 | #define V850E_TIMER_C_TMCC1_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x8 + 0x10 *(n)) | ||
36 | #define V850E_TIMER_C_TMCC1(n) (*(volatile u8 *)V850E_TIMER_C_TMCC1_ADDR(n)) | ||
37 | #define V850E_TIMER_C_TMCC1_CMS0 0x01 /* capture/compare mode select (ccc0) */ | ||
38 | #define V850E_TIMER_C_TMCC1_CMS1 0x02 /* capture/compare mode select (ccc1) */ | ||
39 | /* ... */ | ||
40 | |||
41 | /* Interrupt edge-sensitivity control for timer C. */ | ||
42 | #define V850E_TIMER_C_SESC_ADDR(n) (V850E_TIMER_C_BASE_ADDR + 0x9 + 0x10 *(n)) | ||
43 | #define V850E_TIMER_C_SESC(n) (*(volatile u8 *)V850E_TIMER_C_SESC_ADDR(n)) | ||
44 | |||
45 | /* ...etc... */ | ||
46 | |||
47 | |||
48 | #endif /* __V850_V850E_TIMER_C_H__ */ | ||