diff options
Diffstat (limited to 'include/asm-sparc')
156 files changed, 0 insertions, 14442 deletions
diff --git a/include/asm-sparc/Kbuild b/include/asm-sparc/Kbuild deleted file mode 100644 index 671223718f0a..000000000000 --- a/include/asm-sparc/Kbuild +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | include include/asm-generic/Kbuild.asm | ||
2 | |||
3 | header-y += apc.h | ||
4 | header-y += asi.h | ||
5 | header-y += bpp.h | ||
6 | header-y += jsflash.h | ||
7 | header-y += openpromio.h | ||
8 | header-y += reg.h | ||
9 | header-y += traps.h | ||
10 | header-y += vfc_ioctls.h | ||
11 | |||
12 | unifdef-y += fbio.h | ||
13 | unifdef-y += perfctr.h | ||
14 | unifdef-y += psr.h | ||
diff --git a/include/asm-sparc/apc.h b/include/asm-sparc/apc.h deleted file mode 100644 index 24e9a7d4d97e..000000000000 --- a/include/asm-sparc/apc.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* apc - Driver definitions for power management functions | ||
2 | * of Aurora Personality Chip (APC) on SPARCstation-4/5 and | ||
3 | * derivatives | ||
4 | * | ||
5 | * Copyright (c) 2001 Eric Brower (ebrower@usa.net) | ||
6 | * | ||
7 | */ | ||
8 | |||
9 | #ifndef _SPARC_APC_H | ||
10 | #define _SPARC_APC_H | ||
11 | |||
12 | #include <linux/ioctl.h> | ||
13 | |||
14 | #define APC_IOC 'A' | ||
15 | |||
16 | #define APCIOCGFANCTL _IOR(APC_IOC, 0x00, int) /* Get fan speed */ | ||
17 | #define APCIOCSFANCTL _IOW(APC_IOC, 0x01, int) /* Set fan speed */ | ||
18 | |||
19 | #define APCIOCGCPWR _IOR(APC_IOC, 0x02, int) /* Get CPOWER state */ | ||
20 | #define APCIOCSCPWR _IOW(APC_IOC, 0x03, int) /* Set CPOWER state */ | ||
21 | |||
22 | #define APCIOCGBPORT _IOR(APC_IOC, 0x04, int) /* Get BPORT state */ | ||
23 | #define APCIOCSBPORT _IOW(APC_IOC, 0x05, int) /* Set BPORT state */ | ||
24 | |||
25 | /* | ||
26 | * Register offsets | ||
27 | */ | ||
28 | #define APC_IDLE_REG 0x00 | ||
29 | #define APC_FANCTL_REG 0x20 | ||
30 | #define APC_CPOWER_REG 0x24 | ||
31 | #define APC_BPORT_REG 0x30 | ||
32 | |||
33 | #define APC_REGMASK 0x01 | ||
34 | #define APC_BPMASK 0x03 | ||
35 | |||
36 | /* | ||
37 | * IDLE - CPU standby values (set to initiate standby) | ||
38 | */ | ||
39 | #define APC_IDLE_ON 0x01 | ||
40 | |||
41 | /* | ||
42 | * FANCTL - Fan speed control state values | ||
43 | */ | ||
44 | #define APC_FANCTL_HI 0x00 /* Fan speed high */ | ||
45 | #define APC_FANCTL_LO 0x01 /* Fan speed low */ | ||
46 | |||
47 | /* | ||
48 | * CPWR - Convenience power outlet state values | ||
49 | */ | ||
50 | #define APC_CPOWER_ON 0x00 /* Conv power on */ | ||
51 | #define APC_CPOWER_OFF 0x01 /* Conv power off */ | ||
52 | |||
53 | /* | ||
54 | * BPA/BPB - Read-Write "Bit Ports" state values (reset to 0 at power-on) | ||
55 | * | ||
56 | * WARNING: Internal usage of bit ports is platform dependent-- | ||
57 | * don't modify BPORT settings unless you know what you are doing. | ||
58 | * | ||
59 | * On SS5 BPA seems to toggle onboard ethernet loopback... -E | ||
60 | */ | ||
61 | #define APC_BPORT_A 0x01 /* Bit Port A */ | ||
62 | #define APC_BPORT_B 0x02 /* Bit Port B */ | ||
63 | |||
64 | #endif /* !(_SPARC_APC_H) */ | ||
diff --git a/include/asm-sparc/asi.h b/include/asm-sparc/asi.h deleted file mode 100644 index 158f9b00d43f..000000000000 --- a/include/asm-sparc/asi.h +++ /dev/null | |||
@@ -1,111 +0,0 @@ | |||
1 | #ifndef _SPARC_ASI_H | ||
2 | #define _SPARC_ASI_H | ||
3 | |||
4 | /* asi.h: Address Space Identifier values for the sparc. | ||
5 | * | ||
6 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
7 | * | ||
8 | * Pioneer work for sun4m: Paul Hatchman (paul@sfe.com.au) | ||
9 | * Joint edition for sun4c+sun4m: Pete A. Zaitcev <zaitcev@ipmce.su> | ||
10 | */ | ||
11 | |||
12 | /* The first batch are for the sun4c. */ | ||
13 | |||
14 | #define ASI_NULL1 0x00 | ||
15 | #define ASI_NULL2 0x01 | ||
16 | |||
17 | /* sun4c and sun4 control registers and mmu/vac ops */ | ||
18 | #define ASI_CONTROL 0x02 | ||
19 | #define ASI_SEGMAP 0x03 | ||
20 | #define ASI_PTE 0x04 | ||
21 | #define ASI_HWFLUSHSEG 0x05 | ||
22 | #define ASI_HWFLUSHPAGE 0x06 | ||
23 | #define ASI_REGMAP 0x06 | ||
24 | #define ASI_HWFLUSHCONTEXT 0x07 | ||
25 | |||
26 | #define ASI_USERTXT 0x08 | ||
27 | #define ASI_KERNELTXT 0x09 | ||
28 | #define ASI_USERDATA 0x0a | ||
29 | #define ASI_KERNELDATA 0x0b | ||
30 | |||
31 | /* VAC Cache flushing on sun4c and sun4 */ | ||
32 | #define ASI_FLUSHSEG 0x0c | ||
33 | #define ASI_FLUSHPG 0x0d | ||
34 | #define ASI_FLUSHCTX 0x0e | ||
35 | |||
36 | /* SPARCstation-5: only 6 bits are decoded. */ | ||
37 | /* wo = Write Only, rw = Read Write; */ | ||
38 | /* ss = Single Size, as = All Sizes; */ | ||
39 | #define ASI_M_RES00 0x00 /* Don't touch... */ | ||
40 | #define ASI_M_UNA01 0x01 /* Same here... */ | ||
41 | #define ASI_M_MXCC 0x02 /* Access to TI VIKING MXCC registers */ | ||
42 | #define ASI_M_FLUSH_PROBE 0x03 /* Reference MMU Flush/Probe; rw, ss */ | ||
43 | #define ASI_M_MMUREGS 0x04 /* MMU Registers; rw, ss */ | ||
44 | #define ASI_M_TLBDIAG 0x05 /* MMU TLB only Diagnostics */ | ||
45 | #define ASI_M_DIAGS 0x06 /* Reference MMU Diagnostics */ | ||
46 | #define ASI_M_IODIAG 0x07 /* MMU I/O TLB only Diagnostics */ | ||
47 | #define ASI_M_USERTXT 0x08 /* Same as ASI_USERTXT; rw, as */ | ||
48 | #define ASI_M_KERNELTXT 0x09 /* Same as ASI_KERNELTXT; rw, as */ | ||
49 | #define ASI_M_USERDATA 0x0A /* Same as ASI_USERDATA; rw, as */ | ||
50 | #define ASI_M_KERNELDATA 0x0B /* Same as ASI_KERNELDATA; rw, as */ | ||
51 | #define ASI_M_TXTC_TAG 0x0C /* Instruction Cache Tag; rw, ss */ | ||
52 | #define ASI_M_TXTC_DATA 0x0D /* Instruction Cache Data; rw, ss */ | ||
53 | #define ASI_M_DATAC_TAG 0x0E /* Data Cache Tag; rw, ss */ | ||
54 | #define ASI_M_DATAC_DATA 0x0F /* Data Cache Data; rw, ss */ | ||
55 | |||
56 | /* The following cache flushing ASIs work only with the 'sta' | ||
57 | * instruction. Results are unpredictable for 'swap' and 'ldstuba', | ||
58 | * so don't do it. | ||
59 | */ | ||
60 | |||
61 | /* These ASI flushes affect external caches too. */ | ||
62 | #define ASI_M_FLUSH_PAGE 0x10 /* Flush I&D Cache Line (page); wo, ss */ | ||
63 | #define ASI_M_FLUSH_SEG 0x11 /* Flush I&D Cache Line (seg); wo, ss */ | ||
64 | #define ASI_M_FLUSH_REGION 0x12 /* Flush I&D Cache Line (region); wo, ss */ | ||
65 | #define ASI_M_FLUSH_CTX 0x13 /* Flush I&D Cache Line (context); wo, ss */ | ||
66 | #define ASI_M_FLUSH_USER 0x14 /* Flush I&D Cache Line (user); wo, ss */ | ||
67 | |||
68 | /* Block-copy operations are available only on certain V8 cpus. */ | ||
69 | #define ASI_M_BCOPY 0x17 /* Block copy */ | ||
70 | |||
71 | /* These affect only the ICACHE and are Ross HyperSparc and TurboSparc specific. */ | ||
72 | #define ASI_M_IFLUSH_PAGE 0x18 /* Flush I Cache Line (page); wo, ss */ | ||
73 | #define ASI_M_IFLUSH_SEG 0x19 /* Flush I Cache Line (seg); wo, ss */ | ||
74 | #define ASI_M_IFLUSH_REGION 0x1A /* Flush I Cache Line (region); wo, ss */ | ||
75 | #define ASI_M_IFLUSH_CTX 0x1B /* Flush I Cache Line (context); wo, ss */ | ||
76 | #define ASI_M_IFLUSH_USER 0x1C /* Flush I Cache Line (user); wo, ss */ | ||
77 | |||
78 | /* Block-fill operations are available on certain V8 cpus */ | ||
79 | #define ASI_M_BFILL 0x1F | ||
80 | |||
81 | /* This allows direct access to main memory, actually 0x20 to 0x2f are | ||
82 | * the available ASI's for physical ram pass-through, but I don't have | ||
83 | * any idea what the other ones do.... | ||
84 | */ | ||
85 | |||
86 | #define ASI_M_BYPASS 0x20 /* Reference MMU bypass; rw, as */ | ||
87 | #define ASI_M_FBMEM 0x29 /* Graphics card frame buffer access */ | ||
88 | #define ASI_M_VMEUS 0x2A /* VME user 16-bit access */ | ||
89 | #define ASI_M_VMEPS 0x2B /* VME priv 16-bit access */ | ||
90 | #define ASI_M_VMEUT 0x2C /* VME user 32-bit access */ | ||
91 | #define ASI_M_VMEPT 0x2D /* VME priv 32-bit access */ | ||
92 | #define ASI_M_SBUS 0x2E /* Direct SBus access */ | ||
93 | #define ASI_M_CTL 0x2F /* Control Space (ECC and MXCC are here) */ | ||
94 | |||
95 | |||
96 | /* This is ROSS HyperSparc only. */ | ||
97 | #define ASI_M_FLUSH_IWHOLE 0x31 /* Flush entire ICACHE; wo, ss */ | ||
98 | |||
99 | /* Tsunami/Viking/TurboSparc i/d cache flash clear. */ | ||
100 | #define ASI_M_IC_FLCLEAR 0x36 | ||
101 | #define ASI_M_DC_FLCLEAR 0x37 | ||
102 | |||
103 | #define ASI_M_DCDR 0x39 /* Data Cache Diagnostics Register rw, ss */ | ||
104 | |||
105 | #define ASI_M_VIKING_TMP1 0x40 /* Emulation temporary 1 on Viking */ | ||
106 | /* only available on SuperSparc I */ | ||
107 | /* #define ASI_M_VIKING_TMP2 0x41 */ /* Emulation temporary 2 on Viking */ | ||
108 | |||
109 | #define ASI_M_ACTION 0x4c /* Breakpoint Action Register (GNU/Viking) */ | ||
110 | |||
111 | #endif /* _SPARC_ASI_H */ | ||
diff --git a/include/asm-sparc/asmmacro.h b/include/asm-sparc/asmmacro.h deleted file mode 100644 index a619a4d97aae..000000000000 --- a/include/asm-sparc/asmmacro.h +++ /dev/null | |||
@@ -1,45 +0,0 @@ | |||
1 | /* asmmacro.h: Assembler macros. | ||
2 | * | ||
3 | * Copyright (C) 1996 David S. Miller (davem@caipfs.rutgers.edu) | ||
4 | */ | ||
5 | |||
6 | #ifndef _SPARC_ASMMACRO_H | ||
7 | #define _SPARC_ASMMACRO_H | ||
8 | |||
9 | #include <asm/btfixup.h> | ||
10 | #include <asm/asi.h> | ||
11 | |||
12 | #define GET_PROCESSOR4M_ID(reg) \ | ||
13 | rd %tbr, %reg; \ | ||
14 | srl %reg, 12, %reg; \ | ||
15 | and %reg, 3, %reg; | ||
16 | |||
17 | #define GET_PROCESSOR4D_ID(reg) \ | ||
18 | lda [%g0] ASI_M_VIKING_TMP1, %reg; | ||
19 | |||
20 | /* All trap entry points _must_ begin with this macro or else you | ||
21 | * lose. It makes sure the kernel has a proper window so that | ||
22 | * c-code can be called. | ||
23 | */ | ||
24 | #define SAVE_ALL_HEAD \ | ||
25 | sethi %hi(trap_setup), %l4; \ | ||
26 | jmpl %l4 + %lo(trap_setup), %l6; | ||
27 | #define SAVE_ALL \ | ||
28 | SAVE_ALL_HEAD \ | ||
29 | nop; | ||
30 | |||
31 | /* All traps low-level code here must end with this macro. */ | ||
32 | #define RESTORE_ALL b ret_trap_entry; clr %l6; | ||
33 | |||
34 | /* sun4 probably wants half word accesses to ASI_SEGMAP, while sun4c+ | ||
35 | likes byte accesses. These are to avoid ifdef mania. */ | ||
36 | |||
37 | #ifdef CONFIG_SUN4 | ||
38 | #define lduXa lduha | ||
39 | #define stXa stha | ||
40 | #else | ||
41 | #define lduXa lduba | ||
42 | #define stXa stba | ||
43 | #endif | ||
44 | |||
45 | #endif /* !(_SPARC_ASMMACRO_H) */ | ||
diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h deleted file mode 100644 index 5c944b5a8040..000000000000 --- a/include/asm-sparc/atomic.h +++ /dev/null | |||
@@ -1,165 +0,0 @@ | |||
1 | /* atomic.h: These still suck, but the I-cache hit rate is higher. | ||
2 | * | ||
3 | * Copyright (C) 1996 David S. Miller (davem@davemloft.net) | ||
4 | * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au) | ||
5 | * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org) | ||
6 | * | ||
7 | * Additions by Keith M Wesolowski (wesolows@foobazco.org) based | ||
8 | * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ARCH_SPARC_ATOMIC__ | ||
12 | #define __ARCH_SPARC_ATOMIC__ | ||
13 | |||
14 | #include <linux/types.h> | ||
15 | |||
16 | typedef struct { volatile int counter; } atomic_t; | ||
17 | |||
18 | #ifdef __KERNEL__ | ||
19 | |||
20 | #define ATOMIC_INIT(i) { (i) } | ||
21 | |||
22 | extern int __atomic_add_return(int, atomic_t *); | ||
23 | extern int atomic_cmpxchg(atomic_t *, int, int); | ||
24 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | ||
25 | extern int atomic_add_unless(atomic_t *, int, int); | ||
26 | extern void atomic_set(atomic_t *, int); | ||
27 | |||
28 | #define atomic_read(v) ((v)->counter) | ||
29 | |||
30 | #define atomic_add(i, v) ((void)__atomic_add_return( (int)(i), (v))) | ||
31 | #define atomic_sub(i, v) ((void)__atomic_add_return(-(int)(i), (v))) | ||
32 | #define atomic_inc(v) ((void)__atomic_add_return( 1, (v))) | ||
33 | #define atomic_dec(v) ((void)__atomic_add_return( -1, (v))) | ||
34 | |||
35 | #define atomic_add_return(i, v) (__atomic_add_return( (int)(i), (v))) | ||
36 | #define atomic_sub_return(i, v) (__atomic_add_return(-(int)(i), (v))) | ||
37 | #define atomic_inc_return(v) (__atomic_add_return( 1, (v))) | ||
38 | #define atomic_dec_return(v) (__atomic_add_return( -1, (v))) | ||
39 | |||
40 | #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) | ||
41 | |||
42 | /* | ||
43 | * atomic_inc_and_test - increment and test | ||
44 | * @v: pointer of type atomic_t | ||
45 | * | ||
46 | * Atomically increments @v by 1 | ||
47 | * and returns true if the result is zero, or false for all | ||
48 | * other cases. | ||
49 | */ | ||
50 | #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) | ||
51 | |||
52 | #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) | ||
53 | #define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) | ||
54 | |||
55 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | ||
56 | |||
57 | /* This is the old 24-bit implementation. It's still used internally | ||
58 | * by some sparc-specific code, notably the semaphore implementation. | ||
59 | */ | ||
60 | typedef struct { volatile int counter; } atomic24_t; | ||
61 | |||
62 | #ifndef CONFIG_SMP | ||
63 | |||
64 | #define ATOMIC24_INIT(i) { (i) } | ||
65 | #define atomic24_read(v) ((v)->counter) | ||
66 | #define atomic24_set(v, i) (((v)->counter) = i) | ||
67 | |||
68 | #else | ||
69 | /* We do the bulk of the actual work out of line in two common | ||
70 | * routines in assembler, see arch/sparc/lib/atomic.S for the | ||
71 | * "fun" details. | ||
72 | * | ||
73 | * For SMP the trick is you embed the spin lock byte within | ||
74 | * the word, use the low byte so signedness is easily retained | ||
75 | * via a quick arithmetic shift. It looks like this: | ||
76 | * | ||
77 | * ---------------------------------------- | ||
78 | * | signed 24-bit counter value | lock | atomic_t | ||
79 | * ---------------------------------------- | ||
80 | * 31 8 7 0 | ||
81 | */ | ||
82 | |||
83 | #define ATOMIC24_INIT(i) { ((i) << 8) } | ||
84 | |||
85 | static inline int atomic24_read(const atomic24_t *v) | ||
86 | { | ||
87 | int ret = v->counter; | ||
88 | |||
89 | while(ret & 0xff) | ||
90 | ret = v->counter; | ||
91 | |||
92 | return ret >> 8; | ||
93 | } | ||
94 | |||
95 | #define atomic24_set(v, i) (((v)->counter) = ((i) << 8)) | ||
96 | #endif | ||
97 | |||
98 | static inline int __atomic24_add(int i, atomic24_t *v) | ||
99 | { | ||
100 | register volatile int *ptr asm("g1"); | ||
101 | register int increment asm("g2"); | ||
102 | register int tmp1 asm("g3"); | ||
103 | register int tmp2 asm("g4"); | ||
104 | register int tmp3 asm("g7"); | ||
105 | |||
106 | ptr = &v->counter; | ||
107 | increment = i; | ||
108 | |||
109 | __asm__ __volatile__( | ||
110 | "mov %%o7, %%g4\n\t" | ||
111 | "call ___atomic24_add\n\t" | ||
112 | " add %%o7, 8, %%o7\n" | ||
113 | : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) | ||
114 | : "0" (increment), "r" (ptr) | ||
115 | : "memory", "cc"); | ||
116 | |||
117 | return increment; | ||
118 | } | ||
119 | |||
120 | static inline int __atomic24_sub(int i, atomic24_t *v) | ||
121 | { | ||
122 | register volatile int *ptr asm("g1"); | ||
123 | register int increment asm("g2"); | ||
124 | register int tmp1 asm("g3"); | ||
125 | register int tmp2 asm("g4"); | ||
126 | register int tmp3 asm("g7"); | ||
127 | |||
128 | ptr = &v->counter; | ||
129 | increment = i; | ||
130 | |||
131 | __asm__ __volatile__( | ||
132 | "mov %%o7, %%g4\n\t" | ||
133 | "call ___atomic24_sub\n\t" | ||
134 | " add %%o7, 8, %%o7\n" | ||
135 | : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) | ||
136 | : "0" (increment), "r" (ptr) | ||
137 | : "memory", "cc"); | ||
138 | |||
139 | return increment; | ||
140 | } | ||
141 | |||
142 | #define atomic24_add(i, v) ((void)__atomic24_add((i), (v))) | ||
143 | #define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v))) | ||
144 | |||
145 | #define atomic24_dec_return(v) __atomic24_sub(1, (v)) | ||
146 | #define atomic24_inc_return(v) __atomic24_add(1, (v)) | ||
147 | |||
148 | #define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0) | ||
149 | #define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0) | ||
150 | |||
151 | #define atomic24_inc(v) ((void)__atomic24_add(1, (v))) | ||
152 | #define atomic24_dec(v) ((void)__atomic24_sub(1, (v))) | ||
153 | |||
154 | #define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0) | ||
155 | |||
156 | /* Atomic operations are already serializing */ | ||
157 | #define smp_mb__before_atomic_dec() barrier() | ||
158 | #define smp_mb__after_atomic_dec() barrier() | ||
159 | #define smp_mb__before_atomic_inc() barrier() | ||
160 | #define smp_mb__after_atomic_inc() barrier() | ||
161 | |||
162 | #endif /* !(__KERNEL__) */ | ||
163 | |||
164 | #include <asm-generic/atomic.h> | ||
165 | #endif /* !(__ARCH_SPARC_ATOMIC__) */ | ||
diff --git a/include/asm-sparc/auxio.h b/include/asm-sparc/auxio.h deleted file mode 100644 index e552b8d68450..000000000000 --- a/include/asm-sparc/auxio.h +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | /* | ||
2 | * auxio.h: Definitions and code for the Auxiliary I/O register. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | #ifndef _SPARC_AUXIO_H | ||
7 | #define _SPARC_AUXIO_H | ||
8 | |||
9 | #include <asm/system.h> | ||
10 | #include <asm/vaddrs.h> | ||
11 | |||
12 | /* This register is an unsigned char in IO space. It does two things. | ||
13 | * First, it is used to control the front panel LED light on machines | ||
14 | * that have it (good for testing entry points to trap handlers and irq's) | ||
15 | * Secondly, it controls various floppy drive parameters. | ||
16 | */ | ||
17 | #define AUXIO_ORMEIN 0xf0 /* All writes must set these bits. */ | ||
18 | #define AUXIO_ORMEIN4M 0xc0 /* sun4m - All writes must set these bits. */ | ||
19 | #define AUXIO_FLPY_DENS 0x20 /* Floppy density, high if set. Read only. */ | ||
20 | #define AUXIO_FLPY_DCHG 0x10 /* A disk change occurred. Read only. */ | ||
21 | #define AUXIO_EDGE_ON 0x10 /* sun4m - On means Jumper block is in. */ | ||
22 | #define AUXIO_FLPY_DSEL 0x08 /* Drive select/start-motor. Write only. */ | ||
23 | #define AUXIO_LINK_TEST 0x08 /* sun4m - On means TPE Carrier detect. */ | ||
24 | |||
25 | /* Set the following to one, then zero, after doing a pseudo DMA transfer. */ | ||
26 | #define AUXIO_FLPY_TCNT 0x04 /* Floppy terminal count. Write only. */ | ||
27 | |||
28 | /* Set the following to zero to eject the floppy. */ | ||
29 | #define AUXIO_FLPY_EJCT 0x02 /* Eject floppy disk. Write only. */ | ||
30 | #define AUXIO_LED 0x01 /* On if set, off if unset. Read/Write */ | ||
31 | |||
32 | #ifndef __ASSEMBLY__ | ||
33 | |||
34 | /* | ||
35 | * NOTE: these routines are implementation dependent-- | ||
36 | * understand the hardware you are querying! | ||
37 | */ | ||
38 | extern void set_auxio(unsigned char bits_on, unsigned char bits_off); | ||
39 | extern unsigned char get_auxio(void); /* .../asm-sparc/floppy.h */ | ||
40 | |||
41 | /* | ||
42 | * The following routines are provided for driver-compatibility | ||
43 | * with sparc64 (primarily sunlance.c) | ||
44 | */ | ||
45 | |||
46 | #define AUXIO_LTE_ON 1 | ||
47 | #define AUXIO_LTE_OFF 0 | ||
48 | |||
49 | /* auxio_set_lte - Set Link Test Enable (TPE Link Detect) | ||
50 | * | ||
51 | * on - AUXIO_LTE_ON or AUXIO_LTE_OFF | ||
52 | */ | ||
53 | #define auxio_set_lte(on) \ | ||
54 | do { \ | ||
55 | if(on) { \ | ||
56 | set_auxio(AUXIO_LINK_TEST, 0); \ | ||
57 | } else { \ | ||
58 | set_auxio(0, AUXIO_LINK_TEST); \ | ||
59 | } \ | ||
60 | } while (0) | ||
61 | |||
62 | #define AUXIO_LED_ON 1 | ||
63 | #define AUXIO_LED_OFF 0 | ||
64 | |||
65 | /* auxio_set_led - Set system front panel LED | ||
66 | * | ||
67 | * on - AUXIO_LED_ON or AUXIO_LED_OFF | ||
68 | */ | ||
69 | #define auxio_set_led(on) \ | ||
70 | do { \ | ||
71 | if(on) { \ | ||
72 | set_auxio(AUXIO_LED, 0); \ | ||
73 | } else { \ | ||
74 | set_auxio(0, AUXIO_LED); \ | ||
75 | } \ | ||
76 | } while (0) | ||
77 | |||
78 | #endif /* !(__ASSEMBLY__) */ | ||
79 | |||
80 | |||
81 | /* AUXIO2 (Power Off Control) */ | ||
82 | extern __volatile__ unsigned char * auxio_power_register; | ||
83 | |||
84 | #define AUXIO_POWER_DETECT_FAILURE 32 | ||
85 | #define AUXIO_POWER_CLEAR_FAILURE 2 | ||
86 | #define AUXIO_POWER_OFF 1 | ||
87 | |||
88 | |||
89 | #endif /* !(_SPARC_AUXIO_H) */ | ||
diff --git a/include/asm-sparc/auxvec.h b/include/asm-sparc/auxvec.h deleted file mode 100644 index ad6f360261f6..000000000000 --- a/include/asm-sparc/auxvec.h +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | #ifndef __ASMSPARC_AUXVEC_H | ||
2 | #define __ASMSPARC_AUXVEC_H | ||
3 | |||
4 | #endif /* !(__ASMSPARC_AUXVEC_H) */ | ||
diff --git a/include/asm-sparc/bitext.h b/include/asm-sparc/bitext.h deleted file mode 100644 index 297b2f2fcb49..000000000000 --- a/include/asm-sparc/bitext.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * bitext.h: Bit string operations on the sparc, specific to architecture. | ||
3 | * | ||
4 | * Copyright 2002 Pete Zaitcev <zaitcev@yahoo.com> | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_BITEXT_H | ||
8 | #define _SPARC_BITEXT_H | ||
9 | |||
10 | #include <linux/spinlock.h> | ||
11 | |||
12 | struct bit_map { | ||
13 | spinlock_t lock; | ||
14 | unsigned long *map; | ||
15 | int size; | ||
16 | int used; | ||
17 | int last_off; | ||
18 | int last_size; | ||
19 | int first_free; | ||
20 | int num_colors; | ||
21 | }; | ||
22 | |||
23 | extern int bit_map_string_get(struct bit_map *t, int len, int align); | ||
24 | extern void bit_map_clear(struct bit_map *t, int offset, int len); | ||
25 | extern void bit_map_init(struct bit_map *t, unsigned long *map, int size); | ||
26 | |||
27 | #endif /* defined(_SPARC_BITEXT_H) */ | ||
diff --git a/include/asm-sparc/bitops.h b/include/asm-sparc/bitops.h deleted file mode 100644 index 68b98a7e6454..000000000000 --- a/include/asm-sparc/bitops.h +++ /dev/null | |||
@@ -1,111 +0,0 @@ | |||
1 | /* | ||
2 | * bitops.h: Bit string operations on the Sparc. | ||
3 | * | ||
4 | * Copyright 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | * Copyright 1996 Eddie C. Dost (ecd@skynet.be) | ||
6 | * Copyright 2001 Anton Blanchard (anton@samba.org) | ||
7 | */ | ||
8 | |||
9 | #ifndef _SPARC_BITOPS_H | ||
10 | #define _SPARC_BITOPS_H | ||
11 | |||
12 | #include <linux/compiler.h> | ||
13 | #include <asm/byteorder.h> | ||
14 | |||
15 | #ifdef __KERNEL__ | ||
16 | |||
17 | #ifndef _LINUX_BITOPS_H | ||
18 | #error only <linux/bitops.h> can be included directly | ||
19 | #endif | ||
20 | |||
21 | extern unsigned long ___set_bit(unsigned long *addr, unsigned long mask); | ||
22 | extern unsigned long ___clear_bit(unsigned long *addr, unsigned long mask); | ||
23 | extern unsigned long ___change_bit(unsigned long *addr, unsigned long mask); | ||
24 | |||
25 | /* | ||
26 | * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0' | ||
27 | * is in the highest of the four bytes and bit '31' is the high bit | ||
28 | * within the first byte. Sparc is BIG-Endian. Unless noted otherwise | ||
29 | * all bit-ops return 0 if bit was previously clear and != 0 otherwise. | ||
30 | */ | ||
31 | static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) | ||
32 | { | ||
33 | unsigned long *ADDR, mask; | ||
34 | |||
35 | ADDR = ((unsigned long *) addr) + (nr >> 5); | ||
36 | mask = 1 << (nr & 31); | ||
37 | |||
38 | return ___set_bit(ADDR, mask) != 0; | ||
39 | } | ||
40 | |||
41 | static inline void set_bit(unsigned long nr, volatile unsigned long *addr) | ||
42 | { | ||
43 | unsigned long *ADDR, mask; | ||
44 | |||
45 | ADDR = ((unsigned long *) addr) + (nr >> 5); | ||
46 | mask = 1 << (nr & 31); | ||
47 | |||
48 | (void) ___set_bit(ADDR, mask); | ||
49 | } | ||
50 | |||
51 | static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) | ||
52 | { | ||
53 | unsigned long *ADDR, mask; | ||
54 | |||
55 | ADDR = ((unsigned long *) addr) + (nr >> 5); | ||
56 | mask = 1 << (nr & 31); | ||
57 | |||
58 | return ___clear_bit(ADDR, mask) != 0; | ||
59 | } | ||
60 | |||
61 | static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) | ||
62 | { | ||
63 | unsigned long *ADDR, mask; | ||
64 | |||
65 | ADDR = ((unsigned long *) addr) + (nr >> 5); | ||
66 | mask = 1 << (nr & 31); | ||
67 | |||
68 | (void) ___clear_bit(ADDR, mask); | ||
69 | } | ||
70 | |||
71 | static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) | ||
72 | { | ||
73 | unsigned long *ADDR, mask; | ||
74 | |||
75 | ADDR = ((unsigned long *) addr) + (nr >> 5); | ||
76 | mask = 1 << (nr & 31); | ||
77 | |||
78 | return ___change_bit(ADDR, mask) != 0; | ||
79 | } | ||
80 | |||
81 | static inline void change_bit(unsigned long nr, volatile unsigned long *addr) | ||
82 | { | ||
83 | unsigned long *ADDR, mask; | ||
84 | |||
85 | ADDR = ((unsigned long *) addr) + (nr >> 5); | ||
86 | mask = 1 << (nr & 31); | ||
87 | |||
88 | (void) ___change_bit(ADDR, mask); | ||
89 | } | ||
90 | |||
91 | #include <asm-generic/bitops/non-atomic.h> | ||
92 | |||
93 | #define smp_mb__before_clear_bit() do { } while(0) | ||
94 | #define smp_mb__after_clear_bit() do { } while(0) | ||
95 | |||
96 | #include <asm-generic/bitops/ffz.h> | ||
97 | #include <asm-generic/bitops/__ffs.h> | ||
98 | #include <asm-generic/bitops/sched.h> | ||
99 | #include <asm-generic/bitops/ffs.h> | ||
100 | #include <asm-generic/bitops/fls.h> | ||
101 | #include <asm-generic/bitops/fls64.h> | ||
102 | #include <asm-generic/bitops/hweight.h> | ||
103 | #include <asm-generic/bitops/lock.h> | ||
104 | #include <asm-generic/bitops/find.h> | ||
105 | #include <asm-generic/bitops/ext2-non-atomic.h> | ||
106 | #include <asm-generic/bitops/ext2-atomic.h> | ||
107 | #include <asm-generic/bitops/minix.h> | ||
108 | |||
109 | #endif /* __KERNEL__ */ | ||
110 | |||
111 | #endif /* defined(_SPARC_BITOPS_H) */ | ||
diff --git a/include/asm-sparc/bpp.h b/include/asm-sparc/bpp.h deleted file mode 100644 index 31f515e499a7..000000000000 --- a/include/asm-sparc/bpp.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | #ifndef _SPARC_BPP_H | ||
2 | #define _SPARC_BPP_H | ||
3 | |||
4 | /* | ||
5 | * Copyright (c) 1995 Picture Elements | ||
6 | * Stephen Williams | ||
7 | * Gus Baldauf | ||
8 | * | ||
9 | * Linux/SPARC port by Peter Zaitcev. | ||
10 | * Integration into SPARC tree by Tom Dyas. | ||
11 | */ | ||
12 | |||
13 | #include <linux/ioctl.h> | ||
14 | |||
15 | /* | ||
16 | * This is a driver that supports IEEE Std 1284-1994 communications | ||
17 | * with compliant or compatible devices. It will use whatever features | ||
18 | * the device supports, prefering those that are typically faster. | ||
19 | * | ||
20 | * When the device is opened, it is left in COMPATIBILITY mode, and | ||
21 | * writes work like any printer device. The driver only attempt to | ||
22 | * negotiate 1284 modes when needed so that plugs can be pulled, | ||
23 | * switch boxes switched, etc., without disrupting things. It will | ||
24 | * also leave the device in compatibility mode when closed. | ||
25 | */ | ||
26 | |||
27 | |||
28 | |||
29 | /* | ||
30 | * This driver also supplies ioctls to manually manipulate the | ||
31 | * pins. This is great for testing devices, or writing code to deal | ||
32 | * with bizzarro-mode of the ACME Special TurboThingy Plus. | ||
33 | * | ||
34 | * NOTE: These ioctl currently do not interact well with | ||
35 | * read/write. Caveat emptor. | ||
36 | * | ||
37 | * PUT_PINS allows us to assign the sense of all the pins, including | ||
38 | * the data pins if being driven by the host. The GET_PINS returns the | ||
39 | * pins that the peripheral drives, including data if appropriate. | ||
40 | */ | ||
41 | |||
42 | # define BPP_PUT_PINS _IOW('B', 1, int) | ||
43 | # define BPP_GET_PINS _IOR('B', 2, char) /* that's bogus - should've been _IO */ | ||
44 | # define BPP_PUT_DATA _IOW('B', 3, int) | ||
45 | # define BPP_GET_DATA _IOR('B', 4, char) /* ditto */ | ||
46 | |||
47 | /* | ||
48 | * Set the data bus to input mode. Disengage the data bin driver and | ||
49 | * be prepared to read values from the peripheral. If the arg is 0, | ||
50 | * then revert the bus to output mode. | ||
51 | */ | ||
52 | # define BPP_SET_INPUT _IOW('B', 5, int) | ||
53 | |||
54 | /* | ||
55 | * These bits apply to the PUT operation... | ||
56 | */ | ||
57 | # define BPP_PP_nStrobe 0x0001 | ||
58 | # define BPP_PP_nAutoFd 0x0002 | ||
59 | # define BPP_PP_nInit 0x0004 | ||
60 | # define BPP_PP_nSelectIn 0x0008 | ||
61 | |||
62 | /* | ||
63 | * These apply to the GET operation, which also reads the current value | ||
64 | * of the previously put values. A bit mask of these will be returned | ||
65 | * as a bit mask in the return code of the ioctl(). | ||
66 | */ | ||
67 | # define BPP_GP_nAck 0x0100 | ||
68 | # define BPP_GP_Busy 0x0200 | ||
69 | # define BPP_GP_PError 0x0400 | ||
70 | # define BPP_GP_Select 0x0800 | ||
71 | # define BPP_GP_nFault 0x1000 | ||
72 | |||
73 | #endif | ||
diff --git a/include/asm-sparc/btfixup.h b/include/asm-sparc/btfixup.h deleted file mode 100644 index 08277e6fb4cd..000000000000 --- a/include/asm-sparc/btfixup.h +++ /dev/null | |||
@@ -1,208 +0,0 @@ | |||
1 | /* | ||
2 | * asm-sparc/btfixup.h: Macros for boot time linking. | ||
3 | * | ||
4 | * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_BTFIXUP_H | ||
8 | #define _SPARC_BTFIXUP_H | ||
9 | |||
10 | #include <linux/init.h> | ||
11 | |||
12 | #ifndef __ASSEMBLY__ | ||
13 | |||
14 | #ifdef MODULE | ||
15 | extern unsigned int ___illegal_use_of_BTFIXUP_SIMM13_in_module(void); | ||
16 | extern unsigned int ___illegal_use_of_BTFIXUP_SETHI_in_module(void); | ||
17 | extern unsigned int ___illegal_use_of_BTFIXUP_HALF_in_module(void); | ||
18 | extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void); | ||
19 | |||
20 | #define BTFIXUP_SIMM13(__name) ___illegal_use_of_BTFIXUP_SIMM13_in_module() | ||
21 | #define BTFIXUP_HALF(__name) ___illegal_use_of_BTFIXUP_HALF_in_module() | ||
22 | #define BTFIXUP_SETHI(__name) ___illegal_use_of_BTFIXUP_SETHI_in_module() | ||
23 | #define BTFIXUP_INT(__name) ___illegal_use_of_BTFIXUP_INT_in_module() | ||
24 | #define BTFIXUP_BLACKBOX(__name) ___illegal_use_of_BTFIXUP_BLACKBOX_in_module | ||
25 | |||
26 | #else | ||
27 | |||
28 | #define BTFIXUP_SIMM13(__name) ___sf_##__name() | ||
29 | #define BTFIXUP_HALF(__name) ___af_##__name() | ||
30 | #define BTFIXUP_SETHI(__name) ___hf_##__name() | ||
31 | #define BTFIXUP_INT(__name) ((unsigned int)&___i_##__name) | ||
32 | /* This must be written in assembly and present in a sethi */ | ||
33 | #define BTFIXUP_BLACKBOX(__name) ___b_##__name | ||
34 | #endif /* MODULE */ | ||
35 | |||
36 | /* Fixup call xx */ | ||
37 | |||
38 | #define BTFIXUPDEF_CALL(__type, __name, __args...) \ | ||
39 | extern __type ___f_##__name(__args); \ | ||
40 | extern unsigned ___fs_##__name[3]; | ||
41 | #define BTFIXUPDEF_CALL_CONST(__type, __name, __args...) \ | ||
42 | extern __type ___f_##__name(__args) __attribute_const__; \ | ||
43 | extern unsigned ___fs_##__name[3]; | ||
44 | #define BTFIXUP_CALL(__name) ___f_##__name | ||
45 | |||
46 | #define BTFIXUPDEF_BLACKBOX(__name) \ | ||
47 | extern unsigned ___bs_##__name[2]; | ||
48 | |||
49 | /* Put bottom 13bits into some register variable */ | ||
50 | |||
51 | #define BTFIXUPDEF_SIMM13(__name) \ | ||
52 | static inline unsigned int ___sf_##__name(void) __attribute_const__; \ | ||
53 | extern unsigned ___ss_##__name[2]; \ | ||
54 | static inline unsigned int ___sf_##__name(void) { \ | ||
55 | unsigned int ret; \ | ||
56 | __asm__ ("or %%g0, ___s_" #__name ", %0" : "=r"(ret)); \ | ||
57 | return ret; \ | ||
58 | } | ||
59 | #define BTFIXUPDEF_SIMM13_INIT(__name,__val) \ | ||
60 | static inline unsigned int ___sf_##__name(void) __attribute_const__; \ | ||
61 | extern unsigned ___ss_##__name[2]; \ | ||
62 | static inline unsigned int ___sf_##__name(void) { \ | ||
63 | unsigned int ret; \ | ||
64 | __asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ | ||
65 | return ret; \ | ||
66 | } | ||
67 | |||
68 | /* Put either bottom 13 bits, or upper 22 bits into some register variable | ||
69 | * (depending on the value, this will lead into sethi FIX, reg; or | ||
70 | * mov FIX, reg; ) | ||
71 | */ | ||
72 | |||
73 | #define BTFIXUPDEF_HALF(__name) \ | ||
74 | static inline unsigned int ___af_##__name(void) __attribute_const__; \ | ||
75 | extern unsigned ___as_##__name[2]; \ | ||
76 | static inline unsigned int ___af_##__name(void) { \ | ||
77 | unsigned int ret; \ | ||
78 | __asm__ ("or %%g0, ___a_" #__name ", %0" : "=r"(ret)); \ | ||
79 | return ret; \ | ||
80 | } | ||
81 | #define BTFIXUPDEF_HALF_INIT(__name,__val) \ | ||
82 | static inline unsigned int ___af_##__name(void) __attribute_const__; \ | ||
83 | extern unsigned ___as_##__name[2]; \ | ||
84 | static inline unsigned int ___af_##__name(void) { \ | ||
85 | unsigned int ret; \ | ||
86 | __asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ | ||
87 | return ret; \ | ||
88 | } | ||
89 | |||
90 | /* Put upper 22 bits into some register variable */ | ||
91 | |||
92 | #define BTFIXUPDEF_SETHI(__name) \ | ||
93 | static inline unsigned int ___hf_##__name(void) __attribute_const__; \ | ||
94 | extern unsigned ___hs_##__name[2]; \ | ||
95 | static inline unsigned int ___hf_##__name(void) { \ | ||
96 | unsigned int ret; \ | ||
97 | __asm__ ("sethi %%hi(___h_" #__name "), %0" : "=r"(ret)); \ | ||
98 | return ret; \ | ||
99 | } | ||
100 | #define BTFIXUPDEF_SETHI_INIT(__name,__val) \ | ||
101 | static inline unsigned int ___hf_##__name(void) __attribute_const__; \ | ||
102 | extern unsigned ___hs_##__name[2]; \ | ||
103 | static inline unsigned int ___hf_##__name(void) { \ | ||
104 | unsigned int ret; \ | ||
105 | __asm__ ("sethi %%hi(___h_" #__name "__btset_" #__val "), %0" : \ | ||
106 | "=r"(ret)); \ | ||
107 | return ret; \ | ||
108 | } | ||
109 | |||
110 | /* Put a full 32bit integer into some register variable */ | ||
111 | |||
112 | #define BTFIXUPDEF_INT(__name) \ | ||
113 | extern unsigned char ___i_##__name; \ | ||
114 | extern unsigned ___is_##__name[2]; | ||
115 | |||
116 | #define BTFIXUPCALL_NORM 0x00000000 /* Always call */ | ||
117 | #define BTFIXUPCALL_NOP 0x01000000 /* Possibly optimize to nop */ | ||
118 | #define BTFIXUPCALL_RETINT(i) (0x90102000|((i) & 0x1fff)) /* Possibly optimize to mov i, %o0 */ | ||
119 | #define BTFIXUPCALL_ORINT(i) (0x90122000|((i) & 0x1fff)) /* Possibly optimize to or %o0, i, %o0 */ | ||
120 | #define BTFIXUPCALL_RETO0 0x01000000 /* Return first parameter, actually a nop */ | ||
121 | #define BTFIXUPCALL_ANDNINT(i) (0x902a2000|((i) & 0x1fff)) /* Possibly optimize to andn %o0, i, %o0 */ | ||
122 | #define BTFIXUPCALL_SWAPO0O1 0xd27a0000 /* Possibly optimize to swap [%o0],%o1 */ | ||
123 | #define BTFIXUPCALL_SWAPO0G0 0xc07a0000 /* Possibly optimize to swap [%o0],%g0 */ | ||
124 | #define BTFIXUPCALL_SWAPG1G2 0xc4784000 /* Possibly optimize to swap [%g1],%g2 */ | ||
125 | #define BTFIXUPCALL_STG0O0 0xc0220000 /* Possibly optimize to st %g0,[%o0] */ | ||
126 | #define BTFIXUPCALL_STO1O0 0xd2220000 /* Possibly optimize to st %o1,[%o0] */ | ||
127 | |||
128 | #define BTFIXUPSET_CALL(__name, __addr, __insn) \ | ||
129 | do { \ | ||
130 | ___fs_##__name[0] |= 1; \ | ||
131 | ___fs_##__name[1] = (unsigned long)__addr; \ | ||
132 | ___fs_##__name[2] = __insn; \ | ||
133 | } while (0) | ||
134 | |||
135 | #define BTFIXUPSET_BLACKBOX(__name, __func) \ | ||
136 | do { \ | ||
137 | ___bs_##__name[0] |= 1; \ | ||
138 | ___bs_##__name[1] = (unsigned long)__func; \ | ||
139 | } while (0) | ||
140 | |||
141 | #define BTFIXUPCOPY_CALL(__name, __from) \ | ||
142 | do { \ | ||
143 | ___fs_##__name[0] |= 1; \ | ||
144 | ___fs_##__name[1] = ___fs_##__from[1]; \ | ||
145 | ___fs_##__name[2] = ___fs_##__from[2]; \ | ||
146 | } while (0) | ||
147 | |||
148 | #define BTFIXUPSET_SIMM13(__name, __val) \ | ||
149 | do { \ | ||
150 | ___ss_##__name[0] |= 1; \ | ||
151 | ___ss_##__name[1] = (unsigned)__val; \ | ||
152 | } while (0) | ||
153 | |||
154 | #define BTFIXUPCOPY_SIMM13(__name, __from) \ | ||
155 | do { \ | ||
156 | ___ss_##__name[0] |= 1; \ | ||
157 | ___ss_##__name[1] = ___ss_##__from[1]; \ | ||
158 | } while (0) | ||
159 | |||
160 | #define BTFIXUPSET_HALF(__name, __val) \ | ||
161 | do { \ | ||
162 | ___as_##__name[0] |= 1; \ | ||
163 | ___as_##__name[1] = (unsigned)__val; \ | ||
164 | } while (0) | ||
165 | |||
166 | #define BTFIXUPCOPY_HALF(__name, __from) \ | ||
167 | do { \ | ||
168 | ___as_##__name[0] |= 1; \ | ||
169 | ___as_##__name[1] = ___as_##__from[1]; \ | ||
170 | } while (0) | ||
171 | |||
172 | #define BTFIXUPSET_SETHI(__name, __val) \ | ||
173 | do { \ | ||
174 | ___hs_##__name[0] |= 1; \ | ||
175 | ___hs_##__name[1] = (unsigned)__val; \ | ||
176 | } while (0) | ||
177 | |||
178 | #define BTFIXUPCOPY_SETHI(__name, __from) \ | ||
179 | do { \ | ||
180 | ___hs_##__name[0] |= 1; \ | ||
181 | ___hs_##__name[1] = ___hs_##__from[1]; \ | ||
182 | } while (0) | ||
183 | |||
184 | #define BTFIXUPSET_INT(__name, __val) \ | ||
185 | do { \ | ||
186 | ___is_##__name[0] |= 1; \ | ||
187 | ___is_##__name[1] = (unsigned)__val; \ | ||
188 | } while (0) | ||
189 | |||
190 | #define BTFIXUPCOPY_INT(__name, __from) \ | ||
191 | do { \ | ||
192 | ___is_##__name[0] |= 1; \ | ||
193 | ___is_##__name[1] = ___is_##__from[1]; \ | ||
194 | } while (0) | ||
195 | |||
196 | #define BTFIXUPVAL_CALL(__name) \ | ||
197 | ((unsigned long)___fs_##__name[1]) | ||
198 | |||
199 | extern void btfixup(void); | ||
200 | |||
201 | #else /* __ASSEMBLY__ */ | ||
202 | |||
203 | #define BTFIXUP_SETHI(__name) %hi(___h_ ## __name) | ||
204 | #define BTFIXUP_SETHI_INIT(__name,__val) %hi(___h_ ## __name ## __btset_ ## __val) | ||
205 | |||
206 | #endif /* __ASSEMBLY__ */ | ||
207 | |||
208 | #endif /* !(_SPARC_BTFIXUP_H) */ | ||
diff --git a/include/asm-sparc/bug.h b/include/asm-sparc/bug.h deleted file mode 100644 index 8a59e5a8c217..000000000000 --- a/include/asm-sparc/bug.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | #ifndef _SPARC_BUG_H | ||
2 | #define _SPARC_BUG_H | ||
3 | |||
4 | #ifdef CONFIG_BUG | ||
5 | #include <linux/compiler.h> | ||
6 | |||
7 | #ifdef CONFIG_DEBUG_BUGVERBOSE | ||
8 | extern void do_BUG(const char *file, int line); | ||
9 | #define BUG() do { \ | ||
10 | do_BUG(__FILE__, __LINE__); \ | ||
11 | __builtin_trap(); \ | ||
12 | } while (0) | ||
13 | #else | ||
14 | #define BUG() __builtin_trap() | ||
15 | #endif | ||
16 | |||
17 | #define HAVE_ARCH_BUG | ||
18 | #endif | ||
19 | |||
20 | #include <asm-generic/bug.h> | ||
21 | |||
22 | #endif | ||
diff --git a/include/asm-sparc/bugs.h b/include/asm-sparc/bugs.h deleted file mode 100644 index 2dfc07bc8e54..000000000000 --- a/include/asm-sparc/bugs.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* include/asm-sparc/bugs.h: Sparc probes for various bugs. | ||
2 | * | ||
3 | * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) | ||
4 | */ | ||
5 | |||
6 | #ifdef CONFIG_SPARC32 | ||
7 | #include <asm/cpudata.h> | ||
8 | #endif | ||
9 | |||
10 | #ifdef CONFIG_SPARC64 | ||
11 | #include <asm/sstate.h> | ||
12 | #endif | ||
13 | |||
14 | extern unsigned long loops_per_jiffy; | ||
15 | |||
16 | static void __init check_bugs(void) | ||
17 | { | ||
18 | #if defined(CONFIG_SPARC32) && !defined(CONFIG_SMP) | ||
19 | cpu_data(0).udelay_val = loops_per_jiffy; | ||
20 | #endif | ||
21 | #ifdef CONFIG_SPARC64 | ||
22 | sstate_running(); | ||
23 | #endif | ||
24 | } | ||
diff --git a/include/asm-sparc/byteorder.h b/include/asm-sparc/byteorder.h deleted file mode 100644 index bcd83aa351c5..000000000000 --- a/include/asm-sparc/byteorder.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | #ifndef _SPARC_BYTEORDER_H | ||
2 | #define _SPARC_BYTEORDER_H | ||
3 | |||
4 | #include <asm/types.h> | ||
5 | #include <asm/asi.h> | ||
6 | |||
7 | #ifdef __GNUC__ | ||
8 | |||
9 | #ifdef CONFIG_SPARC32 | ||
10 | #define __SWAB_64_THRU_32__ | ||
11 | #endif | ||
12 | |||
13 | #ifdef CONFIG_SPARC64 | ||
14 | |||
15 | static inline __u16 ___arch__swab16p(const __u16 *addr) | ||
16 | { | ||
17 | __u16 ret; | ||
18 | |||
19 | __asm__ __volatile__ ("lduha [%1] %2, %0" | ||
20 | : "=r" (ret) | ||
21 | : "r" (addr), "i" (ASI_PL)); | ||
22 | return ret; | ||
23 | } | ||
24 | |||
25 | static inline __u32 ___arch__swab32p(const __u32 *addr) | ||
26 | { | ||
27 | __u32 ret; | ||
28 | |||
29 | __asm__ __volatile__ ("lduwa [%1] %2, %0" | ||
30 | : "=r" (ret) | ||
31 | : "r" (addr), "i" (ASI_PL)); | ||
32 | return ret; | ||
33 | } | ||
34 | |||
35 | static inline __u64 ___arch__swab64p(const __u64 *addr) | ||
36 | { | ||
37 | __u64 ret; | ||
38 | |||
39 | __asm__ __volatile__ ("ldxa [%1] %2, %0" | ||
40 | : "=r" (ret) | ||
41 | : "r" (addr), "i" (ASI_PL)); | ||
42 | return ret; | ||
43 | } | ||
44 | |||
45 | #define __arch__swab16p(x) ___arch__swab16p(x) | ||
46 | #define __arch__swab32p(x) ___arch__swab32p(x) | ||
47 | #define __arch__swab64p(x) ___arch__swab64p(x) | ||
48 | |||
49 | #endif /* CONFIG_SPARC64 */ | ||
50 | |||
51 | #define __BYTEORDER_HAS_U64__ | ||
52 | |||
53 | #endif | ||
54 | |||
55 | #include <linux/byteorder/big_endian.h> | ||
56 | |||
57 | #endif /* _SPARC_BYTEORDER_H */ | ||
diff --git a/include/asm-sparc/cache.h b/include/asm-sparc/cache.h deleted file mode 100644 index 41f85ae4bd4a..000000000000 --- a/include/asm-sparc/cache.h +++ /dev/null | |||
@@ -1,138 +0,0 @@ | |||
1 | /* cache.h: Cache specific code for the Sparc. These include flushing | ||
2 | * and direct tag/data line access. | ||
3 | * | ||
4 | * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_CACHE_H | ||
8 | #define _SPARC_CACHE_H | ||
9 | |||
10 | #define L1_CACHE_SHIFT 5 | ||
11 | #define L1_CACHE_BYTES 32 | ||
12 | #define L1_CACHE_ALIGN(x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))) | ||
13 | |||
14 | #ifdef CONFIG_SPARC32 | ||
15 | #define SMP_CACHE_BYTES_SHIFT 5 | ||
16 | #else | ||
17 | #define SMP_CACHE_BYTES_SHIFT 6 | ||
18 | #endif | ||
19 | |||
20 | #define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) | ||
21 | |||
22 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) | ||
23 | |||
24 | #ifdef CONFIG_SPARC32 | ||
25 | #include <asm/asi.h> | ||
26 | |||
27 | /* Direct access to the instruction cache is provided through and | ||
28 | * alternate address space. The IDC bit must be off in the ICCR on | ||
29 | * HyperSparcs for these accesses to work. The code below does not do | ||
30 | * any checking, the caller must do so. These routines are for | ||
31 | * diagnostics only, but could end up being useful. Use with care. | ||
32 | * Also, you are asking for trouble if you execute these in one of the | ||
33 | * three instructions following a %asr/%psr access or modification. | ||
34 | */ | ||
35 | |||
36 | /* First, cache-tag access. */ | ||
37 | static inline unsigned int get_icache_tag(int setnum, int tagnum) | ||
38 | { | ||
39 | unsigned int vaddr, retval; | ||
40 | |||
41 | vaddr = ((setnum&1) << 12) | ((tagnum&0x7f) << 5); | ||
42 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
43 | "=r" (retval) : | ||
44 | "r" (vaddr), "i" (ASI_M_TXTC_TAG)); | ||
45 | return retval; | ||
46 | } | ||
47 | |||
48 | static inline void put_icache_tag(int setnum, int tagnum, unsigned int entry) | ||
49 | { | ||
50 | unsigned int vaddr; | ||
51 | |||
52 | vaddr = ((setnum&1) << 12) | ((tagnum&0x7f) << 5); | ||
53 | __asm__ __volatile__("sta %0, [%1] %2\n\t" : : | ||
54 | "r" (entry), "r" (vaddr), "i" (ASI_M_TXTC_TAG) : | ||
55 | "memory"); | ||
56 | } | ||
57 | |||
58 | /* Second cache-data access. The data is returned two-32bit quantities | ||
59 | * at a time. | ||
60 | */ | ||
61 | static inline void get_icache_data(int setnum, int tagnum, int subblock, | ||
62 | unsigned int *data) | ||
63 | { | ||
64 | unsigned int value1, value2, vaddr; | ||
65 | |||
66 | vaddr = ((setnum&0x1) << 12) | ((tagnum&0x7f) << 5) | | ||
67 | ((subblock&0x3) << 3); | ||
68 | __asm__ __volatile__("ldda [%2] %3, %%g2\n\t" | ||
69 | "or %%g0, %%g2, %0\n\t" | ||
70 | "or %%g0, %%g3, %1\n\t" : | ||
71 | "=r" (value1), "=r" (value2) : | ||
72 | "r" (vaddr), "i" (ASI_M_TXTC_DATA) : | ||
73 | "g2", "g3"); | ||
74 | data[0] = value1; data[1] = value2; | ||
75 | } | ||
76 | |||
77 | static inline void put_icache_data(int setnum, int tagnum, int subblock, | ||
78 | unsigned int *data) | ||
79 | { | ||
80 | unsigned int value1, value2, vaddr; | ||
81 | |||
82 | vaddr = ((setnum&0x1) << 12) | ((tagnum&0x7f) << 5) | | ||
83 | ((subblock&0x3) << 3); | ||
84 | value1 = data[0]; value2 = data[1]; | ||
85 | __asm__ __volatile__("or %%g0, %0, %%g2\n\t" | ||
86 | "or %%g0, %1, %%g3\n\t" | ||
87 | "stda %%g2, [%2] %3\n\t" : : | ||
88 | "r" (value1), "r" (value2), | ||
89 | "r" (vaddr), "i" (ASI_M_TXTC_DATA) : | ||
90 | "g2", "g3", "memory" /* no joke */); | ||
91 | } | ||
92 | |||
93 | /* Different types of flushes with the ICACHE. Some of the flushes | ||
94 | * affect both the ICACHE and the external cache. Others only clear | ||
95 | * the ICACHE entries on the cpu itself. V8's (most) allow | ||
96 | * granularity of flushes on the packet (element in line), whole line, | ||
97 | * and entire cache (ie. all lines) level. The ICACHE only flushes are | ||
98 | * ROSS HyperSparc specific and are in ross.h | ||
99 | */ | ||
100 | |||
101 | /* Flushes which clear out both the on-chip and external caches */ | ||
102 | static inline void flush_ei_page(unsigned int addr) | ||
103 | { | ||
104 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : | ||
105 | "r" (addr), "i" (ASI_M_FLUSH_PAGE) : | ||
106 | "memory"); | ||
107 | } | ||
108 | |||
109 | static inline void flush_ei_seg(unsigned int addr) | ||
110 | { | ||
111 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : | ||
112 | "r" (addr), "i" (ASI_M_FLUSH_SEG) : | ||
113 | "memory"); | ||
114 | } | ||
115 | |||
116 | static inline void flush_ei_region(unsigned int addr) | ||
117 | { | ||
118 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : | ||
119 | "r" (addr), "i" (ASI_M_FLUSH_REGION) : | ||
120 | "memory"); | ||
121 | } | ||
122 | |||
123 | static inline void flush_ei_ctx(unsigned int addr) | ||
124 | { | ||
125 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : | ||
126 | "r" (addr), "i" (ASI_M_FLUSH_CTX) : | ||
127 | "memory"); | ||
128 | } | ||
129 | |||
130 | static inline void flush_ei_user(unsigned int addr) | ||
131 | { | ||
132 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : | ||
133 | "r" (addr), "i" (ASI_M_FLUSH_USER) : | ||
134 | "memory"); | ||
135 | } | ||
136 | #endif /* CONFIG_SPARC32 */ | ||
137 | |||
138 | #endif /* !(_SPARC_CACHE_H) */ | ||
diff --git a/include/asm-sparc/cacheflush.h b/include/asm-sparc/cacheflush.h deleted file mode 100644 index 68ac10910271..000000000000 --- a/include/asm-sparc/cacheflush.h +++ /dev/null | |||
@@ -1,85 +0,0 @@ | |||
1 | #ifndef _SPARC_CACHEFLUSH_H | ||
2 | #define _SPARC_CACHEFLUSH_H | ||
3 | |||
4 | #include <linux/mm.h> /* Common for other includes */ | ||
5 | // #include <linux/kernel.h> from pgalloc.h | ||
6 | // #include <linux/sched.h> from pgalloc.h | ||
7 | |||
8 | // #include <asm/page.h> | ||
9 | #include <asm/btfixup.h> | ||
10 | |||
11 | /* | ||
12 | * Fine grained cache flushing. | ||
13 | */ | ||
14 | #ifdef CONFIG_SMP | ||
15 | |||
16 | BTFIXUPDEF_CALL(void, local_flush_cache_all, void) | ||
17 | BTFIXUPDEF_CALL(void, local_flush_cache_mm, struct mm_struct *) | ||
18 | BTFIXUPDEF_CALL(void, local_flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long) | ||
19 | BTFIXUPDEF_CALL(void, local_flush_cache_page, struct vm_area_struct *, unsigned long) | ||
20 | |||
21 | #define local_flush_cache_all() BTFIXUP_CALL(local_flush_cache_all)() | ||
22 | #define local_flush_cache_mm(mm) BTFIXUP_CALL(local_flush_cache_mm)(mm) | ||
23 | #define local_flush_cache_range(vma,start,end) BTFIXUP_CALL(local_flush_cache_range)(vma,start,end) | ||
24 | #define local_flush_cache_page(vma,addr) BTFIXUP_CALL(local_flush_cache_page)(vma,addr) | ||
25 | |||
26 | BTFIXUPDEF_CALL(void, local_flush_page_to_ram, unsigned long) | ||
27 | BTFIXUPDEF_CALL(void, local_flush_sig_insns, struct mm_struct *, unsigned long) | ||
28 | |||
29 | #define local_flush_page_to_ram(addr) BTFIXUP_CALL(local_flush_page_to_ram)(addr) | ||
30 | #define local_flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(local_flush_sig_insns)(mm,insn_addr) | ||
31 | |||
32 | extern void smp_flush_cache_all(void); | ||
33 | extern void smp_flush_cache_mm(struct mm_struct *mm); | ||
34 | extern void smp_flush_cache_range(struct vm_area_struct *vma, | ||
35 | unsigned long start, | ||
36 | unsigned long end); | ||
37 | extern void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page); | ||
38 | |||
39 | extern void smp_flush_page_to_ram(unsigned long page); | ||
40 | extern void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr); | ||
41 | |||
42 | #endif /* CONFIG_SMP */ | ||
43 | |||
44 | BTFIXUPDEF_CALL(void, flush_cache_all, void) | ||
45 | BTFIXUPDEF_CALL(void, flush_cache_mm, struct mm_struct *) | ||
46 | BTFIXUPDEF_CALL(void, flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long) | ||
47 | BTFIXUPDEF_CALL(void, flush_cache_page, struct vm_area_struct *, unsigned long) | ||
48 | |||
49 | #define flush_cache_all() BTFIXUP_CALL(flush_cache_all)() | ||
50 | #define flush_cache_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm) | ||
51 | #define flush_cache_dup_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm) | ||
52 | #define flush_cache_range(vma,start,end) BTFIXUP_CALL(flush_cache_range)(vma,start,end) | ||
53 | #define flush_cache_page(vma,addr,pfn) BTFIXUP_CALL(flush_cache_page)(vma,addr) | ||
54 | #define flush_icache_range(start, end) do { } while (0) | ||
55 | #define flush_icache_page(vma, pg) do { } while (0) | ||
56 | |||
57 | #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) | ||
58 | |||
59 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | ||
60 | do { \ | ||
61 | flush_cache_page(vma, vaddr, page_to_pfn(page));\ | ||
62 | memcpy(dst, src, len); \ | ||
63 | } while (0) | ||
64 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | ||
65 | do { \ | ||
66 | flush_cache_page(vma, vaddr, page_to_pfn(page));\ | ||
67 | memcpy(dst, src, len); \ | ||
68 | } while (0) | ||
69 | |||
70 | BTFIXUPDEF_CALL(void, __flush_page_to_ram, unsigned long) | ||
71 | BTFIXUPDEF_CALL(void, flush_sig_insns, struct mm_struct *, unsigned long) | ||
72 | |||
73 | #define __flush_page_to_ram(addr) BTFIXUP_CALL(__flush_page_to_ram)(addr) | ||
74 | #define flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(flush_sig_insns)(mm,insn_addr) | ||
75 | |||
76 | extern void sparc_flush_page_to_ram(struct page *page); | ||
77 | |||
78 | #define flush_dcache_page(page) sparc_flush_page_to_ram(page) | ||
79 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | ||
80 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | ||
81 | |||
82 | #define flush_cache_vmap(start, end) flush_cache_all() | ||
83 | #define flush_cache_vunmap(start, end) flush_cache_all() | ||
84 | |||
85 | #endif /* _SPARC_CACHEFLUSH_H */ | ||
diff --git a/include/asm-sparc/checksum.h b/include/asm-sparc/checksum.h deleted file mode 100644 index d044ddb5a3cf..000000000000 --- a/include/asm-sparc/checksum.h +++ /dev/null | |||
@@ -1,241 +0,0 @@ | |||
1 | #ifndef __SPARC_CHECKSUM_H | ||
2 | #define __SPARC_CHECKSUM_H | ||
3 | |||
4 | /* checksum.h: IP/UDP/TCP checksum routines on the Sparc. | ||
5 | * | ||
6 | * Copyright(C) 1995 Linus Torvalds | ||
7 | * Copyright(C) 1995 Miguel de Icaza | ||
8 | * Copyright(C) 1996 David S. Miller | ||
9 | * Copyright(C) 1996 Eddie C. Dost | ||
10 | * Copyright(C) 1997 Jakub Jelinek | ||
11 | * | ||
12 | * derived from: | ||
13 | * Alpha checksum c-code | ||
14 | * ix86 inline assembly | ||
15 | * RFC1071 Computing the Internet Checksum | ||
16 | */ | ||
17 | |||
18 | #include <linux/in6.h> | ||
19 | #include <asm/uaccess.h> | ||
20 | |||
21 | /* computes the checksum of a memory block at buff, length len, | ||
22 | * and adds in "sum" (32-bit) | ||
23 | * | ||
24 | * returns a 32-bit number suitable for feeding into itself | ||
25 | * or csum_tcpudp_magic | ||
26 | * | ||
27 | * this function must be called with even lengths, except | ||
28 | * for the last fragment, which may be odd | ||
29 | * | ||
30 | * it's best to have buff aligned on a 32-bit boundary | ||
31 | */ | ||
32 | extern __wsum csum_partial(const void *buff, int len, __wsum sum); | ||
33 | |||
34 | /* the same as csum_partial, but copies from fs:src while it | ||
35 | * checksums | ||
36 | * | ||
37 | * here even more important to align src and dst on a 32-bit (or even | ||
38 | * better 64-bit) boundary | ||
39 | */ | ||
40 | |||
41 | extern unsigned int __csum_partial_copy_sparc_generic (const unsigned char *, unsigned char *); | ||
42 | |||
43 | static inline __wsum | ||
44 | csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) | ||
45 | { | ||
46 | register unsigned int ret asm("o0") = (unsigned int)src; | ||
47 | register char *d asm("o1") = dst; | ||
48 | register int l asm("g1") = len; | ||
49 | |||
50 | __asm__ __volatile__ ( | ||
51 | "call __csum_partial_copy_sparc_generic\n\t" | ||
52 | " mov %6, %%g7\n" | ||
53 | : "=&r" (ret), "=&r" (d), "=&r" (l) | ||
54 | : "0" (ret), "1" (d), "2" (l), "r" (sum) | ||
55 | : "o2", "o3", "o4", "o5", "o7", | ||
56 | "g2", "g3", "g4", "g5", "g7", | ||
57 | "memory", "cc"); | ||
58 | return (__force __wsum)ret; | ||
59 | } | ||
60 | |||
61 | static inline __wsum | ||
62 | csum_partial_copy_from_user(const void __user *src, void *dst, int len, | ||
63 | __wsum sum, int *err) | ||
64 | { | ||
65 | register unsigned long ret asm("o0") = (unsigned long)src; | ||
66 | register char *d asm("o1") = dst; | ||
67 | register int l asm("g1") = len; | ||
68 | register __wsum s asm("g7") = sum; | ||
69 | |||
70 | __asm__ __volatile__ ( | ||
71 | ".section __ex_table,#alloc\n\t" | ||
72 | ".align 4\n\t" | ||
73 | ".word 1f,2\n\t" | ||
74 | ".previous\n" | ||
75 | "1:\n\t" | ||
76 | "call __csum_partial_copy_sparc_generic\n\t" | ||
77 | " st %8, [%%sp + 64]\n" | ||
78 | : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) | ||
79 | : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) | ||
80 | : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5", | ||
81 | "cc", "memory"); | ||
82 | return (__force __wsum)ret; | ||
83 | } | ||
84 | |||
85 | static inline __wsum | ||
86 | csum_partial_copy_to_user(const void *src, void __user *dst, int len, | ||
87 | __wsum sum, int *err) | ||
88 | { | ||
89 | if (!access_ok (VERIFY_WRITE, dst, len)) { | ||
90 | *err = -EFAULT; | ||
91 | return sum; | ||
92 | } else { | ||
93 | register unsigned long ret asm("o0") = (unsigned long)src; | ||
94 | register char __user *d asm("o1") = dst; | ||
95 | register int l asm("g1") = len; | ||
96 | register __wsum s asm("g7") = sum; | ||
97 | |||
98 | __asm__ __volatile__ ( | ||
99 | ".section __ex_table,#alloc\n\t" | ||
100 | ".align 4\n\t" | ||
101 | ".word 1f,1\n\t" | ||
102 | ".previous\n" | ||
103 | "1:\n\t" | ||
104 | "call __csum_partial_copy_sparc_generic\n\t" | ||
105 | " st %8, [%%sp + 64]\n" | ||
106 | : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) | ||
107 | : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) | ||
108 | : "o2", "o3", "o4", "o5", "o7", | ||
109 | "g2", "g3", "g4", "g5", | ||
110 | "cc", "memory"); | ||
111 | return (__force __wsum)ret; | ||
112 | } | ||
113 | } | ||
114 | |||
115 | #define HAVE_CSUM_COPY_USER | ||
116 | #define csum_and_copy_to_user csum_partial_copy_to_user | ||
117 | |||
118 | /* ihl is always 5 or greater, almost always is 5, and iph is word aligned | ||
119 | * the majority of the time. | ||
120 | */ | ||
121 | static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | ||
122 | { | ||
123 | __sum16 sum; | ||
124 | |||
125 | /* Note: We must read %2 before we touch %0 for the first time, | ||
126 | * because GCC can legitimately use the same register for | ||
127 | * both operands. | ||
128 | */ | ||
129 | __asm__ __volatile__("sub\t%2, 4, %%g4\n\t" | ||
130 | "ld\t[%1 + 0x00], %0\n\t" | ||
131 | "ld\t[%1 + 0x04], %%g2\n\t" | ||
132 | "ld\t[%1 + 0x08], %%g3\n\t" | ||
133 | "addcc\t%%g2, %0, %0\n\t" | ||
134 | "addxcc\t%%g3, %0, %0\n\t" | ||
135 | "ld\t[%1 + 0x0c], %%g2\n\t" | ||
136 | "ld\t[%1 + 0x10], %%g3\n\t" | ||
137 | "addxcc\t%%g2, %0, %0\n\t" | ||
138 | "addx\t%0, %%g0, %0\n" | ||
139 | "1:\taddcc\t%%g3, %0, %0\n\t" | ||
140 | "add\t%1, 4, %1\n\t" | ||
141 | "addxcc\t%0, %%g0, %0\n\t" | ||
142 | "subcc\t%%g4, 1, %%g4\n\t" | ||
143 | "be,a\t2f\n\t" | ||
144 | "sll\t%0, 16, %%g2\n\t" | ||
145 | "b\t1b\n\t" | ||
146 | "ld\t[%1 + 0x10], %%g3\n" | ||
147 | "2:\taddcc\t%0, %%g2, %%g2\n\t" | ||
148 | "srl\t%%g2, 16, %0\n\t" | ||
149 | "addx\t%0, %%g0, %0\n\t" | ||
150 | "xnor\t%%g0, %0, %0" | ||
151 | : "=r" (sum), "=&r" (iph) | ||
152 | : "r" (ihl), "1" (iph) | ||
153 | : "g2", "g3", "g4", "cc", "memory"); | ||
154 | return sum; | ||
155 | } | ||
156 | |||
157 | /* Fold a partial checksum without adding pseudo headers. */ | ||
158 | static inline __sum16 csum_fold(__wsum sum) | ||
159 | { | ||
160 | unsigned int tmp; | ||
161 | |||
162 | __asm__ __volatile__("addcc\t%0, %1, %1\n\t" | ||
163 | "srl\t%1, 16, %1\n\t" | ||
164 | "addx\t%1, %%g0, %1\n\t" | ||
165 | "xnor\t%%g0, %1, %0" | ||
166 | : "=&r" (sum), "=r" (tmp) | ||
167 | : "0" (sum), "1" ((__force u32)sum<<16) | ||
168 | : "cc"); | ||
169 | return (__force __sum16)sum; | ||
170 | } | ||
171 | |||
172 | static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, | ||
173 | unsigned short len, | ||
174 | unsigned short proto, | ||
175 | __wsum sum) | ||
176 | { | ||
177 | __asm__ __volatile__("addcc\t%1, %0, %0\n\t" | ||
178 | "addxcc\t%2, %0, %0\n\t" | ||
179 | "addxcc\t%3, %0, %0\n\t" | ||
180 | "addx\t%0, %%g0, %0\n\t" | ||
181 | : "=r" (sum), "=r" (saddr) | ||
182 | : "r" (daddr), "r" (proto + len), "0" (sum), | ||
183 | "1" (saddr) | ||
184 | : "cc"); | ||
185 | return sum; | ||
186 | } | ||
187 | |||
188 | /* | ||
189 | * computes the checksum of the TCP/UDP pseudo-header | ||
190 | * returns a 16-bit checksum, already complemented | ||
191 | */ | ||
192 | static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, | ||
193 | unsigned short len, | ||
194 | unsigned short proto, | ||
195 | __wsum sum) | ||
196 | { | ||
197 | return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); | ||
198 | } | ||
199 | |||
200 | #define _HAVE_ARCH_IPV6_CSUM | ||
201 | |||
202 | static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, | ||
203 | const struct in6_addr *daddr, | ||
204 | __u32 len, unsigned short proto, | ||
205 | __wsum sum) | ||
206 | { | ||
207 | __asm__ __volatile__ ( | ||
208 | "addcc %3, %4, %%g4\n\t" | ||
209 | "addxcc %5, %%g4, %%g4\n\t" | ||
210 | "ld [%2 + 0x0c], %%g2\n\t" | ||
211 | "ld [%2 + 0x08], %%g3\n\t" | ||
212 | "addxcc %%g2, %%g4, %%g4\n\t" | ||
213 | "ld [%2 + 0x04], %%g2\n\t" | ||
214 | "addxcc %%g3, %%g4, %%g4\n\t" | ||
215 | "ld [%2 + 0x00], %%g3\n\t" | ||
216 | "addxcc %%g2, %%g4, %%g4\n\t" | ||
217 | "ld [%1 + 0x0c], %%g2\n\t" | ||
218 | "addxcc %%g3, %%g4, %%g4\n\t" | ||
219 | "ld [%1 + 0x08], %%g3\n\t" | ||
220 | "addxcc %%g2, %%g4, %%g4\n\t" | ||
221 | "ld [%1 + 0x04], %%g2\n\t" | ||
222 | "addxcc %%g3, %%g4, %%g4\n\t" | ||
223 | "ld [%1 + 0x00], %%g3\n\t" | ||
224 | "addxcc %%g2, %%g4, %%g4\n\t" | ||
225 | "addxcc %%g3, %%g4, %0\n\t" | ||
226 | "addx 0, %0, %0\n" | ||
227 | : "=&r" (sum) | ||
228 | : "r" (saddr), "r" (daddr), | ||
229 | "r"(htonl(len)), "r"(htonl(proto)), "r"(sum) | ||
230 | : "g2", "g3", "g4", "cc"); | ||
231 | |||
232 | return csum_fold(sum); | ||
233 | } | ||
234 | |||
235 | /* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ | ||
236 | static inline __sum16 ip_compute_csum(const void *buff, int len) | ||
237 | { | ||
238 | return csum_fold(csum_partial(buff, len, 0)); | ||
239 | } | ||
240 | |||
241 | #endif /* !(__SPARC_CHECKSUM_H) */ | ||
diff --git a/include/asm-sparc/clock.h b/include/asm-sparc/clock.h deleted file mode 100644 index 2cf99dadec56..000000000000 --- a/include/asm-sparc/clock.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | /* | ||
2 | * clock.h: Definitions for clock operations on the Sparc. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | #ifndef _SPARC_CLOCK_H | ||
7 | #define _SPARC_CLOCK_H | ||
8 | |||
9 | /* Foo for now. */ | ||
10 | |||
11 | #endif /* !(_SPARC_CLOCK_H) */ | ||
diff --git a/include/asm-sparc/contregs.h b/include/asm-sparc/contregs.h deleted file mode 100644 index 48fa8a4ef357..000000000000 --- a/include/asm-sparc/contregs.h +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | #ifndef _SPARC_CONTREGS_H | ||
2 | #define _SPARC_CONTREGS_H | ||
3 | |||
4 | /* contregs.h: Addresses of registers in the ASI_CONTROL alternate address | ||
5 | * space. These are for the mmu's context register, etc. | ||
6 | * | ||
7 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
8 | */ | ||
9 | |||
10 | /* 3=sun3 | ||
11 | 4=sun4 (as in sun4 sysmaint student book) | ||
12 | c=sun4c (according to davem) */ | ||
13 | |||
14 | #define AC_IDPROM 0x00000000 /* 34 ID PROM, R/O, byte, 32 bytes */ | ||
15 | #define AC_PAGEMAP 0x10000000 /* 3 Pagemap R/W, long */ | ||
16 | #define AC_SEGMAP 0x20000000 /* 3 Segment map, byte */ | ||
17 | #define AC_CONTEXT 0x30000000 /* 34c current mmu-context */ | ||
18 | #define AC_SENABLE 0x40000000 /* 34c system dvma/cache/reset enable reg*/ | ||
19 | #define AC_UDVMA_ENB 0x50000000 /* 34 Not used on Sun boards, byte */ | ||
20 | #define AC_BUS_ERROR 0x60000000 /* 34 Not cleared on read, byte. */ | ||
21 | #define AC_SYNC_ERR 0x60000000 /* c fault type */ | ||
22 | #define AC_SYNC_VA 0x60000004 /* c fault virtual address */ | ||
23 | #define AC_ASYNC_ERR 0x60000008 /* c asynchronous fault type */ | ||
24 | #define AC_ASYNC_VA 0x6000000c /* c async fault virtual address */ | ||
25 | #define AC_LEDS 0x70000000 /* 34 Zero turns on LEDs, byte */ | ||
26 | #define AC_CACHETAGS 0x80000000 /* 34c direct access to the VAC tags */ | ||
27 | #define AC_CACHEDDATA 0x90000000 /* 3 c direct access to the VAC data */ | ||
28 | #define AC_UDVMA_MAP 0xD0000000 /* 4 Not used on Sun boards, byte */ | ||
29 | #define AC_VME_VECTOR 0xE0000000 /* 4 For non-Autovector VME, byte */ | ||
30 | #define AC_BOOT_SCC 0xF0000000 /* 34 bypass to access Zilog 8530. byte.*/ | ||
31 | |||
32 | /* s=Swift, h=Ross_HyperSPARC, v=TI_Viking, t=Tsunami, r=Ross_Cypress */ | ||
33 | #define AC_M_PCR 0x0000 /* shv Processor Control Reg */ | ||
34 | #define AC_M_CTPR 0x0100 /* shv Context Table Pointer Reg */ | ||
35 | #define AC_M_CXR 0x0200 /* shv Context Register */ | ||
36 | #define AC_M_SFSR 0x0300 /* shv Synchronous Fault Status Reg */ | ||
37 | #define AC_M_SFAR 0x0400 /* shv Synchronous Fault Address Reg */ | ||
38 | #define AC_M_AFSR 0x0500 /* hv Asynchronous Fault Status Reg */ | ||
39 | #define AC_M_AFAR 0x0600 /* hv Asynchronous Fault Address Reg */ | ||
40 | #define AC_M_RESET 0x0700 /* hv Reset Reg */ | ||
41 | #define AC_M_RPR 0x1000 /* hv Root Pointer Reg */ | ||
42 | #define AC_M_TSUTRCR 0x1000 /* s TLB Replacement Ctrl Reg */ | ||
43 | #define AC_M_IAPTP 0x1100 /* hv Instruction Access PTP */ | ||
44 | #define AC_M_DAPTP 0x1200 /* hv Data Access PTP */ | ||
45 | #define AC_M_ITR 0x1300 /* hv Index Tag Register */ | ||
46 | #define AC_M_TRCR 0x1400 /* hv TLB Replacement Control Reg */ | ||
47 | #define AC_M_SFSRX 0x1300 /* s Synch Fault Status Reg prim */ | ||
48 | #define AC_M_SFARX 0x1400 /* s Synch Fault Address Reg prim */ | ||
49 | #define AC_M_RPR1 0x1500 /* h Root Pointer Reg (entry 2) */ | ||
50 | #define AC_M_IAPTP1 0x1600 /* h Instruction Access PTP (entry 2) */ | ||
51 | #define AC_M_DAPTP1 0x1700 /* h Data Access PTP (entry 2) */ | ||
52 | |||
53 | #endif /* _SPARC_CONTREGS_H */ | ||
diff --git a/include/asm-sparc/cpudata.h b/include/asm-sparc/cpudata.h deleted file mode 100644 index a2c4d51d36c4..000000000000 --- a/include/asm-sparc/cpudata.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* cpudata.h: Per-cpu parameters. | ||
2 | * | ||
3 | * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org) | ||
4 | * | ||
5 | * Based on include/asm-sparc64/cpudata.h and Linux 2.4 smp.h | ||
6 | * both (C) David S. Miller. | ||
7 | */ | ||
8 | |||
9 | #ifndef _SPARC_CPUDATA_H | ||
10 | #define _SPARC_CPUDATA_H | ||
11 | |||
12 | #include <linux/percpu.h> | ||
13 | |||
14 | typedef struct { | ||
15 | unsigned long udelay_val; | ||
16 | unsigned long clock_tick; | ||
17 | unsigned int multiplier; | ||
18 | unsigned int counter; | ||
19 | int prom_node; | ||
20 | int mid; | ||
21 | int next; | ||
22 | } cpuinfo_sparc; | ||
23 | |||
24 | DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); | ||
25 | #define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) | ||
26 | |||
27 | #endif /* _SPARC_CPUDATA_H */ | ||
diff --git a/include/asm-sparc/cputime.h b/include/asm-sparc/cputime.h deleted file mode 100644 index 1a642b81e019..000000000000 --- a/include/asm-sparc/cputime.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __SPARC_CPUTIME_H | ||
2 | #define __SPARC_CPUTIME_H | ||
3 | |||
4 | #include <asm-generic/cputime.h> | ||
5 | |||
6 | #endif /* __SPARC_CPUTIME_H */ | ||
diff --git a/include/asm-sparc/current.h b/include/asm-sparc/current.h deleted file mode 100644 index 8a1d9d6643b0..000000000000 --- a/include/asm-sparc/current.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* include/asm-sparc/current.h | ||
2 | * | ||
3 | * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation | ||
4 | * Copyright (C) 2002 Pete Zaitcev (zaitcev@yahoo.com) | ||
5 | * Copyright (C) 2007 David S. Miller (davem@davemloft.net) | ||
6 | * | ||
7 | * Derived from "include/asm-s390/current.h" by | ||
8 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | ||
9 | * Derived from "include/asm-i386/current.h" | ||
10 | */ | ||
11 | #ifndef _SPARC_CURRENT_H | ||
12 | #define _SPARC_CURRENT_H | ||
13 | |||
14 | #include <linux/thread_info.h> | ||
15 | |||
16 | #ifdef CONFIG_SPARC64 | ||
17 | register struct task_struct *current asm("g4"); | ||
18 | #endif | ||
19 | |||
20 | #ifdef CONFIG_SPARC32 | ||
21 | /* We might want to consider using %g4 like sparc64 to shave a few cycles. | ||
22 | * | ||
23 | * Two stage process (inline + #define) for type-checking. | ||
24 | * We also obfuscate get_current() to check if anyone used that by mistake. | ||
25 | */ | ||
26 | struct task_struct; | ||
27 | static inline struct task_struct *__get_current(void) | ||
28 | { | ||
29 | return current_thread_info()->task; | ||
30 | } | ||
31 | #define current __get_current() | ||
32 | #endif | ||
33 | |||
34 | #endif /* !(_SPARC_CURRENT_H) */ | ||
diff --git a/include/asm-sparc/cypress.h b/include/asm-sparc/cypress.h deleted file mode 100644 index 95e9772ea394..000000000000 --- a/include/asm-sparc/cypress.h +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | /* | ||
2 | * cypress.h: Cypress module specific definitions and defines. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_CYPRESS_H | ||
8 | #define _SPARC_CYPRESS_H | ||
9 | |||
10 | /* Cypress chips have %psr 'impl' of '0001' and 'vers' of '0001'. */ | ||
11 | |||
12 | /* The MMU control register fields on the Sparc Cypress 604/605 MMU's. | ||
13 | * | ||
14 | * --------------------------------------------------------------- | ||
15 | * |implvers| MCA | MCM |MV| MID |BM| C|RSV|MR|CM|CL|CE|RSV|NF|ME| | ||
16 | * --------------------------------------------------------------- | ||
17 | * 31 24 23-22 21-20 19 18-15 14 13 12 11 10 9 8 7-2 1 0 | ||
18 | * | ||
19 | * MCA: MultiChip Access -- Used for configuration of multiple | ||
20 | * CY7C604/605 cache units. | ||
21 | * MCM: MultiChip Mask -- Again, for multiple cache unit config. | ||
22 | * MV: MultiChip Valid -- Indicates MCM and MCA have valid settings. | ||
23 | * MID: ModuleID -- Unique processor ID for MBus transactions. (605 only) | ||
24 | * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode | ||
25 | * C: Cacheable -- Indicates whether accesses are cacheable while | ||
26 | * the MMU is off. 0=no 1=yes | ||
27 | * MR: MemoryReflection -- Indicates whether the bus attached to the | ||
28 | * MBus supports memory reflection. 0=no 1=yes (605 only) | ||
29 | * CM: CacheMode -- Indicates whether the cache is operating in write | ||
30 | * through or copy-back mode. 0=write-through 1=copy-back | ||
31 | * CL: CacheLock -- Indicates if the entire cache is locked or not. | ||
32 | * 0=not-locked 1=locked (604 only) | ||
33 | * CE: CacheEnable -- Is the virtual cache on? 0=no 1=yes | ||
34 | * NF: NoFault -- Do faults generate traps? 0=yes 1=no | ||
35 | * ME: MmuEnable -- Is the MMU doing translations? 0=no 1=yes | ||
36 | */ | ||
37 | |||
38 | #define CYPRESS_MCA 0x00c00000 | ||
39 | #define CYPRESS_MCM 0x00300000 | ||
40 | #define CYPRESS_MVALID 0x00080000 | ||
41 | #define CYPRESS_MIDMASK 0x00078000 /* Only on 605 */ | ||
42 | #define CYPRESS_BMODE 0x00004000 | ||
43 | #define CYPRESS_ACENABLE 0x00002000 | ||
44 | #define CYPRESS_MRFLCT 0x00000800 /* Only on 605 */ | ||
45 | #define CYPRESS_CMODE 0x00000400 | ||
46 | #define CYPRESS_CLOCK 0x00000200 /* Only on 604 */ | ||
47 | #define CYPRESS_CENABLE 0x00000100 | ||
48 | #define CYPRESS_NFAULT 0x00000002 | ||
49 | #define CYPRESS_MENABLE 0x00000001 | ||
50 | |||
51 | static inline void cypress_flush_page(unsigned long page) | ||
52 | { | ||
53 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : | ||
54 | "r" (page), "i" (ASI_M_FLUSH_PAGE)); | ||
55 | } | ||
56 | |||
57 | static inline void cypress_flush_segment(unsigned long addr) | ||
58 | { | ||
59 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : | ||
60 | "r" (addr), "i" (ASI_M_FLUSH_SEG)); | ||
61 | } | ||
62 | |||
63 | static inline void cypress_flush_region(unsigned long addr) | ||
64 | { | ||
65 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : | ||
66 | "r" (addr), "i" (ASI_M_FLUSH_REGION)); | ||
67 | } | ||
68 | |||
69 | static inline void cypress_flush_context(void) | ||
70 | { | ||
71 | __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : : | ||
72 | "i" (ASI_M_FLUSH_CTX)); | ||
73 | } | ||
74 | |||
75 | /* XXX Displacement flushes for buggy chips and initial testing | ||
76 | * XXX go here. | ||
77 | */ | ||
78 | |||
79 | #endif /* !(_SPARC_CYPRESS_H) */ | ||
diff --git a/include/asm-sparc/delay.h b/include/asm-sparc/delay.h deleted file mode 100644 index bc9aba2bead6..000000000000 --- a/include/asm-sparc/delay.h +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* | ||
2 | * delay.h: Linux delay routines on the Sparc. | ||
3 | * | ||
4 | * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu). | ||
5 | */ | ||
6 | |||
7 | #ifndef __SPARC_DELAY_H | ||
8 | #define __SPARC_DELAY_H | ||
9 | |||
10 | #include <asm/cpudata.h> | ||
11 | |||
12 | static inline void __delay(unsigned long loops) | ||
13 | { | ||
14 | __asm__ __volatile__("cmp %0, 0\n\t" | ||
15 | "1: bne 1b\n\t" | ||
16 | "subcc %0, 1, %0\n" : | ||
17 | "=&r" (loops) : | ||
18 | "0" (loops) : | ||
19 | "cc"); | ||
20 | } | ||
21 | |||
22 | /* This is too messy with inline asm on the Sparc. */ | ||
23 | extern void __udelay(unsigned long usecs, unsigned long lpj); | ||
24 | extern void __ndelay(unsigned long nsecs, unsigned long lpj); | ||
25 | |||
26 | #ifdef CONFIG_SMP | ||
27 | #define __udelay_val cpu_data(smp_processor_id()).udelay_val | ||
28 | #else /* SMP */ | ||
29 | #define __udelay_val loops_per_jiffy | ||
30 | #endif /* SMP */ | ||
31 | #define udelay(__usecs) __udelay(__usecs, __udelay_val) | ||
32 | #define ndelay(__nsecs) __ndelay(__nsecs, __udelay_val) | ||
33 | |||
34 | #endif /* defined(__SPARC_DELAY_H) */ | ||
diff --git a/include/asm-sparc/device.h b/include/asm-sparc/device.h deleted file mode 100644 index 19790eb99cc6..000000000000 --- a/include/asm-sparc/device.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * Arch specific extensions to struct device | ||
3 | * | ||
4 | * This file is released under the GPLv2 | ||
5 | */ | ||
6 | #ifndef _ASM_SPARC_DEVICE_H | ||
7 | #define _ASM_SPARC_DEVICE_H | ||
8 | |||
9 | struct device_node; | ||
10 | struct of_device; | ||
11 | |||
12 | struct dev_archdata { | ||
13 | void *iommu; | ||
14 | void *stc; | ||
15 | void *host_controller; | ||
16 | |||
17 | struct device_node *prom_node; | ||
18 | struct of_device *op; | ||
19 | |||
20 | int numa_node; | ||
21 | }; | ||
22 | |||
23 | #endif /* _ASM_SPARC_DEVICE_H */ | ||
diff --git a/include/asm-sparc/div64.h b/include/asm-sparc/div64.h deleted file mode 100644 index 6cd978cefb28..000000000000 --- a/include/asm-sparc/div64.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/div64.h> | ||
diff --git a/include/asm-sparc/dma-mapping.h b/include/asm-sparc/dma-mapping.h deleted file mode 100644 index f3a641e6b2c8..000000000000 --- a/include/asm-sparc/dma-mapping.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | #ifndef _ASM_SPARC_DMA_MAPPING_H | ||
2 | #define _ASM_SPARC_DMA_MAPPING_H | ||
3 | |||
4 | |||
5 | #ifdef CONFIG_PCI | ||
6 | #include <asm-generic/dma-mapping.h> | ||
7 | #else | ||
8 | #include <asm-generic/dma-mapping-broken.h> | ||
9 | #endif /* PCI */ | ||
10 | |||
11 | #endif /* _ASM_SPARC_DMA_MAPPING_H */ | ||
diff --git a/include/asm-sparc/dma.h b/include/asm-sparc/dma.h deleted file mode 100644 index 959d6c8a71ae..000000000000 --- a/include/asm-sparc/dma.h +++ /dev/null | |||
@@ -1,288 +0,0 @@ | |||
1 | /* include/asm-sparc/dma.h | ||
2 | * | ||
3 | * Copyright 1995 (C) David S. Miller (davem@davemloft.net) | ||
4 | */ | ||
5 | |||
6 | #ifndef _ASM_SPARC_DMA_H | ||
7 | #define _ASM_SPARC_DMA_H | ||
8 | |||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/types.h> | ||
11 | |||
12 | #include <asm/vac-ops.h> /* for invalidate's, etc. */ | ||
13 | #include <asm/sbus.h> | ||
14 | #include <asm/delay.h> | ||
15 | #include <asm/oplib.h> | ||
16 | #include <asm/system.h> | ||
17 | #include <asm/io.h> | ||
18 | #include <linux/spinlock.h> | ||
19 | |||
20 | struct page; | ||
21 | extern spinlock_t dma_spin_lock; | ||
22 | |||
23 | static inline unsigned long claim_dma_lock(void) | ||
24 | { | ||
25 | unsigned long flags; | ||
26 | spin_lock_irqsave(&dma_spin_lock, flags); | ||
27 | return flags; | ||
28 | } | ||
29 | |||
30 | static inline void release_dma_lock(unsigned long flags) | ||
31 | { | ||
32 | spin_unlock_irqrestore(&dma_spin_lock, flags); | ||
33 | } | ||
34 | |||
35 | /* These are irrelevant for Sparc DMA, but we leave it in so that | ||
36 | * things can compile. | ||
37 | */ | ||
38 | #define MAX_DMA_CHANNELS 8 | ||
39 | #define MAX_DMA_ADDRESS (~0UL) | ||
40 | #define DMA_MODE_READ 1 | ||
41 | #define DMA_MODE_WRITE 2 | ||
42 | |||
43 | /* Useful constants */ | ||
44 | #define SIZE_16MB (16*1024*1024) | ||
45 | #define SIZE_64K (64*1024) | ||
46 | |||
47 | /* SBUS DMA controller reg offsets */ | ||
48 | #define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ | ||
49 | #define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ | ||
50 | #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ | ||
51 | #define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ | ||
52 | |||
53 | /* DVMA chip revisions */ | ||
54 | enum dvma_rev { | ||
55 | dvmarev0, | ||
56 | dvmaesc1, | ||
57 | dvmarev1, | ||
58 | dvmarev2, | ||
59 | dvmarev3, | ||
60 | dvmarevplus, | ||
61 | dvmahme | ||
62 | }; | ||
63 | |||
64 | #define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) | ||
65 | |||
66 | /* Linux DMA information structure, filled during probe. */ | ||
67 | struct sbus_dma { | ||
68 | struct sbus_dma *next; | ||
69 | struct sbus_dev *sdev; | ||
70 | void __iomem *regs; | ||
71 | |||
72 | /* Status, misc info */ | ||
73 | int node; /* Prom node for this DMA device */ | ||
74 | int running; /* Are we doing DMA now? */ | ||
75 | int allocated; /* Are we "owned" by anyone yet? */ | ||
76 | |||
77 | /* Transfer information. */ | ||
78 | unsigned long addr; /* Start address of current transfer */ | ||
79 | int nbytes; /* Size of current transfer */ | ||
80 | int realbytes; /* For splitting up large transfers, etc. */ | ||
81 | |||
82 | /* DMA revision */ | ||
83 | enum dvma_rev revision; | ||
84 | }; | ||
85 | |||
86 | extern struct sbus_dma *dma_chain; | ||
87 | |||
88 | /* Broken hardware... */ | ||
89 | #ifdef CONFIG_SUN4 | ||
90 | /* Have to sort this out. Does rev0 work fine on sun4[cmd] without isbroken? | ||
91 | * Or is rev0 present only on sun4 boxes? -jj */ | ||
92 | #define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev0 || (dma)->revision == dvmarev1) | ||
93 | #else | ||
94 | #define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) | ||
95 | #endif | ||
96 | #define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) | ||
97 | |||
98 | /* Main routines in dma.c */ | ||
99 | extern void dvma_init(struct sbus_bus *); | ||
100 | |||
101 | /* Fields in the cond_reg register */ | ||
102 | /* First, the version identification bits */ | ||
103 | #define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ | ||
104 | #define DMA_VERS0 0x00000000 /* Sunray DMA version */ | ||
105 | #define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ | ||
106 | #define DMA_VERS1 0x80000000 /* DMA rev 1 */ | ||
107 | #define DMA_VERS2 0xa0000000 /* DMA rev 2 */ | ||
108 | #define DMA_VERHME 0xb0000000 /* DMA hme gate array */ | ||
109 | #define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ | ||
110 | |||
111 | #define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ | ||
112 | #define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ | ||
113 | #define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ | ||
114 | #define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ | ||
115 | #define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ | ||
116 | #define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ | ||
117 | #define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ | ||
118 | #define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ | ||
119 | #define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ | ||
120 | #define DMA_RST_BPP DMA_RST_SCSI /* Reset the BPP controller */ | ||
121 | #define DMA_ST_WRITE 0x00000100 /* write from device to memory */ | ||
122 | #define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ | ||
123 | #define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ | ||
124 | #define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ | ||
125 | #define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ | ||
126 | #define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ | ||
127 | #define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ | ||
128 | #define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ | ||
129 | #define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ | ||
130 | #define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ | ||
131 | #define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ | ||
132 | #define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ | ||
133 | #define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ | ||
134 | #define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ | ||
135 | #define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ | ||
136 | #define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ | ||
137 | #define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ | ||
138 | #define DMA_BRST64 0x00080000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ | ||
139 | #define DMA_BRST32 0x00040000 /* SCSI/BPP: 32byte bursts */ | ||
140 | #define DMA_BRST16 0x00000000 /* SCSI/BPP: 16byte bursts */ | ||
141 | #define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ | ||
142 | #define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ | ||
143 | #define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ | ||
144 | #define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ | ||
145 | #define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ | ||
146 | #define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ | ||
147 | #define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ | ||
148 | #define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ | ||
149 | #define DMA_BPP_ON DMA_SCSI_ON /* Enable BPP dma */ | ||
150 | #define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ | ||
151 | #define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ | ||
152 | #define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ | ||
153 | #define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ | ||
154 | |||
155 | /* Values describing the burst-size property from the PROM */ | ||
156 | #define DMA_BURST1 0x01 | ||
157 | #define DMA_BURST2 0x02 | ||
158 | #define DMA_BURST4 0x04 | ||
159 | #define DMA_BURST8 0x08 | ||
160 | #define DMA_BURST16 0x10 | ||
161 | #define DMA_BURST32 0x20 | ||
162 | #define DMA_BURST64 0x40 | ||
163 | #define DMA_BURSTBITS 0x7f | ||
164 | |||
165 | /* Determine highest possible final transfer address given a base */ | ||
166 | #define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) | ||
167 | |||
168 | /* Yes, I hack a lot of elisp in my spare time... */ | ||
169 | #define DMA_ERROR_P(regs) ((((regs)->cond_reg) & DMA_HNDL_ERROR)) | ||
170 | #define DMA_IRQ_P(regs) ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))) | ||
171 | #define DMA_WRITE_P(regs) ((((regs)->cond_reg) & DMA_ST_WRITE)) | ||
172 | #define DMA_OFF(regs) ((((regs)->cond_reg) &= (~DMA_ENABLE))) | ||
173 | #define DMA_INTSOFF(regs) ((((regs)->cond_reg) &= (~DMA_INT_ENAB))) | ||
174 | #define DMA_INTSON(regs) ((((regs)->cond_reg) |= (DMA_INT_ENAB))) | ||
175 | #define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV)) | ||
176 | #define DMA_SETSTART(regs, addr) ((((regs)->st_addr) = (char *) addr)) | ||
177 | #define DMA_BEGINDMA_W(regs) \ | ||
178 | ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB)))) | ||
179 | #define DMA_BEGINDMA_R(regs) \ | ||
180 | ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE))))) | ||
181 | |||
182 | /* For certain DMA chips, we need to disable ints upon irq entry | ||
183 | * and turn them back on when we are done. So in any ESP interrupt | ||
184 | * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT | ||
185 | * when leaving the handler. You have been warned... | ||
186 | */ | ||
187 | #define DMA_IRQ_ENTRY(dma, dregs) do { \ | ||
188 | if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ | ||
189 | } while (0) | ||
190 | |||
191 | #define DMA_IRQ_EXIT(dma, dregs) do { \ | ||
192 | if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ | ||
193 | } while(0) | ||
194 | |||
195 | #if 0 /* P3 this stuff is inline in ledma.c:init_restart_ledma() */ | ||
196 | /* Pause until counter runs out or BIT isn't set in the DMA condition | ||
197 | * register. | ||
198 | */ | ||
199 | static inline void sparc_dma_pause(struct sparc_dma_registers *regs, | ||
200 | unsigned long bit) | ||
201 | { | ||
202 | int ctr = 50000; /* Let's find some bugs ;) */ | ||
203 | |||
204 | /* Busy wait until the bit is not set any more */ | ||
205 | while((regs->cond_reg&bit) && (ctr>0)) { | ||
206 | ctr--; | ||
207 | __delay(5); | ||
208 | } | ||
209 | |||
210 | /* Check for bogus outcome. */ | ||
211 | if(!ctr) | ||
212 | panic("DMA timeout"); | ||
213 | } | ||
214 | |||
215 | /* Reset the friggin' thing... */ | ||
216 | #define DMA_RESET(dma) do { \ | ||
217 | struct sparc_dma_registers *regs = dma->regs; \ | ||
218 | /* Let the current FIFO drain itself */ \ | ||
219 | sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN)); \ | ||
220 | /* Reset the logic */ \ | ||
221 | regs->cond_reg |= (DMA_RST_SCSI); /* assert */ \ | ||
222 | __delay(400); /* let the bits set ;) */ \ | ||
223 | regs->cond_reg &= ~(DMA_RST_SCSI); /* de-assert */ \ | ||
224 | sparc_dma_enable_interrupts(regs); /* Re-enable interrupts */ \ | ||
225 | /* Enable FAST transfers if available */ \ | ||
226 | if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \ | ||
227 | dma->running = 0; \ | ||
228 | } while(0) | ||
229 | #endif | ||
230 | |||
231 | #define for_each_dvma(dma) \ | ||
232 | for((dma) = dma_chain; (dma); (dma) = (dma)->next) | ||
233 | |||
234 | extern int get_dma_list(char *); | ||
235 | extern int request_dma(unsigned int, __const__ char *); | ||
236 | extern void free_dma(unsigned int); | ||
237 | |||
238 | /* From PCI */ | ||
239 | |||
240 | #ifdef CONFIG_PCI | ||
241 | extern int isa_dma_bridge_buggy; | ||
242 | #else | ||
243 | #define isa_dma_bridge_buggy (0) | ||
244 | #endif | ||
245 | |||
246 | /* Routines for data transfer buffers. */ | ||
247 | BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long) | ||
248 | BTFIXUPDEF_CALL(void, mmu_unlockarea, char *, unsigned long) | ||
249 | |||
250 | #define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len) | ||
251 | #define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len) | ||
252 | |||
253 | /* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */ | ||
254 | BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, char *, unsigned long, struct sbus_bus *sbus) | ||
255 | BTFIXUPDEF_CALL(void, mmu_get_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) | ||
256 | BTFIXUPDEF_CALL(void, mmu_release_scsi_one, __u32, unsigned long, struct sbus_bus *sbus) | ||
257 | BTFIXUPDEF_CALL(void, mmu_release_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) | ||
258 | |||
259 | #define mmu_get_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_get_scsi_one)(vaddr,len,sbus) | ||
260 | #define mmu_get_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_get_scsi_sgl)(sg,sz,sbus) | ||
261 | #define mmu_release_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_release_scsi_one)(vaddr,len,sbus) | ||
262 | #define mmu_release_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_release_scsi_sgl)(sg,sz,sbus) | ||
263 | |||
264 | /* | ||
265 | * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep. | ||
266 | * | ||
267 | * The mmu_map_dma_area establishes two mappings in one go. | ||
268 | * These mappings point to pages normally mapped at 'va' (linear address). | ||
269 | * First mapping is for CPU visible address at 'a', uncached. | ||
270 | * This is an alias, but it works because it is an uncached mapping. | ||
271 | * Second mapping is for device visible address, or "bus" address. | ||
272 | * The bus address is returned at '*pba'. | ||
273 | * | ||
274 | * These functions seem distinct, but are hard to split. On sun4c, | ||
275 | * at least for now, 'a' is equal to bus address, and retured in *pba. | ||
276 | * On sun4m, page attributes depend on the CPU type, so we have to | ||
277 | * know if we are mapping RAM or I/O, so it has to be an additional argument | ||
278 | * to a separate mapping function for CPU visible mappings. | ||
279 | */ | ||
280 | BTFIXUPDEF_CALL(int, mmu_map_dma_area, dma_addr_t *, unsigned long, unsigned long, int len) | ||
281 | BTFIXUPDEF_CALL(struct page *, mmu_translate_dvma, unsigned long busa) | ||
282 | BTFIXUPDEF_CALL(void, mmu_unmap_dma_area, unsigned long busa, int len) | ||
283 | |||
284 | #define mmu_map_dma_area(pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(pba,va,a,len) | ||
285 | #define mmu_unmap_dma_area(ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(ba,len) | ||
286 | #define mmu_translate_dvma(ba) BTFIXUP_CALL(mmu_translate_dvma)(ba) | ||
287 | |||
288 | #endif /* !(_ASM_SPARC_DMA_H) */ | ||
diff --git a/include/asm-sparc/ebus.h b/include/asm-sparc/ebus.h deleted file mode 100644 index 491f85d662df..000000000000 --- a/include/asm-sparc/ebus.h +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | /* | ||
2 | * ebus.h: PCI to Ebus pseudo driver software state. | ||
3 | * | ||
4 | * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) | ||
5 | * | ||
6 | * Adopted for sparc by V. Roganov and G. Raiko. | ||
7 | */ | ||
8 | |||
9 | #ifndef __SPARC_EBUS_H | ||
10 | #define __SPARC_EBUS_H | ||
11 | |||
12 | #ifndef _LINUX_IOPORT_H | ||
13 | #include <linux/ioport.h> | ||
14 | #endif | ||
15 | #include <asm/oplib.h> | ||
16 | #include <asm/prom.h> | ||
17 | #include <asm/of_device.h> | ||
18 | |||
19 | struct linux_ebus_child { | ||
20 | struct linux_ebus_child *next; | ||
21 | struct linux_ebus_device *parent; | ||
22 | struct linux_ebus *bus; | ||
23 | struct device_node *prom_node; | ||
24 | struct resource resource[PROMREG_MAX]; | ||
25 | int num_addrs; | ||
26 | unsigned int irqs[PROMINTR_MAX]; | ||
27 | int num_irqs; | ||
28 | }; | ||
29 | |||
30 | struct linux_ebus_device { | ||
31 | struct of_device ofdev; | ||
32 | struct linux_ebus_device *next; | ||
33 | struct linux_ebus_child *children; | ||
34 | struct linux_ebus *bus; | ||
35 | struct device_node *prom_node; | ||
36 | struct resource resource[PROMREG_MAX]; | ||
37 | int num_addrs; | ||
38 | unsigned int irqs[PROMINTR_MAX]; | ||
39 | int num_irqs; | ||
40 | }; | ||
41 | #define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev) | ||
42 | |||
43 | struct linux_ebus { | ||
44 | struct of_device ofdev; | ||
45 | struct linux_ebus *next; | ||
46 | struct linux_ebus_device *devices; | ||
47 | struct linux_pbm_info *parent; | ||
48 | struct pci_dev *self; | ||
49 | struct device_node *prom_node; | ||
50 | }; | ||
51 | #define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev) | ||
52 | |||
53 | struct linux_ebus_dma { | ||
54 | unsigned int dcsr; | ||
55 | unsigned int dacr; | ||
56 | unsigned int dbcr; | ||
57 | }; | ||
58 | |||
59 | #define EBUS_DCSR_INT_PEND 0x00000001 | ||
60 | #define EBUS_DCSR_ERR_PEND 0x00000002 | ||
61 | #define EBUS_DCSR_DRAIN 0x00000004 | ||
62 | #define EBUS_DCSR_INT_EN 0x00000010 | ||
63 | #define EBUS_DCSR_RESET 0x00000080 | ||
64 | #define EBUS_DCSR_WRITE 0x00000100 | ||
65 | #define EBUS_DCSR_EN_DMA 0x00000200 | ||
66 | #define EBUS_DCSR_CYC_PEND 0x00000400 | ||
67 | #define EBUS_DCSR_DIAG_RD_DONE 0x00000800 | ||
68 | #define EBUS_DCSR_DIAG_WR_DONE 0x00001000 | ||
69 | #define EBUS_DCSR_EN_CNT 0x00002000 | ||
70 | #define EBUS_DCSR_TC 0x00004000 | ||
71 | #define EBUS_DCSR_DIS_CSR_DRN 0x00010000 | ||
72 | #define EBUS_DCSR_BURST_SZ_MASK 0x000c0000 | ||
73 | #define EBUS_DCSR_BURST_SZ_1 0x00080000 | ||
74 | #define EBUS_DCSR_BURST_SZ_4 0x00000000 | ||
75 | #define EBUS_DCSR_BURST_SZ_8 0x00040000 | ||
76 | #define EBUS_DCSR_BURST_SZ_16 0x000c0000 | ||
77 | #define EBUS_DCSR_DIAG_EN 0x00100000 | ||
78 | #define EBUS_DCSR_DIS_ERR_PEND 0x00400000 | ||
79 | #define EBUS_DCSR_TCI_DIS 0x00800000 | ||
80 | #define EBUS_DCSR_EN_NEXT 0x01000000 | ||
81 | #define EBUS_DCSR_DMA_ON 0x02000000 | ||
82 | #define EBUS_DCSR_A_LOADED 0x04000000 | ||
83 | #define EBUS_DCSR_NA_LOADED 0x08000000 | ||
84 | #define EBUS_DCSR_DEV_ID_MASK 0xf0000000 | ||
85 | |||
86 | extern struct linux_ebus *ebus_chain; | ||
87 | |||
88 | extern void ebus_init(void); | ||
89 | |||
90 | #define for_each_ebus(bus) \ | ||
91 | for((bus) = ebus_chain; (bus); (bus) = (bus)->next) | ||
92 | |||
93 | #define for_each_ebusdev(dev, bus) \ | ||
94 | for((dev) = (bus)->devices; (dev); (dev) = (dev)->next) | ||
95 | |||
96 | #define for_each_edevchild(dev, child) \ | ||
97 | for((child) = (dev)->children; (child); (child) = (child)->next) | ||
98 | |||
99 | #endif /* !(__SPARC_EBUS_H) */ | ||
diff --git a/include/asm-sparc/ecc.h b/include/asm-sparc/ecc.h deleted file mode 100644 index ccb84b66fef1..000000000000 --- a/include/asm-sparc/ecc.h +++ /dev/null | |||
@@ -1,122 +0,0 @@ | |||
1 | /* | ||
2 | * ecc.h: Definitions and defines for the external cache/memory | ||
3 | * controller on the sun4m. | ||
4 | * | ||
5 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
6 | */ | ||
7 | |||
8 | #ifndef _SPARC_ECC_H | ||
9 | #define _SPARC_ECC_H | ||
10 | |||
11 | /* These registers are accessed through the SRMMU passthrough ASI 0x20 */ | ||
12 | #define ECC_ENABLE 0x00000000 /* ECC enable register */ | ||
13 | #define ECC_FSTATUS 0x00000008 /* ECC fault status register */ | ||
14 | #define ECC_FADDR 0x00000010 /* ECC fault address register */ | ||
15 | #define ECC_DIGNOSTIC 0x00000018 /* ECC diagnostics register */ | ||
16 | #define ECC_MBAENAB 0x00000020 /* MBus arbiter enable register */ | ||
17 | #define ECC_DMESG 0x00001000 /* Diagnostic message passing area */ | ||
18 | |||
19 | /* ECC MBus Arbiter Enable register: | ||
20 | * | ||
21 | * ---------------------------------------- | ||
22 | * | |SBUS|MOD3|MOD2|MOD1|RSV| | ||
23 | * ---------------------------------------- | ||
24 | * 31 5 4 3 2 1 0 | ||
25 | * | ||
26 | * SBUS: Enable MBus Arbiter on the SBus 0=off 1=on | ||
27 | * MOD3: Enable MBus Arbiter on MBus module 3 0=off 1=on | ||
28 | * MOD2: Enable MBus Arbiter on MBus module 2 0=off 1=on | ||
29 | * MOD1: Enable MBus Arbiter on MBus module 1 0=off 1=on | ||
30 | */ | ||
31 | |||
32 | #define ECC_MBAE_SBUS 0x00000010 | ||
33 | #define ECC_MBAE_MOD3 0x00000008 | ||
34 | #define ECC_MBAE_MOD2 0x00000004 | ||
35 | #define ECC_MBAE_MOD1 0x00000002 | ||
36 | |||
37 | /* ECC Fault Control Register layout: | ||
38 | * | ||
39 | * ----------------------------- | ||
40 | * | RESV | ECHECK | EINT | | ||
41 | * ----------------------------- | ||
42 | * 31 2 1 0 | ||
43 | * | ||
44 | * ECHECK: Enable ECC checking. 0=off 1=on | ||
45 | * EINT: Enable Interrupts for correctable errors. 0=off 1=on | ||
46 | */ | ||
47 | #define ECC_FCR_CHECK 0x00000002 | ||
48 | #define ECC_FCR_INTENAB 0x00000001 | ||
49 | |||
50 | /* ECC Fault Address Register Zero layout: | ||
51 | * | ||
52 | * ----------------------------------------------------- | ||
53 | * | MID | S | RSV | VA | BM |AT| C| SZ |TYP| PADDR | | ||
54 | * ----------------------------------------------------- | ||
55 | * 31-28 27 26-22 21-14 13 12 11 10-8 7-4 3-0 | ||
56 | * | ||
57 | * MID: ModuleID of the faulting processor. ie. who did it? | ||
58 | * S: Supervisor/Privileged access? 0=no 1=yes | ||
59 | * VA: Bits 19-12 of the virtual faulting address, these are the | ||
60 | * superset bits in the virtual cache and can be used for | ||
61 | * a flush operation if necessary. | ||
62 | * BM: Boot mode? 0=no 1=yes This is just like the SRMMU boot | ||
63 | * mode bit. | ||
64 | * AT: Did this fault happen during an atomic instruction? 0=no | ||
65 | * 1=yes. This means either an 'ldstub' or 'swap' instruction | ||
66 | * was in progress (but not finished) when this fault happened. | ||
67 | * This indicated whether the bus was locked when the fault | ||
68 | * occurred. | ||
69 | * C: Did the pte for this access indicate that it was cacheable? | ||
70 | * 0=no 1=yes | ||
71 | * SZ: The size of the transaction. | ||
72 | * TYP: The transaction type. | ||
73 | * PADDR: Bits 35-32 of the physical address for the fault. | ||
74 | */ | ||
75 | #define ECC_FADDR0_MIDMASK 0xf0000000 | ||
76 | #define ECC_FADDR0_S 0x08000000 | ||
77 | #define ECC_FADDR0_VADDR 0x003fc000 | ||
78 | #define ECC_FADDR0_BMODE 0x00002000 | ||
79 | #define ECC_FADDR0_ATOMIC 0x00001000 | ||
80 | #define ECC_FADDR0_CACHE 0x00000800 | ||
81 | #define ECC_FADDR0_SIZE 0x00000700 | ||
82 | #define ECC_FADDR0_TYPE 0x000000f0 | ||
83 | #define ECC_FADDR0_PADDR 0x0000000f | ||
84 | |||
85 | /* ECC Fault Address Register One layout: | ||
86 | * | ||
87 | * ------------------------------------- | ||
88 | * | Physical Address 31-0 | | ||
89 | * ------------------------------------- | ||
90 | * 31 0 | ||
91 | * | ||
92 | * You get the upper 4 bits of the physical address from the | ||
93 | * PADDR field in ECC Fault Address Zero register. | ||
94 | */ | ||
95 | |||
96 | /* ECC Fault Status Register layout: | ||
97 | * | ||
98 | * ---------------------------------------------- | ||
99 | * | RESV|C2E|MULT|SYNDROME|DWORD|UNC|TIMEO|BS|C| | ||
100 | * ---------------------------------------------- | ||
101 | * 31-18 17 16 15-8 7-4 3 2 1 0 | ||
102 | * | ||
103 | * C2E: A C2 graphics error occurred. 0=no 1=yes (SS10 only) | ||
104 | * MULT: Multiple errors occurred ;-O 0=no 1=prom_panic(yes) | ||
105 | * SYNDROME: Controller is mentally unstable. | ||
106 | * DWORD: | ||
107 | * UNC: Uncorrectable error. 0=no 1=yes | ||
108 | * TIMEO: Timeout occurred. 0=no 1=yes | ||
109 | * BS: C2 graphics bad slot access. 0=no 1=yes (SS10 only) | ||
110 | * C: Correctable error? 0=no 1=yes | ||
111 | */ | ||
112 | |||
113 | #define ECC_FSR_C2ERR 0x00020000 | ||
114 | #define ECC_FSR_MULT 0x00010000 | ||
115 | #define ECC_FSR_SYND 0x0000ff00 | ||
116 | #define ECC_FSR_DWORD 0x000000f0 | ||
117 | #define ECC_FSR_UNC 0x00000008 | ||
118 | #define ECC_FSR_TIMEO 0x00000004 | ||
119 | #define ECC_FSR_BADSLOT 0x00000002 | ||
120 | #define ECC_FSR_C 0x00000001 | ||
121 | |||
122 | #endif /* !(_SPARC_ECC_H) */ | ||
diff --git a/include/asm-sparc/eeprom.h b/include/asm-sparc/eeprom.h deleted file mode 100644 index e17beeceb405..000000000000 --- a/include/asm-sparc/eeprom.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* | ||
2 | * eeprom.h: Definitions for the Sun eeprom. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | /* The EEPROM and the Mostek Mk48t02 use the same IO address space | ||
8 | * for their registers/data areas. The IDPROM lives here too. | ||
9 | */ | ||
diff --git a/include/asm-sparc/elf.h b/include/asm-sparc/elf.h deleted file mode 100644 index d043f80bc2fd..000000000000 --- a/include/asm-sparc/elf.h +++ /dev/null | |||
@@ -1,145 +0,0 @@ | |||
1 | #ifndef __ASMSPARC_ELF_H | ||
2 | #define __ASMSPARC_ELF_H | ||
3 | |||
4 | /* | ||
5 | * ELF register definitions.. | ||
6 | */ | ||
7 | |||
8 | #include <asm/ptrace.h> | ||
9 | |||
10 | /* | ||
11 | * Sparc section types | ||
12 | */ | ||
13 | #define STT_REGISTER 13 | ||
14 | |||
15 | /* | ||
16 | * Sparc ELF relocation types | ||
17 | */ | ||
18 | #define R_SPARC_NONE 0 | ||
19 | #define R_SPARC_8 1 | ||
20 | #define R_SPARC_16 2 | ||
21 | #define R_SPARC_32 3 | ||
22 | #define R_SPARC_DISP8 4 | ||
23 | #define R_SPARC_DISP16 5 | ||
24 | #define R_SPARC_DISP32 6 | ||
25 | #define R_SPARC_WDISP30 7 | ||
26 | #define R_SPARC_WDISP22 8 | ||
27 | #define R_SPARC_HI22 9 | ||
28 | #define R_SPARC_22 10 | ||
29 | #define R_SPARC_13 11 | ||
30 | #define R_SPARC_LO10 12 | ||
31 | #define R_SPARC_GOT10 13 | ||
32 | #define R_SPARC_GOT13 14 | ||
33 | #define R_SPARC_GOT22 15 | ||
34 | #define R_SPARC_PC10 16 | ||
35 | #define R_SPARC_PC22 17 | ||
36 | #define R_SPARC_WPLT30 18 | ||
37 | #define R_SPARC_COPY 19 | ||
38 | #define R_SPARC_GLOB_DAT 20 | ||
39 | #define R_SPARC_JMP_SLOT 21 | ||
40 | #define R_SPARC_RELATIVE 22 | ||
41 | #define R_SPARC_UA32 23 | ||
42 | #define R_SPARC_PLT32 24 | ||
43 | #define R_SPARC_HIPLT22 25 | ||
44 | #define R_SPARC_LOPLT10 26 | ||
45 | #define R_SPARC_PCPLT32 27 | ||
46 | #define R_SPARC_PCPLT22 28 | ||
47 | #define R_SPARC_PCPLT10 29 | ||
48 | #define R_SPARC_10 30 | ||
49 | #define R_SPARC_11 31 | ||
50 | #define R_SPARC_64 32 | ||
51 | #define R_SPARC_OLO10 33 | ||
52 | #define R_SPARC_WDISP16 40 | ||
53 | #define R_SPARC_WDISP19 41 | ||
54 | #define R_SPARC_7 43 | ||
55 | #define R_SPARC_5 44 | ||
56 | #define R_SPARC_6 45 | ||
57 | |||
58 | /* Bits present in AT_HWCAP, primarily for Sparc32. */ | ||
59 | |||
60 | #define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ | ||
61 | #define HWCAP_SPARC_STBAR 2 | ||
62 | #define HWCAP_SPARC_SWAP 4 | ||
63 | #define HWCAP_SPARC_MULDIV 8 | ||
64 | #define HWCAP_SPARC_V9 16 | ||
65 | #define HWCAP_SPARC_ULTRA3 32 | ||
66 | |||
67 | #define CORE_DUMP_USE_REGSET | ||
68 | |||
69 | /* Format is: | ||
70 | * G0 --> G7 | ||
71 | * O0 --> O7 | ||
72 | * L0 --> L7 | ||
73 | * I0 --> I7 | ||
74 | * PSR, PC, nPC, Y, WIM, TBR | ||
75 | */ | ||
76 | typedef unsigned long elf_greg_t; | ||
77 | #define ELF_NGREG 38 | ||
78 | typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | ||
79 | |||
80 | typedef struct { | ||
81 | union { | ||
82 | unsigned long pr_regs[32]; | ||
83 | double pr_dregs[16]; | ||
84 | } pr_fr; | ||
85 | unsigned long __unused; | ||
86 | unsigned long pr_fsr; | ||
87 | unsigned char pr_qcnt; | ||
88 | unsigned char pr_q_entrysize; | ||
89 | unsigned char pr_en; | ||
90 | unsigned int pr_q[64]; | ||
91 | } elf_fpregset_t; | ||
92 | |||
93 | #include <asm/mbus.h> | ||
94 | |||
95 | /* | ||
96 | * This is used to ensure we don't load something for the wrong architecture. | ||
97 | */ | ||
98 | #define elf_check_arch(x) ((x)->e_machine == EM_SPARC) | ||
99 | |||
100 | /* | ||
101 | * These are used to set parameters in the core dumps. | ||
102 | */ | ||
103 | #define ELF_ARCH EM_SPARC | ||
104 | #define ELF_CLASS ELFCLASS32 | ||
105 | #define ELF_DATA ELFDATA2MSB | ||
106 | |||
107 | #define USE_ELF_CORE_DUMP | ||
108 | #ifndef CONFIG_SUN4 | ||
109 | #define ELF_EXEC_PAGESIZE 4096 | ||
110 | #else | ||
111 | #define ELF_EXEC_PAGESIZE 8192 | ||
112 | #endif | ||
113 | |||
114 | |||
115 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical | ||
116 | use of this is to invoke "./ld.so someprog" to test out a new version of | ||
117 | the loader. We need to make sure that it is out of the way of the program | ||
118 | that it will "exec", and that there is sufficient room for the brk. */ | ||
119 | |||
120 | #define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE) | ||
121 | |||
122 | /* This yields a mask that user programs can use to figure out what | ||
123 | instruction set this cpu supports. This can NOT be done in userspace | ||
124 | on Sparc. */ | ||
125 | |||
126 | /* Sun4c has none of the capabilities, most sun4m's have them all. | ||
127 | * XXX This is gross, set some global variable at boot time. -DaveM | ||
128 | */ | ||
129 | #define ELF_HWCAP ((ARCH_SUN4C_SUN4) ? 0 : \ | ||
130 | (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \ | ||
131 | HWCAP_SPARC_SWAP | \ | ||
132 | ((srmmu_modtype != Cypress && \ | ||
133 | srmmu_modtype != Cypress_vE && \ | ||
134 | srmmu_modtype != Cypress_vD) ? \ | ||
135 | HWCAP_SPARC_MULDIV : 0))) | ||
136 | |||
137 | /* This yields a string that ld.so will use to load implementation | ||
138 | specific libraries for optimization. This is more specific in | ||
139 | intent than poking at uname or /proc/cpuinfo. */ | ||
140 | |||
141 | #define ELF_PLATFORM (NULL) | ||
142 | |||
143 | #define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) | ||
144 | |||
145 | #endif /* !(__ASMSPARC_ELF_H) */ | ||
diff --git a/include/asm-sparc/emergency-restart.h b/include/asm-sparc/emergency-restart.h deleted file mode 100644 index 108d8c48e42e..000000000000 --- a/include/asm-sparc/emergency-restart.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_EMERGENCY_RESTART_H | ||
2 | #define _ASM_EMERGENCY_RESTART_H | ||
3 | |||
4 | #include <asm-generic/emergency-restart.h> | ||
5 | |||
6 | #endif /* _ASM_EMERGENCY_RESTART_H */ | ||
diff --git a/include/asm-sparc/errno.h b/include/asm-sparc/errno.h deleted file mode 100644 index a9ef172977de..000000000000 --- a/include/asm-sparc/errno.h +++ /dev/null | |||
@@ -1,113 +0,0 @@ | |||
1 | #ifndef _SPARC_ERRNO_H | ||
2 | #define _SPARC_ERRNO_H | ||
3 | |||
4 | /* These match the SunOS error numbering scheme. */ | ||
5 | |||
6 | #include <asm-generic/errno-base.h> | ||
7 | |||
8 | #define EWOULDBLOCK EAGAIN /* Operation would block */ | ||
9 | #define EINPROGRESS 36 /* Operation now in progress */ | ||
10 | #define EALREADY 37 /* Operation already in progress */ | ||
11 | #define ENOTSOCK 38 /* Socket operation on non-socket */ | ||
12 | #define EDESTADDRREQ 39 /* Destination address required */ | ||
13 | #define EMSGSIZE 40 /* Message too long */ | ||
14 | #define EPROTOTYPE 41 /* Protocol wrong type for socket */ | ||
15 | #define ENOPROTOOPT 42 /* Protocol not available */ | ||
16 | #define EPROTONOSUPPORT 43 /* Protocol not supported */ | ||
17 | #define ESOCKTNOSUPPORT 44 /* Socket type not supported */ | ||
18 | #define EOPNOTSUPP 45 /* Op not supported on transport endpoint */ | ||
19 | #define EPFNOSUPPORT 46 /* Protocol family not supported */ | ||
20 | #define EAFNOSUPPORT 47 /* Address family not supported by protocol */ | ||
21 | #define EADDRINUSE 48 /* Address already in use */ | ||
22 | #define EADDRNOTAVAIL 49 /* Cannot assign requested address */ | ||
23 | #define ENETDOWN 50 /* Network is down */ | ||
24 | #define ENETUNREACH 51 /* Network is unreachable */ | ||
25 | #define ENETRESET 52 /* Net dropped connection because of reset */ | ||
26 | #define ECONNABORTED 53 /* Software caused connection abort */ | ||
27 | #define ECONNRESET 54 /* Connection reset by peer */ | ||
28 | #define ENOBUFS 55 /* No buffer space available */ | ||
29 | #define EISCONN 56 /* Transport endpoint is already connected */ | ||
30 | #define ENOTCONN 57 /* Transport endpoint is not connected */ | ||
31 | #define ESHUTDOWN 58 /* No send after transport endpoint shutdown */ | ||
32 | #define ETOOMANYREFS 59 /* Too many references: cannot splice */ | ||
33 | #define ETIMEDOUT 60 /* Connection timed out */ | ||
34 | #define ECONNREFUSED 61 /* Connection refused */ | ||
35 | #define ELOOP 62 /* Too many symbolic links encountered */ | ||
36 | #define ENAMETOOLONG 63 /* File name too long */ | ||
37 | #define EHOSTDOWN 64 /* Host is down */ | ||
38 | #define EHOSTUNREACH 65 /* No route to host */ | ||
39 | #define ENOTEMPTY 66 /* Directory not empty */ | ||
40 | #define EPROCLIM 67 /* SUNOS: Too many processes */ | ||
41 | #define EUSERS 68 /* Too many users */ | ||
42 | #define EDQUOT 69 /* Quota exceeded */ | ||
43 | #define ESTALE 70 /* Stale NFS file handle */ | ||
44 | #define EREMOTE 71 /* Object is remote */ | ||
45 | #define ENOSTR 72 /* Device not a stream */ | ||
46 | #define ETIME 73 /* Timer expired */ | ||
47 | #define ENOSR 74 /* Out of streams resources */ | ||
48 | #define ENOMSG 75 /* No message of desired type */ | ||
49 | #define EBADMSG 76 /* Not a data message */ | ||
50 | #define EIDRM 77 /* Identifier removed */ | ||
51 | #define EDEADLK 78 /* Resource deadlock would occur */ | ||
52 | #define ENOLCK 79 /* No record locks available */ | ||
53 | #define ENONET 80 /* Machine is not on the network */ | ||
54 | #define ERREMOTE 81 /* SunOS: Too many lvls of remote in path */ | ||
55 | #define ENOLINK 82 /* Link has been severed */ | ||
56 | #define EADV 83 /* Advertise error */ | ||
57 | #define ESRMNT 84 /* Srmount error */ | ||
58 | #define ECOMM 85 /* Communication error on send */ | ||
59 | #define EPROTO 86 /* Protocol error */ | ||
60 | #define EMULTIHOP 87 /* Multihop attempted */ | ||
61 | #define EDOTDOT 88 /* RFS specific error */ | ||
62 | #define EREMCHG 89 /* Remote address changed */ | ||
63 | #define ENOSYS 90 /* Function not implemented */ | ||
64 | |||
65 | /* The rest have no SunOS equivalent. */ | ||
66 | #define ESTRPIPE 91 /* Streams pipe error */ | ||
67 | #define EOVERFLOW 92 /* Value too large for defined data type */ | ||
68 | #define EBADFD 93 /* File descriptor in bad state */ | ||
69 | #define ECHRNG 94 /* Channel number out of range */ | ||
70 | #define EL2NSYNC 95 /* Level 2 not synchronized */ | ||
71 | #define EL3HLT 96 /* Level 3 halted */ | ||
72 | #define EL3RST 97 /* Level 3 reset */ | ||
73 | #define ELNRNG 98 /* Link number out of range */ | ||
74 | #define EUNATCH 99 /* Protocol driver not attached */ | ||
75 | #define ENOCSI 100 /* No CSI structure available */ | ||
76 | #define EL2HLT 101 /* Level 2 halted */ | ||
77 | #define EBADE 102 /* Invalid exchange */ | ||
78 | #define EBADR 103 /* Invalid request descriptor */ | ||
79 | #define EXFULL 104 /* Exchange full */ | ||
80 | #define ENOANO 105 /* No anode */ | ||
81 | #define EBADRQC 106 /* Invalid request code */ | ||
82 | #define EBADSLT 107 /* Invalid slot */ | ||
83 | #define EDEADLOCK 108 /* File locking deadlock error */ | ||
84 | #define EBFONT 109 /* Bad font file format */ | ||
85 | #define ELIBEXEC 110 /* Cannot exec a shared library directly */ | ||
86 | #define ENODATA 111 /* No data available */ | ||
87 | #define ELIBBAD 112 /* Accessing a corrupted shared library */ | ||
88 | #define ENOPKG 113 /* Package not installed */ | ||
89 | #define ELIBACC 114 /* Can not access a needed shared library */ | ||
90 | #define ENOTUNIQ 115 /* Name not unique on network */ | ||
91 | #define ERESTART 116 /* Interrupted syscall should be restarted */ | ||
92 | #define EUCLEAN 117 /* Structure needs cleaning */ | ||
93 | #define ENOTNAM 118 /* Not a XENIX named type file */ | ||
94 | #define ENAVAIL 119 /* No XENIX semaphores available */ | ||
95 | #define EISNAM 120 /* Is a named type file */ | ||
96 | #define EREMOTEIO 121 /* Remote I/O error */ | ||
97 | #define EILSEQ 122 /* Illegal byte sequence */ | ||
98 | #define ELIBMAX 123 /* Atmpt to link in too many shared libs */ | ||
99 | #define ELIBSCN 124 /* .lib section in a.out corrupted */ | ||
100 | |||
101 | #define ENOMEDIUM 125 /* No medium found */ | ||
102 | #define EMEDIUMTYPE 126 /* Wrong medium type */ | ||
103 | #define ECANCELED 127 /* Operation Cancelled */ | ||
104 | #define ENOKEY 128 /* Required key not available */ | ||
105 | #define EKEYEXPIRED 129 /* Key has expired */ | ||
106 | #define EKEYREVOKED 130 /* Key has been revoked */ | ||
107 | #define EKEYREJECTED 131 /* Key was rejected by service */ | ||
108 | |||
109 | /* for robust mutexes */ | ||
110 | #define EOWNERDEAD 132 /* Owner died */ | ||
111 | #define ENOTRECOVERABLE 133 /* State not recoverable */ | ||
112 | |||
113 | #endif | ||
diff --git a/include/asm-sparc/fb.h b/include/asm-sparc/fb.h deleted file mode 100644 index b83e44729655..000000000000 --- a/include/asm-sparc/fb.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | #ifndef _SPARC_FB_H_ | ||
2 | #define _SPARC_FB_H_ | ||
3 | #include <linux/fb.h> | ||
4 | #include <linux/fs.h> | ||
5 | #include <asm/page.h> | ||
6 | #include <asm/prom.h> | ||
7 | |||
8 | static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, | ||
9 | unsigned long off) | ||
10 | { | ||
11 | #ifdef CONFIG_SPARC64 | ||
12 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | ||
13 | #endif | ||
14 | } | ||
15 | |||
16 | static inline int fb_is_primary_device(struct fb_info *info) | ||
17 | { | ||
18 | struct device *dev = info->device; | ||
19 | struct device_node *node; | ||
20 | |||
21 | node = dev->archdata.prom_node; | ||
22 | if (node && | ||
23 | node == of_console_device) | ||
24 | return 1; | ||
25 | |||
26 | return 0; | ||
27 | } | ||
28 | |||
29 | #endif /* _SPARC_FB_H_ */ | ||
diff --git a/include/asm-sparc/fbio.h b/include/asm-sparc/fbio.h deleted file mode 100644 index c2b27e7a7cad..000000000000 --- a/include/asm-sparc/fbio.h +++ /dev/null | |||
@@ -1,297 +0,0 @@ | |||
1 | #ifndef __LINUX_FBIO_H | ||
2 | #define __LINUX_FBIO_H | ||
3 | |||
4 | /* Constants used for fbio SunOS compatibility */ | ||
5 | /* (C) 1996 Miguel de Icaza */ | ||
6 | |||
7 | /* Frame buffer types */ | ||
8 | #define FBTYPE_NOTYPE -1 | ||
9 | #define FBTYPE_SUN1BW 0 /* mono */ | ||
10 | #define FBTYPE_SUN1COLOR 1 | ||
11 | #define FBTYPE_SUN2BW 2 | ||
12 | #define FBTYPE_SUN2COLOR 3 | ||
13 | #define FBTYPE_SUN2GP 4 | ||
14 | #define FBTYPE_SUN5COLOR 5 | ||
15 | #define FBTYPE_SUN3COLOR 6 | ||
16 | #define FBTYPE_MEMCOLOR 7 | ||
17 | #define FBTYPE_SUN4COLOR 8 | ||
18 | |||
19 | #define FBTYPE_NOTSUN1 9 | ||
20 | #define FBTYPE_NOTSUN2 10 | ||
21 | #define FBTYPE_NOTSUN3 11 | ||
22 | |||
23 | #define FBTYPE_SUNFAST_COLOR 12 /* cg6 */ | ||
24 | #define FBTYPE_SUNROP_COLOR 13 | ||
25 | #define FBTYPE_SUNFB_VIDEO 14 | ||
26 | #define FBTYPE_SUNGIFB 15 | ||
27 | #define FBTYPE_SUNGPLAS 16 | ||
28 | #define FBTYPE_SUNGP3 17 | ||
29 | #define FBTYPE_SUNGT 18 | ||
30 | #define FBTYPE_SUNLEO 19 /* zx Leo card */ | ||
31 | #define FBTYPE_MDICOLOR 20 /* cg14 */ | ||
32 | #define FBTYPE_TCXCOLOR 21 /* SUNW,tcx card */ | ||
33 | |||
34 | #define FBTYPE_LASTPLUSONE 21 /* This is not last + 1 in fact... */ | ||
35 | |||
36 | /* Does not seem to be listed in the Sun file either */ | ||
37 | #define FBTYPE_CREATOR 22 | ||
38 | #define FBTYPE_PCI_IGA1682 23 | ||
39 | #define FBTYPE_P9100COLOR 24 | ||
40 | |||
41 | /* fbio ioctls */ | ||
42 | /* Returned by FBIOGTYPE */ | ||
43 | struct fbtype { | ||
44 | int fb_type; /* fb type, see above */ | ||
45 | int fb_height; /* pixels */ | ||
46 | int fb_width; /* pixels */ | ||
47 | int fb_depth; | ||
48 | int fb_cmsize; /* color map entries */ | ||
49 | int fb_size; /* fb size in bytes */ | ||
50 | }; | ||
51 | #define FBIOGTYPE _IOR('F', 0, struct fbtype) | ||
52 | |||
53 | struct fbcmap { | ||
54 | int index; /* first element (0 origin) */ | ||
55 | int count; | ||
56 | unsigned char __user *red; | ||
57 | unsigned char __user *green; | ||
58 | unsigned char __user *blue; | ||
59 | }; | ||
60 | |||
61 | #ifdef __KERNEL__ | ||
62 | #define FBIOPUTCMAP_SPARC _IOW('F', 3, struct fbcmap) | ||
63 | #define FBIOGETCMAP_SPARC _IOW('F', 4, struct fbcmap) | ||
64 | #else | ||
65 | #define FBIOPUTCMAP _IOW('F', 3, struct fbcmap) | ||
66 | #define FBIOGETCMAP _IOW('F', 4, struct fbcmap) | ||
67 | #endif | ||
68 | |||
69 | /* # of device specific values */ | ||
70 | #define FB_ATTR_NDEVSPECIFIC 8 | ||
71 | /* # of possible emulations */ | ||
72 | #define FB_ATTR_NEMUTYPES 4 | ||
73 | |||
74 | struct fbsattr { | ||
75 | int flags; | ||
76 | int emu_type; /* -1 if none */ | ||
77 | int dev_specific[FB_ATTR_NDEVSPECIFIC]; | ||
78 | }; | ||
79 | |||
80 | struct fbgattr { | ||
81 | int real_type; /* real frame buffer type */ | ||
82 | int owner; /* unknown */ | ||
83 | struct fbtype fbtype; /* real frame buffer fbtype */ | ||
84 | struct fbsattr sattr; | ||
85 | int emu_types[FB_ATTR_NEMUTYPES]; /* supported emulations */ | ||
86 | }; | ||
87 | #define FBIOSATTR _IOW('F', 5, struct fbgattr) /* Unsupported: */ | ||
88 | #define FBIOGATTR _IOR('F', 6, struct fbgattr) /* supported */ | ||
89 | |||
90 | #define FBIOSVIDEO _IOW('F', 7, int) | ||
91 | #define FBIOGVIDEO _IOR('F', 8, int) | ||
92 | |||
93 | struct fbcursor { | ||
94 | short set; /* what to set, choose from the list above */ | ||
95 | short enable; /* cursor on/off */ | ||
96 | struct fbcurpos pos; /* cursor position */ | ||
97 | struct fbcurpos hot; /* cursor hot spot */ | ||
98 | struct fbcmap cmap; /* color map info */ | ||
99 | struct fbcurpos size; /* cursor bit map size */ | ||
100 | char *image; /* cursor image bits */ | ||
101 | char *mask; /* cursor mask bits */ | ||
102 | }; | ||
103 | |||
104 | /* set/get cursor attributes/shape */ | ||
105 | #define FBIOSCURSOR _IOW('F', 24, struct fbcursor) | ||
106 | #define FBIOGCURSOR _IOWR('F', 25, struct fbcursor) | ||
107 | |||
108 | /* set/get cursor position */ | ||
109 | #define FBIOSCURPOS _IOW('F', 26, struct fbcurpos) | ||
110 | #define FBIOGCURPOS _IOW('F', 27, struct fbcurpos) | ||
111 | |||
112 | /* get max cursor size */ | ||
113 | #define FBIOGCURMAX _IOR('F', 28, struct fbcurpos) | ||
114 | |||
115 | /* wid manipulation */ | ||
116 | struct fb_wid_alloc { | ||
117 | #define FB_WID_SHARED_8 0 | ||
118 | #define FB_WID_SHARED_24 1 | ||
119 | #define FB_WID_DBL_8 2 | ||
120 | #define FB_WID_DBL_24 3 | ||
121 | __u32 wa_type; | ||
122 | __s32 wa_index; /* Set on return */ | ||
123 | __u32 wa_count; | ||
124 | }; | ||
125 | struct fb_wid_item { | ||
126 | __u32 wi_type; | ||
127 | __s32 wi_index; | ||
128 | __u32 wi_attrs; | ||
129 | __u32 wi_values[32]; | ||
130 | }; | ||
131 | struct fb_wid_list { | ||
132 | __u32 wl_flags; | ||
133 | __u32 wl_count; | ||
134 | struct fb_wid_item *wl_list; | ||
135 | }; | ||
136 | |||
137 | #define FBIO_WID_ALLOC _IOWR('F', 30, struct fb_wid_alloc) | ||
138 | #define FBIO_WID_FREE _IOW('F', 31, struct fb_wid_alloc) | ||
139 | #define FBIO_WID_PUT _IOW('F', 32, struct fb_wid_list) | ||
140 | #define FBIO_WID_GET _IOWR('F', 33, struct fb_wid_list) | ||
141 | |||
142 | /* Creator ioctls */ | ||
143 | #define FFB_IOCTL ('F'<<8) | ||
144 | #define FFB_SYS_INFO (FFB_IOCTL|80) | ||
145 | #define FFB_CLUTREAD (FFB_IOCTL|81) | ||
146 | #define FFB_CLUTPOST (FFB_IOCTL|82) | ||
147 | #define FFB_SETDIAGMODE (FFB_IOCTL|83) | ||
148 | #define FFB_GETMONITORID (FFB_IOCTL|84) | ||
149 | #define FFB_GETVIDEOMODE (FFB_IOCTL|85) | ||
150 | #define FFB_SETVIDEOMODE (FFB_IOCTL|86) | ||
151 | #define FFB_SETSERVER (FFB_IOCTL|87) | ||
152 | #define FFB_SETOVCTL (FFB_IOCTL|88) | ||
153 | #define FFB_GETOVCTL (FFB_IOCTL|89) | ||
154 | #define FFB_GETSAXNUM (FFB_IOCTL|90) | ||
155 | #define FFB_FBDEBUG (FFB_IOCTL|91) | ||
156 | |||
157 | /* Cg14 ioctls */ | ||
158 | #define MDI_IOCTL ('M'<<8) | ||
159 | #define MDI_RESET (MDI_IOCTL|1) | ||
160 | #define MDI_GET_CFGINFO (MDI_IOCTL|2) | ||
161 | #define MDI_SET_PIXELMODE (MDI_IOCTL|3) | ||
162 | # define MDI_32_PIX 32 | ||
163 | # define MDI_16_PIX 16 | ||
164 | # define MDI_8_PIX 8 | ||
165 | |||
166 | struct mdi_cfginfo { | ||
167 | int mdi_ncluts; /* Number of implemented CLUTs in this MDI */ | ||
168 | int mdi_type; /* FBTYPE name */ | ||
169 | int mdi_height; /* height */ | ||
170 | int mdi_width; /* widht */ | ||
171 | int mdi_size; /* available ram */ | ||
172 | int mdi_mode; /* 8bpp, 16bpp or 32bpp */ | ||
173 | int mdi_pixfreq; /* pixel clock (from PROM) */ | ||
174 | }; | ||
175 | |||
176 | /* SparcLinux specific ioctl for the MDI, should be replaced for | ||
177 | * the SET_XLUT/SET_CLUTn ioctls instead | ||
178 | */ | ||
179 | #define MDI_CLEAR_XLUT (MDI_IOCTL|9) | ||
180 | |||
181 | /* leo & ffb ioctls */ | ||
182 | struct fb_clut_alloc { | ||
183 | __u32 clutid; /* Set on return */ | ||
184 | __u32 flag; | ||
185 | __u32 index; | ||
186 | }; | ||
187 | |||
188 | struct fb_clut { | ||
189 | #define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */ | ||
190 | __u32 flag; | ||
191 | __u32 clutid; | ||
192 | __u32 offset; | ||
193 | __u32 count; | ||
194 | char * red; | ||
195 | char * green; | ||
196 | char * blue; | ||
197 | }; | ||
198 | |||
199 | struct fb_clut32 { | ||
200 | __u32 flag; | ||
201 | __u32 clutid; | ||
202 | __u32 offset; | ||
203 | __u32 count; | ||
204 | __u32 red; | ||
205 | __u32 green; | ||
206 | __u32 blue; | ||
207 | }; | ||
208 | |||
209 | #define LEO_CLUTALLOC _IOWR('L', 53, struct fb_clut_alloc) | ||
210 | #define LEO_CLUTFREE _IOW('L', 54, struct fb_clut_alloc) | ||
211 | #define LEO_CLUTREAD _IOW('L', 55, struct fb_clut) | ||
212 | #define LEO_CLUTPOST _IOW('L', 56, struct fb_clut) | ||
213 | #define LEO_SETGAMMA _IOW('L', 68, int) /* Not yet implemented */ | ||
214 | #define LEO_GETGAMMA _IOR('L', 69, int) /* Not yet implemented */ | ||
215 | |||
216 | #ifdef __KERNEL__ | ||
217 | /* Addresses on the fd of a cgsix that are mappable */ | ||
218 | #define CG6_FBC 0x70000000 | ||
219 | #define CG6_TEC 0x70001000 | ||
220 | #define CG6_BTREGS 0x70002000 | ||
221 | #define CG6_FHC 0x70004000 | ||
222 | #define CG6_THC 0x70005000 | ||
223 | #define CG6_ROM 0x70006000 | ||
224 | #define CG6_RAM 0x70016000 | ||
225 | #define CG6_DHC 0x80000000 | ||
226 | |||
227 | #define CG3_MMAP_OFFSET 0x4000000 | ||
228 | |||
229 | /* Addresses on the fd of a tcx that are mappable */ | ||
230 | #define TCX_RAM8BIT 0x00000000 | ||
231 | #define TCX_RAM24BIT 0x01000000 | ||
232 | #define TCX_UNK3 0x10000000 | ||
233 | #define TCX_UNK4 0x20000000 | ||
234 | #define TCX_CONTROLPLANE 0x28000000 | ||
235 | #define TCX_UNK6 0x30000000 | ||
236 | #define TCX_UNK7 0x38000000 | ||
237 | #define TCX_TEC 0x70000000 | ||
238 | #define TCX_BTREGS 0x70002000 | ||
239 | #define TCX_THC 0x70004000 | ||
240 | #define TCX_DHC 0x70008000 | ||
241 | #define TCX_ALT 0x7000a000 | ||
242 | #define TCX_SYNC 0x7000e000 | ||
243 | #define TCX_UNK2 0x70010000 | ||
244 | |||
245 | /* CG14 definitions */ | ||
246 | |||
247 | /* Offsets into the OBIO space: */ | ||
248 | #define CG14_REGS 0 /* registers */ | ||
249 | #define CG14_CURSORREGS 0x1000 /* cursor registers */ | ||
250 | #define CG14_DACREGS 0x2000 /* DAC registers */ | ||
251 | #define CG14_XLUT 0x3000 /* X Look Up Table -- ??? */ | ||
252 | #define CG14_CLUT1 0x4000 /* Color Look Up Table */ | ||
253 | #define CG14_CLUT2 0x5000 /* Color Look Up Table */ | ||
254 | #define CG14_CLUT3 0x6000 /* Color Look Up Table */ | ||
255 | #define CG14_AUTO 0xf000 | ||
256 | |||
257 | #endif /* KERNEL */ | ||
258 | |||
259 | /* These are exported to userland for applications to use */ | ||
260 | /* Mappable offsets for the cg14: control registers */ | ||
261 | #define MDI_DIRECT_MAP 0x10000000 | ||
262 | #define MDI_CTLREG_MAP 0x20000000 | ||
263 | #define MDI_CURSOR_MAP 0x30000000 | ||
264 | #define MDI_SHDW_VRT_MAP 0x40000000 | ||
265 | |||
266 | /* Mappable offsets for the cg14: frame buffer resolutions */ | ||
267 | /* 32 bits */ | ||
268 | #define MDI_CHUNKY_XBGR_MAP 0x50000000 | ||
269 | #define MDI_CHUNKY_BGR_MAP 0x60000000 | ||
270 | |||
271 | /* 16 bits */ | ||
272 | #define MDI_PLANAR_X16_MAP 0x70000000 | ||
273 | #define MDI_PLANAR_C16_MAP 0x80000000 | ||
274 | |||
275 | /* 8 bit is done as CG3 MMAP offset */ | ||
276 | /* 32 bits, planar */ | ||
277 | #define MDI_PLANAR_X32_MAP 0x90000000 | ||
278 | #define MDI_PLANAR_B32_MAP 0xa0000000 | ||
279 | #define MDI_PLANAR_G32_MAP 0xb0000000 | ||
280 | #define MDI_PLANAR_R32_MAP 0xc0000000 | ||
281 | |||
282 | /* Mappable offsets on leo */ | ||
283 | #define LEO_SS0_MAP 0x00000000 | ||
284 | #define LEO_LC_SS0_USR_MAP 0x00800000 | ||
285 | #define LEO_LD_SS0_MAP 0x00801000 | ||
286 | #define LEO_LX_CURSOR_MAP 0x00802000 | ||
287 | #define LEO_SS1_MAP 0x00803000 | ||
288 | #define LEO_LC_SS1_USR_MAP 0x01003000 | ||
289 | #define LEO_LD_SS1_MAP 0x01004000 | ||
290 | #define LEO_UNK_MAP 0x01005000 | ||
291 | #define LEO_LX_KRN_MAP 0x01006000 | ||
292 | #define LEO_LC_SS0_KRN_MAP 0x01007000 | ||
293 | #define LEO_LC_SS1_KRN_MAP 0x01008000 | ||
294 | #define LEO_LD_GBL_MAP 0x01009000 | ||
295 | #define LEO_UNK2_MAP 0x0100a000 | ||
296 | |||
297 | #endif /* __LINUX_FBIO_H */ | ||
diff --git a/include/asm-sparc/fcntl.h b/include/asm-sparc/fcntl.h deleted file mode 100644 index 07bd2d80257f..000000000000 --- a/include/asm-sparc/fcntl.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | #ifndef _SPARC_FCNTL_H | ||
2 | #define _SPARC_FCNTL_H | ||
3 | |||
4 | /* open/fcntl - O_SYNC is only implemented on blocks devices and on files | ||
5 | located on an ext2 file system */ | ||
6 | #define O_APPEND 0x0008 | ||
7 | #define FASYNC 0x0040 /* fcntl, for BSD compatibility */ | ||
8 | #define O_CREAT 0x0200 /* not fcntl */ | ||
9 | #define O_TRUNC 0x0400 /* not fcntl */ | ||
10 | #define O_EXCL 0x0800 /* not fcntl */ | ||
11 | #define O_SYNC 0x2000 | ||
12 | #define O_NONBLOCK 0x4000 | ||
13 | #define O_NDELAY (0x0004 | O_NONBLOCK) | ||
14 | #define O_NOCTTY 0x8000 /* not fcntl */ | ||
15 | #define O_LARGEFILE 0x40000 | ||
16 | #define O_DIRECT 0x100000 /* direct disk access hint */ | ||
17 | #define O_NOATIME 0x200000 | ||
18 | #define O_CLOEXEC 0x400000 | ||
19 | |||
20 | #define F_GETOWN 5 /* for sockets. */ | ||
21 | #define F_SETOWN 6 /* for sockets. */ | ||
22 | #define F_GETLK 7 | ||
23 | #define F_SETLK 8 | ||
24 | #define F_SETLKW 9 | ||
25 | |||
26 | /* for posix fcntl() and lockf() */ | ||
27 | #define F_RDLCK 1 | ||
28 | #define F_WRLCK 2 | ||
29 | #define F_UNLCK 3 | ||
30 | |||
31 | #define __ARCH_FLOCK_PAD short __unused; | ||
32 | #define __ARCH_FLOCK64_PAD short __unused; | ||
33 | |||
34 | #include <asm-generic/fcntl.h> | ||
35 | |||
36 | #endif | ||
diff --git a/include/asm-sparc/fixmap.h b/include/asm-sparc/fixmap.h deleted file mode 100644 index f18fc0755adf..000000000000 --- a/include/asm-sparc/fixmap.h +++ /dev/null | |||
@@ -1,110 +0,0 @@ | |||
1 | /* | ||
2 | * fixmap.h: compile-time virtual memory allocation | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 1998 Ingo Molnar | ||
9 | * | ||
10 | * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999 | ||
11 | */ | ||
12 | |||
13 | #ifndef _ASM_FIXMAP_H | ||
14 | #define _ASM_FIXMAP_H | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <asm/page.h> | ||
18 | #ifdef CONFIG_HIGHMEM | ||
19 | #include <linux/threads.h> | ||
20 | #include <asm/kmap_types.h> | ||
21 | #endif | ||
22 | |||
23 | /* | ||
24 | * Here we define all the compile-time 'special' virtual | ||
25 | * addresses. The point is to have a constant address at | ||
26 | * compile time, but to set the physical address only | ||
27 | * in the boot process. We allocate these special addresses | ||
28 | * from the top of unused virtual memory (0xfd000000 - 1 page) backwards. | ||
29 | * Also this lets us do fail-safe vmalloc(), we | ||
30 | * can guarantee that these special addresses and | ||
31 | * vmalloc()-ed addresses never overlap. | ||
32 | * | ||
33 | * these 'compile-time allocated' memory buffers are | ||
34 | * fixed-size 4k pages. (or larger if used with an increment | ||
35 | * highger than 1) use fixmap_set(idx,phys) to associate | ||
36 | * physical memory with fixmap indices. | ||
37 | * | ||
38 | * TLB entries of such buffers will not be flushed across | ||
39 | * task switches. | ||
40 | */ | ||
41 | |||
42 | /* | ||
43 | * on UP currently we will have no trace of the fixmap mechanism, | ||
44 | * no page table allocations, etc. This might change in the | ||
45 | * future, say framebuffers for the console driver(s) could be | ||
46 | * fix-mapped? | ||
47 | */ | ||
48 | enum fixed_addresses { | ||
49 | FIX_HOLE, | ||
50 | #ifdef CONFIG_HIGHMEM | ||
51 | FIX_KMAP_BEGIN, | ||
52 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, | ||
53 | #endif | ||
54 | __end_of_fixed_addresses | ||
55 | }; | ||
56 | |||
57 | extern void __set_fixmap (enum fixed_addresses idx, | ||
58 | unsigned long phys, pgprot_t flags); | ||
59 | |||
60 | #define set_fixmap(idx, phys) \ | ||
61 | __set_fixmap(idx, phys, PAGE_KERNEL) | ||
62 | /* | ||
63 | * Some hardware wants to get fixmapped without caching. | ||
64 | */ | ||
65 | #define set_fixmap_nocache(idx, phys) \ | ||
66 | __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) | ||
67 | /* | ||
68 | * used by vmalloc.c. | ||
69 | * | ||
70 | * Leave one empty page between IO pages at 0xfd000000 and | ||
71 | * the start of the fixmap. | ||
72 | */ | ||
73 | #define FIXADDR_TOP (0xfcfff000UL) | ||
74 | #define FIXADDR_SIZE ((__end_of_fixed_addresses) << PAGE_SHIFT) | ||
75 | #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) | ||
76 | |||
77 | #define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) | ||
78 | #define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) | ||
79 | |||
80 | extern void __this_fixmap_does_not_exist(void); | ||
81 | |||
82 | /* | ||
83 | * 'index to address' translation. If anyone tries to use the idx | ||
84 | * directly without tranlation, we catch the bug with a NULL-deference | ||
85 | * kernel oops. Illegal ranges of incoming indices are caught too. | ||
86 | */ | ||
87 | static inline unsigned long fix_to_virt(const unsigned int idx) | ||
88 | { | ||
89 | /* | ||
90 | * this branch gets completely eliminated after inlining, | ||
91 | * except when someone tries to use fixaddr indices in an | ||
92 | * illegal way. (such as mixing up address types or using | ||
93 | * out-of-range indices). | ||
94 | * | ||
95 | * If it doesn't get removed, the linker will complain | ||
96 | * loudly with a reasonably clear error message.. | ||
97 | */ | ||
98 | if (idx >= __end_of_fixed_addresses) | ||
99 | __this_fixmap_does_not_exist(); | ||
100 | |||
101 | return __fix_to_virt(idx); | ||
102 | } | ||
103 | |||
104 | static inline unsigned long virt_to_fix(const unsigned long vaddr) | ||
105 | { | ||
106 | BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); | ||
107 | return __virt_to_fix(vaddr); | ||
108 | } | ||
109 | |||
110 | #endif | ||
diff --git a/include/asm-sparc/floppy.h b/include/asm-sparc/floppy.h deleted file mode 100644 index d3978e068e2b..000000000000 --- a/include/asm-sparc/floppy.h +++ /dev/null | |||
@@ -1,388 +0,0 @@ | |||
1 | /* asm-sparc/floppy.h: Sparc specific parts of the Floppy driver. | ||
2 | * | ||
3 | * Copyright (C) 1995 David S. Miller (davem@davemloft.net) | ||
4 | */ | ||
5 | |||
6 | #ifndef __ASM_SPARC_FLOPPY_H | ||
7 | #define __ASM_SPARC_FLOPPY_H | ||
8 | |||
9 | #include <asm/page.h> | ||
10 | #include <asm/pgtable.h> | ||
11 | #include <asm/system.h> | ||
12 | #include <asm/idprom.h> | ||
13 | #include <asm/machines.h> | ||
14 | #include <asm/oplib.h> | ||
15 | #include <asm/auxio.h> | ||
16 | #include <asm/irq.h> | ||
17 | |||
18 | /* We don't need no stinkin' I/O port allocation crap. */ | ||
19 | #undef release_region | ||
20 | #undef request_region | ||
21 | #define release_region(X, Y) do { } while(0) | ||
22 | #define request_region(X, Y, Z) (1) | ||
23 | |||
24 | /* References: | ||
25 | * 1) Netbsd Sun floppy driver. | ||
26 | * 2) NCR 82077 controller manual | ||
27 | * 3) Intel 82077 controller manual | ||
28 | */ | ||
29 | struct sun_flpy_controller { | ||
30 | volatile unsigned char status_82072; /* Main Status reg. */ | ||
31 | #define dcr_82072 status_82072 /* Digital Control reg. */ | ||
32 | #define status1_82077 status_82072 /* Auxiliary Status reg. 1 */ | ||
33 | |||
34 | volatile unsigned char data_82072; /* Data fifo. */ | ||
35 | #define status2_82077 data_82072 /* Auxiliary Status reg. 2 */ | ||
36 | |||
37 | volatile unsigned char dor_82077; /* Digital Output reg. */ | ||
38 | volatile unsigned char tapectl_82077; /* What the? Tape control reg? */ | ||
39 | |||
40 | volatile unsigned char status_82077; /* Main Status Register. */ | ||
41 | #define drs_82077 status_82077 /* Digital Rate Select reg. */ | ||
42 | |||
43 | volatile unsigned char data_82077; /* Data fifo. */ | ||
44 | volatile unsigned char ___unused; | ||
45 | volatile unsigned char dir_82077; /* Digital Input reg. */ | ||
46 | #define dcr_82077 dir_82077 /* Config Control reg. */ | ||
47 | }; | ||
48 | |||
49 | /* You'll only ever find one controller on a SparcStation anyways. */ | ||
50 | static struct sun_flpy_controller *sun_fdc = NULL; | ||
51 | extern volatile unsigned char *fdc_status; | ||
52 | |||
53 | struct sun_floppy_ops { | ||
54 | unsigned char (*fd_inb)(int port); | ||
55 | void (*fd_outb)(unsigned char value, int port); | ||
56 | }; | ||
57 | |||
58 | static struct sun_floppy_ops sun_fdops; | ||
59 | |||
60 | #define fd_inb(port) sun_fdops.fd_inb(port) | ||
61 | #define fd_outb(value,port) sun_fdops.fd_outb(value,port) | ||
62 | #define fd_enable_dma() sun_fd_enable_dma() | ||
63 | #define fd_disable_dma() sun_fd_disable_dma() | ||
64 | #define fd_request_dma() (0) /* nothing... */ | ||
65 | #define fd_free_dma() /* nothing... */ | ||
66 | #define fd_clear_dma_ff() /* nothing... */ | ||
67 | #define fd_set_dma_mode(mode) sun_fd_set_dma_mode(mode) | ||
68 | #define fd_set_dma_addr(addr) sun_fd_set_dma_addr(addr) | ||
69 | #define fd_set_dma_count(count) sun_fd_set_dma_count(count) | ||
70 | #define fd_enable_irq() /* nothing... */ | ||
71 | #define fd_disable_irq() /* nothing... */ | ||
72 | #define fd_cacheflush(addr, size) /* nothing... */ | ||
73 | #define fd_request_irq() sun_fd_request_irq() | ||
74 | #define fd_free_irq() /* nothing... */ | ||
75 | #if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */ | ||
76 | #define fd_dma_mem_alloc(size) ((unsigned long) vmalloc(size)) | ||
77 | #define fd_dma_mem_free(addr,size) (vfree((void *)(addr))) | ||
78 | #endif | ||
79 | |||
80 | /* XXX This isn't really correct. XXX */ | ||
81 | #define get_dma_residue(x) (0) | ||
82 | |||
83 | #define FLOPPY0_TYPE 4 | ||
84 | #define FLOPPY1_TYPE 0 | ||
85 | |||
86 | /* Super paranoid... */ | ||
87 | #undef HAVE_DISABLE_HLT | ||
88 | |||
89 | /* Here is where we catch the floppy driver trying to initialize, | ||
90 | * therefore this is where we call the PROM device tree probing | ||
91 | * routine etc. on the Sparc. | ||
92 | */ | ||
93 | #define FDC1 sun_floppy_init() | ||
94 | |||
95 | #define N_FDC 1 | ||
96 | #define N_DRIVE 8 | ||
97 | |||
98 | /* No 64k boundary crossing problems on the Sparc. */ | ||
99 | #define CROSS_64KB(a,s) (0) | ||
100 | |||
101 | /* Routines unique to each controller type on a Sun. */ | ||
102 | static void sun_set_dor(unsigned char value, int fdc_82077) | ||
103 | { | ||
104 | if (sparc_cpu_model == sun4c) { | ||
105 | unsigned int bits = 0; | ||
106 | if (value & 0x10) | ||
107 | bits |= AUXIO_FLPY_DSEL; | ||
108 | if ((value & 0x80) == 0) | ||
109 | bits |= AUXIO_FLPY_EJCT; | ||
110 | set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT)); | ||
111 | } | ||
112 | if (fdc_82077) { | ||
113 | sun_fdc->dor_82077 = value; | ||
114 | } | ||
115 | } | ||
116 | |||
117 | static unsigned char sun_read_dir(void) | ||
118 | { | ||
119 | if (sparc_cpu_model == sun4c) | ||
120 | return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0; | ||
121 | else | ||
122 | return sun_fdc->dir_82077; | ||
123 | } | ||
124 | |||
125 | static unsigned char sun_82072_fd_inb(int port) | ||
126 | { | ||
127 | udelay(5); | ||
128 | switch(port & 7) { | ||
129 | default: | ||
130 | printk("floppy: Asked to read unknown port %d\n", port); | ||
131 | panic("floppy: Port bolixed."); | ||
132 | case 4: /* FD_STATUS */ | ||
133 | return sun_fdc->status_82072 & ~STATUS_DMA; | ||
134 | case 5: /* FD_DATA */ | ||
135 | return sun_fdc->data_82072; | ||
136 | case 7: /* FD_DIR */ | ||
137 | return sun_read_dir(); | ||
138 | }; | ||
139 | panic("sun_82072_fd_inb: How did I get here?"); | ||
140 | } | ||
141 | |||
142 | static void sun_82072_fd_outb(unsigned char value, int port) | ||
143 | { | ||
144 | udelay(5); | ||
145 | switch(port & 7) { | ||
146 | default: | ||
147 | printk("floppy: Asked to write to unknown port %d\n", port); | ||
148 | panic("floppy: Port bolixed."); | ||
149 | case 2: /* FD_DOR */ | ||
150 | sun_set_dor(value, 0); | ||
151 | break; | ||
152 | case 5: /* FD_DATA */ | ||
153 | sun_fdc->data_82072 = value; | ||
154 | break; | ||
155 | case 7: /* FD_DCR */ | ||
156 | sun_fdc->dcr_82072 = value; | ||
157 | break; | ||
158 | case 4: /* FD_STATUS */ | ||
159 | sun_fdc->status_82072 = value; | ||
160 | break; | ||
161 | }; | ||
162 | return; | ||
163 | } | ||
164 | |||
165 | static unsigned char sun_82077_fd_inb(int port) | ||
166 | { | ||
167 | udelay(5); | ||
168 | switch(port & 7) { | ||
169 | default: | ||
170 | printk("floppy: Asked to read unknown port %d\n", port); | ||
171 | panic("floppy: Port bolixed."); | ||
172 | case 0: /* FD_STATUS_0 */ | ||
173 | return sun_fdc->status1_82077; | ||
174 | case 1: /* FD_STATUS_1 */ | ||
175 | return sun_fdc->status2_82077; | ||
176 | case 2: /* FD_DOR */ | ||
177 | return sun_fdc->dor_82077; | ||
178 | case 3: /* FD_TDR */ | ||
179 | return sun_fdc->tapectl_82077; | ||
180 | case 4: /* FD_STATUS */ | ||
181 | return sun_fdc->status_82077 & ~STATUS_DMA; | ||
182 | case 5: /* FD_DATA */ | ||
183 | return sun_fdc->data_82077; | ||
184 | case 7: /* FD_DIR */ | ||
185 | return sun_read_dir(); | ||
186 | }; | ||
187 | panic("sun_82077_fd_inb: How did I get here?"); | ||
188 | } | ||
189 | |||
190 | static void sun_82077_fd_outb(unsigned char value, int port) | ||
191 | { | ||
192 | udelay(5); | ||
193 | switch(port & 7) { | ||
194 | default: | ||
195 | printk("floppy: Asked to write to unknown port %d\n", port); | ||
196 | panic("floppy: Port bolixed."); | ||
197 | case 2: /* FD_DOR */ | ||
198 | sun_set_dor(value, 1); | ||
199 | break; | ||
200 | case 5: /* FD_DATA */ | ||
201 | sun_fdc->data_82077 = value; | ||
202 | break; | ||
203 | case 7: /* FD_DCR */ | ||
204 | sun_fdc->dcr_82077 = value; | ||
205 | break; | ||
206 | case 4: /* FD_STATUS */ | ||
207 | sun_fdc->status_82077 = value; | ||
208 | break; | ||
209 | case 3: /* FD_TDR */ | ||
210 | sun_fdc->tapectl_82077 = value; | ||
211 | break; | ||
212 | }; | ||
213 | return; | ||
214 | } | ||
215 | |||
216 | /* For pseudo-dma (Sun floppy drives have no real DMA available to | ||
217 | * them so we must eat the data fifo bytes directly ourselves) we have | ||
218 | * three state variables. doing_pdma tells our inline low-level | ||
219 | * assembly floppy interrupt entry point whether it should sit and eat | ||
220 | * bytes from the fifo or just transfer control up to the higher level | ||
221 | * floppy interrupt c-code. I tried very hard but I could not get the | ||
222 | * pseudo-dma to work in c-code without getting many overruns and | ||
223 | * underruns. If non-zero, doing_pdma encodes the direction of | ||
224 | * the transfer for debugging. 1=read 2=write | ||
225 | */ | ||
226 | extern char *pdma_vaddr; | ||
227 | extern unsigned long pdma_size; | ||
228 | extern volatile int doing_pdma; | ||
229 | |||
230 | /* This is software state */ | ||
231 | extern char *pdma_base; | ||
232 | extern unsigned long pdma_areasize; | ||
233 | |||
234 | /* Common routines to all controller types on the Sparc. */ | ||
235 | static inline void virtual_dma_init(void) | ||
236 | { | ||
237 | /* nothing... */ | ||
238 | } | ||
239 | |||
240 | static inline void sun_fd_disable_dma(void) | ||
241 | { | ||
242 | doing_pdma = 0; | ||
243 | if (pdma_base) { | ||
244 | mmu_unlockarea(pdma_base, pdma_areasize); | ||
245 | pdma_base = NULL; | ||
246 | } | ||
247 | } | ||
248 | |||
249 | static inline void sun_fd_set_dma_mode(int mode) | ||
250 | { | ||
251 | switch(mode) { | ||
252 | case DMA_MODE_READ: | ||
253 | doing_pdma = 1; | ||
254 | break; | ||
255 | case DMA_MODE_WRITE: | ||
256 | doing_pdma = 2; | ||
257 | break; | ||
258 | default: | ||
259 | printk("Unknown dma mode %d\n", mode); | ||
260 | panic("floppy: Giving up..."); | ||
261 | } | ||
262 | } | ||
263 | |||
264 | static inline void sun_fd_set_dma_addr(char *buffer) | ||
265 | { | ||
266 | pdma_vaddr = buffer; | ||
267 | } | ||
268 | |||
269 | static inline void sun_fd_set_dma_count(int length) | ||
270 | { | ||
271 | pdma_size = length; | ||
272 | } | ||
273 | |||
274 | static inline void sun_fd_enable_dma(void) | ||
275 | { | ||
276 | pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); | ||
277 | pdma_base = pdma_vaddr; | ||
278 | pdma_areasize = pdma_size; | ||
279 | } | ||
280 | |||
281 | /* Our low-level entry point in arch/sparc/kernel/entry.S */ | ||
282 | extern int sparc_floppy_request_irq(int irq, unsigned long flags, | ||
283 | irq_handler_t irq_handler); | ||
284 | |||
285 | static int sun_fd_request_irq(void) | ||
286 | { | ||
287 | static int once = 0; | ||
288 | int error; | ||
289 | |||
290 | if(!once) { | ||
291 | once = 1; | ||
292 | error = sparc_floppy_request_irq(FLOPPY_IRQ, | ||
293 | IRQF_DISABLED, | ||
294 | floppy_interrupt); | ||
295 | return ((error == 0) ? 0 : -1); | ||
296 | } else return 0; | ||
297 | } | ||
298 | |||
299 | static struct linux_prom_registers fd_regs[2]; | ||
300 | |||
301 | static int sun_floppy_init(void) | ||
302 | { | ||
303 | char state[128]; | ||
304 | int tnode, fd_node, num_regs; | ||
305 | struct resource r; | ||
306 | |||
307 | use_virtual_dma = 1; | ||
308 | |||
309 | FLOPPY_IRQ = 11; | ||
310 | /* Forget it if we aren't on a machine that could possibly | ||
311 | * ever have a floppy drive. | ||
312 | */ | ||
313 | if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) || | ||
314 | ((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) || | ||
315 | (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) { | ||
316 | /* We certainly don't have a floppy controller. */ | ||
317 | goto no_sun_fdc; | ||
318 | } | ||
319 | /* Well, try to find one. */ | ||
320 | tnode = prom_getchild(prom_root_node); | ||
321 | fd_node = prom_searchsiblings(tnode, "obio"); | ||
322 | if(fd_node != 0) { | ||
323 | tnode = prom_getchild(fd_node); | ||
324 | fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo"); | ||
325 | } else { | ||
326 | fd_node = prom_searchsiblings(tnode, "fd"); | ||
327 | } | ||
328 | if(fd_node == 0) { | ||
329 | goto no_sun_fdc; | ||
330 | } | ||
331 | |||
332 | /* The sun4m lets us know if the controller is actually usable. */ | ||
333 | if(sparc_cpu_model == sun4m && | ||
334 | prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) { | ||
335 | if(!strcmp(state, "disabled")) { | ||
336 | goto no_sun_fdc; | ||
337 | } | ||
338 | } | ||
339 | num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs)); | ||
340 | num_regs = (num_regs / sizeof(fd_regs[0])); | ||
341 | prom_apply_obio_ranges(fd_regs, num_regs); | ||
342 | memset(&r, 0, sizeof(r)); | ||
343 | r.flags = fd_regs[0].which_io; | ||
344 | r.start = fd_regs[0].phys_addr; | ||
345 | sun_fdc = (struct sun_flpy_controller *) | ||
346 | sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); | ||
347 | |||
348 | /* Last minute sanity check... */ | ||
349 | if(sun_fdc->status_82072 == 0xff) { | ||
350 | sun_fdc = NULL; | ||
351 | goto no_sun_fdc; | ||
352 | } | ||
353 | |||
354 | sun_fdops.fd_inb = sun_82077_fd_inb; | ||
355 | sun_fdops.fd_outb = sun_82077_fd_outb; | ||
356 | fdc_status = &sun_fdc->status_82077; | ||
357 | |||
358 | if (sun_fdc->dor_82077 == 0x80) { | ||
359 | sun_fdc->dor_82077 = 0x02; | ||
360 | if (sun_fdc->dor_82077 == 0x80) { | ||
361 | sun_fdops.fd_inb = sun_82072_fd_inb; | ||
362 | sun_fdops.fd_outb = sun_82072_fd_outb; | ||
363 | fdc_status = &sun_fdc->status_82072; | ||
364 | } | ||
365 | } | ||
366 | |||
367 | /* Success... */ | ||
368 | allowed_drive_mask = 0x01; | ||
369 | return (int) sun_fdc; | ||
370 | |||
371 | no_sun_fdc: | ||
372 | return -1; | ||
373 | } | ||
374 | |||
375 | static int sparc_eject(void) | ||
376 | { | ||
377 | set_dor(0x00, 0xff, 0x90); | ||
378 | udelay(500); | ||
379 | set_dor(0x00, 0x6f, 0x00); | ||
380 | udelay(500); | ||
381 | return 0; | ||
382 | } | ||
383 | |||
384 | #define fd_eject(drive) sparc_eject() | ||
385 | |||
386 | #define EXTRA_FLOPPY_PARAMS | ||
387 | |||
388 | #endif /* !(__ASM_SPARC_FLOPPY_H) */ | ||
diff --git a/include/asm-sparc/futex.h b/include/asm-sparc/futex.h deleted file mode 100644 index 6a332a9f099c..000000000000 --- a/include/asm-sparc/futex.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_FUTEX_H | ||
2 | #define _ASM_FUTEX_H | ||
3 | |||
4 | #include <asm-generic/futex.h> | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-sparc/hardirq.h b/include/asm-sparc/hardirq.h deleted file mode 100644 index 4f63ed8df551..000000000000 --- a/include/asm-sparc/hardirq.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* hardirq.h: 32-bit Sparc hard IRQ support. | ||
2 | * | ||
3 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) | ||
4 | * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org) | ||
5 | */ | ||
6 | |||
7 | #ifndef __SPARC_HARDIRQ_H | ||
8 | #define __SPARC_HARDIRQ_H | ||
9 | |||
10 | #include <linux/threads.h> | ||
11 | #include <linux/spinlock.h> | ||
12 | #include <linux/cache.h> | ||
13 | |||
14 | /* entry.S is sensitive to the offsets of these fields */ /* XXX P3 Is it? */ | ||
15 | typedef struct { | ||
16 | unsigned int __softirq_pending; | ||
17 | } ____cacheline_aligned irq_cpustat_t; | ||
18 | |||
19 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | ||
20 | |||
21 | #define HARDIRQ_BITS 8 | ||
22 | |||
23 | #endif /* __SPARC_HARDIRQ_H */ | ||
diff --git a/include/asm-sparc/head.h b/include/asm-sparc/head.h deleted file mode 100644 index 7c35491a8b53..000000000000 --- a/include/asm-sparc/head.h +++ /dev/null | |||
@@ -1,102 +0,0 @@ | |||
1 | #ifndef __SPARC_HEAD_H | ||
2 | #define __SPARC_HEAD_H | ||
3 | |||
4 | #define KERNBASE 0xf0000000 /* First address the kernel will eventually be */ | ||
5 | #define LOAD_ADDR 0x4000 /* prom jumps to us here unless this is elf /boot */ | ||
6 | #define SUN4C_SEGSZ (1 << 18) | ||
7 | #define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2) /* Used in boot remapping. */ | ||
8 | #define INTS_ENAB 0x01 /* entry.S uses this. */ | ||
9 | |||
10 | #define SUN4_PROM_VECTOR 0xFFE81000 /* SUN4 PROM needs to be hardwired */ | ||
11 | |||
12 | #define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */ | ||
13 | #define NOP_INSN 0x01000000 /* Used to patch sparc_save_state */ | ||
14 | |||
15 | /* Here are some trap goodies */ | ||
16 | |||
17 | /* Generic trap entry. */ | ||
18 | #define TRAP_ENTRY(type, label) \ | ||
19 | rd %psr, %l0; b label; rd %wim, %l3; nop; | ||
20 | |||
21 | /* Data/text faults. Defaults to sun4c version at boot time. */ | ||
22 | #define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7; | ||
23 | #define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7; | ||
24 | #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7; | ||
25 | #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7; | ||
26 | |||
27 | /* This is for traps we should NEVER get. */ | ||
28 | #define BAD_TRAP(num) \ | ||
29 | rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3; | ||
30 | |||
31 | /* This is for traps when we want just skip the instruction which caused it */ | ||
32 | #define SKIP_TRAP(type, name) \ | ||
33 | jmpl %l2, %g0; rett %l2 + 4; nop; nop; | ||
34 | |||
35 | /* Notice that for the system calls we pull a trick. We load up a | ||
36 | * different pointer to the system call vector table in %l7, but call | ||
37 | * the same generic system call low-level entry point. The trap table | ||
38 | * entry sequences are also HyperSparc pipeline friendly ;-) | ||
39 | */ | ||
40 | |||
41 | /* Software trap for Linux system calls. */ | ||
42 | #define LINUX_SYSCALL_TRAP \ | ||
43 | sethi %hi(sys_call_table), %l7; \ | ||
44 | or %l7, %lo(sys_call_table), %l7; \ | ||
45 | b linux_sparc_syscall; \ | ||
46 | rd %psr, %l0; | ||
47 | |||
48 | #define BREAKPOINT_TRAP \ | ||
49 | b breakpoint_trap; \ | ||
50 | rd %psr,%l0; \ | ||
51 | nop; \ | ||
52 | nop; | ||
53 | |||
54 | #ifdef CONFIG_KGDB | ||
55 | #define KGDB_TRAP(num) \ | ||
56 | b kgdb_trap_low; \ | ||
57 | rd %psr,%l0; \ | ||
58 | nop; \ | ||
59 | nop; | ||
60 | #else | ||
61 | #define KGDB_TRAP(num) \ | ||
62 | BAD_TRAP(num) | ||
63 | #endif | ||
64 | |||
65 | /* The Get Condition Codes software trap for userland. */ | ||
66 | #define GETCC_TRAP \ | ||
67 | b getcc_trap_handler; mov %psr, %l0; nop; nop; | ||
68 | |||
69 | /* The Set Condition Codes software trap for userland. */ | ||
70 | #define SETCC_TRAP \ | ||
71 | b setcc_trap_handler; mov %psr, %l0; nop; nop; | ||
72 | |||
73 | /* The Get PSR software trap for userland. */ | ||
74 | #define GETPSR_TRAP \ | ||
75 | mov %psr, %i0; jmp %l2; rett %l2 + 4; nop; | ||
76 | |||
77 | /* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and | ||
78 | * gets handled with another macro. | ||
79 | */ | ||
80 | #define TRAP_ENTRY_INTERRUPT(int_level) \ | ||
81 | mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3; | ||
82 | |||
83 | /* NMI's (Non Maskable Interrupts) are special, you can't keep them | ||
84 | * from coming in, and basically if you get one, the shows over. ;( | ||
85 | * On the sun4c they are usually asynchronous memory errors, on the | ||
86 | * the sun4m they could be either due to mem errors or a software | ||
87 | * initiated interrupt from the prom/kern on an SMP box saying "I | ||
88 | * command you to do CPU tricks, read your mailbox for more info." | ||
89 | */ | ||
90 | #define NMI_TRAP \ | ||
91 | rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop; | ||
92 | |||
93 | /* Window overflows/underflows are special and we need to try to be as | ||
94 | * efficient as possible here.... | ||
95 | */ | ||
96 | #define WINDOW_SPILL \ | ||
97 | rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0; | ||
98 | |||
99 | #define WINDOW_FILL \ | ||
100 | rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0; | ||
101 | |||
102 | #endif /* __SPARC_HEAD_H */ | ||
diff --git a/include/asm-sparc/highmem.h b/include/asm-sparc/highmem.h deleted file mode 100644 index 3de42e776274..000000000000 --- a/include/asm-sparc/highmem.h +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | /* | ||
2 | * highmem.h: virtual kernel memory mappings for high memory | ||
3 | * | ||
4 | * Used in CONFIG_HIGHMEM systems for memory pages which | ||
5 | * are not addressable by direct kernel virtual addresses. | ||
6 | * | ||
7 | * Copyright (C) 1999 Gerhard Wichert, Siemens AG | ||
8 | * Gerhard.Wichert@pdb.siemens.de | ||
9 | * | ||
10 | * | ||
11 | * Redesigned the x86 32-bit VM architecture to deal with | ||
12 | * up to 16 Terrabyte physical memory. With current x86 CPUs | ||
13 | * we now support up to 64 Gigabytes physical RAM. | ||
14 | * | ||
15 | * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com> | ||
16 | */ | ||
17 | |||
18 | #ifndef _ASM_HIGHMEM_H | ||
19 | #define _ASM_HIGHMEM_H | ||
20 | |||
21 | #ifdef __KERNEL__ | ||
22 | |||
23 | #include <linux/interrupt.h> | ||
24 | #include <asm/fixmap.h> | ||
25 | #include <asm/vaddrs.h> | ||
26 | #include <asm/kmap_types.h> | ||
27 | #include <asm/pgtable.h> | ||
28 | |||
29 | /* declarations for highmem.c */ | ||
30 | extern unsigned long highstart_pfn, highend_pfn; | ||
31 | |||
32 | extern pte_t *kmap_pte; | ||
33 | extern pgprot_t kmap_prot; | ||
34 | extern pte_t *pkmap_page_table; | ||
35 | |||
36 | extern void kmap_init(void) __init; | ||
37 | |||
38 | /* | ||
39 | * Right now we initialize only a single pte table. It can be extended | ||
40 | * easily, subsequent pte tables have to be allocated in one physical | ||
41 | * chunk of RAM. Currently the simplest way to do this is to align the | ||
42 | * pkmap region on a pagetable boundary (4MB). | ||
43 | */ | ||
44 | #define LAST_PKMAP 1024 | ||
45 | #define PKMAP_SIZE (LAST_PKMAP << PAGE_SHIFT) | ||
46 | #define PKMAP_BASE PMD_ALIGN(SRMMU_NOCACHE_VADDR + (SRMMU_MAX_NOCACHE_PAGES << PAGE_SHIFT)) | ||
47 | |||
48 | #define LAST_PKMAP_MASK (LAST_PKMAP - 1) | ||
49 | #define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT) | ||
50 | #define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) | ||
51 | |||
52 | #define PKMAP_END (PKMAP_ADDR(LAST_PKMAP)) | ||
53 | |||
54 | extern void *kmap_high(struct page *page); | ||
55 | extern void kunmap_high(struct page *page); | ||
56 | |||
57 | static inline void *kmap(struct page *page) | ||
58 | { | ||
59 | BUG_ON(in_interrupt()); | ||
60 | if (!PageHighMem(page)) | ||
61 | return page_address(page); | ||
62 | return kmap_high(page); | ||
63 | } | ||
64 | |||
65 | static inline void kunmap(struct page *page) | ||
66 | { | ||
67 | BUG_ON(in_interrupt()); | ||
68 | if (!PageHighMem(page)) | ||
69 | return; | ||
70 | kunmap_high(page); | ||
71 | } | ||
72 | |||
73 | extern void *kmap_atomic(struct page *page, enum km_type type); | ||
74 | extern void kunmap_atomic(void *kvaddr, enum km_type type); | ||
75 | extern struct page *kmap_atomic_to_page(void *vaddr); | ||
76 | |||
77 | #define flush_cache_kmaps() flush_cache_all() | ||
78 | |||
79 | #endif /* __KERNEL__ */ | ||
80 | |||
81 | #endif /* _ASM_HIGHMEM_H */ | ||
diff --git a/include/asm-sparc/hw_irq.h b/include/asm-sparc/hw_irq.h deleted file mode 100644 index 8d30a7694be2..000000000000 --- a/include/asm-sparc/hw_irq.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_SPARC_HW_IRQ_H | ||
2 | #define __ASM_SPARC_HW_IRQ_H | ||
3 | |||
4 | /* Dummy include. */ | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-sparc/ide.h b/include/asm-sparc/ide.h deleted file mode 100644 index afd1736ed480..000000000000 --- a/include/asm-sparc/ide.h +++ /dev/null | |||
@@ -1,95 +0,0 @@ | |||
1 | /* ide.h: SPARC PCI specific IDE glue. | ||
2 | * | ||
3 | * Copyright (C) 1997 David S. Miller (davem@davemloft.net) | ||
4 | * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) | ||
5 | * Adaptation from sparc64 version to sparc by Pete Zaitcev. | ||
6 | */ | ||
7 | |||
8 | #ifndef _SPARC_IDE_H | ||
9 | #define _SPARC_IDE_H | ||
10 | |||
11 | #ifdef __KERNEL__ | ||
12 | |||
13 | #include <asm/pgtable.h> | ||
14 | #include <asm/io.h> | ||
15 | #include <asm/psr.h> | ||
16 | |||
17 | #undef MAX_HWIFS | ||
18 | #define MAX_HWIFS 2 | ||
19 | |||
20 | #define __ide_insl(data_reg, buffer, wcount) \ | ||
21 | __ide_insw(data_reg, buffer, (wcount)<<1) | ||
22 | #define __ide_outsl(data_reg, buffer, wcount) \ | ||
23 | __ide_outsw(data_reg, buffer, (wcount)<<1) | ||
24 | |||
25 | /* On sparc, I/O ports and MMIO registers are accessed identically. */ | ||
26 | #define __ide_mm_insw __ide_insw | ||
27 | #define __ide_mm_insl __ide_insl | ||
28 | #define __ide_mm_outsw __ide_outsw | ||
29 | #define __ide_mm_outsl __ide_outsl | ||
30 | |||
31 | static inline void __ide_insw(unsigned long port, | ||
32 | void *dst, | ||
33 | unsigned long count) | ||
34 | { | ||
35 | volatile unsigned short *data_port; | ||
36 | /* unsigned long end = (unsigned long)dst + (count << 1); */ /* P3 */ | ||
37 | u16 *ps = dst; | ||
38 | u32 *pi; | ||
39 | |||
40 | data_port = (volatile unsigned short *)port; | ||
41 | |||
42 | if(((unsigned long)ps) & 0x2) { | ||
43 | *ps++ = *data_port; | ||
44 | count--; | ||
45 | } | ||
46 | pi = (u32 *)ps; | ||
47 | while(count >= 2) { | ||
48 | u32 w; | ||
49 | |||
50 | w = (*data_port) << 16; | ||
51 | w |= (*data_port); | ||
52 | *pi++ = w; | ||
53 | count -= 2; | ||
54 | } | ||
55 | ps = (u16 *)pi; | ||
56 | if(count) | ||
57 | *ps++ = *data_port; | ||
58 | |||
59 | /* __flush_dcache_range((unsigned long)dst, end); */ /* P3 see hme */ | ||
60 | } | ||
61 | |||
62 | static inline void __ide_outsw(unsigned long port, | ||
63 | const void *src, | ||
64 | unsigned long count) | ||
65 | { | ||
66 | volatile unsigned short *data_port; | ||
67 | /* unsigned long end = (unsigned long)src + (count << 1); */ | ||
68 | const u16 *ps = src; | ||
69 | const u32 *pi; | ||
70 | |||
71 | data_port = (volatile unsigned short *)port; | ||
72 | |||
73 | if(((unsigned long)src) & 0x2) { | ||
74 | *data_port = *ps++; | ||
75 | count--; | ||
76 | } | ||
77 | pi = (const u32 *)ps; | ||
78 | while(count >= 2) { | ||
79 | u32 w; | ||
80 | |||
81 | w = *pi++; | ||
82 | *data_port = (w >> 16); | ||
83 | *data_port = w; | ||
84 | count -= 2; | ||
85 | } | ||
86 | ps = (const u16 *)pi; | ||
87 | if(count) | ||
88 | *data_port = *ps; | ||
89 | |||
90 | /* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */ | ||
91 | } | ||
92 | |||
93 | #endif /* __KERNEL__ */ | ||
94 | |||
95 | #endif /* _SPARC_IDE_H */ | ||
diff --git a/include/asm-sparc/idprom.h b/include/asm-sparc/idprom.h deleted file mode 100644 index 41adb417a4e5..000000000000 --- a/include/asm-sparc/idprom.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * idprom.h: Macros and defines for idprom routines | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_IDPROM_H | ||
8 | #define _SPARC_IDPROM_H | ||
9 | |||
10 | #include <linux/types.h> | ||
11 | |||
12 | struct idprom { | ||
13 | u8 id_format; /* Format identifier (always 0x01) */ | ||
14 | u8 id_machtype; /* Machine type */ | ||
15 | u8 id_ethaddr[6]; /* Hardware ethernet address */ | ||
16 | s32 id_date; /* Date of manufacture */ | ||
17 | u32 id_sernum:24; /* Unique serial number */ | ||
18 | u8 id_cksum; /* Checksum - xor of the data bytes */ | ||
19 | u8 reserved[16]; | ||
20 | }; | ||
21 | |||
22 | extern struct idprom *idprom; | ||
23 | extern void idprom_init(void); | ||
24 | |||
25 | #endif /* !(_SPARC_IDPROM_H) */ | ||
diff --git a/include/asm-sparc/io-unit.h b/include/asm-sparc/io-unit.h deleted file mode 100644 index 96823b47fd45..000000000000 --- a/include/asm-sparc/io-unit.h +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | /* io-unit.h: Definitions for the sun4d IO-UNIT. | ||
2 | * | ||
3 | * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | ||
4 | */ | ||
5 | #ifndef _SPARC_IO_UNIT_H | ||
6 | #define _SPARC_IO_UNIT_H | ||
7 | |||
8 | #include <linux/spinlock.h> | ||
9 | #include <asm/page.h> | ||
10 | #include <asm/pgtable.h> | ||
11 | |||
12 | /* The io-unit handles all virtual to physical address translations | ||
13 | * that occur between the SBUS and physical memory. Access by | ||
14 | * the cpu to IO registers and similar go over the xdbus so are | ||
15 | * translated by the on chip SRMMU. The io-unit and the srmmu do | ||
16 | * not need to have the same translations at all, in fact most | ||
17 | * of the time the translations they handle are a disjunct set. | ||
18 | * Basically the io-unit handles all dvma sbus activity. | ||
19 | */ | ||
20 | |||
21 | /* AIEEE, unlike the nice sun4m, these monsters have | ||
22 | fixed DMA range 64M */ | ||
23 | |||
24 | #define IOUNIT_DMA_BASE 0xfc000000 /* TOP - 64M */ | ||
25 | #define IOUNIT_DMA_SIZE 0x04000000 /* 64M */ | ||
26 | /* We use last 1M for sparc_dvma_malloc */ | ||
27 | #define IOUNIT_DVMA_SIZE 0x00100000 /* 1M */ | ||
28 | |||
29 | /* The format of an iopte in the external page tables */ | ||
30 | #define IOUPTE_PAGE 0xffffff00 /* Physical page number (PA[35:12]) */ | ||
31 | #define IOUPTE_CACHE 0x00000080 /* Cached (in Viking/MXCC) */ | ||
32 | /* XXX Jakub, find out how to program SBUS streaming cache on XDBUS/sun4d. | ||
33 | * XXX Actually, all you should need to do is find out where the registers | ||
34 | * XXX are and copy over the sparc64 implementation I wrote. There may be | ||
35 | * XXX some horrible hwbugs though, so be careful. -DaveM | ||
36 | */ | ||
37 | #define IOUPTE_STREAM 0x00000040 /* Translation can use streaming cache */ | ||
38 | #define IOUPTE_INTRA 0x00000008 /* SBUS direct slot->slot transfer */ | ||
39 | #define IOUPTE_WRITE 0x00000004 /* Writeable */ | ||
40 | #define IOUPTE_VALID 0x00000002 /* IOPTE is valid */ | ||
41 | #define IOUPTE_PARITY 0x00000001 /* Parity is checked during DVMA */ | ||
42 | |||
43 | struct iounit_struct { | ||
44 | unsigned long bmap[(IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 3)) / sizeof(unsigned long)]; | ||
45 | spinlock_t lock; | ||
46 | iopte_t *page_table; | ||
47 | unsigned long rotor[3]; | ||
48 | unsigned long limit[4]; | ||
49 | }; | ||
50 | |||
51 | #define IOUNIT_BMAP1_START 0x00000000 | ||
52 | #define IOUNIT_BMAP1_END (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 1)) | ||
53 | #define IOUNIT_BMAP2_START IOUNIT_BMAP1_END | ||
54 | #define IOUNIT_BMAP2_END IOUNIT_BMAP2_START + (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 2)) | ||
55 | #define IOUNIT_BMAPM_START IOUNIT_BMAP2_END | ||
56 | #define IOUNIT_BMAPM_END ((IOUNIT_DMA_SIZE - IOUNIT_DVMA_SIZE) >> PAGE_SHIFT) | ||
57 | |||
58 | extern __u32 iounit_map_dma_init(struct sbus_bus *, int); | ||
59 | #define iounit_map_dma_finish(sbus, addr, len) mmu_release_scsi_one(addr, len, sbus) | ||
60 | extern __u32 iounit_map_dma_page(__u32, void *, struct sbus_bus *); | ||
61 | |||
62 | #endif /* !(_SPARC_IO_UNIT_H) */ | ||
diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h deleted file mode 100644 index 3a3e7bdb06b3..000000000000 --- a/include/asm-sparc/io.h +++ /dev/null | |||
@@ -1,325 +0,0 @@ | |||
1 | #ifndef __SPARC_IO_H | ||
2 | #define __SPARC_IO_H | ||
3 | |||
4 | #include <linux/kernel.h> | ||
5 | #include <linux/types.h> | ||
6 | #include <linux/ioport.h> /* struct resource */ | ||
7 | |||
8 | #include <asm/page.h> /* IO address mapping routines need this */ | ||
9 | #include <asm/system.h> | ||
10 | |||
11 | #define page_to_phys(page) (((page) - mem_map) << PAGE_SHIFT) | ||
12 | |||
13 | static inline u32 flip_dword (u32 l) | ||
14 | { | ||
15 | return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff); | ||
16 | } | ||
17 | |||
18 | static inline u16 flip_word (u16 w) | ||
19 | { | ||
20 | return ((w&0xff) << 8) | ((w>>8)&0xff); | ||
21 | } | ||
22 | |||
23 | #define mmiowb() | ||
24 | |||
25 | /* | ||
26 | * Memory mapped I/O to PCI | ||
27 | */ | ||
28 | |||
29 | static inline u8 __raw_readb(const volatile void __iomem *addr) | ||
30 | { | ||
31 | return *(__force volatile u8 *)addr; | ||
32 | } | ||
33 | |||
34 | static inline u16 __raw_readw(const volatile void __iomem *addr) | ||
35 | { | ||
36 | return *(__force volatile u16 *)addr; | ||
37 | } | ||
38 | |||
39 | static inline u32 __raw_readl(const volatile void __iomem *addr) | ||
40 | { | ||
41 | return *(__force volatile u32 *)addr; | ||
42 | } | ||
43 | |||
44 | static inline void __raw_writeb(u8 b, volatile void __iomem *addr) | ||
45 | { | ||
46 | *(__force volatile u8 *)addr = b; | ||
47 | } | ||
48 | |||
49 | static inline void __raw_writew(u16 w, volatile void __iomem *addr) | ||
50 | { | ||
51 | *(__force volatile u16 *)addr = w; | ||
52 | } | ||
53 | |||
54 | static inline void __raw_writel(u32 l, volatile void __iomem *addr) | ||
55 | { | ||
56 | *(__force volatile u32 *)addr = l; | ||
57 | } | ||
58 | |||
59 | static inline u8 __readb(const volatile void __iomem *addr) | ||
60 | { | ||
61 | return *(__force volatile u8 *)addr; | ||
62 | } | ||
63 | |||
64 | static inline u16 __readw(const volatile void __iomem *addr) | ||
65 | { | ||
66 | return flip_word(*(__force volatile u16 *)addr); | ||
67 | } | ||
68 | |||
69 | static inline u32 __readl(const volatile void __iomem *addr) | ||
70 | { | ||
71 | return flip_dword(*(__force volatile u32 *)addr); | ||
72 | } | ||
73 | |||
74 | static inline void __writeb(u8 b, volatile void __iomem *addr) | ||
75 | { | ||
76 | *(__force volatile u8 *)addr = b; | ||
77 | } | ||
78 | |||
79 | static inline void __writew(u16 w, volatile void __iomem *addr) | ||
80 | { | ||
81 | *(__force volatile u16 *)addr = flip_word(w); | ||
82 | } | ||
83 | |||
84 | static inline void __writel(u32 l, volatile void __iomem *addr) | ||
85 | { | ||
86 | *(__force volatile u32 *)addr = flip_dword(l); | ||
87 | } | ||
88 | |||
89 | #define readb(__addr) __readb(__addr) | ||
90 | #define readw(__addr) __readw(__addr) | ||
91 | #define readl(__addr) __readl(__addr) | ||
92 | #define readb_relaxed(__addr) readb(__addr) | ||
93 | #define readw_relaxed(__addr) readw(__addr) | ||
94 | #define readl_relaxed(__addr) readl(__addr) | ||
95 | |||
96 | #define writeb(__b, __addr) __writeb((__b),(__addr)) | ||
97 | #define writew(__w, __addr) __writew((__w),(__addr)) | ||
98 | #define writel(__l, __addr) __writel((__l),(__addr)) | ||
99 | |||
100 | /* | ||
101 | * I/O space operations | ||
102 | * | ||
103 | * Arrangement on a Sun is somewhat complicated. | ||
104 | * | ||
105 | * First of all, we want to use standard Linux drivers | ||
106 | * for keyboard, PC serial, etc. These drivers think | ||
107 | * they access I/O space and use inb/outb. | ||
108 | * On the other hand, EBus bridge accepts PCI *memory* | ||
109 | * cycles and converts them into ISA *I/O* cycles. | ||
110 | * Ergo, we want inb & outb to generate PCI memory cycles. | ||
111 | * | ||
112 | * If we want to issue PCI *I/O* cycles, we do this | ||
113 | * with a low 64K fixed window in PCIC. This window gets | ||
114 | * mapped somewhere into virtual kernel space and we | ||
115 | * can use inb/outb again. | ||
116 | */ | ||
117 | #define inb_local(__addr) __readb((void __iomem *)(unsigned long)(__addr)) | ||
118 | #define inb(__addr) __readb((void __iomem *)(unsigned long)(__addr)) | ||
119 | #define inw(__addr) __readw((void __iomem *)(unsigned long)(__addr)) | ||
120 | #define inl(__addr) __readl((void __iomem *)(unsigned long)(__addr)) | ||
121 | |||
122 | #define outb_local(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) | ||
123 | #define outb(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) | ||
124 | #define outw(__w, __addr) __writew(__w, (void __iomem *)(unsigned long)(__addr)) | ||
125 | #define outl(__l, __addr) __writel(__l, (void __iomem *)(unsigned long)(__addr)) | ||
126 | |||
127 | #define inb_p(__addr) inb(__addr) | ||
128 | #define outb_p(__b, __addr) outb(__b, __addr) | ||
129 | #define inw_p(__addr) inw(__addr) | ||
130 | #define outw_p(__w, __addr) outw(__w, __addr) | ||
131 | #define inl_p(__addr) inl(__addr) | ||
132 | #define outl_p(__l, __addr) outl(__l, __addr) | ||
133 | |||
134 | void outsb(unsigned long addr, const void *src, unsigned long cnt); | ||
135 | void outsw(unsigned long addr, const void *src, unsigned long cnt); | ||
136 | void outsl(unsigned long addr, const void *src, unsigned long cnt); | ||
137 | void insb(unsigned long addr, void *dst, unsigned long count); | ||
138 | void insw(unsigned long addr, void *dst, unsigned long count); | ||
139 | void insl(unsigned long addr, void *dst, unsigned long count); | ||
140 | |||
141 | #define IO_SPACE_LIMIT 0xffffffff | ||
142 | |||
143 | /* | ||
144 | * SBus accessors. | ||
145 | * | ||
146 | * SBus has only one, memory mapped, I/O space. | ||
147 | * We do not need to flip bytes for SBus of course. | ||
148 | */ | ||
149 | static inline u8 _sbus_readb(const volatile void __iomem *addr) | ||
150 | { | ||
151 | return *(__force volatile u8 *)addr; | ||
152 | } | ||
153 | |||
154 | static inline u16 _sbus_readw(const volatile void __iomem *addr) | ||
155 | { | ||
156 | return *(__force volatile u16 *)addr; | ||
157 | } | ||
158 | |||
159 | static inline u32 _sbus_readl(const volatile void __iomem *addr) | ||
160 | { | ||
161 | return *(__force volatile u32 *)addr; | ||
162 | } | ||
163 | |||
164 | static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) | ||
165 | { | ||
166 | *(__force volatile u8 *)addr = b; | ||
167 | } | ||
168 | |||
169 | static inline void _sbus_writew(u16 w, volatile void __iomem *addr) | ||
170 | { | ||
171 | *(__force volatile u16 *)addr = w; | ||
172 | } | ||
173 | |||
174 | static inline void _sbus_writel(u32 l, volatile void __iomem *addr) | ||
175 | { | ||
176 | *(__force volatile u32 *)addr = l; | ||
177 | } | ||
178 | |||
179 | /* | ||
180 | * The only reason for #define's is to hide casts to unsigned long. | ||
181 | */ | ||
182 | #define sbus_readb(__addr) _sbus_readb(__addr) | ||
183 | #define sbus_readw(__addr) _sbus_readw(__addr) | ||
184 | #define sbus_readl(__addr) _sbus_readl(__addr) | ||
185 | #define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) | ||
186 | #define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) | ||
187 | #define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) | ||
188 | |||
189 | static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n) | ||
190 | { | ||
191 | while(n--) { | ||
192 | sbus_writeb(c, __dst); | ||
193 | __dst++; | ||
194 | } | ||
195 | } | ||
196 | |||
197 | static inline void | ||
198 | _memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) | ||
199 | { | ||
200 | volatile void __iomem *d = dst; | ||
201 | |||
202 | while (n--) { | ||
203 | writeb(c, d); | ||
204 | d++; | ||
205 | } | ||
206 | } | ||
207 | |||
208 | #define memset_io(d,c,sz) _memset_io(d,c,sz) | ||
209 | |||
210 | static inline void | ||
211 | _memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) | ||
212 | { | ||
213 | char *d = dst; | ||
214 | |||
215 | while (n--) { | ||
216 | char tmp = readb(src); | ||
217 | *d++ = tmp; | ||
218 | src++; | ||
219 | } | ||
220 | } | ||
221 | |||
222 | #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) | ||
223 | |||
224 | static inline void | ||
225 | _memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) | ||
226 | { | ||
227 | const char *s = src; | ||
228 | volatile void __iomem *d = dst; | ||
229 | |||
230 | while (n--) { | ||
231 | char tmp = *s++; | ||
232 | writeb(tmp, d); | ||
233 | d++; | ||
234 | } | ||
235 | } | ||
236 | |||
237 | #define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) | ||
238 | |||
239 | #ifdef __KERNEL__ | ||
240 | |||
241 | /* | ||
242 | * Bus number may be embedded in the higher bits of the physical address. | ||
243 | * This is why we have no bus number argument to ioremap(). | ||
244 | */ | ||
245 | extern void __iomem *ioremap(unsigned long offset, unsigned long size); | ||
246 | #define ioremap_nocache(X,Y) ioremap((X),(Y)) | ||
247 | extern void iounmap(volatile void __iomem *addr); | ||
248 | |||
249 | #define ioread8(X) readb(X) | ||
250 | #define ioread16(X) readw(X) | ||
251 | #define ioread32(X) readl(X) | ||
252 | #define iowrite8(val,X) writeb(val,X) | ||
253 | #define iowrite16(val,X) writew(val,X) | ||
254 | #define iowrite32(val,X) writel(val,X) | ||
255 | |||
256 | static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count) | ||
257 | { | ||
258 | insb((unsigned long __force)port, buf, count); | ||
259 | } | ||
260 | static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count) | ||
261 | { | ||
262 | insw((unsigned long __force)port, buf, count); | ||
263 | } | ||
264 | |||
265 | static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count) | ||
266 | { | ||
267 | insl((unsigned long __force)port, buf, count); | ||
268 | } | ||
269 | |||
270 | static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count) | ||
271 | { | ||
272 | outsb((unsigned long __force)port, buf, count); | ||
273 | } | ||
274 | |||
275 | static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count) | ||
276 | { | ||
277 | outsw((unsigned long __force)port, buf, count); | ||
278 | } | ||
279 | |||
280 | static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count) | ||
281 | { | ||
282 | outsl((unsigned long __force)port, buf, count); | ||
283 | } | ||
284 | |||
285 | /* Create a virtual mapping cookie for an IO port range */ | ||
286 | extern void __iomem *ioport_map(unsigned long port, unsigned int nr); | ||
287 | extern void ioport_unmap(void __iomem *); | ||
288 | |||
289 | /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ | ||
290 | struct pci_dev; | ||
291 | extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); | ||
292 | extern void pci_iounmap(struct pci_dev *dev, void __iomem *); | ||
293 | |||
294 | /* | ||
295 | * Bus number may be in res->flags... somewhere. | ||
296 | */ | ||
297 | extern void __iomem *sbus_ioremap(struct resource *res, unsigned long offset, | ||
298 | unsigned long size, char *name); | ||
299 | extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size); | ||
300 | |||
301 | |||
302 | /* | ||
303 | * At the moment, we do not use CMOS_READ anywhere outside of rtc.c, | ||
304 | * so rtc_port is static in it. This should not change unless a new | ||
305 | * hardware pops up. | ||
306 | */ | ||
307 | #define RTC_PORT(x) (rtc_port + (x)) | ||
308 | #define RTC_ALWAYS_BCD 0 | ||
309 | |||
310 | #endif | ||
311 | |||
312 | #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1 | ||
313 | |||
314 | /* | ||
315 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | ||
316 | * access | ||
317 | */ | ||
318 | #define xlate_dev_mem_ptr(p) __va(p) | ||
319 | |||
320 | /* | ||
321 | * Convert a virtual cached pointer to an uncached pointer | ||
322 | */ | ||
323 | #define xlate_dev_kmem_ptr(p) p | ||
324 | |||
325 | #endif /* !(__SPARC_IO_H) */ | ||
diff --git a/include/asm-sparc/ioctl.h b/include/asm-sparc/ioctl.h deleted file mode 100644 index 7d6bd51321b9..000000000000 --- a/include/asm-sparc/ioctl.h +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | #ifndef _SPARC_IOCTL_H | ||
2 | #define _SPARC_IOCTL_H | ||
3 | |||
4 | /* | ||
5 | * Our DIR and SIZE overlap in order to simulteneously provide | ||
6 | * a non-zero _IOC_NONE (for binary compatibility) and | ||
7 | * 14 bits of size as on i386. Here's the layout: | ||
8 | * | ||
9 | * 0xE0000000 DIR | ||
10 | * 0x80000000 DIR = WRITE | ||
11 | * 0x40000000 DIR = READ | ||
12 | * 0x20000000 DIR = NONE | ||
13 | * 0x3FFF0000 SIZE (overlaps NONE bit) | ||
14 | * 0x0000FF00 TYPE | ||
15 | * 0x000000FF NR (CMD) | ||
16 | */ | ||
17 | |||
18 | #define _IOC_NRBITS 8 | ||
19 | #define _IOC_TYPEBITS 8 | ||
20 | #define _IOC_SIZEBITS 13 /* Actually 14, see below. */ | ||
21 | #define _IOC_DIRBITS 3 | ||
22 | |||
23 | #define _IOC_NRMASK ((1 << _IOC_NRBITS)-1) | ||
24 | #define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1) | ||
25 | #define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1) | ||
26 | #define _IOC_XSIZEMASK ((1 << (_IOC_SIZEBITS+1))-1) | ||
27 | #define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1) | ||
28 | |||
29 | #define _IOC_NRSHIFT 0 | ||
30 | #define _IOC_TYPESHIFT (_IOC_NRSHIFT + _IOC_NRBITS) | ||
31 | #define _IOC_SIZESHIFT (_IOC_TYPESHIFT + _IOC_TYPEBITS) | ||
32 | #define _IOC_DIRSHIFT (_IOC_SIZESHIFT + _IOC_SIZEBITS) | ||
33 | |||
34 | #define _IOC_NONE 1U | ||
35 | #define _IOC_READ 2U | ||
36 | #define _IOC_WRITE 4U | ||
37 | |||
38 | #define _IOC(dir,type,nr,size) \ | ||
39 | (((dir) << _IOC_DIRSHIFT) | \ | ||
40 | ((type) << _IOC_TYPESHIFT) | \ | ||
41 | ((nr) << _IOC_NRSHIFT) | \ | ||
42 | ((size) << _IOC_SIZESHIFT)) | ||
43 | |||
44 | #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) | ||
45 | #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) | ||
46 | #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) | ||
47 | #define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) | ||
48 | |||
49 | /* Used to decode ioctl numbers in drivers despite the leading underscore... */ | ||
50 | #define _IOC_DIR(nr) \ | ||
51 | ( (((((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) & (_IOC_WRITE|_IOC_READ)) != 0)? \ | ||
52 | (((nr) >> _IOC_DIRSHIFT) & (_IOC_WRITE|_IOC_READ)): \ | ||
53 | (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) ) | ||
54 | #define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) | ||
55 | #define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) | ||
56 | #define _IOC_SIZE(nr) \ | ||
57 | ((((((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) & (_IOC_WRITE|_IOC_READ)) == 0)? \ | ||
58 | 0: (((nr) >> _IOC_SIZESHIFT) & _IOC_XSIZEMASK)) | ||
59 | |||
60 | /* ...and for the PCMCIA and sound. */ | ||
61 | #define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT) | ||
62 | #define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT) | ||
63 | #define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT) | ||
64 | #define IOCSIZE_MASK (_IOC_XSIZEMASK << _IOC_SIZESHIFT) | ||
65 | #define IOCSIZE_SHIFT (_IOC_SIZESHIFT) | ||
66 | |||
67 | #endif /* !(_SPARC_IOCTL_H) */ | ||
diff --git a/include/asm-sparc/ioctls.h b/include/asm-sparc/ioctls.h deleted file mode 100644 index 3f4d0087b6a3..000000000000 --- a/include/asm-sparc/ioctls.h +++ /dev/null | |||
@@ -1,136 +0,0 @@ | |||
1 | #ifndef _ASM_SPARC_IOCTLS_H | ||
2 | #define _ASM_SPARC_IOCTLS_H | ||
3 | |||
4 | #include <asm/ioctl.h> | ||
5 | |||
6 | /* Big T */ | ||
7 | #define TCGETA _IOR('T', 1, struct termio) | ||
8 | #define TCSETA _IOW('T', 2, struct termio) | ||
9 | #define TCSETAW _IOW('T', 3, struct termio) | ||
10 | #define TCSETAF _IOW('T', 4, struct termio) | ||
11 | #define TCSBRK _IO('T', 5) | ||
12 | #define TCXONC _IO('T', 6) | ||
13 | #define TCFLSH _IO('T', 7) | ||
14 | #define TCGETS _IOR('T', 8, struct termios) | ||
15 | #define TCSETS _IOW('T', 9, struct termios) | ||
16 | #define TCSETSW _IOW('T', 10, struct termios) | ||
17 | #define TCSETSF _IOW('T', 11, struct termios) | ||
18 | #define TCGETS2 _IOR('T', 12, struct termios2) | ||
19 | #define TCSETS2 _IOW('T', 13, struct termios2) | ||
20 | #define TCSETSW2 _IOW('T', 14, struct termios2) | ||
21 | #define TCSETSF2 _IOW('T', 15, struct termios2) | ||
22 | |||
23 | /* Note that all the ioctls that are not available in Linux have a | ||
24 | * double underscore on the front to: a) avoid some programs to | ||
25 | * thing we support some ioctls under Linux (autoconfiguration stuff) | ||
26 | */ | ||
27 | /* Little t */ | ||
28 | #define TIOCGETD _IOR('t', 0, int) | ||
29 | #define TIOCSETD _IOW('t', 1, int) | ||
30 | #define __TIOCHPCL _IO('t', 2) /* SunOS Specific */ | ||
31 | #define __TIOCMODG _IOR('t', 3, int) /* SunOS Specific */ | ||
32 | #define __TIOCMODS _IOW('t', 4, int) /* SunOS Specific */ | ||
33 | #define __TIOCGETP _IOR('t', 8, struct sgttyb) /* SunOS Specific */ | ||
34 | #define __TIOCSETP _IOW('t', 9, struct sgttyb) /* SunOS Specific */ | ||
35 | #define __TIOCSETN _IOW('t', 10, struct sgttyb) /* SunOS Specific */ | ||
36 | #define TIOCEXCL _IO('t', 13) | ||
37 | #define TIOCNXCL _IO('t', 14) | ||
38 | #define __TIOCFLUSH _IOW('t', 16, int) /* SunOS Specific */ | ||
39 | #define __TIOCSETC _IOW('t', 17, struct tchars) /* SunOS Specific */ | ||
40 | #define __TIOCGETC _IOR('t', 18, struct tchars) /* SunOS Specific */ | ||
41 | #define __TIOCTCNTL _IOW('t', 32, int) /* SunOS Specific */ | ||
42 | #define __TIOCSIGNAL _IOW('t', 33, int) /* SunOS Specific */ | ||
43 | #define __TIOCSETX _IOW('t', 34, int) /* SunOS Specific */ | ||
44 | #define __TIOCGETX _IOR('t', 35, int) /* SunOS Specific */ | ||
45 | #define TIOCCONS _IO('t', 36) | ||
46 | #define TIOCGSOFTCAR _IOR('t', 100, int) | ||
47 | #define TIOCSSOFTCAR _IOW('t', 101, int) | ||
48 | #define __TIOCUCNTL _IOW('t', 102, int) /* SunOS Specific */ | ||
49 | #define TIOCSWINSZ _IOW('t', 103, struct winsize) | ||
50 | #define TIOCGWINSZ _IOR('t', 104, struct winsize) | ||
51 | #define __TIOCREMOTE _IOW('t', 105, int) /* SunOS Specific */ | ||
52 | #define TIOCMGET _IOR('t', 106, int) | ||
53 | #define TIOCMBIC _IOW('t', 107, int) | ||
54 | #define TIOCMBIS _IOW('t', 108, int) | ||
55 | #define TIOCMSET _IOW('t', 109, int) | ||
56 | #define TIOCSTART _IO('t', 110) | ||
57 | #define TIOCSTOP _IO('t', 111) | ||
58 | #define TIOCPKT _IOW('t', 112, int) | ||
59 | #define TIOCNOTTY _IO('t', 113) | ||
60 | #define TIOCSTI _IOW('t', 114, char) | ||
61 | #define TIOCOUTQ _IOR('t', 115, int) | ||
62 | #define __TIOCGLTC _IOR('t', 116, struct ltchars) /* SunOS Specific */ | ||
63 | #define __TIOCSLTC _IOW('t', 117, struct ltchars) /* SunOS Specific */ | ||
64 | /* 118 is the non-posix setpgrp tty ioctl */ | ||
65 | /* 119 is the non-posix getpgrp tty ioctl */ | ||
66 | #define __TIOCCDTR _IO('t', 120) /* SunOS Specific */ | ||
67 | #define __TIOCSDTR _IO('t', 121) /* SunOS Specific */ | ||
68 | #define TIOCCBRK _IO('t', 122) | ||
69 | #define TIOCSBRK _IO('t', 123) | ||
70 | #define __TIOCLGET _IOW('t', 124, int) /* SunOS Specific */ | ||
71 | #define __TIOCLSET _IOW('t', 125, int) /* SunOS Specific */ | ||
72 | #define __TIOCLBIC _IOW('t', 126, int) /* SunOS Specific */ | ||
73 | #define __TIOCLBIS _IOW('t', 127, int) /* SunOS Specific */ | ||
74 | #define __TIOCISPACE _IOR('t', 128, int) /* SunOS Specific */ | ||
75 | #define __TIOCISIZE _IOR('t', 129, int) /* SunOS Specific */ | ||
76 | #define TIOCSPGRP _IOW('t', 130, int) | ||
77 | #define TIOCGPGRP _IOR('t', 131, int) | ||
78 | #define TIOCSCTTY _IO('t', 132) | ||
79 | #define TIOCGSID _IOR('t', 133, int) | ||
80 | /* Get minor device of a pty master's FD -- Solaris equiv is ISPTM */ | ||
81 | #define TIOCGPTN _IOR('t', 134, unsigned int) /* Get Pty Number */ | ||
82 | #define TIOCSPTLCK _IOW('t', 135, int) /* Lock/unlock PTY */ | ||
83 | |||
84 | /* Little f */ | ||
85 | #define FIOCLEX _IO('f', 1) | ||
86 | #define FIONCLEX _IO('f', 2) | ||
87 | #define FIOASYNC _IOW('f', 125, int) | ||
88 | #define FIONBIO _IOW('f', 126, int) | ||
89 | #define FIONREAD _IOR('f', 127, int) | ||
90 | #define TIOCINQ FIONREAD | ||
91 | #define FIOQSIZE _IOR('f', 128, loff_t) | ||
92 | |||
93 | /* SCARY Rutgers local SunOS kernel hackery, perhaps I will support it | ||
94 | * someday. This is completely bogus, I know... | ||
95 | */ | ||
96 | #define __TCGETSTAT _IO('T', 200) /* Rutgers specific */ | ||
97 | #define __TCSETSTAT _IO('T', 201) /* Rutgers specific */ | ||
98 | |||
99 | /* Linux specific, no SunOS equivalent. */ | ||
100 | #define TIOCLINUX 0x541C | ||
101 | #define TIOCGSERIAL 0x541E | ||
102 | #define TIOCSSERIAL 0x541F | ||
103 | #define TCSBRKP 0x5425 | ||
104 | #define TIOCSERCONFIG 0x5453 | ||
105 | #define TIOCSERGWILD 0x5454 | ||
106 | #define TIOCSERSWILD 0x5455 | ||
107 | #define TIOCGLCKTRMIOS 0x5456 | ||
108 | #define TIOCSLCKTRMIOS 0x5457 | ||
109 | #define TIOCSERGSTRUCT 0x5458 /* For debugging only */ | ||
110 | #define TIOCSERGETLSR 0x5459 /* Get line status register */ | ||
111 | #define TIOCSERGETMULTI 0x545A /* Get multiport config */ | ||
112 | #define TIOCSERSETMULTI 0x545B /* Set multiport config */ | ||
113 | #define TIOCMIWAIT 0x545C /* Wait input */ | ||
114 | #define TIOCGICOUNT 0x545D /* Read serial port inline interrupt counts */ | ||
115 | |||
116 | /* Kernel definitions */ | ||
117 | #ifdef __KERNEL__ | ||
118 | #define TIOCGETC __TIOCGETC | ||
119 | #define TIOCGETP __TIOCGETP | ||
120 | #define TIOCGLTC __TIOCGLTC | ||
121 | #define TIOCSLTC __TIOCSLTC | ||
122 | #define TIOCSETP __TIOCSETP | ||
123 | #define TIOCSETN __TIOCSETN | ||
124 | #define TIOCSETC __TIOCSETC | ||
125 | #endif | ||
126 | |||
127 | /* Used for packet mode */ | ||
128 | #define TIOCPKT_DATA 0 | ||
129 | #define TIOCPKT_FLUSHREAD 1 | ||
130 | #define TIOCPKT_FLUSHWRITE 2 | ||
131 | #define TIOCPKT_STOP 4 | ||
132 | #define TIOCPKT_START 8 | ||
133 | #define TIOCPKT_NOSTOP 16 | ||
134 | #define TIOCPKT_DOSTOP 32 | ||
135 | |||
136 | #endif /* !(_ASM_SPARC_IOCTLS_H) */ | ||
diff --git a/include/asm-sparc/iommu.h b/include/asm-sparc/iommu.h deleted file mode 100644 index 70c589c05a10..000000000000 --- a/include/asm-sparc/iommu.h +++ /dev/null | |||
@@ -1,121 +0,0 @@ | |||
1 | /* iommu.h: Definitions for the sun4m IOMMU. | ||
2 | * | ||
3 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | ||
4 | */ | ||
5 | #ifndef _SPARC_IOMMU_H | ||
6 | #define _SPARC_IOMMU_H | ||
7 | |||
8 | #include <asm/page.h> | ||
9 | #include <asm/bitext.h> | ||
10 | |||
11 | /* The iommu handles all virtual to physical address translations | ||
12 | * that occur between the SBUS and physical memory. Access by | ||
13 | * the cpu to IO registers and similar go over the mbus so are | ||
14 | * translated by the on chip SRMMU. The iommu and the srmmu do | ||
15 | * not need to have the same translations at all, in fact most | ||
16 | * of the time the translations they handle are a disjunct set. | ||
17 | * Basically the iommu handles all dvma sbus activity. | ||
18 | */ | ||
19 | |||
20 | /* The IOMMU registers occupy three pages in IO space. */ | ||
21 | struct iommu_regs { | ||
22 | /* First page */ | ||
23 | volatile unsigned long control; /* IOMMU control */ | ||
24 | volatile unsigned long base; /* Physical base of iopte page table */ | ||
25 | volatile unsigned long _unused1[3]; | ||
26 | volatile unsigned long tlbflush; /* write only */ | ||
27 | volatile unsigned long pageflush; /* write only */ | ||
28 | volatile unsigned long _unused2[1017]; | ||
29 | /* Second page */ | ||
30 | volatile unsigned long afsr; /* Async-fault status register */ | ||
31 | volatile unsigned long afar; /* Async-fault physical address */ | ||
32 | volatile unsigned long _unused3[2]; | ||
33 | volatile unsigned long sbuscfg0; /* SBUS configuration registers, per-slot */ | ||
34 | volatile unsigned long sbuscfg1; | ||
35 | volatile unsigned long sbuscfg2; | ||
36 | volatile unsigned long sbuscfg3; | ||
37 | volatile unsigned long mfsr; /* Memory-fault status register */ | ||
38 | volatile unsigned long mfar; /* Memory-fault physical address */ | ||
39 | volatile unsigned long _unused4[1014]; | ||
40 | /* Third page */ | ||
41 | volatile unsigned long mid; /* IOMMU module-id */ | ||
42 | }; | ||
43 | |||
44 | #define IOMMU_CTRL_IMPL 0xf0000000 /* Implementation */ | ||
45 | #define IOMMU_CTRL_VERS 0x0f000000 /* Version */ | ||
46 | #define IOMMU_CTRL_RNGE 0x0000001c /* Mapping RANGE */ | ||
47 | #define IOMMU_RNGE_16MB 0x00000000 /* 0xff000000 -> 0xffffffff */ | ||
48 | #define IOMMU_RNGE_32MB 0x00000004 /* 0xfe000000 -> 0xffffffff */ | ||
49 | #define IOMMU_RNGE_64MB 0x00000008 /* 0xfc000000 -> 0xffffffff */ | ||
50 | #define IOMMU_RNGE_128MB 0x0000000c /* 0xf8000000 -> 0xffffffff */ | ||
51 | #define IOMMU_RNGE_256MB 0x00000010 /* 0xf0000000 -> 0xffffffff */ | ||
52 | #define IOMMU_RNGE_512MB 0x00000014 /* 0xe0000000 -> 0xffffffff */ | ||
53 | #define IOMMU_RNGE_1GB 0x00000018 /* 0xc0000000 -> 0xffffffff */ | ||
54 | #define IOMMU_RNGE_2GB 0x0000001c /* 0x80000000 -> 0xffffffff */ | ||
55 | #define IOMMU_CTRL_ENAB 0x00000001 /* IOMMU Enable */ | ||
56 | |||
57 | #define IOMMU_AFSR_ERR 0x80000000 /* LE, TO, or BE asserted */ | ||
58 | #define IOMMU_AFSR_LE 0x40000000 /* SBUS reports error after transaction */ | ||
59 | #define IOMMU_AFSR_TO 0x20000000 /* Write access took more than 12.8 us. */ | ||
60 | #define IOMMU_AFSR_BE 0x10000000 /* Write access received error acknowledge */ | ||
61 | #define IOMMU_AFSR_SIZE 0x0e000000 /* Size of transaction causing error */ | ||
62 | #define IOMMU_AFSR_S 0x01000000 /* Sparc was in supervisor mode */ | ||
63 | #define IOMMU_AFSR_RESV 0x00f00000 /* Reserver, forced to 0x8 by hardware */ | ||
64 | #define IOMMU_AFSR_ME 0x00080000 /* Multiple errors occurred */ | ||
65 | #define IOMMU_AFSR_RD 0x00040000 /* A read operation was in progress */ | ||
66 | #define IOMMU_AFSR_FAV 0x00020000 /* IOMMU afar has valid contents */ | ||
67 | |||
68 | #define IOMMU_SBCFG_SAB30 0x00010000 /* Phys-address bit 30 when bypass enabled */ | ||
69 | #define IOMMU_SBCFG_BA16 0x00000004 /* Slave supports 16 byte bursts */ | ||
70 | #define IOMMU_SBCFG_BA8 0x00000002 /* Slave supports 8 byte bursts */ | ||
71 | #define IOMMU_SBCFG_BYPASS 0x00000001 /* Bypass IOMMU, treat all addresses | ||
72 | produced by this device as pure | ||
73 | physical. */ | ||
74 | |||
75 | #define IOMMU_MFSR_ERR 0x80000000 /* One or more of PERR1 or PERR0 */ | ||
76 | #define IOMMU_MFSR_S 0x01000000 /* Sparc was in supervisor mode */ | ||
77 | #define IOMMU_MFSR_CPU 0x00800000 /* CPU transaction caused parity error */ | ||
78 | #define IOMMU_MFSR_ME 0x00080000 /* Multiple parity errors occurred */ | ||
79 | #define IOMMU_MFSR_PERR 0x00006000 /* high bit indicates parity error occurred | ||
80 | on the even word of the access, low bit | ||
81 | indicated odd word caused the parity error */ | ||
82 | #define IOMMU_MFSR_BM 0x00001000 /* Error occurred while in boot mode */ | ||
83 | #define IOMMU_MFSR_C 0x00000800 /* Address causing error was marked cacheable */ | ||
84 | #define IOMMU_MFSR_RTYP 0x000000f0 /* Memory request transaction type */ | ||
85 | |||
86 | #define IOMMU_MID_SBAE 0x001f0000 /* SBus arbitration enable */ | ||
87 | #define IOMMU_MID_SE 0x00100000 /* Enables SCSI/ETHERNET arbitration */ | ||
88 | #define IOMMU_MID_SB3 0x00080000 /* Enable SBUS device 3 arbitration */ | ||
89 | #define IOMMU_MID_SB2 0x00040000 /* Enable SBUS device 2 arbitration */ | ||
90 | #define IOMMU_MID_SB1 0x00020000 /* Enable SBUS device 1 arbitration */ | ||
91 | #define IOMMU_MID_SB0 0x00010000 /* Enable SBUS device 0 arbitration */ | ||
92 | #define IOMMU_MID_MID 0x0000000f /* Module-id, hardcoded to 0x8 */ | ||
93 | |||
94 | /* The format of an iopte in the page tables */ | ||
95 | #define IOPTE_PAGE 0x07ffff00 /* Physical page number (PA[30:12]) */ | ||
96 | #define IOPTE_CACHE 0x00000080 /* Cached (in vme IOCACHE or Viking/MXCC) */ | ||
97 | #define IOPTE_WRITE 0x00000004 /* Writeable */ | ||
98 | #define IOPTE_VALID 0x00000002 /* IOPTE is valid */ | ||
99 | #define IOPTE_WAZ 0x00000001 /* Write as zeros */ | ||
100 | |||
101 | struct iommu_struct { | ||
102 | struct iommu_regs *regs; | ||
103 | iopte_t *page_table; | ||
104 | /* For convenience */ | ||
105 | unsigned long start; /* First managed virtual address */ | ||
106 | unsigned long end; /* Last managed virtual address */ | ||
107 | |||
108 | struct bit_map usemap; | ||
109 | }; | ||
110 | |||
111 | static inline void iommu_invalidate(struct iommu_regs *regs) | ||
112 | { | ||
113 | regs->tlbflush = 0; | ||
114 | } | ||
115 | |||
116 | static inline void iommu_invalidate_page(struct iommu_regs *regs, unsigned long ba) | ||
117 | { | ||
118 | regs->pageflush = (ba & PAGE_MASK); | ||
119 | } | ||
120 | |||
121 | #endif /* !(_SPARC_IOMMU_H) */ | ||
diff --git a/include/asm-sparc/ipcbuf.h b/include/asm-sparc/ipcbuf.h deleted file mode 100644 index 9bef02d04e4b..000000000000 --- a/include/asm-sparc/ipcbuf.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | #ifndef _SPARC_IPCBUF_H | ||
2 | #define _SPARC_IPCBUF_H | ||
3 | |||
4 | /* | ||
5 | * The ipc64_perm structure for sparc architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 32-bit mode | ||
11 | * - 32-bit seq | ||
12 | * - 2 miscellaneous 64-bit values (so that this structure matches | ||
13 | * sparc64 ipc64_perm) | ||
14 | */ | ||
15 | |||
16 | struct ipc64_perm | ||
17 | { | ||
18 | __kernel_key_t key; | ||
19 | __kernel_uid32_t uid; | ||
20 | __kernel_gid32_t gid; | ||
21 | __kernel_uid32_t cuid; | ||
22 | __kernel_gid32_t cgid; | ||
23 | unsigned short __pad1; | ||
24 | __kernel_mode_t mode; | ||
25 | unsigned short __pad2; | ||
26 | unsigned short seq; | ||
27 | unsigned long long __unused1; | ||
28 | unsigned long long __unused2; | ||
29 | }; | ||
30 | |||
31 | #endif /* _SPARC_IPCBUF_H */ | ||
diff --git a/include/asm-sparc/irq.h b/include/asm-sparc/irq.h deleted file mode 100644 index fe205cc444b8..000000000000 --- a/include/asm-sparc/irq.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* irq.h: IRQ registers on the Sparc. | ||
2 | * | ||
3 | * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) | ||
4 | */ | ||
5 | |||
6 | #ifndef _SPARC_IRQ_H | ||
7 | #define _SPARC_IRQ_H | ||
8 | |||
9 | #include <linux/interrupt.h> | ||
10 | |||
11 | #define NR_IRQS 16 | ||
12 | |||
13 | #define irq_canonicalize(irq) (irq) | ||
14 | |||
15 | #endif | ||
diff --git a/include/asm-sparc/irq_regs.h b/include/asm-sparc/irq_regs.h deleted file mode 100644 index 3dd9c0b70270..000000000000 --- a/include/asm-sparc/irq_regs.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <asm-generic/irq_regs.h> | ||
diff --git a/include/asm-sparc/irqflags.h b/include/asm-sparc/irqflags.h deleted file mode 100644 index db398fb32826..000000000000 --- a/include/asm-sparc/irqflags.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sparc/irqflags.h | ||
3 | * | ||
4 | * IRQ flags handling | ||
5 | * | ||
6 | * This file gets included from lowlevel asm headers too, to provide | ||
7 | * wrapped versions of the local_irq_*() APIs, based on the | ||
8 | * raw_local_irq_*() functions from the lowlevel headers. | ||
9 | */ | ||
10 | #ifndef _ASM_IRQFLAGS_H | ||
11 | #define _ASM_IRQFLAGS_H | ||
12 | |||
13 | #ifndef __ASSEMBLY__ | ||
14 | |||
15 | extern void raw_local_irq_restore(unsigned long); | ||
16 | extern unsigned long __raw_local_irq_save(void); | ||
17 | extern void raw_local_irq_enable(void); | ||
18 | |||
19 | static inline unsigned long getipl(void) | ||
20 | { | ||
21 | unsigned long retval; | ||
22 | |||
23 | __asm__ __volatile__("rd %%psr, %0" : "=r" (retval)); | ||
24 | return retval; | ||
25 | } | ||
26 | |||
27 | #define raw_local_save_flags(flags) ((flags) = getipl()) | ||
28 | #define raw_local_irq_save(flags) ((flags) = __raw_local_irq_save()) | ||
29 | #define raw_local_irq_disable() ((void) __raw_local_irq_save()) | ||
30 | #define raw_irqs_disabled() ((getipl() & PSR_PIL) != 0) | ||
31 | |||
32 | static inline int raw_irqs_disabled_flags(unsigned long flags) | ||
33 | { | ||
34 | return ((flags & PSR_PIL) != 0); | ||
35 | } | ||
36 | |||
37 | #endif /* (__ASSEMBLY__) */ | ||
38 | |||
39 | #endif /* !(_ASM_IRQFLAGS_H) */ | ||
diff --git a/include/asm-sparc/jsflash.h b/include/asm-sparc/jsflash.h deleted file mode 100644 index 3457f29bd73b..000000000000 --- a/include/asm-sparc/jsflash.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | /* | ||
2 | * jsflash.h: OS Flash SIMM support for JavaStations. | ||
3 | * | ||
4 | * Copyright (C) 1999 Pete Zaitcev | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_JSFLASH_H | ||
8 | #define _SPARC_JSFLASH_H | ||
9 | |||
10 | #ifndef _SPARC_TYPES_H | ||
11 | #include <asm/types.h> | ||
12 | #endif | ||
13 | |||
14 | /* | ||
15 | * Semantics of the offset is a full address. | ||
16 | * Hardcode it or get it from probe ioctl. | ||
17 | * | ||
18 | * We use full bus address, so that we would be | ||
19 | * automatically compatible with possible future systems. | ||
20 | */ | ||
21 | |||
22 | #define JSFLASH_IDENT (('F'<<8)|54) | ||
23 | struct jsflash_ident_arg { | ||
24 | __u64 off; /* 0x20000000 is included */ | ||
25 | __u32 size; | ||
26 | char name[32]; /* With trailing zero */ | ||
27 | }; | ||
28 | |||
29 | #define JSFLASH_ERASE (('F'<<8)|55) | ||
30 | /* Put 0 as argument, may be flags or sector number... */ | ||
31 | |||
32 | #define JSFLASH_PROGRAM (('F'<<8)|56) | ||
33 | struct jsflash_program_arg { | ||
34 | __u64 data; /* char* for sparc and sparc64 */ | ||
35 | __u64 off; | ||
36 | __u32 size; | ||
37 | }; | ||
38 | |||
39 | #endif /* _SPARC_JSFLASH_H */ | ||
diff --git a/include/asm-sparc/kdebug.h b/include/asm-sparc/kdebug.h deleted file mode 100644 index f69fe7d84b3c..000000000000 --- a/include/asm-sparc/kdebug.h +++ /dev/null | |||
@@ -1,73 +0,0 @@ | |||
1 | /* | ||
2 | * kdebug.h: Defines and definitions for debugging the Linux kernel | ||
3 | * under various kernel debuggers. | ||
4 | * | ||
5 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
6 | */ | ||
7 | #ifndef _SPARC_KDEBUG_H | ||
8 | #define _SPARC_KDEBUG_H | ||
9 | |||
10 | #include <asm/openprom.h> | ||
11 | #include <asm/vaddrs.h> | ||
12 | |||
13 | /* Breakpoints are enter through trap table entry 126. So in sparc assembly | ||
14 | * if you want to drop into the debugger you do: | ||
15 | * | ||
16 | * t DEBUG_BP_TRAP | ||
17 | */ | ||
18 | |||
19 | #define DEBUG_BP_TRAP 126 | ||
20 | |||
21 | #ifndef __ASSEMBLY__ | ||
22 | /* The debug vector is passed in %o1 at boot time. It is a pointer to | ||
23 | * a structure in the debuggers address space. Here is its format. | ||
24 | */ | ||
25 | |||
26 | typedef unsigned int (*debugger_funct)(void); | ||
27 | |||
28 | struct kernel_debug { | ||
29 | /* First the entry point into the debugger. You jump here | ||
30 | * to give control over to the debugger. | ||
31 | */ | ||
32 | unsigned long kdebug_entry; | ||
33 | unsigned long kdebug_trapme; /* Figure out later... */ | ||
34 | /* The following is the number of pages that the debugger has | ||
35 | * taken from to total pool. | ||
36 | */ | ||
37 | unsigned long *kdebug_stolen_pages; | ||
38 | /* Ok, after you remap yourself and/or change the trap table | ||
39 | * from what you were left with at boot time you have to call | ||
40 | * this synchronization function so the debugger can check out | ||
41 | * what you have done. | ||
42 | */ | ||
43 | debugger_funct teach_debugger; | ||
44 | }; /* I think that is it... */ | ||
45 | |||
46 | extern struct kernel_debug *linux_dbvec; | ||
47 | |||
48 | /* Use this macro in C-code to enter the debugger. */ | ||
49 | static inline void sp_enter_debugger(void) | ||
50 | { | ||
51 | __asm__ __volatile__("jmpl %0, %%o7\n\t" | ||
52 | "nop\n\t" : : | ||
53 | "r" (linux_dbvec) : "o7", "memory"); | ||
54 | } | ||
55 | |||
56 | #define SP_ENTER_DEBUGGER do { \ | ||
57 | if((linux_dbvec!=0) && ((*(short *)linux_dbvec)!=-1)) \ | ||
58 | sp_enter_debugger(); \ | ||
59 | } while(0) | ||
60 | |||
61 | enum die_val { | ||
62 | DIE_UNUSED, | ||
63 | }; | ||
64 | |||
65 | #endif /* !(__ASSEMBLY__) */ | ||
66 | |||
67 | /* Some nice offset defines for assembler code. */ | ||
68 | #define KDEBUG_ENTRY_OFF 0x0 | ||
69 | #define KDEBUG_DUNNO_OFF 0x4 | ||
70 | #define KDEBUG_DUNNO2_OFF 0x8 | ||
71 | #define KDEBUG_TEACH_OFF 0xc | ||
72 | |||
73 | #endif /* !(_SPARC_KDEBUG_H) */ | ||
diff --git a/include/asm-sparc/kgdb.h b/include/asm-sparc/kgdb.h deleted file mode 100644 index b6ef301d05bf..000000000000 --- a/include/asm-sparc/kgdb.h +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | #ifndef _SPARC_KGDB_H | ||
2 | #define _SPARC_KGDB_H | ||
3 | |||
4 | #ifdef CONFIG_SPARC32 | ||
5 | #define BUFMAX 2048 | ||
6 | #else | ||
7 | #define BUFMAX 4096 | ||
8 | #endif | ||
9 | |||
10 | enum regnames { | ||
11 | GDB_G0, GDB_G1, GDB_G2, GDB_G3, GDB_G4, GDB_G5, GDB_G6, GDB_G7, | ||
12 | GDB_O0, GDB_O1, GDB_O2, GDB_O3, GDB_O4, GDB_O5, GDB_SP, GDB_O7, | ||
13 | GDB_L0, GDB_L1, GDB_L2, GDB_L3, GDB_L4, GDB_L5, GDB_L6, GDB_L7, | ||
14 | GDB_I0, GDB_I1, GDB_I2, GDB_I3, GDB_I4, GDB_I5, GDB_FP, GDB_I7, | ||
15 | GDB_F0, | ||
16 | GDB_F31 = GDB_F0 + 31, | ||
17 | #ifdef CONFIG_SPARC32 | ||
18 | GDB_Y, GDB_PSR, GDB_WIM, GDB_TBR, GDB_PC, GDB_NPC, | ||
19 | GDB_FSR, GDB_CSR, | ||
20 | #else | ||
21 | GDB_F32 = GDB_F0 + 32, | ||
22 | GDB_F62 = GDB_F32 + 15, | ||
23 | GDB_PC, GDB_NPC, GDB_STATE, GDB_FSR, GDB_FPRS, GDB_Y, | ||
24 | #endif | ||
25 | }; | ||
26 | |||
27 | #ifdef CONFIG_SPARC32 | ||
28 | #define NUMREGBYTES ((GDB_CSR + 1) * 4) | ||
29 | #else | ||
30 | #define NUMREGBYTES ((GDB_Y + 1) * 8) | ||
31 | #endif | ||
32 | |||
33 | extern void arch_kgdb_breakpoint(void); | ||
34 | |||
35 | #define BREAK_INSTR_SIZE 4 | ||
36 | #define CACHE_FLUSH_IS_SAFE 1 | ||
37 | |||
38 | #endif /* _SPARC_KGDB_H */ | ||
diff --git a/include/asm-sparc/kmap_types.h b/include/asm-sparc/kmap_types.h deleted file mode 100644 index e215f7104974..000000000000 --- a/include/asm-sparc/kmap_types.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | #ifndef _ASM_KMAP_TYPES_H | ||
2 | #define _ASM_KMAP_TYPES_H | ||
3 | |||
4 | enum km_type { | ||
5 | KM_BOUNCE_READ, | ||
6 | KM_SKB_SUNRPC_DATA, | ||
7 | KM_SKB_DATA_SOFTIRQ, | ||
8 | KM_USER0, | ||
9 | KM_USER1, | ||
10 | KM_BIO_SRC_IRQ, | ||
11 | KM_BIO_DST_IRQ, | ||
12 | KM_PTE0, | ||
13 | KM_PTE1, | ||
14 | KM_IRQ0, | ||
15 | KM_IRQ1, | ||
16 | KM_SOFTIRQ0, | ||
17 | KM_SOFTIRQ1, | ||
18 | KM_TYPE_NR | ||
19 | }; | ||
20 | |||
21 | #endif | ||
diff --git a/include/asm-sparc/kvm.h b/include/asm-sparc/kvm.h deleted file mode 100644 index 2e5478da3819..000000000000 --- a/include/asm-sparc/kvm.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __LINUX_KVM_SPARC_H | ||
2 | #define __LINUX_KVM_SPARC_H | ||
3 | |||
4 | /* sparc does not support KVM */ | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-sparc/linkage.h b/include/asm-sparc/linkage.h deleted file mode 100644 index 291c2d01c44f..000000000000 --- a/include/asm-sparc/linkage.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ASM_LINKAGE_H | ||
2 | #define __ASM_LINKAGE_H | ||
3 | |||
4 | /* Nothing to see here... */ | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-sparc/local.h b/include/asm-sparc/local.h deleted file mode 100644 index bc80815a435c..000000000000 --- a/include/asm-sparc/local.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _SPARC_LOCAL_H | ||
2 | #define _SPARC_LOCAL_H | ||
3 | |||
4 | #include <asm-generic/local.h> | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-sparc/machines.h b/include/asm-sparc/machines.h deleted file mode 100644 index d6c6bf836206..000000000000 --- a/include/asm-sparc/machines.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | /* | ||
2 | * machines.h: Defines for taking apart the machine type value in the | ||
3 | * idprom and determining the kind of machine we are on. | ||
4 | * | ||
5 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
6 | */ | ||
7 | #ifndef _SPARC_MACHINES_H | ||
8 | #define _SPARC_MACHINES_H | ||
9 | |||
10 | struct Sun_Machine_Models { | ||
11 | char *name; | ||
12 | unsigned char id_machtype; | ||
13 | }; | ||
14 | |||
15 | /* Current number of machines we know about that has an IDPROM | ||
16 | * machtype entry including one entry for the 0x80 OBP machines. | ||
17 | */ | ||
18 | #define NUM_SUN_MACHINES 15 | ||
19 | |||
20 | extern struct Sun_Machine_Models Sun_Machines[NUM_SUN_MACHINES]; | ||
21 | |||
22 | /* The machine type in the idprom area looks like this: | ||
23 | * | ||
24 | * --------------- | ||
25 | * | ARCH | MACH | | ||
26 | * --------------- | ||
27 | * 7 4 3 0 | ||
28 | * | ||
29 | * The ARCH field determines the architecture line (sun4, sun4c, etc). | ||
30 | * The MACH field determines the machine make within that architecture. | ||
31 | */ | ||
32 | |||
33 | #define SM_ARCH_MASK 0xf0 | ||
34 | #define SM_SUN4 0x20 | ||
35 | #define SM_SUN4C 0x50 | ||
36 | #define SM_SUN4M 0x70 | ||
37 | #define SM_SUN4M_OBP 0x80 | ||
38 | |||
39 | #define SM_TYP_MASK 0x0f | ||
40 | /* Sun4 machines */ | ||
41 | #define SM_4_260 0x01 /* Sun 4/200 series */ | ||
42 | #define SM_4_110 0x02 /* Sun 4/100 series */ | ||
43 | #define SM_4_330 0x03 /* Sun 4/300 series */ | ||
44 | #define SM_4_470 0x04 /* Sun 4/400 series */ | ||
45 | |||
46 | /* Sun4c machines Full Name - PROM NAME */ | ||
47 | #define SM_4C_SS1 0x01 /* Sun4c SparcStation 1 - Sun 4/60 */ | ||
48 | #define SM_4C_IPC 0x02 /* Sun4c SparcStation IPC - Sun 4/40 */ | ||
49 | #define SM_4C_SS1PLUS 0x03 /* Sun4c SparcStation 1+ - Sun 4/65 */ | ||
50 | #define SM_4C_SLC 0x04 /* Sun4c SparcStation SLC - Sun 4/20 */ | ||
51 | #define SM_4C_SS2 0x05 /* Sun4c SparcStation 2 - Sun 4/75 */ | ||
52 | #define SM_4C_ELC 0x06 /* Sun4c SparcStation ELC - Sun 4/25 */ | ||
53 | #define SM_4C_IPX 0x07 /* Sun4c SparcStation IPX - Sun 4/50 */ | ||
54 | |||
55 | /* Sun4m machines, these predate the OpenBoot. These values only mean | ||
56 | * something if the value in the ARCH field is SM_SUN4M, if it is | ||
57 | * SM_SUN4M_OBP then you have the following situation: | ||
58 | * 1) You either have a sun4d, a sun4e, or a recently made sun4m. | ||
59 | * 2) You have to consult OpenBoot to determine which machine this is. | ||
60 | */ | ||
61 | #define SM_4M_SS60 0x01 /* Sun4m SparcSystem 600 */ | ||
62 | #define SM_4M_SS50 0x02 /* Sun4m SparcStation 10 */ | ||
63 | #define SM_4M_SS40 0x03 /* Sun4m SparcStation 5 */ | ||
64 | |||
65 | /* Sun4d machines -- N/A */ | ||
66 | /* Sun4e machines -- N/A */ | ||
67 | /* Sun4u machines -- N/A */ | ||
68 | |||
69 | #endif /* !(_SPARC_MACHINES_H) */ | ||
diff --git a/include/asm-sparc/mbus.h b/include/asm-sparc/mbus.h deleted file mode 100644 index bb5ae614b166..000000000000 --- a/include/asm-sparc/mbus.h +++ /dev/null | |||
@@ -1,102 +0,0 @@ | |||
1 | /* | ||
2 | * mbus.h: Various defines for MBUS modules. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_MBUS_H | ||
8 | #define _SPARC_MBUS_H | ||
9 | |||
10 | #include <asm/ross.h> /* HyperSparc stuff */ | ||
11 | #include <asm/cypress.h> /* Cypress Chips */ | ||
12 | #include <asm/viking.h> /* Ugh, bug city... */ | ||
13 | |||
14 | enum mbus_module { | ||
15 | HyperSparc = 0, | ||
16 | Cypress = 1, | ||
17 | Cypress_vE = 2, | ||
18 | Cypress_vD = 3, | ||
19 | Swift_ok = 4, | ||
20 | Swift_bad_c = 5, | ||
21 | Swift_lots_o_bugs = 6, | ||
22 | Tsunami = 7, | ||
23 | Viking_12 = 8, | ||
24 | Viking_2x = 9, | ||
25 | Viking_30 = 10, | ||
26 | Viking_35 = 11, | ||
27 | Viking_new = 12, | ||
28 | TurboSparc = 13, | ||
29 | SRMMU_INVAL_MOD = 14, | ||
30 | }; | ||
31 | |||
32 | extern enum mbus_module srmmu_modtype; | ||
33 | extern unsigned int viking_rev, swift_rev, cypress_rev; | ||
34 | |||
35 | /* HW Mbus module bugs we have to deal with */ | ||
36 | #define HWBUG_COPYBACK_BROKEN 0x00000001 | ||
37 | #define HWBUG_ASIFLUSH_BROKEN 0x00000002 | ||
38 | #define HWBUG_VACFLUSH_BITROT 0x00000004 | ||
39 | #define HWBUG_KERN_ACCBROKEN 0x00000008 | ||
40 | #define HWBUG_KERN_CBITBROKEN 0x00000010 | ||
41 | #define HWBUG_MODIFIED_BITROT 0x00000020 | ||
42 | #define HWBUG_PC_BADFAULT_ADDR 0x00000040 | ||
43 | #define HWBUG_SUPERSCALAR_BAD 0x00000080 | ||
44 | #define HWBUG_PACINIT_BITROT 0x00000100 | ||
45 | |||
46 | extern unsigned int hwbug_bitmask; | ||
47 | |||
48 | /* First the module type values. To find out which you have, just load | ||
49 | * the mmu control register from ASI_M_MMUREG alternate address space and | ||
50 | * shift the value right 28 bits. | ||
51 | */ | ||
52 | /* IMPL field means the company which produced the chip. */ | ||
53 | #define MBUS_VIKING 0x4 /* bleech, Texas Instruments Module */ | ||
54 | #define MBUS_LSI 0x3 /* LSI Logics */ | ||
55 | #define MBUS_ROSS 0x1 /* Ross is nice */ | ||
56 | #define MBUS_FMI 0x0 /* Fujitsu Microelectronics/Swift */ | ||
57 | |||
58 | /* Ross Module versions */ | ||
59 | #define ROSS_604_REV_CDE 0x0 /* revisions c, d, and e */ | ||
60 | #define ROSS_604_REV_F 0x1 /* revision f */ | ||
61 | #define ROSS_605 0xf /* revision a, a.1, and a.2 */ | ||
62 | #define ROSS_605_REV_B 0xe /* revision b */ | ||
63 | |||
64 | /* TI Viking Module versions */ | ||
65 | #define VIKING_REV_12 0x1 /* Version 1.2 or SPARCclassic's CPU */ | ||
66 | #define VIKING_REV_2 0x2 /* Version 2.1, 2.2, 2.3, and 2.4 */ | ||
67 | #define VIKING_REV_30 0x3 /* Version 3.0 */ | ||
68 | #define VIKING_REV_35 0x4 /* Version 3.5 */ | ||
69 | |||
70 | /* LSI Logics. */ | ||
71 | #define LSI_L64815 0x0 | ||
72 | |||
73 | /* Fujitsu */ | ||
74 | #define FMI_AURORA 0x4 /* MB8690x, a Swift module... */ | ||
75 | #define FMI_TURBO 0x5 /* MB86907, a TurboSparc module... */ | ||
76 | |||
77 | /* For multiprocessor support we need to be able to obtain the CPU id and | ||
78 | * the MBUS Module id. | ||
79 | */ | ||
80 | |||
81 | /* The CPU ID is encoded in the trap base register, 20 bits to the left of | ||
82 | * bit zero, with 2 bits being significant. | ||
83 | */ | ||
84 | #define TBR_ID_SHIFT 20 | ||
85 | |||
86 | static inline int get_cpuid(void) | ||
87 | { | ||
88 | register int retval; | ||
89 | __asm__ __volatile__("rd %%tbr, %0\n\t" | ||
90 | "srl %0, %1, %0\n\t" : | ||
91 | "=r" (retval) : | ||
92 | "i" (TBR_ID_SHIFT)); | ||
93 | return (retval & 3); | ||
94 | } | ||
95 | |||
96 | static inline int get_modid(void) | ||
97 | { | ||
98 | return (get_cpuid() | 0x8); | ||
99 | } | ||
100 | |||
101 | |||
102 | #endif /* !(_SPARC_MBUS_H) */ | ||
diff --git a/include/asm-sparc/mc146818rtc.h b/include/asm-sparc/mc146818rtc.h deleted file mode 100644 index fa7eac926582..000000000000 --- a/include/asm-sparc/mc146818rtc.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* | ||
2 | * Machine dependent access functions for RTC registers. | ||
3 | */ | ||
4 | #ifndef __ASM_SPARC_MC146818RTC_H | ||
5 | #define __ASM_SPARC_MC146818RTC_H | ||
6 | |||
7 | #include <asm/io.h> | ||
8 | |||
9 | #ifndef RTC_PORT | ||
10 | #define RTC_PORT(x) (0x70 + (x)) | ||
11 | #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ | ||
12 | #endif | ||
13 | |||
14 | /* | ||
15 | * The yet supported machines all access the RTC index register via | ||
16 | * an ISA port access but the way to access the date register differs ... | ||
17 | */ | ||
18 | #define CMOS_READ(addr) ({ \ | ||
19 | outb_p((addr),RTC_PORT(0)); \ | ||
20 | inb_p(RTC_PORT(1)); \ | ||
21 | }) | ||
22 | #define CMOS_WRITE(val, addr) ({ \ | ||
23 | outb_p((addr),RTC_PORT(0)); \ | ||
24 | outb_p((val),RTC_PORT(1)); \ | ||
25 | }) | ||
26 | |||
27 | #define RTC_IRQ 8 | ||
28 | |||
29 | #endif /* __ASM_SPARC_MC146818RTC_H */ | ||
diff --git a/include/asm-sparc/memreg.h b/include/asm-sparc/memreg.h deleted file mode 100644 index 845ad2b39183..000000000000 --- a/include/asm-sparc/memreg.h +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | #ifndef _SPARC_MEMREG_H | ||
2 | #define _SPARC_MEMREG_H | ||
3 | /* memreg.h: Definitions of the values found in the synchronous | ||
4 | * and asynchronous memory error registers when a fault | ||
5 | * occurs on the sun4c. | ||
6 | * | ||
7 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
8 | */ | ||
9 | |||
10 | /* First the synchronous error codes, these are usually just | ||
11 | * normal page faults. | ||
12 | */ | ||
13 | |||
14 | #define SUN4C_SYNC_WDRESET 0x0001 /* watchdog reset */ | ||
15 | #define SUN4C_SYNC_SIZE 0x0002 /* bad access size? whuz this? */ | ||
16 | #define SUN4C_SYNC_PARITY 0x0008 /* bad ram chips caused a parity error */ | ||
17 | #define SUN4C_SYNC_SBUS 0x0010 /* the SBUS had some problems... */ | ||
18 | #define SUN4C_SYNC_NOMEM 0x0020 /* translation to non-existent ram */ | ||
19 | #define SUN4C_SYNC_PROT 0x0040 /* access violated pte protections */ | ||
20 | #define SUN4C_SYNC_NPRESENT 0x0080 /* pte said that page was not present */ | ||
21 | #define SUN4C_SYNC_BADWRITE 0x8000 /* while writing something went bogus */ | ||
22 | |||
23 | #define SUN4C_SYNC_BOLIXED \ | ||
24 | (SUN4C_SYNC_WDRESET | SUN4C_SYNC_SIZE | SUN4C_SYNC_SBUS | \ | ||
25 | SUN4C_SYNC_NOMEM | SUN4C_SYNC_PARITY) | ||
26 | |||
27 | /* Now the asynchronous error codes, these are almost always produced | ||
28 | * by the cache writing things back to memory and getting a bad translation. | ||
29 | * Bad DVMA transactions can cause these faults too. | ||
30 | */ | ||
31 | |||
32 | #define SUN4C_ASYNC_BADDVMA 0x0010 /* error during DVMA access */ | ||
33 | #define SUN4C_ASYNC_NOMEM 0x0020 /* write back pointed to bad phys addr */ | ||
34 | #define SUN4C_ASYNC_BADWB 0x0080 /* write back points to non-present page */ | ||
35 | |||
36 | /* Memory parity error register with associated bit constants. */ | ||
37 | #ifndef __ASSEMBLY__ | ||
38 | extern __volatile__ unsigned long __iomem *sun4c_memerr_reg; | ||
39 | #endif | ||
40 | |||
41 | #define SUN4C_MPE_ERROR 0x80 /* Parity error detected. (ro) */ | ||
42 | #define SUN4C_MPE_MULTI 0x40 /* Multiple parity errors detected. (ro) */ | ||
43 | #define SUN4C_MPE_TEST 0x20 /* Write inverse parity. (rw) */ | ||
44 | #define SUN4C_MPE_CHECK 0x10 /* Enable parity checking. (rw) */ | ||
45 | #define SUN4C_MPE_ERR00 0x08 /* Parity error in bits 0-7. (ro) */ | ||
46 | #define SUN4C_MPE_ERR08 0x04 /* Parity error in bits 8-15. (ro) */ | ||
47 | #define SUN4C_MPE_ERR16 0x02 /* Parity error in bits 16-23. (ro) */ | ||
48 | #define SUN4C_MPE_ERR24 0x01 /* Parity error in bits 24-31. (ro) */ | ||
49 | #define SUN4C_MPE_ERRS 0x0F /* Bit mask for the error bits. (ro) */ | ||
50 | |||
51 | #endif /* !(_SPARC_MEMREG_H) */ | ||
diff --git a/include/asm-sparc/mman.h b/include/asm-sparc/mman.h deleted file mode 100644 index fdfbbf0a4736..000000000000 --- a/include/asm-sparc/mman.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | #ifndef __SPARC_MMAN_H__ | ||
2 | #define __SPARC_MMAN_H__ | ||
3 | |||
4 | #include <asm-generic/mman.h> | ||
5 | |||
6 | /* SunOS'ified... */ | ||
7 | |||
8 | #define MAP_RENAME MAP_ANONYMOUS /* In SunOS terminology */ | ||
9 | #define MAP_NORESERVE 0x40 /* don't reserve swap pages */ | ||
10 | #define MAP_INHERIT 0x80 /* SunOS doesn't do this, but... */ | ||
11 | #define MAP_LOCKED 0x100 /* lock the mapping */ | ||
12 | #define _MAP_NEW 0x80000000 /* Binary compatibility is fun... */ | ||
13 | |||
14 | #define MAP_GROWSDOWN 0x0200 /* stack-like segment */ | ||
15 | #define MAP_DENYWRITE 0x0800 /* ETXTBSY */ | ||
16 | #define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ | ||
17 | |||
18 | #define MCL_CURRENT 0x2000 /* lock all currently mapped pages */ | ||
19 | #define MCL_FUTURE 0x4000 /* lock all additions to address space */ | ||
20 | |||
21 | #define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ | ||
22 | #define MAP_NONBLOCK 0x10000 /* do not block on IO */ | ||
23 | |||
24 | #ifdef __KERNEL__ | ||
25 | #ifndef __ASSEMBLY__ | ||
26 | #define arch_mmap_check(addr,len,flags) sparc_mmap_check(addr,len) | ||
27 | int sparc_mmap_check(unsigned long addr, unsigned long len); | ||
28 | #endif | ||
29 | #endif | ||
30 | |||
31 | #endif /* __SPARC_MMAN_H__ */ | ||
diff --git a/include/asm-sparc/mmu.h b/include/asm-sparc/mmu.h deleted file mode 100644 index ccd36d26615a..000000000000 --- a/include/asm-sparc/mmu.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __MMU_H | ||
2 | #define __MMU_H | ||
3 | |||
4 | /* Default "unsigned long" context */ | ||
5 | typedef unsigned long mm_context_t; | ||
6 | |||
7 | #endif | ||
diff --git a/include/asm-sparc/mmu_context.h b/include/asm-sparc/mmu_context.h deleted file mode 100644 index 671a997b9e69..000000000000 --- a/include/asm-sparc/mmu_context.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | #ifndef __SPARC_MMU_CONTEXT_H | ||
2 | #define __SPARC_MMU_CONTEXT_H | ||
3 | |||
4 | #include <asm/btfixup.h> | ||
5 | |||
6 | #ifndef __ASSEMBLY__ | ||
7 | |||
8 | #include <asm-generic/mm_hooks.h> | ||
9 | |||
10 | static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) | ||
11 | { | ||
12 | } | ||
13 | |||
14 | /* | ||
15 | * Initialize a new mmu context. This is invoked when a new | ||
16 | * address space instance (unique or shared) is instantiated. | ||
17 | */ | ||
18 | #define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0) | ||
19 | |||
20 | /* | ||
21 | * Destroy a dead context. This occurs when mmput drops the | ||
22 | * mm_users count to zero, the mmaps have been released, and | ||
23 | * all the page tables have been flushed. Our job is to destroy | ||
24 | * any remaining processor-specific state. | ||
25 | */ | ||
26 | BTFIXUPDEF_CALL(void, destroy_context, struct mm_struct *) | ||
27 | |||
28 | #define destroy_context(mm) BTFIXUP_CALL(destroy_context)(mm) | ||
29 | |||
30 | /* Switch the current MM context. */ | ||
31 | BTFIXUPDEF_CALL(void, switch_mm, struct mm_struct *, struct mm_struct *, struct task_struct *) | ||
32 | |||
33 | #define switch_mm(old_mm, mm, tsk) BTFIXUP_CALL(switch_mm)(old_mm, mm, tsk) | ||
34 | |||
35 | #define deactivate_mm(tsk,mm) do { } while (0) | ||
36 | |||
37 | /* Activate a new MM instance for the current task. */ | ||
38 | #define activate_mm(active_mm, mm) switch_mm((active_mm), (mm), NULL) | ||
39 | |||
40 | #endif /* !(__ASSEMBLY__) */ | ||
41 | |||
42 | #endif /* !(__SPARC_MMU_CONTEXT_H) */ | ||
diff --git a/include/asm-sparc/module.h b/include/asm-sparc/module.h deleted file mode 100644 index cbd9e67b0c0b..000000000000 --- a/include/asm-sparc/module.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef _ASM_SPARC_MODULE_H | ||
2 | #define _ASM_SPARC_MODULE_H | ||
3 | struct mod_arch_specific { }; | ||
4 | #define Elf_Shdr Elf32_Shdr | ||
5 | #define Elf_Sym Elf32_Sym | ||
6 | #define Elf_Ehdr Elf32_Ehdr | ||
7 | #endif /* _ASM_SPARC_MODULE_H */ | ||
diff --git a/include/asm-sparc/mostek.h b/include/asm-sparc/mostek.h deleted file mode 100644 index 29aad11b8f00..000000000000 --- a/include/asm-sparc/mostek.h +++ /dev/null | |||
@@ -1,173 +0,0 @@ | |||
1 | /* | ||
2 | * mostek.h: Describes the various Mostek time of day clock registers. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) | ||
6 | * Added intersil code 05/25/98 Chris Davis (cdavis@cois.on.ca) | ||
7 | */ | ||
8 | |||
9 | #ifndef _SPARC_MOSTEK_H | ||
10 | #define _SPARC_MOSTEK_H | ||
11 | |||
12 | #include <asm/idprom.h> | ||
13 | #include <asm/io.h> | ||
14 | |||
15 | /* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ) | ||
16 | * | ||
17 | * Data | ||
18 | * Address Function | ||
19 | * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0 | ||
20 | * 7ff - - - - - - - - Year 00-99 | ||
21 | * 7fe 0 0 0 - - - - - Month 01-12 | ||
22 | * 7fd 0 0 - - - - - - Date 01-31 | ||
23 | * 7fc 0 FT 0 0 0 - - - Day 01-07 | ||
24 | * 7fb KS 0 - - - - - - Hours 00-23 | ||
25 | * 7fa 0 - - - - - - - Minutes 00-59 | ||
26 | * 7f9 ST - - - - - - - Seconds 00-59 | ||
27 | * 7f8 W R S - - - - - Control | ||
28 | * | ||
29 | * * ST is STOP BIT | ||
30 | * * W is WRITE BIT | ||
31 | * * R is READ BIT | ||
32 | * * S is SIGN BIT | ||
33 | * * FT is FREQ TEST BIT | ||
34 | * * KS is KICK START BIT | ||
35 | */ | ||
36 | |||
37 | /* The Mostek 48t02 real time clock and NVRAM chip. The registers | ||
38 | * other than the control register are in binary coded decimal. Some | ||
39 | * control bits also live outside the control register. | ||
40 | */ | ||
41 | #define mostek_read(_addr) readb(_addr) | ||
42 | #define mostek_write(_addr,_val) writeb(_val, _addr) | ||
43 | #define MOSTEK_EEPROM 0x0000UL | ||
44 | #define MOSTEK_IDPROM 0x07d8UL | ||
45 | #define MOSTEK_CREG 0x07f8UL | ||
46 | #define MOSTEK_SEC 0x07f9UL | ||
47 | #define MOSTEK_MIN 0x07faUL | ||
48 | #define MOSTEK_HOUR 0x07fbUL | ||
49 | #define MOSTEK_DOW 0x07fcUL | ||
50 | #define MOSTEK_DOM 0x07fdUL | ||
51 | #define MOSTEK_MONTH 0x07feUL | ||
52 | #define MOSTEK_YEAR 0x07ffUL | ||
53 | |||
54 | struct mostek48t02 { | ||
55 | volatile char eeprom[2008]; /* This is the eeprom, don't touch! */ | ||
56 | struct idprom idprom; /* The idprom lives here. */ | ||
57 | volatile unsigned char creg; /* Control register */ | ||
58 | volatile unsigned char sec; /* Seconds (0-59) */ | ||
59 | volatile unsigned char min; /* Minutes (0-59) */ | ||
60 | volatile unsigned char hour; /* Hour (0-23) */ | ||
61 | volatile unsigned char dow; /* Day of the week (1-7) */ | ||
62 | volatile unsigned char dom; /* Day of the month (1-31) */ | ||
63 | volatile unsigned char month; /* Month of year (1-12) */ | ||
64 | volatile unsigned char year; /* Year (0-99) */ | ||
65 | }; | ||
66 | |||
67 | extern spinlock_t mostek_lock; | ||
68 | extern void __iomem *mstk48t02_regs; | ||
69 | |||
70 | /* Control register values. */ | ||
71 | #define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */ | ||
72 | #define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */ | ||
73 | #define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */ | ||
74 | |||
75 | /* Control bits that live in the other registers. */ | ||
76 | #define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */ | ||
77 | #define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */ | ||
78 | #define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */ | ||
79 | |||
80 | #define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */ | ||
81 | #define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO) | ||
82 | |||
83 | /* Masks that define how much space each value takes up. */ | ||
84 | #define MSTK_SEC_MASK 0x7f | ||
85 | #define MSTK_MIN_MASK 0x7f | ||
86 | #define MSTK_HOUR_MASK 0x3f | ||
87 | #define MSTK_DOW_MASK 0x07 | ||
88 | #define MSTK_DOM_MASK 0x3f | ||
89 | #define MSTK_MONTH_MASK 0x1f | ||
90 | #define MSTK_YEAR_MASK 0xffU | ||
91 | |||
92 | /* Binary coded decimal conversion macros. */ | ||
93 | #define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04)) | ||
94 | #define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A)) | ||
95 | |||
96 | /* Generic register set and get macros for internal use. */ | ||
97 | #define MSTK_GET(regs,var,mask) (MSTK_REGVAL_TO_DECIMAL(((struct mostek48t02 *)regs)->var & MSTK_ ## mask ## _MASK)) | ||
98 | #define MSTK_SET(regs,var,value,mask) do { ((struct mostek48t02 *)regs)->var &= ~(MSTK_ ## mask ## _MASK); ((struct mostek48t02 *)regs)->var |= MSTK_DECIMAL_TO_REGVAL(value) & (MSTK_ ## mask ## _MASK); } while (0) | ||
99 | |||
100 | /* Macros to make register access easier on our fingers. These give you | ||
101 | * the decimal value of the register requested if applicable. You pass | ||
102 | * the a pointer to a 'struct mostek48t02'. | ||
103 | */ | ||
104 | #define MSTK_REG_CREG(regs) (((struct mostek48t02 *)regs)->creg) | ||
105 | #define MSTK_REG_SEC(regs) MSTK_GET(regs,sec,SEC) | ||
106 | #define MSTK_REG_MIN(regs) MSTK_GET(regs,min,MIN) | ||
107 | #define MSTK_REG_HOUR(regs) MSTK_GET(regs,hour,HOUR) | ||
108 | #define MSTK_REG_DOW(regs) MSTK_GET(regs,dow,DOW) | ||
109 | #define MSTK_REG_DOM(regs) MSTK_GET(regs,dom,DOM) | ||
110 | #define MSTK_REG_MONTH(regs) MSTK_GET(regs,month,MONTH) | ||
111 | #define MSTK_REG_YEAR(regs) MSTK_GET(regs,year,YEAR) | ||
112 | |||
113 | #define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,sec,value,SEC) | ||
114 | #define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,min,value,MIN) | ||
115 | #define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,hour,value,HOUR) | ||
116 | #define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,dow,value,DOW) | ||
117 | #define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,dom,value,DOM) | ||
118 | #define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,month,value,MONTH) | ||
119 | #define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,year,value,YEAR) | ||
120 | |||
121 | |||
122 | /* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the | ||
123 | * same (basically) layout of the 48t02 chip except for the extra | ||
124 | * NVRAM on board (8 KB against the 48t02's 2 KB). | ||
125 | */ | ||
126 | struct mostek48t08 { | ||
127 | char offset[6*1024]; /* Magic things may be here, who knows? */ | ||
128 | struct mostek48t02 regs; /* Here is what we are interested in. */ | ||
129 | }; | ||
130 | |||
131 | extern enum sparc_clock_type sp_clock_typ; | ||
132 | |||
133 | #ifdef CONFIG_SUN4 | ||
134 | enum sparc_clock_type { MSTK48T02, MSTK48T08, \ | ||
135 | INTERSIL, MSTK_INVALID }; | ||
136 | #else | ||
137 | enum sparc_clock_type { MSTK48T02, MSTK48T08, \ | ||
138 | MSTK_INVALID }; | ||
139 | #endif | ||
140 | |||
141 | #ifdef CONFIG_SUN4 | ||
142 | /* intersil on a sun 4/260 code data from harris doc */ | ||
143 | struct intersil_dt { | ||
144 | volatile unsigned char int_csec; | ||
145 | volatile unsigned char int_hour; | ||
146 | volatile unsigned char int_min; | ||
147 | volatile unsigned char int_sec; | ||
148 | volatile unsigned char int_month; | ||
149 | volatile unsigned char int_day; | ||
150 | volatile unsigned char int_year; | ||
151 | volatile unsigned char int_dow; | ||
152 | }; | ||
153 | |||
154 | struct intersil { | ||
155 | struct intersil_dt clk; | ||
156 | struct intersil_dt cmp; | ||
157 | volatile unsigned char int_intr_reg; | ||
158 | volatile unsigned char int_cmd_reg; | ||
159 | }; | ||
160 | |||
161 | #define INTERSIL_STOP 0x0 | ||
162 | #define INTERSIL_START 0x8 | ||
163 | #define INTERSIL_INTR_DISABLE 0x0 | ||
164 | #define INTERSIL_INTR_ENABLE 0x10 | ||
165 | #define INTERSIL_32K 0x0 | ||
166 | #define INTERSIL_NORMAL 0x0 | ||
167 | #define INTERSIL_24H 0x4 | ||
168 | #define INTERSIL_INT_100HZ 0x2 | ||
169 | |||
170 | /* end of intersil info */ | ||
171 | #endif | ||
172 | |||
173 | #endif /* !(_SPARC_MOSTEK_H) */ | ||
diff --git a/include/asm-sparc/mpmbox.h b/include/asm-sparc/mpmbox.h deleted file mode 100644 index f8423039b242..000000000000 --- a/include/asm-sparc/mpmbox.h +++ /dev/null | |||
@@ -1,67 +0,0 @@ | |||
1 | /* | ||
2 | * mpmbox.h: Interface and defines for the OpenProm mailbox | ||
3 | * facilities for MP machines under Linux. | ||
4 | * | ||
5 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
6 | */ | ||
7 | |||
8 | #ifndef _SPARC_MPMBOX_H | ||
9 | #define _SPARC_MPMBOX_H | ||
10 | |||
11 | /* The prom allocates, for each CPU on the machine an unsigned | ||
12 | * byte in physical ram. You probe the device tree prom nodes | ||
13 | * for these values. The purpose of this byte is to be able to | ||
14 | * pass messages from one cpu to another. | ||
15 | */ | ||
16 | |||
17 | /* These are the main message types we have to look for in our | ||
18 | * Cpu mailboxes, based upon these values we decide what course | ||
19 | * of action to take. | ||
20 | */ | ||
21 | |||
22 | /* The CPU is executing code in the kernel. */ | ||
23 | #define MAILBOX_ISRUNNING 0xf0 | ||
24 | |||
25 | /* Another CPU called romvec->pv_exit(), you should call | ||
26 | * prom_stopcpu() when you see this in your mailbox. | ||
27 | */ | ||
28 | #define MAILBOX_EXIT 0xfb | ||
29 | |||
30 | /* Another CPU called romvec->pv_enter(), you should call | ||
31 | * prom_cpuidle() when this is seen. | ||
32 | */ | ||
33 | #define MAILBOX_GOSPIN 0xfc | ||
34 | |||
35 | /* Another CPU has hit a breakpoint either into kadb or the prom | ||
36 | * itself. Just like MAILBOX_GOSPIN, you should call prom_cpuidle() | ||
37 | * at this point. | ||
38 | */ | ||
39 | #define MAILBOX_BPT_SPIN 0xfd | ||
40 | |||
41 | /* Oh geese, some other nitwit got a damn watchdog reset. The party's | ||
42 | * over so go call prom_stopcpu(). | ||
43 | */ | ||
44 | #define MAILBOX_WDOG_STOP 0xfe | ||
45 | |||
46 | #ifndef __ASSEMBLY__ | ||
47 | |||
48 | /* Handy macro's to determine a cpu's state. */ | ||
49 | |||
50 | /* Is the cpu still in Power On Self Test? */ | ||
51 | #define MBOX_POST_P(letter) ((letter) >= 0x00 && (letter) <= 0x7f) | ||
52 | |||
53 | /* Is the cpu at the 'ok' prompt of the PROM? */ | ||
54 | #define MBOX_PROMPROMPT_P(letter) ((letter) >= 0x80 && (letter) <= 0x8f) | ||
55 | |||
56 | /* Is the cpu spinning in the PROM? */ | ||
57 | #define MBOX_PROMSPIN_P(letter) ((letter) >= 0x90 && (letter) <= 0xef) | ||
58 | |||
59 | /* Sanity check... This is junk mail, throw it out. */ | ||
60 | #define MBOX_BOGON_P(letter) ((letter) >= 0xf1 && (letter) <= 0xfa) | ||
61 | |||
62 | /* Is the cpu actively running an application/kernel-code? */ | ||
63 | #define MBOX_RUNNING_P(letter) ((letter) == MAILBOX_ISRUNNING) | ||
64 | |||
65 | #endif /* !(__ASSEMBLY__) */ | ||
66 | |||
67 | #endif /* !(_SPARC_MPMBOX_H) */ | ||
diff --git a/include/asm-sparc/msgbuf.h b/include/asm-sparc/msgbuf.h deleted file mode 100644 index 8cec9ad0b825..000000000000 --- a/include/asm-sparc/msgbuf.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | #ifndef _SPARC64_MSGBUF_H | ||
2 | #define _SPARC64_MSGBUF_H | ||
3 | |||
4 | /* | ||
5 | * The msqid64_ds structure for sparc64 architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct msqid64_ds { | ||
15 | struct ipc64_perm msg_perm; | ||
16 | unsigned int __pad1; | ||
17 | __kernel_time_t msg_stime; /* last msgsnd time */ | ||
18 | unsigned int __pad2; | ||
19 | __kernel_time_t msg_rtime; /* last msgrcv time */ | ||
20 | unsigned int __pad3; | ||
21 | __kernel_time_t msg_ctime; /* last change time */ | ||
22 | unsigned long msg_cbytes; /* current number of bytes on queue */ | ||
23 | unsigned long msg_qnum; /* number of messages in queue */ | ||
24 | unsigned long msg_qbytes; /* max number of bytes on queue */ | ||
25 | __kernel_pid_t msg_lspid; /* pid of last msgsnd */ | ||
26 | __kernel_pid_t msg_lrpid; /* last receive pid */ | ||
27 | unsigned long __unused1; | ||
28 | unsigned long __unused2; | ||
29 | }; | ||
30 | |||
31 | #endif /* _SPARC64_MSGBUF_H */ | ||
diff --git a/include/asm-sparc/msi.h b/include/asm-sparc/msi.h deleted file mode 100644 index 724ca5667052..000000000000 --- a/include/asm-sparc/msi.h +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * msi.h: Defines specific to the MBus - Sbus - Interface. | ||
3 | * | ||
4 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | ||
5 | * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) | ||
6 | */ | ||
7 | |||
8 | #ifndef _SPARC_MSI_H | ||
9 | #define _SPARC_MSI_H | ||
10 | |||
11 | /* | ||
12 | * Locations of MSI Registers. | ||
13 | */ | ||
14 | #define MSI_MBUS_ARBEN 0xe0001008 /* MBus Arbiter Enable register */ | ||
15 | |||
16 | /* | ||
17 | * Useful bits in the MSI Registers. | ||
18 | */ | ||
19 | #define MSI_ASYNC_MODE 0x80000000 /* Operate the MSI asynchronously */ | ||
20 | |||
21 | |||
22 | static inline void msi_set_sync(void) | ||
23 | { | ||
24 | __asm__ __volatile__ ("lda [%0] %1, %%g3\n\t" | ||
25 | "andn %%g3, %2, %%g3\n\t" | ||
26 | "sta %%g3, [%0] %1\n\t" : : | ||
27 | "r" (MSI_MBUS_ARBEN), | ||
28 | "i" (ASI_M_CTL), "r" (MSI_ASYNC_MODE) : "g3"); | ||
29 | } | ||
30 | |||
31 | #endif /* !(_SPARC_MSI_H) */ | ||
diff --git a/include/asm-sparc/mutex.h b/include/asm-sparc/mutex.h deleted file mode 100644 index 458c1f7fbc18..000000000000 --- a/include/asm-sparc/mutex.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* | ||
2 | * Pull in the generic implementation for the mutex fastpath. | ||
3 | * | ||
4 | * TODO: implement optimized primitives instead, or leave the generic | ||
5 | * implementation in place, or pick the atomic_xchg() based generic | ||
6 | * implementation. (see asm-generic/mutex-xchg.h for details) | ||
7 | */ | ||
8 | |||
9 | #include <asm-generic/mutex-dec.h> | ||
diff --git a/include/asm-sparc/mxcc.h b/include/asm-sparc/mxcc.h deleted file mode 100644 index c0517bd05bde..000000000000 --- a/include/asm-sparc/mxcc.h +++ /dev/null | |||
@@ -1,137 +0,0 @@ | |||
1 | /* | ||
2 | * mxcc.h: Definitions of the Viking MXCC registers | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_MXCC_H | ||
8 | #define _SPARC_MXCC_H | ||
9 | |||
10 | /* These registers are accessed through ASI 0x2. */ | ||
11 | #define MXCC_DATSTREAM 0x1C00000 /* Data stream register */ | ||
12 | #define MXCC_SRCSTREAM 0x1C00100 /* Source stream register */ | ||
13 | #define MXCC_DESSTREAM 0x1C00200 /* Destination stream register */ | ||
14 | #define MXCC_RMCOUNT 0x1C00300 /* Count of references and misses */ | ||
15 | #define MXCC_STEST 0x1C00804 /* Internal self-test */ | ||
16 | #define MXCC_CREG 0x1C00A04 /* Control register */ | ||
17 | #define MXCC_SREG 0x1C00B00 /* Status register */ | ||
18 | #define MXCC_RREG 0x1C00C04 /* Reset register */ | ||
19 | #define MXCC_EREG 0x1C00E00 /* Error code register */ | ||
20 | #define MXCC_PREG 0x1C00F04 /* Address port register */ | ||
21 | |||
22 | /* Some MXCC constants. */ | ||
23 | #define MXCC_STREAM_SIZE 0x20 /* Size in bytes of one stream r/w */ | ||
24 | |||
25 | /* The MXCC Control Register: | ||
26 | * | ||
27 | * ---------------------------------------------------------------------- | ||
28 | * | | RRC | RSV |PRE|MCE|PARE|ECE|RSV| | ||
29 | * ---------------------------------------------------------------------- | ||
30 | * 31 10 9 8-6 5 4 3 2 1-0 | ||
31 | * | ||
32 | * RRC: Controls what you read from MXCC_RMCOUNT reg. | ||
33 | * 0=Misses 1=References | ||
34 | * PRE: Prefetch enable | ||
35 | * MCE: Multiple Command Enable | ||
36 | * PARE: Parity enable | ||
37 | * ECE: External cache enable | ||
38 | */ | ||
39 | |||
40 | #define MXCC_CTL_RRC 0x00000200 | ||
41 | #define MXCC_CTL_PRE 0x00000020 | ||
42 | #define MXCC_CTL_MCE 0x00000010 | ||
43 | #define MXCC_CTL_PARE 0x00000008 | ||
44 | #define MXCC_CTL_ECE 0x00000004 | ||
45 | |||
46 | /* The MXCC Error Register: | ||
47 | * | ||
48 | * -------------------------------------------------------- | ||
49 | * |ME| RSV|CE|PEW|PEE|ASE|EIV| MOPC|ECODE|PRIV|RSV|HPADDR| | ||
50 | * -------------------------------------------------------- | ||
51 | * 31 30 29 28 27 26 25 24-15 14-7 6 5-3 2-0 | ||
52 | * | ||
53 | * ME: Multiple Errors have occurred | ||
54 | * CE: Cache consistency Error | ||
55 | * PEW: Parity Error during a Write operation | ||
56 | * PEE: Parity Error involving the External cache | ||
57 | * ASE: ASynchronous Error | ||
58 | * EIV: This register is toast | ||
59 | * MOPC: MXCC Operation Code for instance causing error | ||
60 | * ECODE: The Error CODE | ||
61 | * PRIV: A privileged mode error? 0=no 1=yes | ||
62 | * HPADDR: High PhysicalADDRess bits (35-32) | ||
63 | */ | ||
64 | |||
65 | #define MXCC_ERR_ME 0x80000000 | ||
66 | #define MXCC_ERR_CE 0x20000000 | ||
67 | #define MXCC_ERR_PEW 0x10000000 | ||
68 | #define MXCC_ERR_PEE 0x08000000 | ||
69 | #define MXCC_ERR_ASE 0x04000000 | ||
70 | #define MXCC_ERR_EIV 0x02000000 | ||
71 | #define MXCC_ERR_MOPC 0x01FF8000 | ||
72 | #define MXCC_ERR_ECODE 0x00007F80 | ||
73 | #define MXCC_ERR_PRIV 0x00000040 | ||
74 | #define MXCC_ERR_HPADDR 0x0000000f | ||
75 | |||
76 | /* The MXCC Port register: | ||
77 | * | ||
78 | * ----------------------------------------------------- | ||
79 | * | | MID | | | ||
80 | * ----------------------------------------------------- | ||
81 | * 31 21 20-18 17 0 | ||
82 | * | ||
83 | * MID: The moduleID of the cpu your read this from. | ||
84 | */ | ||
85 | |||
86 | #ifndef __ASSEMBLY__ | ||
87 | |||
88 | static inline void mxcc_set_stream_src(unsigned long *paddr) | ||
89 | { | ||
90 | unsigned long data0 = paddr[0]; | ||
91 | unsigned long data1 = paddr[1]; | ||
92 | |||
93 | __asm__ __volatile__ ("or %%g0, %0, %%g2\n\t" | ||
94 | "or %%g0, %1, %%g3\n\t" | ||
95 | "stda %%g2, [%2] %3\n\t" : : | ||
96 | "r" (data0), "r" (data1), | ||
97 | "r" (MXCC_SRCSTREAM), | ||
98 | "i" (ASI_M_MXCC) : "g2", "g3"); | ||
99 | } | ||
100 | |||
101 | static inline void mxcc_set_stream_dst(unsigned long *paddr) | ||
102 | { | ||
103 | unsigned long data0 = paddr[0]; | ||
104 | unsigned long data1 = paddr[1]; | ||
105 | |||
106 | __asm__ __volatile__ ("or %%g0, %0, %%g2\n\t" | ||
107 | "or %%g0, %1, %%g3\n\t" | ||
108 | "stda %%g2, [%2] %3\n\t" : : | ||
109 | "r" (data0), "r" (data1), | ||
110 | "r" (MXCC_DESSTREAM), | ||
111 | "i" (ASI_M_MXCC) : "g2", "g3"); | ||
112 | } | ||
113 | |||
114 | static inline unsigned long mxcc_get_creg(void) | ||
115 | { | ||
116 | unsigned long mxcc_control; | ||
117 | |||
118 | __asm__ __volatile__("set 0xffffffff, %%g2\n\t" | ||
119 | "set 0xffffffff, %%g3\n\t" | ||
120 | "stda %%g2, [%1] %2\n\t" | ||
121 | "lda [%3] %2, %0\n\t" : | ||
122 | "=r" (mxcc_control) : | ||
123 | "r" (MXCC_EREG), "i" (ASI_M_MXCC), | ||
124 | "r" (MXCC_CREG) : "g2", "g3"); | ||
125 | return mxcc_control; | ||
126 | } | ||
127 | |||
128 | static inline void mxcc_set_creg(unsigned long mxcc_control) | ||
129 | { | ||
130 | __asm__ __volatile__("sta %0, [%1] %2\n\t" : : | ||
131 | "r" (mxcc_control), "r" (MXCC_CREG), | ||
132 | "i" (ASI_M_MXCC)); | ||
133 | } | ||
134 | |||
135 | #endif /* !__ASSEMBLY__ */ | ||
136 | |||
137 | #endif /* !(_SPARC_MXCC_H) */ | ||
diff --git a/include/asm-sparc/namei.h b/include/asm-sparc/namei.h deleted file mode 100644 index 0646102fb020..000000000000 --- a/include/asm-sparc/namei.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm-sparc/namei.h | ||
3 | * | ||
4 | * Routines to handle famous /usr/gnemul/s*. | ||
5 | * Included from linux/fs/namei.c | ||
6 | */ | ||
7 | |||
8 | #ifndef __SPARC_NAMEI_H | ||
9 | #define __SPARC_NAMEI_H | ||
10 | |||
11 | #define __emul_prefix() NULL | ||
12 | |||
13 | #endif /* __SPARC_NAMEI_H */ | ||
diff --git a/include/asm-sparc/obio.h b/include/asm-sparc/obio.h deleted file mode 100644 index 1a7544ceb574..000000000000 --- a/include/asm-sparc/obio.h +++ /dev/null | |||
@@ -1,249 +0,0 @@ | |||
1 | /* | ||
2 | * obio.h: Some useful locations in 0xFXXXXXXXX PA obio space on sun4d. | ||
3 | * | ||
4 | * Copyright (C) 1997 Jakub Jelinek <jj@sunsite.mff.cuni.cz> | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_OBIO_H | ||
8 | #define _SPARC_OBIO_H | ||
9 | |||
10 | #include <asm/asi.h> | ||
11 | |||
12 | /* This weird monster likes to use the very upper parts of | ||
13 | 36bit PA for these things :) */ | ||
14 | |||
15 | /* CSR space (for each XDBUS) | ||
16 | * ------------------------------------------------------------------------ | ||
17 | * | 0xFE | DEVID | | XDBUS ID | | | ||
18 | * ------------------------------------------------------------------------ | ||
19 | * 35 28 27 20 19 10 9 8 7 0 | ||
20 | */ | ||
21 | |||
22 | #define CSR_BASE_ADDR 0xe0000000 | ||
23 | #define CSR_CPU_SHIFT (32 - 4 - 5) | ||
24 | #define CSR_XDBUS_SHIFT 8 | ||
25 | |||
26 | #define CSR_BASE(cpu) (((CSR_BASE_ADDR >> CSR_CPU_SHIFT) + cpu) << CSR_CPU_SHIFT) | ||
27 | |||
28 | /* ECSR space (not for each XDBUS) | ||
29 | * ------------------------------------------------------------------------ | ||
30 | * | 0xF | DEVID[7:1] | | | ||
31 | * ------------------------------------------------------------------------ | ||
32 | * 35 32 31 25 24 0 | ||
33 | */ | ||
34 | |||
35 | #define ECSR_BASE_ADDR 0x00000000 | ||
36 | #define ECSR_CPU_SHIFT (32 - 5) | ||
37 | #define ECSR_DEV_SHIFT (32 - 8) | ||
38 | |||
39 | #define ECSR_BASE(cpu) ((cpu) << ECSR_CPU_SHIFT) | ||
40 | #define ECSR_DEV_BASE(devid) ((devid) << ECSR_DEV_SHIFT) | ||
41 | |||
42 | /* Bus Watcher */ | ||
43 | #define BW_LOCAL_BASE 0xfff00000 | ||
44 | |||
45 | #define BW_CID 0x00000000 | ||
46 | #define BW_DBUS_CTRL 0x00000008 | ||
47 | #define BW_DBUS_DATA 0x00000010 | ||
48 | #define BW_CTRL 0x00001000 | ||
49 | #define BW_INTR_TABLE 0x00001040 | ||
50 | #define BW_INTR_TABLE_CLEAR 0x00001080 | ||
51 | #define BW_PRESCALER 0x000010c0 | ||
52 | #define BW_PTIMER_LIMIT 0x00002000 | ||
53 | #define BW_PTIMER_COUNTER2 0x00002004 | ||
54 | #define BW_PTIMER_NDLIMIT 0x00002008 | ||
55 | #define BW_PTIMER_CTRL 0x0000200c | ||
56 | #define BW_PTIMER_COUNTER 0x00002010 | ||
57 | #define BW_TIMER_LIMIT 0x00003000 | ||
58 | #define BW_TIMER_COUNTER2 0x00003004 | ||
59 | #define BW_TIMER_NDLIMIT 0x00003008 | ||
60 | #define BW_TIMER_CTRL 0x0000300c | ||
61 | #define BW_TIMER_COUNTER 0x00003010 | ||
62 | |||
63 | /* BW Control */ | ||
64 | #define BW_CTRL_USER_TIMER 0x00000004 /* Is User Timer Free run enabled */ | ||
65 | |||
66 | /* Boot Bus */ | ||
67 | #define BB_LOCAL_BASE 0xf0000000 | ||
68 | |||
69 | #define BB_STAT1 0x00100000 | ||
70 | #define BB_STAT2 0x00120000 | ||
71 | #define BB_STAT3 0x00140000 | ||
72 | #define BB_LEDS 0x002e0000 | ||
73 | |||
74 | /* Bits in BB_STAT2 */ | ||
75 | #define BB_STAT2_AC_INTR 0x04 /* Aiee! 5ms and power is gone... */ | ||
76 | #define BB_STAT2_TMP_INTR 0x10 /* My Penguins are burning. Are you able to smell it? */ | ||
77 | #define BB_STAT2_FAN_INTR 0x20 /* My fan refuses to work */ | ||
78 | #define BB_STAT2_PWR_INTR 0x40 /* On SC2000, one of the two ACs died. Ok, we go on... */ | ||
79 | #define BB_STAT2_MASK (BB_STAT2_AC_INTR|BB_STAT2_TMP_INTR|BB_STAT2_FAN_INTR|BB_STAT2_PWR_INTR) | ||
80 | |||
81 | /* Cache Controller */ | ||
82 | #define CC_BASE 0x1F00000 | ||
83 | #define CC_DATSTREAM 0x1F00000 /* Data stream register */ | ||
84 | #define CC_DATSIZE 0x1F0003F /* Size */ | ||
85 | #define CC_SRCSTREAM 0x1F00100 /* Source stream register */ | ||
86 | #define CC_DESSTREAM 0x1F00200 /* Destination stream register */ | ||
87 | #define CC_RMCOUNT 0x1F00300 /* Count of references and misses */ | ||
88 | #define CC_IPEN 0x1F00406 /* Pending Interrupts */ | ||
89 | #define CC_IMSK 0x1F00506 /* Interrupt Mask */ | ||
90 | #define CC_ICLR 0x1F00606 /* Clear pending Interrupts */ | ||
91 | #define CC_IGEN 0x1F00704 /* Generate Interrupt register */ | ||
92 | #define CC_STEST 0x1F00804 /* Internal self-test */ | ||
93 | #define CC_CREG 0x1F00A04 /* Control register */ | ||
94 | #define CC_SREG 0x1F00B00 /* Status register */ | ||
95 | #define CC_RREG 0x1F00C04 /* Reset register */ | ||
96 | #define CC_EREG 0x1F00E00 /* Error code register */ | ||
97 | #define CC_CID 0x1F00F04 /* Component ID */ | ||
98 | |||
99 | #ifndef __ASSEMBLY__ | ||
100 | |||
101 | static inline int bw_get_intr_mask(int sbus_level) | ||
102 | { | ||
103 | int mask; | ||
104 | |||
105 | __asm__ __volatile__ ("lduha [%1] %2, %0" : | ||
106 | "=r" (mask) : | ||
107 | "r" (BW_LOCAL_BASE + BW_INTR_TABLE + (sbus_level << 3)), | ||
108 | "i" (ASI_M_CTL)); | ||
109 | return mask; | ||
110 | } | ||
111 | |||
112 | static inline void bw_clear_intr_mask(int sbus_level, int mask) | ||
113 | { | ||
114 | __asm__ __volatile__ ("stha %0, [%1] %2" : : | ||
115 | "r" (mask), | ||
116 | "r" (BW_LOCAL_BASE + BW_INTR_TABLE_CLEAR + (sbus_level << 3)), | ||
117 | "i" (ASI_M_CTL)); | ||
118 | } | ||
119 | |||
120 | static inline unsigned bw_get_prof_limit(int cpu) | ||
121 | { | ||
122 | unsigned limit; | ||
123 | |||
124 | __asm__ __volatile__ ("lda [%1] %2, %0" : | ||
125 | "=r" (limit) : | ||
126 | "r" (CSR_BASE(cpu) + BW_PTIMER_LIMIT), | ||
127 | "i" (ASI_M_CTL)); | ||
128 | return limit; | ||
129 | } | ||
130 | |||
131 | static inline void bw_set_prof_limit(int cpu, unsigned limit) | ||
132 | { | ||
133 | __asm__ __volatile__ ("sta %0, [%1] %2" : : | ||
134 | "r" (limit), | ||
135 | "r" (CSR_BASE(cpu) + BW_PTIMER_LIMIT), | ||
136 | "i" (ASI_M_CTL)); | ||
137 | } | ||
138 | |||
139 | static inline unsigned bw_get_ctrl(int cpu) | ||
140 | { | ||
141 | unsigned ctrl; | ||
142 | |||
143 | __asm__ __volatile__ ("lda [%1] %2, %0" : | ||
144 | "=r" (ctrl) : | ||
145 | "r" (CSR_BASE(cpu) + BW_CTRL), | ||
146 | "i" (ASI_M_CTL)); | ||
147 | return ctrl; | ||
148 | } | ||
149 | |||
150 | static inline void bw_set_ctrl(int cpu, unsigned ctrl) | ||
151 | { | ||
152 | __asm__ __volatile__ ("sta %0, [%1] %2" : : | ||
153 | "r" (ctrl), | ||
154 | "r" (CSR_BASE(cpu) + BW_CTRL), | ||
155 | "i" (ASI_M_CTL)); | ||
156 | } | ||
157 | |||
158 | extern unsigned char cpu_leds[32]; | ||
159 | |||
160 | static inline void show_leds(int cpuid) | ||
161 | { | ||
162 | cpuid &= 0x1e; | ||
163 | __asm__ __volatile__ ("stba %0, [%1] %2" : : | ||
164 | "r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]), | ||
165 | "r" (ECSR_BASE(cpuid) | BB_LEDS), | ||
166 | "i" (ASI_M_CTL)); | ||
167 | } | ||
168 | |||
169 | static inline unsigned cc_get_ipen(void) | ||
170 | { | ||
171 | unsigned pending; | ||
172 | |||
173 | __asm__ __volatile__ ("lduha [%1] %2, %0" : | ||
174 | "=r" (pending) : | ||
175 | "r" (CC_IPEN), | ||
176 | "i" (ASI_M_MXCC)); | ||
177 | return pending; | ||
178 | } | ||
179 | |||
180 | static inline void cc_set_iclr(unsigned clear) | ||
181 | { | ||
182 | __asm__ __volatile__ ("stha %0, [%1] %2" : : | ||
183 | "r" (clear), | ||
184 | "r" (CC_ICLR), | ||
185 | "i" (ASI_M_MXCC)); | ||
186 | } | ||
187 | |||
188 | static inline unsigned cc_get_imsk(void) | ||
189 | { | ||
190 | unsigned mask; | ||
191 | |||
192 | __asm__ __volatile__ ("lduha [%1] %2, %0" : | ||
193 | "=r" (mask) : | ||
194 | "r" (CC_IMSK), | ||
195 | "i" (ASI_M_MXCC)); | ||
196 | return mask; | ||
197 | } | ||
198 | |||
199 | static inline void cc_set_imsk(unsigned mask) | ||
200 | { | ||
201 | __asm__ __volatile__ ("stha %0, [%1] %2" : : | ||
202 | "r" (mask), | ||
203 | "r" (CC_IMSK), | ||
204 | "i" (ASI_M_MXCC)); | ||
205 | } | ||
206 | |||
207 | static inline unsigned cc_get_imsk_other(int cpuid) | ||
208 | { | ||
209 | unsigned mask; | ||
210 | |||
211 | __asm__ __volatile__ ("lduha [%1] %2, %0" : | ||
212 | "=r" (mask) : | ||
213 | "r" (ECSR_BASE(cpuid) | CC_IMSK), | ||
214 | "i" (ASI_M_CTL)); | ||
215 | return mask; | ||
216 | } | ||
217 | |||
218 | static inline void cc_set_imsk_other(int cpuid, unsigned mask) | ||
219 | { | ||
220 | __asm__ __volatile__ ("stha %0, [%1] %2" : : | ||
221 | "r" (mask), | ||
222 | "r" (ECSR_BASE(cpuid) | CC_IMSK), | ||
223 | "i" (ASI_M_CTL)); | ||
224 | } | ||
225 | |||
226 | static inline void cc_set_igen(unsigned gen) | ||
227 | { | ||
228 | __asm__ __volatile__ ("sta %0, [%1] %2" : : | ||
229 | "r" (gen), | ||
230 | "r" (CC_IGEN), | ||
231 | "i" (ASI_M_MXCC)); | ||
232 | } | ||
233 | |||
234 | /* +-------+-------------+-----------+------------------------------------+ | ||
235 | * | bcast | devid | sid | levels mask | | ||
236 | * +-------+-------------+-----------+------------------------------------+ | ||
237 | * 31 30 23 22 15 14 0 | ||
238 | */ | ||
239 | #define IGEN_MESSAGE(bcast, devid, sid, levels) \ | ||
240 | (((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels)) | ||
241 | |||
242 | static inline void sun4d_send_ipi(int cpu, int level) | ||
243 | { | ||
244 | cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1))); | ||
245 | } | ||
246 | |||
247 | #endif /* !__ASSEMBLY__ */ | ||
248 | |||
249 | #endif /* !(_SPARC_OBIO_H) */ | ||
diff --git a/include/asm-sparc/of_device.h b/include/asm-sparc/of_device.h deleted file mode 100644 index e5f5aedc2293..000000000000 --- a/include/asm-sparc/of_device.h +++ /dev/null | |||
@@ -1,38 +0,0 @@ | |||
1 | #ifndef _ASM_SPARC_OF_DEVICE_H | ||
2 | #define _ASM_SPARC_OF_DEVICE_H | ||
3 | #ifdef __KERNEL__ | ||
4 | |||
5 | #include <linux/device.h> | ||
6 | #include <linux/of.h> | ||
7 | #include <linux/mod_devicetable.h> | ||
8 | #include <asm/openprom.h> | ||
9 | |||
10 | /* | ||
11 | * The of_device is a kind of "base class" that is a superset of | ||
12 | * struct device for use by devices attached to an OF node and | ||
13 | * probed using OF properties. | ||
14 | */ | ||
15 | struct of_device | ||
16 | { | ||
17 | struct device_node *node; | ||
18 | struct device dev; | ||
19 | struct resource resource[PROMREG_MAX]; | ||
20 | unsigned int irqs[PROMINTR_MAX]; | ||
21 | int num_irqs; | ||
22 | |||
23 | void *sysdata; | ||
24 | |||
25 | int slot; | ||
26 | int portid; | ||
27 | int clock_freq; | ||
28 | }; | ||
29 | |||
30 | extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name); | ||
31 | extern void of_iounmap(struct resource *res, void __iomem *base, unsigned long size); | ||
32 | |||
33 | /* These are just here during the transition */ | ||
34 | #include <linux/of_device.h> | ||
35 | #include <linux/of_platform.h> | ||
36 | |||
37 | #endif /* __KERNEL__ */ | ||
38 | #endif /* _ASM_SPARC_OF_DEVICE_H */ | ||
diff --git a/include/asm-sparc/of_platform.h b/include/asm-sparc/of_platform.h deleted file mode 100644 index 38334351c36b..000000000000 --- a/include/asm-sparc/of_platform.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | #ifndef _ASM_SPARC_OF_PLATFORM_H | ||
2 | #define _ASM_SPARC_OF_PLATFORM_H | ||
3 | /* | ||
4 | * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. | ||
5 | * <benh@kernel.crashing.org> | ||
6 | * Modified for Sparc by merging parts of asm-sparc/of_device.h | ||
7 | * by Stephen Rothwell | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | /* This is just here during the transition */ | ||
17 | #include <linux/of_platform.h> | ||
18 | |||
19 | extern struct bus_type ebus_bus_type; | ||
20 | extern struct bus_type sbus_bus_type; | ||
21 | |||
22 | #define of_bus_type of_platform_bus_type /* for compatibility */ | ||
23 | |||
24 | #endif /* _ASM_SPARC_OF_PLATFORM_H */ | ||
diff --git a/include/asm-sparc/openprom.h b/include/asm-sparc/openprom.h deleted file mode 100644 index ed4b6bc2b102..000000000000 --- a/include/asm-sparc/openprom.h +++ /dev/null | |||
@@ -1,257 +0,0 @@ | |||
1 | #ifndef __SPARC_OPENPROM_H | ||
2 | #define __SPARC_OPENPROM_H | ||
3 | |||
4 | /* openprom.h: Prom structures and defines for access to the OPENBOOT | ||
5 | * prom routines and data areas. | ||
6 | * | ||
7 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
8 | */ | ||
9 | |||
10 | #include <asm/vaddrs.h> | ||
11 | |||
12 | /* Empirical constants... */ | ||
13 | #define LINUX_OPPROM_MAGIC 0x10010407 | ||
14 | |||
15 | #ifndef __ASSEMBLY__ | ||
16 | /* V0 prom device operations. */ | ||
17 | struct linux_dev_v0_funcs { | ||
18 | int (*v0_devopen)(char *device_str); | ||
19 | int (*v0_devclose)(int dev_desc); | ||
20 | int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); | ||
21 | int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); | ||
22 | int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf); | ||
23 | int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf); | ||
24 | int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf); | ||
25 | int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf); | ||
26 | int (*v0_seekdev)(int dev_desc, long logical_offst, int from); | ||
27 | }; | ||
28 | |||
29 | /* V2 and later prom device operations. */ | ||
30 | struct linux_dev_v2_funcs { | ||
31 | int (*v2_inst2pkg)(int d); /* Convert ihandle to phandle */ | ||
32 | char * (*v2_dumb_mem_alloc)(char *va, unsigned sz); | ||
33 | void (*v2_dumb_mem_free)(char *va, unsigned sz); | ||
34 | |||
35 | /* To map devices into virtual I/O space. */ | ||
36 | char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz); | ||
37 | void (*v2_dumb_munmap)(char *virta, unsigned size); | ||
38 | |||
39 | int (*v2_dev_open)(char *devpath); | ||
40 | void (*v2_dev_close)(int d); | ||
41 | int (*v2_dev_read)(int d, char *buf, int nbytes); | ||
42 | int (*v2_dev_write)(int d, char *buf, int nbytes); | ||
43 | int (*v2_dev_seek)(int d, int hi, int lo); | ||
44 | |||
45 | /* Never issued (multistage load support) */ | ||
46 | void (*v2_wheee2)(void); | ||
47 | void (*v2_wheee3)(void); | ||
48 | }; | ||
49 | |||
50 | struct linux_mlist_v0 { | ||
51 | struct linux_mlist_v0 *theres_more; | ||
52 | char *start_adr; | ||
53 | unsigned num_bytes; | ||
54 | }; | ||
55 | |||
56 | struct linux_mem_v0 { | ||
57 | struct linux_mlist_v0 **v0_totphys; | ||
58 | struct linux_mlist_v0 **v0_prommap; | ||
59 | struct linux_mlist_v0 **v0_available; /* What we can use */ | ||
60 | }; | ||
61 | |||
62 | /* Arguments sent to the kernel from the boot prompt. */ | ||
63 | struct linux_arguments_v0 { | ||
64 | char *argv[8]; | ||
65 | char args[100]; | ||
66 | char boot_dev[2]; | ||
67 | int boot_dev_ctrl; | ||
68 | int boot_dev_unit; | ||
69 | int dev_partition; | ||
70 | char *kernel_file_name; | ||
71 | void *aieee1; /* XXX */ | ||
72 | }; | ||
73 | |||
74 | /* V2 and up boot things. */ | ||
75 | struct linux_bootargs_v2 { | ||
76 | char **bootpath; | ||
77 | char **bootargs; | ||
78 | int *fd_stdin; | ||
79 | int *fd_stdout; | ||
80 | }; | ||
81 | |||
82 | /* The top level PROM vector. */ | ||
83 | struct linux_romvec { | ||
84 | /* Version numbers. */ | ||
85 | unsigned int pv_magic_cookie; | ||
86 | unsigned int pv_romvers; | ||
87 | unsigned int pv_plugin_revision; | ||
88 | unsigned int pv_printrev; | ||
89 | |||
90 | /* Version 0 memory descriptors. */ | ||
91 | struct linux_mem_v0 pv_v0mem; | ||
92 | |||
93 | /* Node operations. */ | ||
94 | struct linux_nodeops *pv_nodeops; | ||
95 | |||
96 | char **pv_bootstr; | ||
97 | struct linux_dev_v0_funcs pv_v0devops; | ||
98 | |||
99 | char *pv_stdin; | ||
100 | char *pv_stdout; | ||
101 | #define PROMDEV_KBD 0 /* input from keyboard */ | ||
102 | #define PROMDEV_SCREEN 0 /* output to screen */ | ||
103 | #define PROMDEV_TTYA 1 /* in/out to ttya */ | ||
104 | #define PROMDEV_TTYB 2 /* in/out to ttyb */ | ||
105 | |||
106 | /* Blocking getchar/putchar. NOT REENTRANT! (grr) */ | ||
107 | int (*pv_getchar)(void); | ||
108 | void (*pv_putchar)(int ch); | ||
109 | |||
110 | /* Non-blocking variants. */ | ||
111 | int (*pv_nbgetchar)(void); | ||
112 | int (*pv_nbputchar)(int ch); | ||
113 | |||
114 | void (*pv_putstr)(char *str, int len); | ||
115 | |||
116 | /* Miscellany. */ | ||
117 | void (*pv_reboot)(char *bootstr); | ||
118 | void (*pv_printf)(__const__ char *fmt, ...); | ||
119 | void (*pv_abort)(void); | ||
120 | __volatile__ int *pv_ticks; | ||
121 | void (*pv_halt)(void); | ||
122 | void (**pv_synchook)(void); | ||
123 | |||
124 | /* Evaluate a forth string, not different proto for V0 and V2->up. */ | ||
125 | union { | ||
126 | void (*v0_eval)(int len, char *str); | ||
127 | void (*v2_eval)(char *str); | ||
128 | } pv_fortheval; | ||
129 | |||
130 | struct linux_arguments_v0 **pv_v0bootargs; | ||
131 | |||
132 | /* Get ether address. */ | ||
133 | unsigned int (*pv_enaddr)(int d, char *enaddr); | ||
134 | |||
135 | struct linux_bootargs_v2 pv_v2bootargs; | ||
136 | struct linux_dev_v2_funcs pv_v2devops; | ||
137 | |||
138 | int filler[15]; | ||
139 | |||
140 | /* This one is sun4c/sun4 only. */ | ||
141 | void (*pv_setctxt)(int ctxt, char *va, int pmeg); | ||
142 | |||
143 | /* Prom version 3 Multiprocessor routines. This stuff is crazy. | ||
144 | * No joke. Calling these when there is only one cpu probably | ||
145 | * crashes the machine, have to test this. :-) | ||
146 | */ | ||
147 | |||
148 | /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context | ||
149 | * 'thiscontext' executing at address 'prog_counter' | ||
150 | */ | ||
151 | int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr, | ||
152 | int thiscontext, char *prog_counter); | ||
153 | |||
154 | /* v3_cpustop() will cause cpu 'whichcpu' to stop executing | ||
155 | * until a resume cpu call is made. | ||
156 | */ | ||
157 | int (*v3_cpustop)(unsigned int whichcpu); | ||
158 | |||
159 | /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or | ||
160 | * resume cpu call is made. | ||
161 | */ | ||
162 | int (*v3_cpuidle)(unsigned int whichcpu); | ||
163 | |||
164 | /* v3_cpuresume() will resume processor 'whichcpu' executing | ||
165 | * starting with whatever 'pc' and 'npc' were left at the | ||
166 | * last 'idle' or 'stop' call. | ||
167 | */ | ||
168 | int (*v3_cpuresume)(unsigned int whichcpu); | ||
169 | }; | ||
170 | |||
171 | /* Routines for traversing the prom device tree. */ | ||
172 | struct linux_nodeops { | ||
173 | int (*no_nextnode)(int node); | ||
174 | int (*no_child)(int node); | ||
175 | int (*no_proplen)(int node, char *name); | ||
176 | int (*no_getprop)(int node, char *name, char *val); | ||
177 | int (*no_setprop)(int node, char *name, char *val, int len); | ||
178 | char * (*no_nextprop)(int node, char *name); | ||
179 | }; | ||
180 | |||
181 | /* More fun PROM structures for device probing. */ | ||
182 | #define PROMREG_MAX 16 | ||
183 | #define PROMVADDR_MAX 16 | ||
184 | #define PROMINTR_MAX 15 | ||
185 | |||
186 | struct linux_prom_registers { | ||
187 | unsigned int which_io; /* is this in OBIO space? */ | ||
188 | unsigned int phys_addr; /* The physical address of this register */ | ||
189 | unsigned int reg_size; /* How many bytes does this register take up? */ | ||
190 | }; | ||
191 | |||
192 | struct linux_prom_irqs { | ||
193 | int pri; /* IRQ priority */ | ||
194 | int vector; /* This is foobar, what does it do? */ | ||
195 | }; | ||
196 | |||
197 | /* Element of the "ranges" vector */ | ||
198 | struct linux_prom_ranges { | ||
199 | unsigned int ot_child_space; | ||
200 | unsigned int ot_child_base; /* Bus feels this */ | ||
201 | unsigned int ot_parent_space; | ||
202 | unsigned int ot_parent_base; /* CPU looks from here */ | ||
203 | unsigned int or_size; | ||
204 | }; | ||
205 | |||
206 | /* Ranges and reg properties are a bit different for PCI. */ | ||
207 | struct linux_prom_pci_registers { | ||
208 | /* | ||
209 | * We don't know what information this field contain. | ||
210 | * We guess, PCI device function is in bits 15:8 | ||
211 | * So, ... | ||
212 | */ | ||
213 | unsigned int which_io; /* Let it be which_io */ | ||
214 | |||
215 | unsigned int phys_hi; | ||
216 | unsigned int phys_lo; | ||
217 | |||
218 | unsigned int size_hi; | ||
219 | unsigned int size_lo; | ||
220 | }; | ||
221 | |||
222 | struct linux_prom_pci_ranges { | ||
223 | unsigned int child_phys_hi; /* Only certain bits are encoded here. */ | ||
224 | unsigned int child_phys_mid; | ||
225 | unsigned int child_phys_lo; | ||
226 | |||
227 | unsigned int parent_phys_hi; | ||
228 | unsigned int parent_phys_lo; | ||
229 | |||
230 | unsigned int size_hi; | ||
231 | unsigned int size_lo; | ||
232 | }; | ||
233 | |||
234 | struct linux_prom_pci_assigned_addresses { | ||
235 | unsigned int which_io; | ||
236 | |||
237 | unsigned int phys_hi; | ||
238 | unsigned int phys_lo; | ||
239 | |||
240 | unsigned int size_hi; | ||
241 | unsigned int size_lo; | ||
242 | }; | ||
243 | |||
244 | struct linux_prom_ebus_ranges { | ||
245 | unsigned int child_phys_hi; | ||
246 | unsigned int child_phys_lo; | ||
247 | |||
248 | unsigned int parent_phys_hi; | ||
249 | unsigned int parent_phys_mid; | ||
250 | unsigned int parent_phys_lo; | ||
251 | |||
252 | unsigned int size; | ||
253 | }; | ||
254 | |||
255 | #endif /* !(__ASSEMBLY__) */ | ||
256 | |||
257 | #endif /* !(__SPARC_OPENPROM_H) */ | ||
diff --git a/include/asm-sparc/openpromio.h b/include/asm-sparc/openpromio.h deleted file mode 100644 index 917fb8e9c633..000000000000 --- a/include/asm-sparc/openpromio.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | #ifndef _SPARC_OPENPROMIO_H | ||
2 | #define _SPARC_OPENPROMIO_H | ||
3 | |||
4 | #include <linux/compiler.h> | ||
5 | #include <linux/ioctl.h> | ||
6 | #include <linux/types.h> | ||
7 | |||
8 | /* | ||
9 | * SunOS and Solaris /dev/openprom definitions. The ioctl values | ||
10 | * were chosen to be exactly equal to the SunOS equivalents. | ||
11 | */ | ||
12 | |||
13 | struct openpromio | ||
14 | { | ||
15 | u_int oprom_size; /* Actual size of the oprom_array. */ | ||
16 | char oprom_array[1]; /* Holds property names and values. */ | ||
17 | }; | ||
18 | |||
19 | #define OPROMMAXPARAM 4096 /* Maximum size of oprom_array. */ | ||
20 | |||
21 | #define OPROMGETOPT 0x20004F01 | ||
22 | #define OPROMSETOPT 0x20004F02 | ||
23 | #define OPROMNXTOPT 0x20004F03 | ||
24 | #define OPROMSETOPT2 0x20004F04 | ||
25 | #define OPROMNEXT 0x20004F05 | ||
26 | #define OPROMCHILD 0x20004F06 | ||
27 | #define OPROMGETPROP 0x20004F07 | ||
28 | #define OPROMNXTPROP 0x20004F08 | ||
29 | #define OPROMU2P 0x20004F09 | ||
30 | #define OPROMGETCONS 0x20004F0A | ||
31 | #define OPROMGETFBNAME 0x20004F0B | ||
32 | #define OPROMGETBOOTARGS 0x20004F0C | ||
33 | /* Linux extensions */ /* Arguments in oprom_array: */ | ||
34 | #define OPROMSETCUR 0x20004FF0 /* int node - Sets current node */ | ||
35 | #define OPROMPCI2NODE 0x20004FF1 /* int pci_bus, pci_devfn - Sets current node to PCI device's node */ | ||
36 | #define OPROMPATH2NODE 0x20004FF2 /* char path[] - Set current node from fully qualified PROM path */ | ||
37 | |||
38 | /* | ||
39 | * Return values from OPROMGETCONS: | ||
40 | */ | ||
41 | |||
42 | #define OPROMCONS_NOT_WSCONS 0 | ||
43 | #define OPROMCONS_STDIN_IS_KBD 0x1 /* stdin device is kbd */ | ||
44 | #define OPROMCONS_STDOUT_IS_FB 0x2 /* stdout is a framebuffer */ | ||
45 | #define OPROMCONS_OPENPROM 0x4 /* supports openboot */ | ||
46 | |||
47 | |||
48 | /* | ||
49 | * NetBSD/OpenBSD /dev/openprom definitions. | ||
50 | */ | ||
51 | |||
52 | struct opiocdesc | ||
53 | { | ||
54 | int op_nodeid; /* PROM Node ID (value-result) */ | ||
55 | int op_namelen; /* Length of op_name. */ | ||
56 | char __user *op_name; /* Pointer to the property name. */ | ||
57 | int op_buflen; /* Length of op_buf (value-result) */ | ||
58 | char __user *op_buf; /* Pointer to buffer. */ | ||
59 | }; | ||
60 | |||
61 | #define OPIOCGET _IOWR('O', 1, struct opiocdesc) | ||
62 | #define OPIOCSET _IOW('O', 2, struct opiocdesc) | ||
63 | #define OPIOCNEXTPROP _IOWR('O', 3, struct opiocdesc) | ||
64 | #define OPIOCGETOPTNODE _IOR('O', 4, int) | ||
65 | #define OPIOCGETNEXT _IOWR('O', 5, int) | ||
66 | #define OPIOCGETCHILD _IOWR('O', 6, int) | ||
67 | |||
68 | #endif /* _SPARC_OPENPROMIO_H */ | ||
69 | |||
diff --git a/include/asm-sparc/oplib.h b/include/asm-sparc/oplib.h deleted file mode 100644 index 61c3ca6a8ac3..000000000000 --- a/include/asm-sparc/oplib.h +++ /dev/null | |||
@@ -1,273 +0,0 @@ | |||
1 | /* | ||
2 | * oplib.h: Describes the interface and available routines in the | ||
3 | * Linux Prom library. | ||
4 | * | ||
5 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
6 | */ | ||
7 | |||
8 | #ifndef __SPARC_OPLIB_H | ||
9 | #define __SPARC_OPLIB_H | ||
10 | |||
11 | #include <asm/openprom.h> | ||
12 | #include <linux/spinlock.h> | ||
13 | #include <linux/compiler.h> | ||
14 | |||
15 | /* The master romvec pointer... */ | ||
16 | extern struct linux_romvec *romvec; | ||
17 | |||
18 | /* Enumeration to describe the prom major version we have detected. */ | ||
19 | enum prom_major_version { | ||
20 | PROM_V0, /* Original sun4c V0 prom */ | ||
21 | PROM_V2, /* sun4c and early sun4m V2 prom */ | ||
22 | PROM_V3, /* sun4m and later, up to sun4d/sun4e machines V3 */ | ||
23 | PROM_P1275, /* IEEE compliant ISA based Sun PROM, only sun4u */ | ||
24 | PROM_AP1000, /* actually no prom at all */ | ||
25 | PROM_SUN4, /* Old sun4 proms are totally different, but we'll shoehorn it to make it fit */ | ||
26 | }; | ||
27 | |||
28 | extern enum prom_major_version prom_vers; | ||
29 | /* Revision, and firmware revision. */ | ||
30 | extern unsigned int prom_rev, prom_prev; | ||
31 | |||
32 | /* Root node of the prom device tree, this stays constant after | ||
33 | * initialization is complete. | ||
34 | */ | ||
35 | extern int prom_root_node; | ||
36 | |||
37 | /* Pointer to prom structure containing the device tree traversal | ||
38 | * and usage utility functions. Only prom-lib should use these, | ||
39 | * users use the interface defined by the library only! | ||
40 | */ | ||
41 | extern struct linux_nodeops *prom_nodeops; | ||
42 | |||
43 | /* The functions... */ | ||
44 | |||
45 | /* You must call prom_init() before using any of the library services, | ||
46 | * preferably as early as possible. Pass it the romvec pointer. | ||
47 | */ | ||
48 | extern void prom_init(struct linux_romvec *rom_ptr); | ||
49 | |||
50 | /* Boot argument acquisition, returns the boot command line string. */ | ||
51 | extern char *prom_getbootargs(void); | ||
52 | |||
53 | /* Device utilities. */ | ||
54 | |||
55 | /* Map and unmap devices in IO space at virtual addresses. Note that the | ||
56 | * virtual address you pass is a request and the prom may put your mappings | ||
57 | * somewhere else, so check your return value as that is where your new | ||
58 | * mappings really are! | ||
59 | * | ||
60 | * Another note, these are only available on V2 or higher proms! | ||
61 | */ | ||
62 | extern char *prom_mapio(char *virt_hint, int io_space, unsigned int phys_addr, unsigned int num_bytes); | ||
63 | extern void prom_unmapio(char *virt_addr, unsigned int num_bytes); | ||
64 | |||
65 | /* Device operations. */ | ||
66 | |||
67 | /* Open the device described by the passed string. Note, that the format | ||
68 | * of the string is different on V0 vs. V2->higher proms. The caller must | ||
69 | * know what he/she is doing! Returns the device descriptor, an int. | ||
70 | */ | ||
71 | extern int prom_devopen(char *device_string); | ||
72 | |||
73 | /* Close a previously opened device described by the passed integer | ||
74 | * descriptor. | ||
75 | */ | ||
76 | extern int prom_devclose(int device_handle); | ||
77 | |||
78 | /* Do a seek operation on the device described by the passed integer | ||
79 | * descriptor. | ||
80 | */ | ||
81 | extern void prom_seek(int device_handle, unsigned int seek_hival, | ||
82 | unsigned int seek_lowval); | ||
83 | |||
84 | /* Miscellaneous routines, don't really fit in any category per se. */ | ||
85 | |||
86 | /* Reboot the machine with the command line passed. */ | ||
87 | extern void prom_reboot(char *boot_command); | ||
88 | |||
89 | /* Evaluate the forth string passed. */ | ||
90 | extern void prom_feval(char *forth_string); | ||
91 | |||
92 | /* Enter the prom, with possibility of continuation with the 'go' | ||
93 | * command in newer proms. | ||
94 | */ | ||
95 | extern void prom_cmdline(void); | ||
96 | |||
97 | /* Enter the prom, with no chance of continuation for the stand-alone | ||
98 | * which calls this. | ||
99 | */ | ||
100 | extern void prom_halt(void) __attribute__ ((noreturn)); | ||
101 | |||
102 | /* Set the PROM 'sync' callback function to the passed function pointer. | ||
103 | * When the user gives the 'sync' command at the prom prompt while the | ||
104 | * kernel is still active, the prom will call this routine. | ||
105 | * | ||
106 | * XXX The arguments are different on V0 vs. V2->higher proms, grrr! XXX | ||
107 | */ | ||
108 | typedef void (*sync_func_t)(void); | ||
109 | extern void prom_setsync(sync_func_t func_ptr); | ||
110 | |||
111 | /* Acquire the IDPROM of the root node in the prom device tree. This | ||
112 | * gets passed a buffer where you would like it stuffed. The return value | ||
113 | * is the format type of this idprom or 0xff on error. | ||
114 | */ | ||
115 | extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size); | ||
116 | |||
117 | /* Get the prom major version. */ | ||
118 | extern int prom_version(void); | ||
119 | |||
120 | /* Get the prom plugin revision. */ | ||
121 | extern int prom_getrev(void); | ||
122 | |||
123 | /* Get the prom firmware revision. */ | ||
124 | extern int prom_getprev(void); | ||
125 | |||
126 | /* Character operations to/from the console.... */ | ||
127 | |||
128 | /* Non-blocking get character from console. */ | ||
129 | extern int prom_nbgetchar(void); | ||
130 | |||
131 | /* Non-blocking put character to console. */ | ||
132 | extern int prom_nbputchar(char character); | ||
133 | |||
134 | /* Blocking get character from console. */ | ||
135 | extern char prom_getchar(void); | ||
136 | |||
137 | /* Blocking put character to console. */ | ||
138 | extern void prom_putchar(char character); | ||
139 | |||
140 | /* Prom's internal routines, don't use in kernel/boot code. */ | ||
141 | extern void prom_printf(char *fmt, ...); | ||
142 | extern void prom_write(const char *buf, unsigned int len); | ||
143 | |||
144 | /* Multiprocessor operations... */ | ||
145 | |||
146 | /* Start the CPU with the given device tree node, context table, and context | ||
147 | * at the passed program counter. | ||
148 | */ | ||
149 | extern int prom_startcpu(int cpunode, struct linux_prom_registers *context_table, | ||
150 | int context, char *program_counter); | ||
151 | |||
152 | /* Stop the CPU with the passed device tree node. */ | ||
153 | extern int prom_stopcpu(int cpunode); | ||
154 | |||
155 | /* Idle the CPU with the passed device tree node. */ | ||
156 | extern int prom_idlecpu(int cpunode); | ||
157 | |||
158 | /* Re-Start the CPU with the passed device tree node. */ | ||
159 | extern int prom_restartcpu(int cpunode); | ||
160 | |||
161 | /* PROM memory allocation facilities... */ | ||
162 | |||
163 | /* Allocated at possibly the given virtual address a chunk of the | ||
164 | * indicated size. | ||
165 | */ | ||
166 | extern char *prom_alloc(char *virt_hint, unsigned int size); | ||
167 | |||
168 | /* Free a previously allocated chunk. */ | ||
169 | extern void prom_free(char *virt_addr, unsigned int size); | ||
170 | |||
171 | /* Sun4/sun4c specific memory-management startup hook. */ | ||
172 | |||
173 | /* Map the passed segment in the given context at the passed | ||
174 | * virtual address. | ||
175 | */ | ||
176 | extern void prom_putsegment(int context, unsigned long virt_addr, | ||
177 | int physical_segment); | ||
178 | |||
179 | |||
180 | /* PROM device tree traversal functions... */ | ||
181 | |||
182 | #ifdef PROMLIB_INTERNAL | ||
183 | |||
184 | /* Internal version of prom_getchild. */ | ||
185 | extern int __prom_getchild(int parent_node); | ||
186 | |||
187 | /* Internal version of prom_getsibling. */ | ||
188 | extern int __prom_getsibling(int node); | ||
189 | |||
190 | #endif | ||
191 | |||
192 | |||
193 | /* Get the child node of the given node, or zero if no child exists. */ | ||
194 | extern int prom_getchild(int parent_node); | ||
195 | |||
196 | /* Get the next sibling node of the given node, or zero if no further | ||
197 | * siblings exist. | ||
198 | */ | ||
199 | extern int prom_getsibling(int node); | ||
200 | |||
201 | /* Get the length, at the passed node, of the given property type. | ||
202 | * Returns -1 on error (ie. no such property at this node). | ||
203 | */ | ||
204 | extern int prom_getproplen(int thisnode, char *property); | ||
205 | |||
206 | /* Fetch the requested property using the given buffer. Returns | ||
207 | * the number of bytes the prom put into your buffer or -1 on error. | ||
208 | */ | ||
209 | extern int __must_check prom_getproperty(int thisnode, char *property, | ||
210 | char *prop_buffer, int propbuf_size); | ||
211 | |||
212 | /* Acquire an integer property. */ | ||
213 | extern int prom_getint(int node, char *property); | ||
214 | |||
215 | /* Acquire an integer property, with a default value. */ | ||
216 | extern int prom_getintdefault(int node, char *property, int defval); | ||
217 | |||
218 | /* Acquire a boolean property, 0=FALSE 1=TRUE. */ | ||
219 | extern int prom_getbool(int node, char *prop); | ||
220 | |||
221 | /* Acquire a string property, null string on error. */ | ||
222 | extern void prom_getstring(int node, char *prop, char *buf, int bufsize); | ||
223 | |||
224 | /* Does the passed node have the given "name"? YES=1 NO=0 */ | ||
225 | extern int prom_nodematch(int thisnode, char *name); | ||
226 | |||
227 | /* Search all siblings starting at the passed node for "name" matching | ||
228 | * the given string. Returns the node on success, zero on failure. | ||
229 | */ | ||
230 | extern int prom_searchsiblings(int node_start, char *name); | ||
231 | |||
232 | /* Return the first property type, as a string, for the given node. | ||
233 | * Returns a null string on error. | ||
234 | */ | ||
235 | extern char *prom_firstprop(int node, char *buffer); | ||
236 | |||
237 | /* Returns the next property after the passed property for the given | ||
238 | * node. Returns null string on failure. | ||
239 | */ | ||
240 | extern char *prom_nextprop(int node, char *prev_property, char *buffer); | ||
241 | |||
242 | /* Returns phandle of the path specified */ | ||
243 | extern int prom_finddevice(char *name); | ||
244 | |||
245 | /* Returns 1 if the specified node has given property. */ | ||
246 | extern int prom_node_has_property(int node, char *property); | ||
247 | |||
248 | /* Set the indicated property at the given node with the passed value. | ||
249 | * Returns the number of bytes of your value that the prom took. | ||
250 | */ | ||
251 | extern int prom_setprop(int node, char *prop_name, char *prop_value, | ||
252 | int value_size); | ||
253 | |||
254 | extern int prom_pathtoinode(char *path); | ||
255 | extern int prom_inst2pkg(int); | ||
256 | |||
257 | /* Dorking with Bus ranges... */ | ||
258 | |||
259 | /* Apply promlib probes OBIO ranges to registers. */ | ||
260 | extern void prom_apply_obio_ranges(struct linux_prom_registers *obioregs, int nregs); | ||
261 | |||
262 | /* Apply ranges of any prom node (and optionally parent node as well) to registers. */ | ||
263 | extern void prom_apply_generic_ranges(int node, int parent, | ||
264 | struct linux_prom_registers *sbusregs, int nregs); | ||
265 | |||
266 | /* CPU probing helpers. */ | ||
267 | int cpu_find_by_instance(int instance, int *prom_node, int *mid); | ||
268 | int cpu_find_by_mid(int mid, int *prom_node); | ||
269 | int cpu_get_hwmid(int prom_node); | ||
270 | |||
271 | extern spinlock_t prom_lock; | ||
272 | |||
273 | #endif /* !(__SPARC_OPLIB_H) */ | ||
diff --git a/include/asm-sparc/page.h b/include/asm-sparc/page.h deleted file mode 100644 index 6aa9e4c910cf..000000000000 --- a/include/asm-sparc/page.h +++ /dev/null | |||
@@ -1,165 +0,0 @@ | |||
1 | /* | ||
2 | * page.h: Various defines and such for MMU operations on the Sparc for | ||
3 | * the Linux kernel. | ||
4 | * | ||
5 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
6 | */ | ||
7 | |||
8 | #ifndef _SPARC_PAGE_H | ||
9 | #define _SPARC_PAGE_H | ||
10 | |||
11 | #ifdef CONFIG_SUN4 | ||
12 | #define PAGE_SHIFT 13 | ||
13 | #else | ||
14 | #define PAGE_SHIFT 12 | ||
15 | #endif | ||
16 | #ifndef __ASSEMBLY__ | ||
17 | /* I have my suspicions... -DaveM */ | ||
18 | #define PAGE_SIZE (1UL << PAGE_SHIFT) | ||
19 | #else | ||
20 | #define PAGE_SIZE (1 << PAGE_SHIFT) | ||
21 | #endif | ||
22 | #define PAGE_MASK (~(PAGE_SIZE-1)) | ||
23 | |||
24 | #include <asm/btfixup.h> | ||
25 | |||
26 | #ifndef __ASSEMBLY__ | ||
27 | |||
28 | #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) | ||
29 | #define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE) | ||
30 | #define clear_user_page(addr, vaddr, page) \ | ||
31 | do { clear_page(addr); \ | ||
32 | sparc_flush_page_to_ram(page); \ | ||
33 | } while (0) | ||
34 | #define copy_user_page(to, from, vaddr, page) \ | ||
35 | do { copy_page(to, from); \ | ||
36 | sparc_flush_page_to_ram(page); \ | ||
37 | } while (0) | ||
38 | |||
39 | /* The following structure is used to hold the physical | ||
40 | * memory configuration of the machine. This is filled in | ||
41 | * prom_meminit() and is later used by mem_init() to set up | ||
42 | * mem_map[]. We statically allocate SPARC_PHYS_BANKS+1 of | ||
43 | * these structs, this is arbitrary. The entry after the | ||
44 | * last valid one has num_bytes==0. | ||
45 | */ | ||
46 | struct sparc_phys_banks { | ||
47 | unsigned long base_addr; | ||
48 | unsigned long num_bytes; | ||
49 | }; | ||
50 | |||
51 | #define SPARC_PHYS_BANKS 32 | ||
52 | |||
53 | extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1]; | ||
54 | |||
55 | /* Cache alias structure. Entry is valid if context != -1. */ | ||
56 | struct cache_palias { | ||
57 | unsigned long vaddr; | ||
58 | int context; | ||
59 | }; | ||
60 | |||
61 | extern struct cache_palias *sparc_aliases; | ||
62 | |||
63 | /* passing structs on the Sparc slow us down tremendously... */ | ||
64 | |||
65 | /* #define STRICT_MM_TYPECHECKS */ | ||
66 | |||
67 | #ifdef STRICT_MM_TYPECHECKS | ||
68 | /* | ||
69 | * These are used to make use of C type-checking.. | ||
70 | */ | ||
71 | typedef struct { unsigned long pte; } pte_t; | ||
72 | typedef struct { unsigned long iopte; } iopte_t; | ||
73 | typedef struct { unsigned long pmdv[16]; } pmd_t; | ||
74 | typedef struct { unsigned long pgd; } pgd_t; | ||
75 | typedef struct { unsigned long ctxd; } ctxd_t; | ||
76 | typedef struct { unsigned long pgprot; } pgprot_t; | ||
77 | typedef struct { unsigned long iopgprot; } iopgprot_t; | ||
78 | |||
79 | #define pte_val(x) ((x).pte) | ||
80 | #define iopte_val(x) ((x).iopte) | ||
81 | #define pmd_val(x) ((x).pmdv[0]) | ||
82 | #define pgd_val(x) ((x).pgd) | ||
83 | #define ctxd_val(x) ((x).ctxd) | ||
84 | #define pgprot_val(x) ((x).pgprot) | ||
85 | #define iopgprot_val(x) ((x).iopgprot) | ||
86 | |||
87 | #define __pte(x) ((pte_t) { (x) } ) | ||
88 | #define __iopte(x) ((iopte_t) { (x) } ) | ||
89 | /* #define __pmd(x) ((pmd_t) { (x) } ) */ /* XXX procedure with loop */ | ||
90 | #define __pgd(x) ((pgd_t) { (x) } ) | ||
91 | #define __ctxd(x) ((ctxd_t) { (x) } ) | ||
92 | #define __pgprot(x) ((pgprot_t) { (x) } ) | ||
93 | #define __iopgprot(x) ((iopgprot_t) { (x) } ) | ||
94 | |||
95 | #else | ||
96 | /* | ||
97 | * .. while these make it easier on the compiler | ||
98 | */ | ||
99 | typedef unsigned long pte_t; | ||
100 | typedef unsigned long iopte_t; | ||
101 | typedef struct { unsigned long pmdv[16]; } pmd_t; | ||
102 | typedef unsigned long pgd_t; | ||
103 | typedef unsigned long ctxd_t; | ||
104 | typedef unsigned long pgprot_t; | ||
105 | typedef unsigned long iopgprot_t; | ||
106 | |||
107 | #define pte_val(x) (x) | ||
108 | #define iopte_val(x) (x) | ||
109 | #define pmd_val(x) ((x).pmdv[0]) | ||
110 | #define pgd_val(x) (x) | ||
111 | #define ctxd_val(x) (x) | ||
112 | #define pgprot_val(x) (x) | ||
113 | #define iopgprot_val(x) (x) | ||
114 | |||
115 | #define __pte(x) (x) | ||
116 | #define __iopte(x) (x) | ||
117 | /* #define __pmd(x) (x) */ /* XXX later */ | ||
118 | #define __pgd(x) (x) | ||
119 | #define __ctxd(x) (x) | ||
120 | #define __pgprot(x) (x) | ||
121 | #define __iopgprot(x) (x) | ||
122 | |||
123 | #endif | ||
124 | |||
125 | typedef struct page *pgtable_t; | ||
126 | |||
127 | extern unsigned long sparc_unmapped_base; | ||
128 | |||
129 | BTFIXUPDEF_SETHI(sparc_unmapped_base) | ||
130 | |||
131 | #define TASK_UNMAPPED_BASE BTFIXUP_SETHI(sparc_unmapped_base) | ||
132 | |||
133 | #else /* !(__ASSEMBLY__) */ | ||
134 | |||
135 | #define __pgprot(x) (x) | ||
136 | |||
137 | #endif /* !(__ASSEMBLY__) */ | ||
138 | |||
139 | /* to align the pointer to the (next) page boundary */ | ||
140 | #define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) | ||
141 | |||
142 | #define PAGE_OFFSET 0xf0000000 | ||
143 | #ifndef __ASSEMBLY__ | ||
144 | extern unsigned long phys_base; | ||
145 | extern unsigned long pfn_base; | ||
146 | #endif | ||
147 | #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + phys_base) | ||
148 | #define __va(x) ((void *)((unsigned long) (x) - phys_base + PAGE_OFFSET)) | ||
149 | |||
150 | #define virt_to_phys __pa | ||
151 | #define phys_to_virt __va | ||
152 | |||
153 | #define ARCH_PFN_OFFSET (pfn_base) | ||
154 | #define virt_to_page(kaddr) (mem_map + ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT))) | ||
155 | |||
156 | #define pfn_valid(pfn) (((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr)) | ||
157 | #define virt_addr_valid(kaddr) ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr) | ||
158 | |||
159 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ | ||
160 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) | ||
161 | |||
162 | #include <asm-generic/memory_model.h> | ||
163 | #include <asm-generic/page.h> | ||
164 | |||
165 | #endif /* _SPARC_PAGE_H */ | ||
diff --git a/include/asm-sparc/param.h b/include/asm-sparc/param.h deleted file mode 100644 index 9836d9a3cb9a..000000000000 --- a/include/asm-sparc/param.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | #ifndef _ASMSPARC_PARAM_H | ||
2 | #define _ASMSPARC_PARAM_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | # define HZ CONFIG_HZ /* Internal kernel timer frequency */ | ||
6 | # define USER_HZ 100 /* .. some user interfaces are in "ticks" */ | ||
7 | # define CLOCKS_PER_SEC (USER_HZ) | ||
8 | #endif | ||
9 | |||
10 | #ifndef HZ | ||
11 | #define HZ 100 | ||
12 | #endif | ||
13 | |||
14 | #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */ | ||
15 | |||
16 | #ifndef NOGROUP | ||
17 | #define NOGROUP (-1) | ||
18 | #endif | ||
19 | |||
20 | #define MAXHOSTNAMELEN 64 /* max length of hostname */ | ||
21 | |||
22 | #endif | ||
diff --git a/include/asm-sparc/pbm.h b/include/asm-sparc/pbm.h deleted file mode 100644 index 458a4916d14d..000000000000 --- a/include/asm-sparc/pbm.h +++ /dev/null | |||
@@ -1,47 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * pbm.h: PCI bus module pseudo driver software state | ||
4 | * Adopted from sparc64 by V. Roganov and G. Raiko | ||
5 | * | ||
6 | * Original header: | ||
7 | * pbm.h: U2P PCI bus module pseudo driver software state. | ||
8 | * | ||
9 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) | ||
10 | * | ||
11 | * To put things into perspective, consider sparc64 with a few PCI controllers. | ||
12 | * Each type would have an own structure, with instances related one to one. | ||
13 | * We have only pcic on sparc, but we want to be compatible with sparc64 pbm.h. | ||
14 | * All three represent different abstractions. | ||
15 | * pci_bus - Linux PCI subsystem view of a PCI bus (including bridged buses) | ||
16 | * pbm - Arch-specific view of a PCI bus (sparc or sparc64) | ||
17 | * pcic - Chip-specific information for PCIC. | ||
18 | */ | ||
19 | |||
20 | #ifndef __SPARC_PBM_H | ||
21 | #define __SPARC_PBM_H | ||
22 | |||
23 | #include <linux/pci.h> | ||
24 | #include <asm/oplib.h> | ||
25 | #include <asm/prom.h> | ||
26 | |||
27 | struct linux_pbm_info { | ||
28 | int prom_node; | ||
29 | char prom_name[64]; | ||
30 | /* struct linux_prom_pci_ranges pbm_ranges[PROMREG_MAX]; */ | ||
31 | /* int num_pbm_ranges; */ | ||
32 | |||
33 | /* Now things for the actual PCI bus probes. */ | ||
34 | unsigned int pci_first_busno; /* Can it be nonzero? */ | ||
35 | struct pci_bus *pci_bus; /* Was inline, MJ allocs now */ | ||
36 | }; | ||
37 | |||
38 | /* PCI devices which are not bridges have this placed in their pci_dev | ||
39 | * sysdata member. This makes OBP aware PCI device drivers easier to | ||
40 | * code. | ||
41 | */ | ||
42 | struct pcidev_cookie { | ||
43 | struct linux_pbm_info *pbm; | ||
44 | struct device_node *prom_node; | ||
45 | }; | ||
46 | |||
47 | #endif /* !(__SPARC_PBM_H) */ | ||
diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h deleted file mode 100644 index b93b6c79e08f..000000000000 --- a/include/asm-sparc/pci.h +++ /dev/null | |||
@@ -1,170 +0,0 @@ | |||
1 | #ifndef __SPARC_PCI_H | ||
2 | #define __SPARC_PCI_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | |||
6 | /* Can be used to override the logic in pci_scan_bus for skipping | ||
7 | * already-configured bus numbers - to be used for buggy BIOSes | ||
8 | * or architectures with incomplete PCI setup by the loader. | ||
9 | */ | ||
10 | #define pcibios_assign_all_busses() 0 | ||
11 | #define pcibios_scan_all_fns(a, b) 0 | ||
12 | |||
13 | #define PCIBIOS_MIN_IO 0UL | ||
14 | #define PCIBIOS_MIN_MEM 0UL | ||
15 | |||
16 | #define PCI_IRQ_NONE 0xffffffff | ||
17 | |||
18 | static inline void pcibios_set_master(struct pci_dev *dev) | ||
19 | { | ||
20 | /* No special bus mastering setup handling */ | ||
21 | } | ||
22 | |||
23 | static inline void pcibios_penalize_isa_irq(int irq, int active) | ||
24 | { | ||
25 | /* We don't do dynamic PCI IRQ allocation */ | ||
26 | } | ||
27 | |||
28 | /* Dynamic DMA mapping stuff. | ||
29 | */ | ||
30 | #define PCI_DMA_BUS_IS_PHYS (0) | ||
31 | |||
32 | #include <asm/scatterlist.h> | ||
33 | |||
34 | struct pci_dev; | ||
35 | |||
36 | /* Allocate and map kernel buffer using consistent mode DMA for a device. | ||
37 | * hwdev should be valid struct pci_dev pointer for PCI devices. | ||
38 | */ | ||
39 | extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle); | ||
40 | |||
41 | /* Free and unmap a consistent DMA buffer. | ||
42 | * cpu_addr is what was returned from pci_alloc_consistent, | ||
43 | * size must be the same as what as passed into pci_alloc_consistent, | ||
44 | * and likewise dma_addr must be the same as what *dma_addrp was set to. | ||
45 | * | ||
46 | * References to the memory and mappings assosciated with cpu_addr/dma_addr | ||
47 | * past this call are illegal. | ||
48 | */ | ||
49 | extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); | ||
50 | |||
51 | /* Map a single buffer of the indicated size for DMA in streaming mode. | ||
52 | * The 32-bit bus address to use is returned. | ||
53 | * | ||
54 | * Once the device is given the dma address, the device owns this memory | ||
55 | * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed. | ||
56 | */ | ||
57 | extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction); | ||
58 | |||
59 | /* Unmap a single streaming mode DMA translation. The dma_addr and size | ||
60 | * must match what was provided for in a previous pci_map_single call. All | ||
61 | * other usages are undefined. | ||
62 | * | ||
63 | * After this call, reads by the cpu to the buffer are guaranteed to see | ||
64 | * whatever the device wrote there. | ||
65 | */ | ||
66 | extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction); | ||
67 | |||
68 | /* pci_unmap_{single,page} is not a nop, thus... */ | ||
69 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | ||
70 | dma_addr_t ADDR_NAME; | ||
71 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ | ||
72 | __u32 LEN_NAME; | ||
73 | #define pci_unmap_addr(PTR, ADDR_NAME) \ | ||
74 | ((PTR)->ADDR_NAME) | ||
75 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ | ||
76 | (((PTR)->ADDR_NAME) = (VAL)) | ||
77 | #define pci_unmap_len(PTR, LEN_NAME) \ | ||
78 | ((PTR)->LEN_NAME) | ||
79 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | ||
80 | (((PTR)->LEN_NAME) = (VAL)) | ||
81 | |||
82 | /* | ||
83 | * Same as above, only with pages instead of mapped addresses. | ||
84 | */ | ||
85 | extern dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, | ||
86 | unsigned long offset, size_t size, int direction); | ||
87 | extern void pci_unmap_page(struct pci_dev *hwdev, | ||
88 | dma_addr_t dma_address, size_t size, int direction); | ||
89 | |||
90 | /* Map a set of buffers described by scatterlist in streaming | ||
91 | * mode for DMA. This is the scather-gather version of the | ||
92 | * above pci_map_single interface. Here the scatter gather list | ||
93 | * elements are each tagged with the appropriate dma address | ||
94 | * and length. They are obtained via sg_dma_{address,length}(SG). | ||
95 | * | ||
96 | * NOTE: An implementation may be able to use a smaller number of | ||
97 | * DMA address/length pairs than there are SG table elements. | ||
98 | * (for example via virtual mapping capabilities) | ||
99 | * The routine returns the number of addr/length pairs actually | ||
100 | * used, at most nents. | ||
101 | * | ||
102 | * Device ownership issues as mentioned above for pci_map_single are | ||
103 | * the same here. | ||
104 | */ | ||
105 | extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction); | ||
106 | |||
107 | /* Unmap a set of streaming mode DMA translations. | ||
108 | * Again, cpu read rules concerning calls here are the same as for | ||
109 | * pci_unmap_single() above. | ||
110 | */ | ||
111 | extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction); | ||
112 | |||
113 | /* Make physical memory consistent for a single | ||
114 | * streaming mode DMA translation after a transfer. | ||
115 | * | ||
116 | * If you perform a pci_map_single() but wish to interrogate the | ||
117 | * buffer using the cpu, yet do not wish to teardown the PCI dma | ||
118 | * mapping, you must call this function before doing so. At the | ||
119 | * next point you give the PCI dma address back to the card, you | ||
120 | * must first perform a pci_dma_sync_for_device, and then the device | ||
121 | * again owns the buffer. | ||
122 | */ | ||
123 | extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); | ||
124 | extern void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); | ||
125 | |||
126 | /* Make physical memory consistent for a set of streaming | ||
127 | * mode DMA translations after a transfer. | ||
128 | * | ||
129 | * The same as pci_dma_sync_single_* but for a scatter-gather list, | ||
130 | * same rules and usage. | ||
131 | */ | ||
132 | extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); | ||
133 | extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); | ||
134 | |||
135 | /* Return whether the given PCI device DMA address mask can | ||
136 | * be supported properly. For example, if your device can | ||
137 | * only drive the low 24-bits during PCI bus mastering, then | ||
138 | * you would pass 0x00ffffff as the mask to this function. | ||
139 | */ | ||
140 | static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) | ||
141 | { | ||
142 | return 1; | ||
143 | } | ||
144 | |||
145 | #ifdef CONFIG_PCI | ||
146 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, | ||
147 | enum pci_dma_burst_strategy *strat, | ||
148 | unsigned long *strategy_parameter) | ||
149 | { | ||
150 | *strat = PCI_DMA_BURST_INFINITY; | ||
151 | *strategy_parameter = ~0UL; | ||
152 | } | ||
153 | #endif | ||
154 | |||
155 | #define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) | ||
156 | |||
157 | static inline int pci_dma_mapping_error(dma_addr_t dma_addr) | ||
158 | { | ||
159 | return (dma_addr == PCI_DMA_ERROR_CODE); | ||
160 | } | ||
161 | |||
162 | struct device_node; | ||
163 | extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); | ||
164 | |||
165 | #endif /* __KERNEL__ */ | ||
166 | |||
167 | /* generic pci stuff */ | ||
168 | #include <asm-generic/pci.h> | ||
169 | |||
170 | #endif /* __SPARC_PCI_H */ | ||
diff --git a/include/asm-sparc/pcic.h b/include/asm-sparc/pcic.h deleted file mode 100644 index f20ef562b265..000000000000 --- a/include/asm-sparc/pcic.h +++ /dev/null | |||
@@ -1,123 +0,0 @@ | |||
1 | /* | ||
2 | * pcic.h: JavaEngine 1 specific PCI definitions. | ||
3 | * | ||
4 | * Copyright (C) 1998 V. Roganov and G. Raiko | ||
5 | */ | ||
6 | |||
7 | #ifndef __SPARC_PCIC_H | ||
8 | #define __SPARC_PCIC_H | ||
9 | |||
10 | #ifndef __ASSEMBLY__ | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | #include <linux/smp.h> | ||
14 | #include <linux/pci.h> | ||
15 | #include <linux/ioport.h> | ||
16 | #include <asm/pbm.h> | ||
17 | |||
18 | struct linux_pcic { | ||
19 | void __iomem *pcic_regs; | ||
20 | unsigned long pcic_io; | ||
21 | void __iomem *pcic_config_space_addr; | ||
22 | void __iomem *pcic_config_space_data; | ||
23 | struct resource pcic_res_regs; | ||
24 | struct resource pcic_res_io; | ||
25 | struct resource pcic_res_cfg_addr; | ||
26 | struct resource pcic_res_cfg_data; | ||
27 | struct linux_pbm_info pbm; | ||
28 | struct pcic_ca2irq *pcic_imap; | ||
29 | int pcic_imdim; | ||
30 | }; | ||
31 | |||
32 | extern int pcic_probe(void); | ||
33 | /* Erm... MJ redefined pcibios_present() so that it does not work early. */ | ||
34 | extern int pcic_present(void); | ||
35 | extern void sun4m_pci_init_IRQ(void); | ||
36 | |||
37 | #endif | ||
38 | |||
39 | /* Size of PCI I/O space which we relocate. */ | ||
40 | #define PCI_SPACE_SIZE 0x1000000 /* 16 MB */ | ||
41 | |||
42 | /* PCIC Register Set. */ | ||
43 | #define PCI_DIAGNOSTIC_0 0x40 /* 32 bits */ | ||
44 | #define PCI_SIZE_0 0x44 /* 32 bits */ | ||
45 | #define PCI_SIZE_1 0x48 /* 32 bits */ | ||
46 | #define PCI_SIZE_2 0x4c /* 32 bits */ | ||
47 | #define PCI_SIZE_3 0x50 /* 32 bits */ | ||
48 | #define PCI_SIZE_4 0x54 /* 32 bits */ | ||
49 | #define PCI_SIZE_5 0x58 /* 32 bits */ | ||
50 | #define PCI_PIO_CONTROL 0x60 /* 8 bits */ | ||
51 | #define PCI_DVMA_CONTROL 0x62 /* 8 bits */ | ||
52 | #define PCI_DVMA_CONTROL_INACTIVITY_REQ (1<<0) | ||
53 | #define PCI_DVMA_CONTROL_IOTLB_ENABLE (1<<0) | ||
54 | #define PCI_DVMA_CONTROL_IOTLB_DISABLE 0 | ||
55 | #define PCI_DVMA_CONTROL_INACTIVITY_ACK (1<<4) | ||
56 | #define PCI_INTERRUPT_CONTROL 0x63 /* 8 bits */ | ||
57 | #define PCI_CPU_INTERRUPT_PENDING 0x64 /* 32 bits */ | ||
58 | #define PCI_DIAGNOSTIC_1 0x68 /* 16 bits */ | ||
59 | #define PCI_SOFTWARE_INT_CLEAR 0x6a /* 16 bits */ | ||
60 | #define PCI_SOFTWARE_INT_SET 0x6e /* 16 bits */ | ||
61 | #define PCI_SYS_INT_PENDING 0x70 /* 32 bits */ | ||
62 | #define PCI_SYS_INT_PENDING_PIO 0x40000000 | ||
63 | #define PCI_SYS_INT_PENDING_DMA 0x20000000 | ||
64 | #define PCI_SYS_INT_PENDING_PCI 0x10000000 | ||
65 | #define PCI_SYS_INT_PENDING_APSR 0x08000000 | ||
66 | #define PCI_SYS_INT_TARGET_MASK 0x74 /* 32 bits */ | ||
67 | #define PCI_SYS_INT_TARGET_MASK_CLEAR 0x78 /* 32 bits */ | ||
68 | #define PCI_SYS_INT_TARGET_MASK_SET 0x7c /* 32 bits */ | ||
69 | #define PCI_SYS_INT_PENDING_CLEAR 0x83 /* 8 bits */ | ||
70 | #define PCI_SYS_INT_PENDING_CLEAR_ALL 0x80 | ||
71 | #define PCI_SYS_INT_PENDING_CLEAR_PIO 0x40 | ||
72 | #define PCI_SYS_INT_PENDING_CLEAR_DMA 0x20 | ||
73 | #define PCI_SYS_INT_PENDING_CLEAR_PCI 0x10 | ||
74 | #define PCI_IOTLB_CONTROL 0x84 /* 8 bits */ | ||
75 | #define PCI_INT_SELECT_LO 0x88 /* 16 bits */ | ||
76 | #define PCI_ARBITRATION_SELECT 0x8a /* 16 bits */ | ||
77 | #define PCI_INT_SELECT_HI 0x8c /* 16 bits */ | ||
78 | #define PCI_HW_INT_OUTPUT 0x8e /* 16 bits */ | ||
79 | #define PCI_IOTLB_RAM_INPUT 0x90 /* 32 bits */ | ||
80 | #define PCI_IOTLB_CAM_INPUT 0x94 /* 32 bits */ | ||
81 | #define PCI_IOTLB_RAM_OUTPUT 0x98 /* 32 bits */ | ||
82 | #define PCI_IOTLB_CAM_OUTPUT 0x9c /* 32 bits */ | ||
83 | #define PCI_SMBAR0 0xa0 /* 8 bits */ | ||
84 | #define PCI_MSIZE0 0xa1 /* 8 bits */ | ||
85 | #define PCI_PMBAR0 0xa2 /* 8 bits */ | ||
86 | #define PCI_SMBAR1 0xa4 /* 8 bits */ | ||
87 | #define PCI_MSIZE1 0xa5 /* 8 bits */ | ||
88 | #define PCI_PMBAR1 0xa6 /* 8 bits */ | ||
89 | #define PCI_SIBAR 0xa8 /* 8 bits */ | ||
90 | #define PCI_SIBAR_ADDRESS_MASK 0xf | ||
91 | #define PCI_ISIZE 0xa9 /* 8 bits */ | ||
92 | #define PCI_ISIZE_16M 0xf | ||
93 | #define PCI_ISIZE_32M 0xe | ||
94 | #define PCI_ISIZE_64M 0xc | ||
95 | #define PCI_ISIZE_128M 0x8 | ||
96 | #define PCI_ISIZE_256M 0x0 | ||
97 | #define PCI_PIBAR 0xaa /* 8 bits */ | ||
98 | #define PCI_CPU_COUNTER_LIMIT_HI 0xac /* 32 bits */ | ||
99 | #define PCI_CPU_COUNTER_LIMIT_LO 0xb0 /* 32 bits */ | ||
100 | #define PCI_CPU_COUNTER_LIMIT 0xb4 /* 32 bits */ | ||
101 | #define PCI_SYS_LIMIT 0xb8 /* 32 bits */ | ||
102 | #define PCI_SYS_COUNTER 0xbc /* 32 bits */ | ||
103 | #define PCI_SYS_COUNTER_OVERFLOW (1<<31) /* Limit reached */ | ||
104 | #define PCI_SYS_LIMIT_PSEUDO 0xc0 /* 32 bits */ | ||
105 | #define PCI_USER_TIMER_CONTROL 0xc4 /* 8 bits */ | ||
106 | #define PCI_USER_TIMER_CONFIG 0xc5 /* 8 bits */ | ||
107 | #define PCI_COUNTER_IRQ 0xc6 /* 8 bits */ | ||
108 | #define PCI_COUNTER_IRQ_SET(sys_irq, cpu_irq) ((((sys_irq) & 0xf) << 4) | \ | ||
109 | ((cpu_irq) & 0xf)) | ||
110 | #define PCI_COUNTER_IRQ_SYS(v) (((v) >> 4) & 0xf) | ||
111 | #define PCI_COUNTER_IRQ_CPU(v) ((v) & 0xf) | ||
112 | #define PCI_PIO_ERROR_COMMAND 0xc7 /* 8 bits */ | ||
113 | #define PCI_PIO_ERROR_ADDRESS 0xc8 /* 32 bits */ | ||
114 | #define PCI_IOTLB_ERROR_ADDRESS 0xcc /* 32 bits */ | ||
115 | #define PCI_SYS_STATUS 0xd0 /* 8 bits */ | ||
116 | #define PCI_SYS_STATUS_RESET_ENABLE (1<<0) | ||
117 | #define PCI_SYS_STATUS_RESET (1<<1) | ||
118 | #define PCI_SYS_STATUS_WATCHDOG_RESET (1<<4) | ||
119 | #define PCI_SYS_STATUS_PCI_RESET (1<<5) | ||
120 | #define PCI_SYS_STATUS_PCI_RESET_ENABLE (1<<6) | ||
121 | #define PCI_SYS_STATUS_PCI_SATTELITE_MODE (1<<7) | ||
122 | |||
123 | #endif /* !(__SPARC_PCIC_H) */ | ||
diff --git a/include/asm-sparc/percpu.h b/include/asm-sparc/percpu.h deleted file mode 100644 index 06066a7aaec3..000000000000 --- a/include/asm-sparc/percpu.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef __ARCH_SPARC_PERCPU__ | ||
2 | #define __ARCH_SPARC_PERCPU__ | ||
3 | |||
4 | #include <asm-generic/percpu.h> | ||
5 | |||
6 | #endif /* __ARCH_SPARC_PERCPU__ */ | ||
diff --git a/include/asm-sparc/perfctr.h b/include/asm-sparc/perfctr.h deleted file mode 100644 index 836873002b75..000000000000 --- a/include/asm-sparc/perfctr.h +++ /dev/null | |||
@@ -1,173 +0,0 @@ | |||
1 | /*---------------------------------------- | ||
2 | PERFORMANCE INSTRUMENTATION | ||
3 | Guillaume Thouvenin 08/10/98 | ||
4 | David S. Miller 10/06/98 | ||
5 | ---------------------------------------*/ | ||
6 | #ifndef PERF_COUNTER_API | ||
7 | #define PERF_COUNTER_API | ||
8 | |||
9 | /* sys_perfctr() interface. First arg is operation code | ||
10 | * from enumeration below. The meaning of further arguments | ||
11 | * are determined by the operation code. | ||
12 | * | ||
13 | * int sys_perfctr(int opcode, unsigned long arg0, | ||
14 | * unsigned long arg1, unsigned long arg2) | ||
15 | * | ||
16 | * Pointers which are passed by the user are pointers to 64-bit | ||
17 | * integers. | ||
18 | * | ||
19 | * Once enabled, performance counter state is retained until the | ||
20 | * process either exits or performs an exec. That is, performance | ||
21 | * counters remain enabled for fork/clone children. | ||
22 | */ | ||
23 | enum perfctr_opcode { | ||
24 | /* Enable UltraSparc performance counters, ARG0 is pointer | ||
25 | * to 64-bit accumulator for D0 counter in PIC, ARG1 is pointer | ||
26 | * to 64-bit accumulator for D1 counter. ARG2 is a pointer to | ||
27 | * the initial PCR register value to use. | ||
28 | */ | ||
29 | PERFCTR_ON, | ||
30 | |||
31 | /* Disable UltraSparc performance counters. The PCR is written | ||
32 | * with zero and the user counter accumulator pointers and | ||
33 | * working PCR register value are forgotten. | ||
34 | */ | ||
35 | PERFCTR_OFF, | ||
36 | |||
37 | /* Add current D0 and D1 PIC values into user pointers given | ||
38 | * in PERFCTR_ON operation. The PIC is cleared before returning. | ||
39 | */ | ||
40 | PERFCTR_READ, | ||
41 | |||
42 | /* Clear the PIC register. */ | ||
43 | PERFCTR_CLRPIC, | ||
44 | |||
45 | /* Begin using a new PCR value, the pointer to which is passed | ||
46 | * in ARG0. The PIC is also cleared after the new PCR value is | ||
47 | * written. | ||
48 | */ | ||
49 | PERFCTR_SETPCR, | ||
50 | |||
51 | /* Store in pointer given in ARG0 the current PCR register value | ||
52 | * being used. | ||
53 | */ | ||
54 | PERFCTR_GETPCR | ||
55 | }; | ||
56 | |||
57 | /* I don't want the kernel's namespace to be polluted with this | ||
58 | * stuff when this file is included. --DaveM | ||
59 | */ | ||
60 | #ifndef __KERNEL__ | ||
61 | |||
62 | #define PRIV 0x00000001 | ||
63 | #define SYS 0x00000002 | ||
64 | #define USR 0x00000004 | ||
65 | |||
66 | /* Pic.S0 Selection Bit Field Encoding, Ultra-I/II */ | ||
67 | #define CYCLE_CNT 0x00000000 | ||
68 | #define INSTR_CNT 0x00000010 | ||
69 | #define DISPATCH0_IC_MISS 0x00000020 | ||
70 | #define DISPATCH0_STOREBUF 0x00000030 | ||
71 | #define IC_REF 0x00000080 | ||
72 | #define DC_RD 0x00000090 | ||
73 | #define DC_WR 0x000000A0 | ||
74 | #define LOAD_USE 0x000000B0 | ||
75 | #define EC_REF 0x000000C0 | ||
76 | #define EC_WRITE_HIT_RDO 0x000000D0 | ||
77 | #define EC_SNOOP_INV 0x000000E0 | ||
78 | #define EC_RD_HIT 0x000000F0 | ||
79 | |||
80 | /* Pic.S0 Selection Bit Field Encoding, Ultra-III */ | ||
81 | #define US3_CYCLE_CNT 0x00000000 | ||
82 | #define US3_INSTR_CNT 0x00000010 | ||
83 | #define US3_DISPATCH0_IC_MISS 0x00000020 | ||
84 | #define US3_DISPATCH0_BR_TGT 0x00000030 | ||
85 | #define US3_DISPATCH0_2ND_BR 0x00000040 | ||
86 | #define US3_RSTALL_STOREQ 0x00000050 | ||
87 | #define US3_RSTALL_IU_USE 0x00000060 | ||
88 | #define US3_IC_REF 0x00000080 | ||
89 | #define US3_DC_RD 0x00000090 | ||
90 | #define US3_DC_WR 0x000000a0 | ||
91 | #define US3_EC_REF 0x000000c0 | ||
92 | #define US3_EC_WR_HIT_RTO 0x000000d0 | ||
93 | #define US3_EC_SNOOP_INV 0x000000e0 | ||
94 | #define US3_EC_RD_MISS 0x000000f0 | ||
95 | #define US3_PC_PORT0_RD 0x00000100 | ||
96 | #define US3_SI_SNOOP 0x00000110 | ||
97 | #define US3_SI_CIQ_FLOW 0x00000120 | ||
98 | #define US3_SI_OWNED 0x00000130 | ||
99 | #define US3_SW_COUNT_0 0x00000140 | ||
100 | #define US3_IU_BR_MISS_TAKEN 0x00000150 | ||
101 | #define US3_IU_BR_COUNT_TAKEN 0x00000160 | ||
102 | #define US3_DISP_RS_MISPRED 0x00000170 | ||
103 | #define US3_FA_PIPE_COMPL 0x00000180 | ||
104 | #define US3_MC_READS_0 0x00000200 | ||
105 | #define US3_MC_READS_1 0x00000210 | ||
106 | #define US3_MC_READS_2 0x00000220 | ||
107 | #define US3_MC_READS_3 0x00000230 | ||
108 | #define US3_MC_STALLS_0 0x00000240 | ||
109 | #define US3_MC_STALLS_2 0x00000250 | ||
110 | |||
111 | /* Pic.S1 Selection Bit Field Encoding, Ultra-I/II */ | ||
112 | #define CYCLE_CNT_D1 0x00000000 | ||
113 | #define INSTR_CNT_D1 0x00000800 | ||
114 | #define DISPATCH0_IC_MISPRED 0x00001000 | ||
115 | #define DISPATCH0_FP_USE 0x00001800 | ||
116 | #define IC_HIT 0x00004000 | ||
117 | #define DC_RD_HIT 0x00004800 | ||
118 | #define DC_WR_HIT 0x00005000 | ||
119 | #define LOAD_USE_RAW 0x00005800 | ||
120 | #define EC_HIT 0x00006000 | ||
121 | #define EC_WB 0x00006800 | ||
122 | #define EC_SNOOP_CB 0x00007000 | ||
123 | #define EC_IT_HIT 0x00007800 | ||
124 | |||
125 | /* Pic.S1 Selection Bit Field Encoding, Ultra-III */ | ||
126 | #define US3_CYCLE_CNT_D1 0x00000000 | ||
127 | #define US3_INSTR_CNT_D1 0x00000800 | ||
128 | #define US3_DISPATCH0_MISPRED 0x00001000 | ||
129 | #define US3_IC_MISS_CANCELLED 0x00001800 | ||
130 | #define US3_RE_ENDIAN_MISS 0x00002000 | ||
131 | #define US3_RE_FPU_BYPASS 0x00002800 | ||
132 | #define US3_RE_DC_MISS 0x00003000 | ||
133 | #define US3_RE_EC_MISS 0x00003800 | ||
134 | #define US3_IC_MISS 0x00004000 | ||
135 | #define US3_DC_RD_MISS 0x00004800 | ||
136 | #define US3_DC_WR_MISS 0x00005000 | ||
137 | #define US3_RSTALL_FP_USE 0x00005800 | ||
138 | #define US3_EC_MISSES 0x00006000 | ||
139 | #define US3_EC_WB 0x00006800 | ||
140 | #define US3_EC_SNOOP_CB 0x00007000 | ||
141 | #define US3_EC_IC_MISS 0x00007800 | ||
142 | #define US3_RE_PC_MISS 0x00008000 | ||
143 | #define US3_ITLB_MISS 0x00008800 | ||
144 | #define US3_DTLB_MISS 0x00009000 | ||
145 | #define US3_WC_MISS 0x00009800 | ||
146 | #define US3_WC_SNOOP_CB 0x0000a000 | ||
147 | #define US3_WC_SCRUBBED 0x0000a800 | ||
148 | #define US3_WC_WB_WO_READ 0x0000b000 | ||
149 | #define US3_PC_SOFT_HIT 0x0000c000 | ||
150 | #define US3_PC_SNOOP_INV 0x0000c800 | ||
151 | #define US3_PC_HARD_HIT 0x0000d000 | ||
152 | #define US3_PC_PORT1_RD 0x0000d800 | ||
153 | #define US3_SW_COUNT_1 0x0000e000 | ||
154 | #define US3_IU_STAT_BR_MIS_UNTAKEN 0x0000e800 | ||
155 | #define US3_IU_STAT_BR_COUNT_UNTAKEN 0x0000f000 | ||
156 | #define US3_PC_MS_MISSES 0x0000f800 | ||
157 | #define US3_MC_WRITES_0 0x00010800 | ||
158 | #define US3_MC_WRITES_1 0x00011000 | ||
159 | #define US3_MC_WRITES_2 0x00011800 | ||
160 | #define US3_MC_WRITES_3 0x00012000 | ||
161 | #define US3_MC_STALLS_1 0x00012800 | ||
162 | #define US3_MC_STALLS_3 0x00013000 | ||
163 | #define US3_RE_RAW_MISS 0x00013800 | ||
164 | #define US3_FM_PIPE_COMPLETION 0x00014000 | ||
165 | |||
166 | struct vcounter_struct { | ||
167 | unsigned long long vcnt0; | ||
168 | unsigned long long vcnt1; | ||
169 | }; | ||
170 | |||
171 | #endif /* !(__KERNEL__) */ | ||
172 | |||
173 | #endif /* !(PERF_COUNTER_API) */ | ||
diff --git a/include/asm-sparc/pgalloc.h b/include/asm-sparc/pgalloc.h deleted file mode 100644 index 681582d26969..000000000000 --- a/include/asm-sparc/pgalloc.h +++ /dev/null | |||
@@ -1,68 +0,0 @@ | |||
1 | #ifndef _SPARC_PGALLOC_H | ||
2 | #define _SPARC_PGALLOC_H | ||
3 | |||
4 | #include <linux/kernel.h> | ||
5 | #include <linux/sched.h> | ||
6 | |||
7 | #include <asm/page.h> | ||
8 | #include <asm/btfixup.h> | ||
9 | |||
10 | struct page; | ||
11 | |||
12 | extern struct pgtable_cache_struct { | ||
13 | unsigned long *pgd_cache; | ||
14 | unsigned long *pte_cache; | ||
15 | unsigned long pgtable_cache_sz; | ||
16 | unsigned long pgd_cache_sz; | ||
17 | } pgt_quicklists; | ||
18 | #define pgd_quicklist (pgt_quicklists.pgd_cache) | ||
19 | #define pmd_quicklist ((unsigned long *)0) | ||
20 | #define pte_quicklist (pgt_quicklists.pte_cache) | ||
21 | #define pgtable_cache_size (pgt_quicklists.pgtable_cache_sz) | ||
22 | #define pgd_cache_size (pgt_quicklists.pgd_cache_sz) | ||
23 | |||
24 | extern void check_pgt_cache(void); | ||
25 | BTFIXUPDEF_CALL(void, do_check_pgt_cache, int, int) | ||
26 | #define do_check_pgt_cache(low,high) BTFIXUP_CALL(do_check_pgt_cache)(low,high) | ||
27 | |||
28 | BTFIXUPDEF_CALL(pgd_t *, get_pgd_fast, void) | ||
29 | #define get_pgd_fast() BTFIXUP_CALL(get_pgd_fast)() | ||
30 | |||
31 | BTFIXUPDEF_CALL(void, free_pgd_fast, pgd_t *) | ||
32 | #define free_pgd_fast(pgd) BTFIXUP_CALL(free_pgd_fast)(pgd) | ||
33 | |||
34 | #define pgd_free(mm, pgd) free_pgd_fast(pgd) | ||
35 | #define pgd_alloc(mm) get_pgd_fast() | ||
36 | |||
37 | BTFIXUPDEF_CALL(void, pgd_set, pgd_t *, pmd_t *) | ||
38 | #define pgd_set(pgdp,pmdp) BTFIXUP_CALL(pgd_set)(pgdp,pmdp) | ||
39 | #define pgd_populate(MM, PGD, PMD) pgd_set(PGD, PMD) | ||
40 | |||
41 | BTFIXUPDEF_CALL(pmd_t *, pmd_alloc_one, struct mm_struct *, unsigned long) | ||
42 | #define pmd_alloc_one(mm, address) BTFIXUP_CALL(pmd_alloc_one)(mm, address) | ||
43 | |||
44 | BTFIXUPDEF_CALL(void, free_pmd_fast, pmd_t *) | ||
45 | #define free_pmd_fast(pmd) BTFIXUP_CALL(free_pmd_fast)(pmd) | ||
46 | |||
47 | #define pmd_free(mm, pmd) free_pmd_fast(pmd) | ||
48 | #define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd) | ||
49 | |||
50 | BTFIXUPDEF_CALL(void, pmd_populate, pmd_t *, struct page *) | ||
51 | #define pmd_populate(MM, PMD, PTE) BTFIXUP_CALL(pmd_populate)(PMD, PTE) | ||
52 | #define pmd_pgtable(pmd) pmd_page(pmd) | ||
53 | BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *) | ||
54 | #define pmd_populate_kernel(MM, PMD, PTE) BTFIXUP_CALL(pmd_set)(PMD, PTE) | ||
55 | |||
56 | BTFIXUPDEF_CALL(pgtable_t , pte_alloc_one, struct mm_struct *, unsigned long) | ||
57 | #define pte_alloc_one(mm, address) BTFIXUP_CALL(pte_alloc_one)(mm, address) | ||
58 | BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long) | ||
59 | #define pte_alloc_one_kernel(mm, addr) BTFIXUP_CALL(pte_alloc_one_kernel)(mm, addr) | ||
60 | |||
61 | BTFIXUPDEF_CALL(void, free_pte_fast, pte_t *) | ||
62 | #define pte_free_kernel(mm, pte) BTFIXUP_CALL(free_pte_fast)(pte) | ||
63 | |||
64 | BTFIXUPDEF_CALL(void, pte_free, pgtable_t ) | ||
65 | #define pte_free(mm, pte) BTFIXUP_CALL(pte_free)(pte) | ||
66 | #define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte) | ||
67 | |||
68 | #endif /* _SPARC_PGALLOC_H */ | ||
diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h deleted file mode 100644 index 60512296b2ca..000000000000 --- a/include/asm-sparc/pgtable.h +++ /dev/null | |||
@@ -1,475 +0,0 @@ | |||
1 | #ifndef _SPARC_PGTABLE_H | ||
2 | #define _SPARC_PGTABLE_H | ||
3 | |||
4 | /* asm-sparc/pgtable.h: Defines and functions used to work | ||
5 | * with Sparc page tables. | ||
6 | * | ||
7 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
8 | * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | ||
9 | */ | ||
10 | |||
11 | #include <asm-generic/4level-fixup.h> | ||
12 | |||
13 | #include <linux/spinlock.h> | ||
14 | #include <linux/swap.h> | ||
15 | #include <asm/types.h> | ||
16 | #ifdef CONFIG_SUN4 | ||
17 | #include <asm/pgtsun4.h> | ||
18 | #else | ||
19 | #include <asm/pgtsun4c.h> | ||
20 | #endif | ||
21 | #include <asm/pgtsrmmu.h> | ||
22 | #include <asm/vac-ops.h> | ||
23 | #include <asm/oplib.h> | ||
24 | #include <asm/btfixup.h> | ||
25 | #include <asm/system.h> | ||
26 | |||
27 | #ifndef __ASSEMBLY__ | ||
28 | |||
29 | struct vm_area_struct; | ||
30 | struct page; | ||
31 | |||
32 | extern void load_mmu(void); | ||
33 | extern unsigned long calc_highpages(void); | ||
34 | |||
35 | BTFIXUPDEF_SIMM13(pgdir_shift) | ||
36 | BTFIXUPDEF_SETHI(pgdir_size) | ||
37 | BTFIXUPDEF_SETHI(pgdir_mask) | ||
38 | |||
39 | BTFIXUPDEF_SIMM13(ptrs_per_pmd) | ||
40 | BTFIXUPDEF_SIMM13(ptrs_per_pgd) | ||
41 | BTFIXUPDEF_SIMM13(user_ptrs_per_pgd) | ||
42 | |||
43 | #define pte_ERROR(e) __builtin_trap() | ||
44 | #define pmd_ERROR(e) __builtin_trap() | ||
45 | #define pgd_ERROR(e) __builtin_trap() | ||
46 | |||
47 | BTFIXUPDEF_INT(page_none) | ||
48 | BTFIXUPDEF_INT(page_copy) | ||
49 | BTFIXUPDEF_INT(page_readonly) | ||
50 | BTFIXUPDEF_INT(page_kernel) | ||
51 | |||
52 | #define PMD_SHIFT SUN4C_PMD_SHIFT | ||
53 | #define PMD_SIZE (1UL << PMD_SHIFT) | ||
54 | #define PMD_MASK (~(PMD_SIZE-1)) | ||
55 | #define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK) | ||
56 | #define PGDIR_SHIFT BTFIXUP_SIMM13(pgdir_shift) | ||
57 | #define PGDIR_SIZE BTFIXUP_SETHI(pgdir_size) | ||
58 | #define PGDIR_MASK BTFIXUP_SETHI(pgdir_mask) | ||
59 | #define PTRS_PER_PTE 1024 | ||
60 | #define PTRS_PER_PMD BTFIXUP_SIMM13(ptrs_per_pmd) | ||
61 | #define PTRS_PER_PGD BTFIXUP_SIMM13(ptrs_per_pgd) | ||
62 | #define USER_PTRS_PER_PGD BTFIXUP_SIMM13(user_ptrs_per_pgd) | ||
63 | #define FIRST_USER_ADDRESS 0 | ||
64 | #define PTE_SIZE (PTRS_PER_PTE*4) | ||
65 | |||
66 | #define PAGE_NONE __pgprot(BTFIXUP_INT(page_none)) | ||
67 | extern pgprot_t PAGE_SHARED; | ||
68 | #define PAGE_COPY __pgprot(BTFIXUP_INT(page_copy)) | ||
69 | #define PAGE_READONLY __pgprot(BTFIXUP_INT(page_readonly)) | ||
70 | |||
71 | extern unsigned long page_kernel; | ||
72 | |||
73 | #ifdef MODULE | ||
74 | #define PAGE_KERNEL page_kernel | ||
75 | #else | ||
76 | #define PAGE_KERNEL __pgprot(BTFIXUP_INT(page_kernel)) | ||
77 | #endif | ||
78 | |||
79 | /* Top-level page directory */ | ||
80 | extern pgd_t swapper_pg_dir[1024]; | ||
81 | |||
82 | extern void paging_init(void); | ||
83 | |||
84 | /* Page table for 0-4MB for everybody, on the Sparc this | ||
85 | * holds the same as on the i386. | ||
86 | */ | ||
87 | extern pte_t pg0[1024]; | ||
88 | extern pte_t pg1[1024]; | ||
89 | extern pte_t pg2[1024]; | ||
90 | extern pte_t pg3[1024]; | ||
91 | |||
92 | extern unsigned long ptr_in_current_pgd; | ||
93 | |||
94 | /* Here is a trick, since mmap.c need the initializer elements for | ||
95 | * protection_map[] to be constant at compile time, I set the following | ||
96 | * to all zeros. I set it to the real values after I link in the | ||
97 | * appropriate MMU page table routines at boot time. | ||
98 | */ | ||
99 | #define __P000 __pgprot(0) | ||
100 | #define __P001 __pgprot(0) | ||
101 | #define __P010 __pgprot(0) | ||
102 | #define __P011 __pgprot(0) | ||
103 | #define __P100 __pgprot(0) | ||
104 | #define __P101 __pgprot(0) | ||
105 | #define __P110 __pgprot(0) | ||
106 | #define __P111 __pgprot(0) | ||
107 | |||
108 | #define __S000 __pgprot(0) | ||
109 | #define __S001 __pgprot(0) | ||
110 | #define __S010 __pgprot(0) | ||
111 | #define __S011 __pgprot(0) | ||
112 | #define __S100 __pgprot(0) | ||
113 | #define __S101 __pgprot(0) | ||
114 | #define __S110 __pgprot(0) | ||
115 | #define __S111 __pgprot(0) | ||
116 | |||
117 | extern int num_contexts; | ||
118 | |||
119 | /* First physical page can be anywhere, the following is needed so that | ||
120 | * va-->pa and vice versa conversions work properly without performance | ||
121 | * hit for all __pa()/__va() operations. | ||
122 | */ | ||
123 | extern unsigned long phys_base; | ||
124 | extern unsigned long pfn_base; | ||
125 | |||
126 | /* | ||
127 | * BAD_PAGETABLE is used when we need a bogus page-table, while | ||
128 | * BAD_PAGE is used for a bogus page. | ||
129 | * | ||
130 | * ZERO_PAGE is a global shared page that is always zero: used | ||
131 | * for zero-mapped memory areas etc.. | ||
132 | */ | ||
133 | extern pte_t * __bad_pagetable(void); | ||
134 | extern pte_t __bad_page(void); | ||
135 | extern unsigned long empty_zero_page; | ||
136 | |||
137 | #define BAD_PAGETABLE __bad_pagetable() | ||
138 | #define BAD_PAGE __bad_page() | ||
139 | #define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page)) | ||
140 | |||
141 | /* | ||
142 | */ | ||
143 | BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t) | ||
144 | BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t) | ||
145 | |||
146 | #define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd) | ||
147 | #define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd) | ||
148 | |||
149 | BTFIXUPDEF_SETHI(none_mask) | ||
150 | BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t) | ||
151 | BTFIXUPDEF_CALL(void, pte_clear, pte_t *) | ||
152 | |||
153 | static inline int pte_none(pte_t pte) | ||
154 | { | ||
155 | return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask)); | ||
156 | } | ||
157 | |||
158 | #define pte_present(pte) BTFIXUP_CALL(pte_present)(pte) | ||
159 | #define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte) | ||
160 | |||
161 | BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t) | ||
162 | BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t) | ||
163 | BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *) | ||
164 | |||
165 | static inline int pmd_none(pmd_t pmd) | ||
166 | { | ||
167 | return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask)); | ||
168 | } | ||
169 | |||
170 | #define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd) | ||
171 | #define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd) | ||
172 | #define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd) | ||
173 | |||
174 | BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t) | ||
175 | BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t) | ||
176 | BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t) | ||
177 | BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *) | ||
178 | |||
179 | #define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd) | ||
180 | #define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd) | ||
181 | #define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd) | ||
182 | #define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd) | ||
183 | |||
184 | /* | ||
185 | * The following only work if pte_present() is true. | ||
186 | * Undefined behaviour if not.. | ||
187 | */ | ||
188 | BTFIXUPDEF_HALF(pte_writei) | ||
189 | BTFIXUPDEF_HALF(pte_dirtyi) | ||
190 | BTFIXUPDEF_HALF(pte_youngi) | ||
191 | |||
192 | static int pte_write(pte_t pte) __attribute_const__; | ||
193 | static inline int pte_write(pte_t pte) | ||
194 | { | ||
195 | return pte_val(pte) & BTFIXUP_HALF(pte_writei); | ||
196 | } | ||
197 | |||
198 | static int pte_dirty(pte_t pte) __attribute_const__; | ||
199 | static inline int pte_dirty(pte_t pte) | ||
200 | { | ||
201 | return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi); | ||
202 | } | ||
203 | |||
204 | static int pte_young(pte_t pte) __attribute_const__; | ||
205 | static inline int pte_young(pte_t pte) | ||
206 | { | ||
207 | return pte_val(pte) & BTFIXUP_HALF(pte_youngi); | ||
208 | } | ||
209 | |||
210 | /* | ||
211 | * The following only work if pte_present() is not true. | ||
212 | */ | ||
213 | BTFIXUPDEF_HALF(pte_filei) | ||
214 | |||
215 | static int pte_file(pte_t pte) __attribute_const__; | ||
216 | static inline int pte_file(pte_t pte) | ||
217 | { | ||
218 | return pte_val(pte) & BTFIXUP_HALF(pte_filei); | ||
219 | } | ||
220 | |||
221 | static inline int pte_special(pte_t pte) | ||
222 | { | ||
223 | return 0; | ||
224 | } | ||
225 | |||
226 | /* | ||
227 | */ | ||
228 | BTFIXUPDEF_HALF(pte_wrprotecti) | ||
229 | BTFIXUPDEF_HALF(pte_mkcleani) | ||
230 | BTFIXUPDEF_HALF(pte_mkoldi) | ||
231 | |||
232 | static pte_t pte_wrprotect(pte_t pte) __attribute_const__; | ||
233 | static inline pte_t pte_wrprotect(pte_t pte) | ||
234 | { | ||
235 | return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti)); | ||
236 | } | ||
237 | |||
238 | static pte_t pte_mkclean(pte_t pte) __attribute_const__; | ||
239 | static inline pte_t pte_mkclean(pte_t pte) | ||
240 | { | ||
241 | return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani)); | ||
242 | } | ||
243 | |||
244 | static pte_t pte_mkold(pte_t pte) __attribute_const__; | ||
245 | static inline pte_t pte_mkold(pte_t pte) | ||
246 | { | ||
247 | return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi)); | ||
248 | } | ||
249 | |||
250 | BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t) | ||
251 | BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t) | ||
252 | BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t) | ||
253 | |||
254 | #define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte) | ||
255 | #define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte) | ||
256 | #define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte) | ||
257 | |||
258 | #define pte_mkspecial(pte) (pte) | ||
259 | |||
260 | #define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) | ||
261 | |||
262 | BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t) | ||
263 | #define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte) | ||
264 | #define pte_page(pte) pfn_to_page(pte_pfn(pte)) | ||
265 | |||
266 | /* | ||
267 | * Conversion functions: convert a page and protection to a page entry, | ||
268 | * and a page entry and page directory to the page they refer to. | ||
269 | */ | ||
270 | BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t) | ||
271 | |||
272 | BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t) | ||
273 | BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int) | ||
274 | BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t) | ||
275 | |||
276 | #define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot) | ||
277 | #define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot) | ||
278 | #define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space) | ||
279 | |||
280 | #define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot) | ||
281 | |||
282 | BTFIXUPDEF_INT(pte_modify_mask) | ||
283 | |||
284 | static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; | ||
285 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
286 | { | ||
287 | return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) | | ||
288 | pgprot_val(newprot)); | ||
289 | } | ||
290 | |||
291 | #define pgd_index(address) ((address) >> PGDIR_SHIFT) | ||
292 | |||
293 | /* to find an entry in a page-table-directory */ | ||
294 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) | ||
295 | |||
296 | /* to find an entry in a kernel page-table-directory */ | ||
297 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | ||
298 | |||
299 | /* Find an entry in the second-level page table.. */ | ||
300 | BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long) | ||
301 | #define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr) | ||
302 | |||
303 | /* Find an entry in the third-level page table.. */ | ||
304 | BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long) | ||
305 | #define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr) | ||
306 | |||
307 | /* | ||
308 | * This shortcut works on sun4m (and sun4d) because the nocache area is static, | ||
309 | * and sun4c is guaranteed to have no highmem anyway. | ||
310 | */ | ||
311 | #define pte_offset_map(d, a) pte_offset_kernel(d,a) | ||
312 | #define pte_offset_map_nested(d, a) pte_offset_kernel(d,a) | ||
313 | |||
314 | #define pte_unmap(pte) do{}while(0) | ||
315 | #define pte_unmap_nested(pte) do{}while(0) | ||
316 | |||
317 | /* Certain architectures need to do special things when pte's | ||
318 | * within a page table are directly modified. Thus, the following | ||
319 | * hook is made available. | ||
320 | */ | ||
321 | |||
322 | BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t) | ||
323 | |||
324 | #define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval) | ||
325 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | ||
326 | |||
327 | struct seq_file; | ||
328 | BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *) | ||
329 | |||
330 | #define mmu_info(p) BTFIXUP_CALL(mmu_info)(p) | ||
331 | |||
332 | /* Fault handler stuff... */ | ||
333 | #define FAULT_CODE_PROT 0x1 | ||
334 | #define FAULT_CODE_WRITE 0x2 | ||
335 | #define FAULT_CODE_USER 0x4 | ||
336 | |||
337 | BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t) | ||
338 | |||
339 | #define update_mmu_cache(vma,addr,pte) BTFIXUP_CALL(update_mmu_cache)(vma,addr,pte) | ||
340 | |||
341 | BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long, | ||
342 | unsigned long, unsigned int) | ||
343 | BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int) | ||
344 | #define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len) | ||
345 | #define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len) | ||
346 | |||
347 | extern int invalid_segment; | ||
348 | |||
349 | /* Encode and de-code a swap entry */ | ||
350 | BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t) | ||
351 | BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t) | ||
352 | BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long) | ||
353 | |||
354 | #define __swp_type(__x) BTFIXUP_CALL(__swp_type)(__x) | ||
355 | #define __swp_offset(__x) BTFIXUP_CALL(__swp_offset)(__x) | ||
356 | #define __swp_entry(__type,__off) BTFIXUP_CALL(__swp_entry)(__type,__off) | ||
357 | |||
358 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | ||
359 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | ||
360 | |||
361 | /* file-offset-in-pte helpers */ | ||
362 | BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte); | ||
363 | BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff); | ||
364 | |||
365 | #define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte) | ||
366 | #define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off) | ||
367 | |||
368 | /* | ||
369 | * This is made a constant because mm/fremap.c required a constant. | ||
370 | * Note that layout of these bits is different between sun4c.c and srmmu.c. | ||
371 | */ | ||
372 | #define PTE_FILE_MAX_BITS 24 | ||
373 | |||
374 | /* | ||
375 | */ | ||
376 | struct ctx_list { | ||
377 | struct ctx_list *next; | ||
378 | struct ctx_list *prev; | ||
379 | unsigned int ctx_number; | ||
380 | struct mm_struct *ctx_mm; | ||
381 | }; | ||
382 | |||
383 | extern struct ctx_list *ctx_list_pool; /* Dynamically allocated */ | ||
384 | extern struct ctx_list ctx_free; /* Head of free list */ | ||
385 | extern struct ctx_list ctx_used; /* Head of used contexts list */ | ||
386 | |||
387 | #define NO_CONTEXT -1 | ||
388 | |||
389 | static inline void remove_from_ctx_list(struct ctx_list *entry) | ||
390 | { | ||
391 | entry->next->prev = entry->prev; | ||
392 | entry->prev->next = entry->next; | ||
393 | } | ||
394 | |||
395 | static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) | ||
396 | { | ||
397 | entry->next = head; | ||
398 | (entry->prev = head->prev)->next = entry; | ||
399 | head->prev = entry; | ||
400 | } | ||
401 | #define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) | ||
402 | #define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) | ||
403 | |||
404 | static inline unsigned long | ||
405 | __get_phys (unsigned long addr) | ||
406 | { | ||
407 | switch (sparc_cpu_model){ | ||
408 | case sun4: | ||
409 | case sun4c: | ||
410 | return sun4c_get_pte (addr) << PAGE_SHIFT; | ||
411 | case sun4m: | ||
412 | case sun4d: | ||
413 | return ((srmmu_get_pte (addr) & 0xffffff00) << 4); | ||
414 | default: | ||
415 | return 0; | ||
416 | } | ||
417 | } | ||
418 | |||
419 | static inline int | ||
420 | __get_iospace (unsigned long addr) | ||
421 | { | ||
422 | switch (sparc_cpu_model){ | ||
423 | case sun4: | ||
424 | case sun4c: | ||
425 | return -1; /* Don't check iospace on sun4c */ | ||
426 | case sun4m: | ||
427 | case sun4d: | ||
428 | return (srmmu_get_pte (addr) >> 28); | ||
429 | default: | ||
430 | return -1; | ||
431 | } | ||
432 | } | ||
433 | |||
434 | extern unsigned long *sparc_valid_addr_bitmap; | ||
435 | |||
436 | /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ | ||
437 | #define kern_addr_valid(addr) \ | ||
438 | (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) | ||
439 | |||
440 | extern int io_remap_pfn_range(struct vm_area_struct *vma, | ||
441 | unsigned long from, unsigned long pfn, | ||
442 | unsigned long size, pgprot_t prot); | ||
443 | |||
444 | /* | ||
445 | * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in | ||
446 | * its high 4 bits. These macros/functions put it there or get it from there. | ||
447 | */ | ||
448 | #define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) | ||
449 | #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) | ||
450 | #define GET_PFN(pfn) (pfn & 0x0fffffffUL) | ||
451 | |||
452 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS | ||
453 | #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ | ||
454 | ({ \ | ||
455 | int __changed = !pte_same(*(__ptep), __entry); \ | ||
456 | if (__changed) { \ | ||
457 | set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ | ||
458 | flush_tlb_page(__vma, __address); \ | ||
459 | } \ | ||
460 | (sparc_cpu_model == sun4c) || __changed; \ | ||
461 | }) | ||
462 | |||
463 | #include <asm-generic/pgtable.h> | ||
464 | |||
465 | #endif /* !(__ASSEMBLY__) */ | ||
466 | |||
467 | /* We provide our own get_unmapped_area to cope with VA holes for userland */ | ||
468 | #define HAVE_ARCH_UNMAPPED_AREA | ||
469 | |||
470 | /* | ||
471 | * No page table caches to initialise | ||
472 | */ | ||
473 | #define pgtable_cache_init() do { } while (0) | ||
474 | |||
475 | #endif /* !(_SPARC_PGTABLE_H) */ | ||
diff --git a/include/asm-sparc/pgtsrmmu.h b/include/asm-sparc/pgtsrmmu.h deleted file mode 100644 index 808555fc1d58..000000000000 --- a/include/asm-sparc/pgtsrmmu.h +++ /dev/null | |||
@@ -1,298 +0,0 @@ | |||
1 | /* | ||
2 | * pgtsrmmu.h: SRMMU page table defines and code. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_PGTSRMMU_H | ||
8 | #define _SPARC_PGTSRMMU_H | ||
9 | |||
10 | #include <asm/page.h> | ||
11 | |||
12 | #ifdef __ASSEMBLY__ | ||
13 | #include <asm/thread_info.h> /* TI_UWINMASK for WINDOW_FLUSH */ | ||
14 | #endif | ||
15 | |||
16 | /* Number of contexts is implementation-dependent; 64k is the most we support */ | ||
17 | #define SRMMU_MAX_CONTEXTS 65536 | ||
18 | |||
19 | /* PMD_SHIFT determines the size of the area a second-level page table entry can map */ | ||
20 | #define SRMMU_REAL_PMD_SHIFT 18 | ||
21 | #define SRMMU_REAL_PMD_SIZE (1UL << SRMMU_REAL_PMD_SHIFT) | ||
22 | #define SRMMU_REAL_PMD_MASK (~(SRMMU_REAL_PMD_SIZE-1)) | ||
23 | #define SRMMU_REAL_PMD_ALIGN(__addr) (((__addr)+SRMMU_REAL_PMD_SIZE-1)&SRMMU_REAL_PMD_MASK) | ||
24 | |||
25 | /* PGDIR_SHIFT determines what a third-level page table entry can map */ | ||
26 | #define SRMMU_PGDIR_SHIFT 24 | ||
27 | #define SRMMU_PGDIR_SIZE (1UL << SRMMU_PGDIR_SHIFT) | ||
28 | #define SRMMU_PGDIR_MASK (~(SRMMU_PGDIR_SIZE-1)) | ||
29 | #define SRMMU_PGDIR_ALIGN(addr) (((addr)+SRMMU_PGDIR_SIZE-1)&SRMMU_PGDIR_MASK) | ||
30 | |||
31 | #define SRMMU_REAL_PTRS_PER_PTE 64 | ||
32 | #define SRMMU_REAL_PTRS_PER_PMD 64 | ||
33 | #define SRMMU_PTRS_PER_PGD 256 | ||
34 | |||
35 | #define SRMMU_REAL_PTE_TABLE_SIZE (SRMMU_REAL_PTRS_PER_PTE*4) | ||
36 | #define SRMMU_PMD_TABLE_SIZE (SRMMU_REAL_PTRS_PER_PMD*4) | ||
37 | #define SRMMU_PGD_TABLE_SIZE (SRMMU_PTRS_PER_PGD*4) | ||
38 | |||
39 | /* | ||
40 | * To support pagetables in highmem, Linux introduces APIs which | ||
41 | * return struct page* and generally manipulate page tables when | ||
42 | * they are not mapped into kernel space. Our hardware page tables | ||
43 | * are smaller than pages. We lump hardware tabes into big, page sized | ||
44 | * software tables. | ||
45 | * | ||
46 | * PMD_SHIFT determines the size of the area a second-level page table entry | ||
47 | * can map, and our pmd_t is 16 times larger than normal. The values which | ||
48 | * were once defined here are now generic for 4c and srmmu, so they're | ||
49 | * found in pgtable.h. | ||
50 | */ | ||
51 | #define SRMMU_PTRS_PER_PMD 4 | ||
52 | |||
53 | /* Definition of the values in the ET field of PTD's and PTE's */ | ||
54 | #define SRMMU_ET_MASK 0x3 | ||
55 | #define SRMMU_ET_INVALID 0x0 | ||
56 | #define SRMMU_ET_PTD 0x1 | ||
57 | #define SRMMU_ET_PTE 0x2 | ||
58 | #define SRMMU_ET_REPTE 0x3 /* AIEEE, SuperSparc II reverse endian page! */ | ||
59 | |||
60 | /* Physical page extraction from PTP's and PTE's. */ | ||
61 | #define SRMMU_CTX_PMASK 0xfffffff0 | ||
62 | #define SRMMU_PTD_PMASK 0xfffffff0 | ||
63 | #define SRMMU_PTE_PMASK 0xffffff00 | ||
64 | |||
65 | /* The pte non-page bits. Some notes: | ||
66 | * 1) cache, dirty, valid, and ref are frobbable | ||
67 | * for both supervisor and user pages. | ||
68 | * 2) exec and write will only give the desired effect | ||
69 | * on user pages | ||
70 | * 3) use priv and priv_readonly for changing the | ||
71 | * characteristics of supervisor ptes | ||
72 | */ | ||
73 | #define SRMMU_CACHE 0x80 | ||
74 | #define SRMMU_DIRTY 0x40 | ||
75 | #define SRMMU_REF 0x20 | ||
76 | #define SRMMU_NOREAD 0x10 | ||
77 | #define SRMMU_EXEC 0x08 | ||
78 | #define SRMMU_WRITE 0x04 | ||
79 | #define SRMMU_VALID 0x02 /* SRMMU_ET_PTE */ | ||
80 | #define SRMMU_PRIV 0x1c | ||
81 | #define SRMMU_PRIV_RDONLY 0x18 | ||
82 | |||
83 | #define SRMMU_FILE 0x40 /* Implemented in software */ | ||
84 | |||
85 | #define SRMMU_PTE_FILE_SHIFT 8 /* == 32-PTE_FILE_MAX_BITS */ | ||
86 | |||
87 | #define SRMMU_CHG_MASK (0xffffff00 | SRMMU_REF | SRMMU_DIRTY) | ||
88 | |||
89 | /* SRMMU swap entry encoding | ||
90 | * | ||
91 | * We use 5 bits for the type and 19 for the offset. This gives us | ||
92 | * 32 swapfiles of 4GB each. Encoding looks like: | ||
93 | * | ||
94 | * oooooooooooooooooootttttRRRRRRRR | ||
95 | * fedcba9876543210fedcba9876543210 | ||
96 | * | ||
97 | * The bottom 8 bits are reserved for protection and status bits, especially | ||
98 | * FILE and PRESENT. | ||
99 | */ | ||
100 | #define SRMMU_SWP_TYPE_MASK 0x1f | ||
101 | #define SRMMU_SWP_TYPE_SHIFT SRMMU_PTE_FILE_SHIFT | ||
102 | #define SRMMU_SWP_OFF_MASK 0x7ffff | ||
103 | #define SRMMU_SWP_OFF_SHIFT (SRMMU_PTE_FILE_SHIFT + 5) | ||
104 | |||
105 | /* Some day I will implement true fine grained access bits for | ||
106 | * user pages because the SRMMU gives us the capabilities to | ||
107 | * enforce all the protection levels that vma's can have. | ||
108 | * XXX But for now... | ||
109 | */ | ||
110 | #define SRMMU_PAGE_NONE __pgprot(SRMMU_CACHE | \ | ||
111 | SRMMU_PRIV | SRMMU_REF) | ||
112 | #define SRMMU_PAGE_SHARED __pgprot(SRMMU_VALID | SRMMU_CACHE | \ | ||
113 | SRMMU_EXEC | SRMMU_WRITE | SRMMU_REF) | ||
114 | #define SRMMU_PAGE_COPY __pgprot(SRMMU_VALID | SRMMU_CACHE | \ | ||
115 | SRMMU_EXEC | SRMMU_REF) | ||
116 | #define SRMMU_PAGE_RDONLY __pgprot(SRMMU_VALID | SRMMU_CACHE | \ | ||
117 | SRMMU_EXEC | SRMMU_REF) | ||
118 | #define SRMMU_PAGE_KERNEL __pgprot(SRMMU_VALID | SRMMU_CACHE | SRMMU_PRIV | \ | ||
119 | SRMMU_DIRTY | SRMMU_REF) | ||
120 | |||
121 | /* SRMMU Register addresses in ASI 0x4. These are valid for all | ||
122 | * current SRMMU implementations that exist. | ||
123 | */ | ||
124 | #define SRMMU_CTRL_REG 0x00000000 | ||
125 | #define SRMMU_CTXTBL_PTR 0x00000100 | ||
126 | #define SRMMU_CTX_REG 0x00000200 | ||
127 | #define SRMMU_FAULT_STATUS 0x00000300 | ||
128 | #define SRMMU_FAULT_ADDR 0x00000400 | ||
129 | |||
130 | #define WINDOW_FLUSH(tmp1, tmp2) \ | ||
131 | mov 0, tmp1; \ | ||
132 | 98: ld [%g6 + TI_UWINMASK], tmp2; \ | ||
133 | orcc %g0, tmp2, %g0; \ | ||
134 | add tmp1, 1, tmp1; \ | ||
135 | bne 98b; \ | ||
136 | save %sp, -64, %sp; \ | ||
137 | 99: subcc tmp1, 1, tmp1; \ | ||
138 | bne 99b; \ | ||
139 | restore %g0, %g0, %g0; | ||
140 | |||
141 | #ifndef __ASSEMBLY__ | ||
142 | |||
143 | /* This makes sense. Honest it does - Anton */ | ||
144 | /* XXX Yes but it's ugly as sin. FIXME. -KMW */ | ||
145 | extern void *srmmu_nocache_pool; | ||
146 | #define __nocache_pa(VADDR) (((unsigned long)VADDR) - SRMMU_NOCACHE_VADDR + __pa((unsigned long)srmmu_nocache_pool)) | ||
147 | #define __nocache_va(PADDR) (__va((unsigned long)PADDR) - (unsigned long)srmmu_nocache_pool + SRMMU_NOCACHE_VADDR) | ||
148 | #define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) | ||
149 | |||
150 | /* Accessing the MMU control register. */ | ||
151 | static inline unsigned int srmmu_get_mmureg(void) | ||
152 | { | ||
153 | unsigned int retval; | ||
154 | __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : | ||
155 | "=r" (retval) : | ||
156 | "i" (ASI_M_MMUREGS)); | ||
157 | return retval; | ||
158 | } | ||
159 | |||
160 | static inline void srmmu_set_mmureg(unsigned long regval) | ||
161 | { | ||
162 | __asm__ __volatile__("sta %0, [%%g0] %1\n\t" : : | ||
163 | "r" (regval), "i" (ASI_M_MMUREGS) : "memory"); | ||
164 | |||
165 | } | ||
166 | |||
167 | static inline void srmmu_set_ctable_ptr(unsigned long paddr) | ||
168 | { | ||
169 | paddr = ((paddr >> 4) & SRMMU_CTX_PMASK); | ||
170 | __asm__ __volatile__("sta %0, [%1] %2\n\t" : : | ||
171 | "r" (paddr), "r" (SRMMU_CTXTBL_PTR), | ||
172 | "i" (ASI_M_MMUREGS) : | ||
173 | "memory"); | ||
174 | } | ||
175 | |||
176 | static inline unsigned long srmmu_get_ctable_ptr(void) | ||
177 | { | ||
178 | unsigned int retval; | ||
179 | |||
180 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
181 | "=r" (retval) : | ||
182 | "r" (SRMMU_CTXTBL_PTR), | ||
183 | "i" (ASI_M_MMUREGS)); | ||
184 | return (retval & SRMMU_CTX_PMASK) << 4; | ||
185 | } | ||
186 | |||
187 | static inline void srmmu_set_context(int context) | ||
188 | { | ||
189 | __asm__ __volatile__("sta %0, [%1] %2\n\t" : : | ||
190 | "r" (context), "r" (SRMMU_CTX_REG), | ||
191 | "i" (ASI_M_MMUREGS) : "memory"); | ||
192 | } | ||
193 | |||
194 | static inline int srmmu_get_context(void) | ||
195 | { | ||
196 | register int retval; | ||
197 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
198 | "=r" (retval) : | ||
199 | "r" (SRMMU_CTX_REG), | ||
200 | "i" (ASI_M_MMUREGS)); | ||
201 | return retval; | ||
202 | } | ||
203 | |||
204 | static inline unsigned int srmmu_get_fstatus(void) | ||
205 | { | ||
206 | unsigned int retval; | ||
207 | |||
208 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
209 | "=r" (retval) : | ||
210 | "r" (SRMMU_FAULT_STATUS), "i" (ASI_M_MMUREGS)); | ||
211 | return retval; | ||
212 | } | ||
213 | |||
214 | static inline unsigned int srmmu_get_faddr(void) | ||
215 | { | ||
216 | unsigned int retval; | ||
217 | |||
218 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
219 | "=r" (retval) : | ||
220 | "r" (SRMMU_FAULT_ADDR), "i" (ASI_M_MMUREGS)); | ||
221 | return retval; | ||
222 | } | ||
223 | |||
224 | /* This is guaranteed on all SRMMU's. */ | ||
225 | static inline void srmmu_flush_whole_tlb(void) | ||
226 | { | ||
227 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : | ||
228 | "r" (0x400), /* Flush entire TLB!! */ | ||
229 | "i" (ASI_M_FLUSH_PROBE) : "memory"); | ||
230 | |||
231 | } | ||
232 | |||
233 | /* These flush types are not available on all chips... */ | ||
234 | static inline void srmmu_flush_tlb_ctx(void) | ||
235 | { | ||
236 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : | ||
237 | "r" (0x300), /* Flush TLB ctx.. */ | ||
238 | "i" (ASI_M_FLUSH_PROBE) : "memory"); | ||
239 | |||
240 | } | ||
241 | |||
242 | static inline void srmmu_flush_tlb_region(unsigned long addr) | ||
243 | { | ||
244 | addr &= SRMMU_PGDIR_MASK; | ||
245 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : | ||
246 | "r" (addr | 0x200), /* Flush TLB region.. */ | ||
247 | "i" (ASI_M_FLUSH_PROBE) : "memory"); | ||
248 | |||
249 | } | ||
250 | |||
251 | |||
252 | static inline void srmmu_flush_tlb_segment(unsigned long addr) | ||
253 | { | ||
254 | addr &= SRMMU_REAL_PMD_MASK; | ||
255 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : | ||
256 | "r" (addr | 0x100), /* Flush TLB segment.. */ | ||
257 | "i" (ASI_M_FLUSH_PROBE) : "memory"); | ||
258 | |||
259 | } | ||
260 | |||
261 | static inline void srmmu_flush_tlb_page(unsigned long page) | ||
262 | { | ||
263 | page &= PAGE_MASK; | ||
264 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : | ||
265 | "r" (page), /* Flush TLB page.. */ | ||
266 | "i" (ASI_M_FLUSH_PROBE) : "memory"); | ||
267 | |||
268 | } | ||
269 | |||
270 | static inline unsigned long srmmu_hwprobe(unsigned long vaddr) | ||
271 | { | ||
272 | unsigned long retval; | ||
273 | |||
274 | vaddr &= PAGE_MASK; | ||
275 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
276 | "=r" (retval) : | ||
277 | "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); | ||
278 | |||
279 | return retval; | ||
280 | } | ||
281 | |||
282 | static inline int | ||
283 | srmmu_get_pte (unsigned long addr) | ||
284 | { | ||
285 | register unsigned long entry; | ||
286 | |||
287 | __asm__ __volatile__("\n\tlda [%1] %2,%0\n\t" : | ||
288 | "=r" (entry): | ||
289 | "r" ((addr & 0xfffff000) | 0x400), "i" (ASI_M_FLUSH_PROBE)); | ||
290 | return entry; | ||
291 | } | ||
292 | |||
293 | extern unsigned long (*srmmu_read_physical)(unsigned long paddr); | ||
294 | extern void (*srmmu_write_physical)(unsigned long paddr, unsigned long word); | ||
295 | |||
296 | #endif /* !(__ASSEMBLY__) */ | ||
297 | |||
298 | #endif /* !(_SPARC_PGTSRMMU_H) */ | ||
diff --git a/include/asm-sparc/pgtsun4.h b/include/asm-sparc/pgtsun4.h deleted file mode 100644 index 5a0d661fb82e..000000000000 --- a/include/asm-sparc/pgtsun4.h +++ /dev/null | |||
@@ -1,171 +0,0 @@ | |||
1 | /* | ||
2 | * pgtsun4.h: Sun4 specific pgtable.h defines and code. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | ||
6 | */ | ||
7 | #ifndef _SPARC_PGTSUN4C_H | ||
8 | #define _SPARC_PGTSUN4C_H | ||
9 | |||
10 | #include <asm/contregs.h> | ||
11 | |||
12 | /* PMD_SHIFT determines the size of the area a second-level page table can map */ | ||
13 | #define SUN4C_PMD_SHIFT 23 | ||
14 | |||
15 | /* PGDIR_SHIFT determines what a third-level page table entry can map */ | ||
16 | #define SUN4C_PGDIR_SHIFT 23 | ||
17 | #define SUN4C_PGDIR_SIZE (1UL << SUN4C_PGDIR_SHIFT) | ||
18 | #define SUN4C_PGDIR_MASK (~(SUN4C_PGDIR_SIZE-1)) | ||
19 | #define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK) | ||
20 | |||
21 | /* To represent how the sun4c mmu really lays things out. */ | ||
22 | #define SUN4C_REAL_PGDIR_SHIFT 18 | ||
23 | #define SUN4C_REAL_PGDIR_SIZE (1UL << SUN4C_REAL_PGDIR_SHIFT) | ||
24 | #define SUN4C_REAL_PGDIR_MASK (~(SUN4C_REAL_PGDIR_SIZE-1)) | ||
25 | #define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK) | ||
26 | |||
27 | /* 19 bit PFN on sun4 */ | ||
28 | #define SUN4C_PFN_MASK 0x7ffff | ||
29 | |||
30 | /* Don't increase these unless the structures in sun4c.c are fixed */ | ||
31 | #define SUN4C_MAX_SEGMAPS 256 | ||
32 | #define SUN4C_MAX_CONTEXTS 16 | ||
33 | |||
34 | /* | ||
35 | * To be efficient, and not have to worry about allocating such | ||
36 | * a huge pgd, we make the kernel sun4c tables each hold 1024 | ||
37 | * entries and the pgd similarly just like the i386 tables. | ||
38 | */ | ||
39 | #define SUN4C_PTRS_PER_PTE 1024 | ||
40 | #define SUN4C_PTRS_PER_PMD 1 | ||
41 | #define SUN4C_PTRS_PER_PGD 1024 | ||
42 | |||
43 | /* | ||
44 | * Sparc SUN4C pte fields. | ||
45 | */ | ||
46 | #define _SUN4C_PAGE_VALID 0x80000000 | ||
47 | #define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */ | ||
48 | #define _SUN4C_PAGE_DIRTY 0x40000000 | ||
49 | #define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */ | ||
50 | #define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */ | ||
51 | #define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */ | ||
52 | #define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */ | ||
53 | #define _SUN4C_PAGE_IO 0x04000000 /* I/O page */ | ||
54 | #define _SUN4C_PAGE_FILE 0x02000000 /* implemented in software */ | ||
55 | #define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */ | ||
56 | #define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */ | ||
57 | #define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */ | ||
58 | #define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */ | ||
59 | |||
60 | #define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\ | ||
61 | _SUN4C_PAGE_ACCESSED) | ||
62 | #define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\ | ||
63 | _SUN4C_PAGE_MODIFIED) | ||
64 | |||
65 | #define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED) | ||
66 | |||
67 | #define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT) | ||
68 | #define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\ | ||
69 | _SUN4C_PAGE_WRITE) | ||
70 | #define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) | ||
71 | #define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) | ||
72 | #define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\ | ||
73 | _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV) | ||
74 | |||
75 | /* SUN4C swap entry encoding | ||
76 | * | ||
77 | * We use 5 bits for the type and 19 for the offset. This gives us | ||
78 | * 32 swapfiles of 4GB each. Encoding looks like: | ||
79 | * | ||
80 | * RRRRRRRRooooooooooooooooooottttt | ||
81 | * fedcba9876543210fedcba9876543210 | ||
82 | * | ||
83 | * The top 8 bits are reserved for protection and status bits, especially | ||
84 | * FILE and PRESENT. | ||
85 | */ | ||
86 | #define SUN4C_SWP_TYPE_MASK 0x1f | ||
87 | #define SUN4C_SWP_OFF_MASK 0x7ffff | ||
88 | #define SUN4C_SWP_OFF_SHIFT 5 | ||
89 | |||
90 | #ifndef __ASSEMBLY__ | ||
91 | |||
92 | static inline unsigned long sun4c_get_synchronous_error(void) | ||
93 | { | ||
94 | unsigned long sync_err; | ||
95 | |||
96 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
97 | "=r" (sync_err) : | ||
98 | "r" (AC_SYNC_ERR), "i" (ASI_CONTROL)); | ||
99 | return sync_err; | ||
100 | } | ||
101 | |||
102 | static inline unsigned long sun4c_get_synchronous_address(void) | ||
103 | { | ||
104 | unsigned long sync_addr; | ||
105 | |||
106 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
107 | "=r" (sync_addr) : | ||
108 | "r" (AC_SYNC_VA), "i" (ASI_CONTROL)); | ||
109 | return sync_addr; | ||
110 | } | ||
111 | |||
112 | /* SUN4 pte, segmap, and context manipulation */ | ||
113 | static inline unsigned long sun4c_get_segmap(unsigned long addr) | ||
114 | { | ||
115 | register unsigned long entry; | ||
116 | |||
117 | __asm__ __volatile__("\n\tlduha [%1] %2, %0\n\t" : | ||
118 | "=r" (entry) : | ||
119 | "r" (addr), "i" (ASI_SEGMAP)); | ||
120 | return entry; | ||
121 | } | ||
122 | |||
123 | static inline void sun4c_put_segmap(unsigned long addr, unsigned long entry) | ||
124 | { | ||
125 | __asm__ __volatile__("\n\tstha %1, [%0] %2; nop; nop; nop;\n\t" : : | ||
126 | "r" (addr), "r" (entry), | ||
127 | "i" (ASI_SEGMAP) | ||
128 | : "memory"); | ||
129 | } | ||
130 | |||
131 | static inline unsigned long sun4c_get_pte(unsigned long addr) | ||
132 | { | ||
133 | register unsigned long entry; | ||
134 | |||
135 | __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" : | ||
136 | "=r" (entry) : | ||
137 | "r" (addr), "i" (ASI_PTE)); | ||
138 | return entry; | ||
139 | } | ||
140 | |||
141 | static inline void sun4c_put_pte(unsigned long addr, unsigned long entry) | ||
142 | { | ||
143 | __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : : | ||
144 | "r" (addr), | ||
145 | "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE) | ||
146 | : "memory"); | ||
147 | } | ||
148 | |||
149 | static inline int sun4c_get_context(void) | ||
150 | { | ||
151 | register int ctx; | ||
152 | |||
153 | __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : | ||
154 | "=r" (ctx) : | ||
155 | "r" (AC_CONTEXT), "i" (ASI_CONTROL)); | ||
156 | |||
157 | return ctx; | ||
158 | } | ||
159 | |||
160 | static inline int sun4c_set_context(int ctx) | ||
161 | { | ||
162 | __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : : | ||
163 | "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL) | ||
164 | : "memory"); | ||
165 | |||
166 | return ctx; | ||
167 | } | ||
168 | |||
169 | #endif /* !(__ASSEMBLY__) */ | ||
170 | |||
171 | #endif /* !(_SPARC_PGTSUN4_H) */ | ||
diff --git a/include/asm-sparc/pgtsun4c.h b/include/asm-sparc/pgtsun4c.h deleted file mode 100644 index aeb25e912179..000000000000 --- a/include/asm-sparc/pgtsun4c.h +++ /dev/null | |||
@@ -1,172 +0,0 @@ | |||
1 | /* | ||
2 | * pgtsun4c.h: Sun4c specific pgtable.h defines and code. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | #ifndef _SPARC_PGTSUN4C_H | ||
7 | #define _SPARC_PGTSUN4C_H | ||
8 | |||
9 | #include <asm/contregs.h> | ||
10 | |||
11 | /* PMD_SHIFT determines the size of the area a second-level page table can map */ | ||
12 | #define SUN4C_PMD_SHIFT 22 | ||
13 | |||
14 | /* PGDIR_SHIFT determines what a third-level page table entry can map */ | ||
15 | #define SUN4C_PGDIR_SHIFT 22 | ||
16 | #define SUN4C_PGDIR_SIZE (1UL << SUN4C_PGDIR_SHIFT) | ||
17 | #define SUN4C_PGDIR_MASK (~(SUN4C_PGDIR_SIZE-1)) | ||
18 | #define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK) | ||
19 | |||
20 | /* To represent how the sun4c mmu really lays things out. */ | ||
21 | #define SUN4C_REAL_PGDIR_SHIFT 18 | ||
22 | #define SUN4C_REAL_PGDIR_SIZE (1UL << SUN4C_REAL_PGDIR_SHIFT) | ||
23 | #define SUN4C_REAL_PGDIR_MASK (~(SUN4C_REAL_PGDIR_SIZE-1)) | ||
24 | #define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK) | ||
25 | |||
26 | /* 16 bit PFN on sun4c */ | ||
27 | #define SUN4C_PFN_MASK 0xffff | ||
28 | |||
29 | /* Don't increase these unless the structures in sun4c.c are fixed */ | ||
30 | #define SUN4C_MAX_SEGMAPS 256 | ||
31 | #define SUN4C_MAX_CONTEXTS 16 | ||
32 | |||
33 | /* | ||
34 | * To be efficient, and not have to worry about allocating such | ||
35 | * a huge pgd, we make the kernel sun4c tables each hold 1024 | ||
36 | * entries and the pgd similarly just like the i386 tables. | ||
37 | */ | ||
38 | #define SUN4C_PTRS_PER_PTE 1024 | ||
39 | #define SUN4C_PTRS_PER_PMD 1 | ||
40 | #define SUN4C_PTRS_PER_PGD 1024 | ||
41 | |||
42 | /* | ||
43 | * Sparc SUN4C pte fields. | ||
44 | */ | ||
45 | #define _SUN4C_PAGE_VALID 0x80000000 | ||
46 | #define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */ | ||
47 | #define _SUN4C_PAGE_DIRTY 0x40000000 | ||
48 | #define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */ | ||
49 | #define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */ | ||
50 | #define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */ | ||
51 | #define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */ | ||
52 | #define _SUN4C_PAGE_IO 0x04000000 /* I/O page */ | ||
53 | #define _SUN4C_PAGE_FILE 0x02000000 /* implemented in software */ | ||
54 | #define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */ | ||
55 | #define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */ | ||
56 | #define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */ | ||
57 | #define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */ | ||
58 | |||
59 | #define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\ | ||
60 | _SUN4C_PAGE_ACCESSED) | ||
61 | #define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\ | ||
62 | _SUN4C_PAGE_MODIFIED) | ||
63 | |||
64 | #define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED) | ||
65 | |||
66 | #define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT) | ||
67 | #define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\ | ||
68 | _SUN4C_PAGE_WRITE) | ||
69 | #define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) | ||
70 | #define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) | ||
71 | #define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\ | ||
72 | _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV) | ||
73 | |||
74 | /* SUN4C swap entry encoding | ||
75 | * | ||
76 | * We use 5 bits for the type and 19 for the offset. This gives us | ||
77 | * 32 swapfiles of 4GB each. Encoding looks like: | ||
78 | * | ||
79 | * RRRRRRRRooooooooooooooooooottttt | ||
80 | * fedcba9876543210fedcba9876543210 | ||
81 | * | ||
82 | * The top 8 bits are reserved for protection and status bits, especially | ||
83 | * FILE and PRESENT. | ||
84 | */ | ||
85 | #define SUN4C_SWP_TYPE_MASK 0x1f | ||
86 | #define SUN4C_SWP_OFF_MASK 0x7ffff | ||
87 | #define SUN4C_SWP_OFF_SHIFT 5 | ||
88 | |||
89 | #ifndef __ASSEMBLY__ | ||
90 | |||
91 | static inline unsigned long sun4c_get_synchronous_error(void) | ||
92 | { | ||
93 | unsigned long sync_err; | ||
94 | |||
95 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
96 | "=r" (sync_err) : | ||
97 | "r" (AC_SYNC_ERR), "i" (ASI_CONTROL)); | ||
98 | return sync_err; | ||
99 | } | ||
100 | |||
101 | static inline unsigned long sun4c_get_synchronous_address(void) | ||
102 | { | ||
103 | unsigned long sync_addr; | ||
104 | |||
105 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
106 | "=r" (sync_addr) : | ||
107 | "r" (AC_SYNC_VA), "i" (ASI_CONTROL)); | ||
108 | return sync_addr; | ||
109 | } | ||
110 | |||
111 | /* SUN4C pte, segmap, and context manipulation */ | ||
112 | static inline unsigned long sun4c_get_segmap(unsigned long addr) | ||
113 | { | ||
114 | register unsigned long entry; | ||
115 | |||
116 | __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : | ||
117 | "=r" (entry) : | ||
118 | "r" (addr), "i" (ASI_SEGMAP)); | ||
119 | |||
120 | return entry; | ||
121 | } | ||
122 | |||
123 | static inline void sun4c_put_segmap(unsigned long addr, unsigned long entry) | ||
124 | { | ||
125 | |||
126 | __asm__ __volatile__("\n\tstba %1, [%0] %2; nop; nop; nop;\n\t" : : | ||
127 | "r" (addr), "r" (entry), | ||
128 | "i" (ASI_SEGMAP) | ||
129 | : "memory"); | ||
130 | } | ||
131 | |||
132 | static inline unsigned long sun4c_get_pte(unsigned long addr) | ||
133 | { | ||
134 | register unsigned long entry; | ||
135 | |||
136 | __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" : | ||
137 | "=r" (entry) : | ||
138 | "r" (addr), "i" (ASI_PTE)); | ||
139 | return entry; | ||
140 | } | ||
141 | |||
142 | static inline void sun4c_put_pte(unsigned long addr, unsigned long entry) | ||
143 | { | ||
144 | __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : : | ||
145 | "r" (addr), | ||
146 | "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE) | ||
147 | : "memory"); | ||
148 | } | ||
149 | |||
150 | static inline int sun4c_get_context(void) | ||
151 | { | ||
152 | register int ctx; | ||
153 | |||
154 | __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : | ||
155 | "=r" (ctx) : | ||
156 | "r" (AC_CONTEXT), "i" (ASI_CONTROL)); | ||
157 | |||
158 | return ctx; | ||
159 | } | ||
160 | |||
161 | static inline int sun4c_set_context(int ctx) | ||
162 | { | ||
163 | __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : : | ||
164 | "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL) | ||
165 | : "memory"); | ||
166 | |||
167 | return ctx; | ||
168 | } | ||
169 | |||
170 | #endif /* !(__ASSEMBLY__) */ | ||
171 | |||
172 | #endif /* !(_SPARC_PGTSUN4C_H) */ | ||
diff --git a/include/asm-sparc/poll.h b/include/asm-sparc/poll.h deleted file mode 100644 index 091d3ad2e830..000000000000 --- a/include/asm-sparc/poll.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef __SPARC_POLL_H | ||
2 | #define __SPARC_POLL_H | ||
3 | |||
4 | #define POLLWRNORM POLLOUT | ||
5 | #define POLLWRBAND 256 | ||
6 | #define POLLMSG 512 | ||
7 | #define POLLREMOVE 1024 | ||
8 | #define POLLRDHUP 2048 | ||
9 | |||
10 | #include <asm-generic/poll.h> | ||
11 | |||
12 | #endif | ||
diff --git a/include/asm-sparc/posix_types.h b/include/asm-sparc/posix_types.h deleted file mode 100644 index dcc07eb5e181..000000000000 --- a/include/asm-sparc/posix_types.h +++ /dev/null | |||
@@ -1,118 +0,0 @@ | |||
1 | #ifndef __ARCH_SPARC_POSIX_TYPES_H | ||
2 | #define __ARCH_SPARC_POSIX_TYPES_H | ||
3 | |||
4 | /* | ||
5 | * This file is generally used by user-level software, so you need to | ||
6 | * be a little careful about namespace pollution etc. Also, we cannot | ||
7 | * assume GCC is being used. | ||
8 | */ | ||
9 | |||
10 | typedef unsigned int __kernel_size_t; | ||
11 | typedef int __kernel_ssize_t; | ||
12 | typedef long int __kernel_ptrdiff_t; | ||
13 | typedef long __kernel_time_t; | ||
14 | typedef long __kernel_suseconds_t; | ||
15 | typedef long __kernel_clock_t; | ||
16 | typedef int __kernel_pid_t; | ||
17 | typedef unsigned short __kernel_ipc_pid_t; | ||
18 | typedef unsigned short __kernel_uid_t; | ||
19 | typedef unsigned short __kernel_gid_t; | ||
20 | typedef unsigned long __kernel_ino_t; | ||
21 | typedef unsigned short __kernel_mode_t; | ||
22 | typedef unsigned short __kernel_umode_t; | ||
23 | typedef short __kernel_nlink_t; | ||
24 | typedef long __kernel_daddr_t; | ||
25 | typedef long __kernel_off_t; | ||
26 | typedef char * __kernel_caddr_t; | ||
27 | typedef unsigned short __kernel_uid16_t; | ||
28 | typedef unsigned short __kernel_gid16_t; | ||
29 | typedef unsigned int __kernel_uid32_t; | ||
30 | typedef unsigned int __kernel_gid32_t; | ||
31 | typedef unsigned short __kernel_old_uid_t; | ||
32 | typedef unsigned short __kernel_old_gid_t; | ||
33 | typedef unsigned short __kernel_old_dev_t; | ||
34 | typedef int __kernel_clockid_t; | ||
35 | typedef int __kernel_timer_t; | ||
36 | |||
37 | #ifdef __GNUC__ | ||
38 | typedef long long __kernel_loff_t; | ||
39 | #endif | ||
40 | |||
41 | typedef struct { | ||
42 | int val[2]; | ||
43 | } __kernel_fsid_t; | ||
44 | |||
45 | #if defined(__KERNEL__) | ||
46 | |||
47 | #undef __FD_SET | ||
48 | static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) | ||
49 | { | ||
50 | unsigned long _tmp = fd / __NFDBITS; | ||
51 | unsigned long _rem = fd % __NFDBITS; | ||
52 | fdsetp->fds_bits[_tmp] |= (1UL<<_rem); | ||
53 | } | ||
54 | |||
55 | #undef __FD_CLR | ||
56 | static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) | ||
57 | { | ||
58 | unsigned long _tmp = fd / __NFDBITS; | ||
59 | unsigned long _rem = fd % __NFDBITS; | ||
60 | fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); | ||
61 | } | ||
62 | |||
63 | #undef __FD_ISSET | ||
64 | static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) | ||
65 | { | ||
66 | unsigned long _tmp = fd / __NFDBITS; | ||
67 | unsigned long _rem = fd % __NFDBITS; | ||
68 | return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; | ||
69 | } | ||
70 | |||
71 | /* | ||
72 | * This will unroll the loop for the normal constant cases (8 or 32 longs, | ||
73 | * for 256 and 1024-bit fd_sets respectively) | ||
74 | */ | ||
75 | #undef __FD_ZERO | ||
76 | static inline void __FD_ZERO(__kernel_fd_set *p) | ||
77 | { | ||
78 | unsigned long *tmp = p->fds_bits; | ||
79 | int i; | ||
80 | |||
81 | if (__builtin_constant_p(__FDSET_LONGS)) { | ||
82 | switch (__FDSET_LONGS) { | ||
83 | case 32: | ||
84 | tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; | ||
85 | tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; | ||
86 | tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; | ||
87 | tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; | ||
88 | tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; | ||
89 | tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; | ||
90 | tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; | ||
91 | tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; | ||
92 | return; | ||
93 | case 16: | ||
94 | tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; | ||
95 | tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; | ||
96 | tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; | ||
97 | tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; | ||
98 | return; | ||
99 | case 8: | ||
100 | tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; | ||
101 | tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; | ||
102 | return; | ||
103 | case 4: | ||
104 | tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; | ||
105 | return; | ||
106 | } | ||
107 | } | ||
108 | i = __FDSET_LONGS; | ||
109 | while (i) { | ||
110 | i--; | ||
111 | *tmp = 0; | ||
112 | tmp++; | ||
113 | } | ||
114 | } | ||
115 | |||
116 | #endif /* defined(__KERNEL__) */ | ||
117 | |||
118 | #endif /* !(__ARCH_SPARC_POSIX_TYPES_H) */ | ||
diff --git a/include/asm-sparc/processor.h b/include/asm-sparc/processor.h deleted file mode 100644 index 8898efbbbe07..000000000000 --- a/include/asm-sparc/processor.h +++ /dev/null | |||
@@ -1,128 +0,0 @@ | |||
1 | /* include/asm-sparc/processor.h | ||
2 | * | ||
3 | * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) | ||
4 | */ | ||
5 | |||
6 | #ifndef __ASM_SPARC_PROCESSOR_H | ||
7 | #define __ASM_SPARC_PROCESSOR_H | ||
8 | |||
9 | /* | ||
10 | * Sparc32 implementation of macro that returns current | ||
11 | * instruction pointer ("program counter"). | ||
12 | */ | ||
13 | #define current_text_addr() ({ void *pc; __asm__("sethi %%hi(1f), %0; or %0, %%lo(1f), %0;\n1:" : "=r" (pc)); pc; }) | ||
14 | |||
15 | #include <asm/psr.h> | ||
16 | #include <asm/ptrace.h> | ||
17 | #include <asm/head.h> | ||
18 | #include <asm/signal.h> | ||
19 | #include <asm/btfixup.h> | ||
20 | #include <asm/page.h> | ||
21 | |||
22 | /* | ||
23 | * The sparc has no problems with write protection | ||
24 | */ | ||
25 | #define wp_works_ok 1 | ||
26 | #define wp_works_ok__is_a_macro /* for versions in ksyms.c */ | ||
27 | |||
28 | /* Whee, this is STACK_TOP + PAGE_SIZE and the lowest kernel address too... | ||
29 | * That one page is used to protect kernel from intruders, so that | ||
30 | * we can make our access_ok test faster | ||
31 | */ | ||
32 | #define TASK_SIZE PAGE_OFFSET | ||
33 | #ifdef __KERNEL__ | ||
34 | #define STACK_TOP (PAGE_OFFSET - PAGE_SIZE) | ||
35 | #define STACK_TOP_MAX STACK_TOP | ||
36 | #endif /* __KERNEL__ */ | ||
37 | |||
38 | struct task_struct; | ||
39 | |||
40 | #ifdef __KERNEL__ | ||
41 | struct fpq { | ||
42 | unsigned long *insn_addr; | ||
43 | unsigned long insn; | ||
44 | }; | ||
45 | #endif | ||
46 | |||
47 | typedef struct { | ||
48 | int seg; | ||
49 | } mm_segment_t; | ||
50 | |||
51 | /* The Sparc processor specific thread struct. */ | ||
52 | struct thread_struct { | ||
53 | struct pt_regs *kregs; | ||
54 | unsigned int _pad1; | ||
55 | |||
56 | /* Special child fork kpsr/kwim values. */ | ||
57 | unsigned long fork_kpsr __attribute__ ((aligned (8))); | ||
58 | unsigned long fork_kwim; | ||
59 | |||
60 | /* Floating point regs */ | ||
61 | unsigned long float_regs[32] __attribute__ ((aligned (8))); | ||
62 | unsigned long fsr; | ||
63 | unsigned long fpqdepth; | ||
64 | struct fpq fpqueue[16]; | ||
65 | unsigned long flags; | ||
66 | mm_segment_t current_ds; | ||
67 | }; | ||
68 | |||
69 | #define SPARC_FLAG_KTHREAD 0x1 /* task is a kernel thread */ | ||
70 | #define SPARC_FLAG_UNALIGNED 0x2 /* is allowed to do unaligned accesses */ | ||
71 | |||
72 | #define INIT_THREAD { \ | ||
73 | .flags = SPARC_FLAG_KTHREAD, \ | ||
74 | .current_ds = KERNEL_DS, \ | ||
75 | } | ||
76 | |||
77 | /* Return saved PC of a blocked thread. */ | ||
78 | extern unsigned long thread_saved_pc(struct task_struct *t); | ||
79 | |||
80 | /* Do necessary setup to start up a newly executed thread. */ | ||
81 | static inline void start_thread(struct pt_regs * regs, unsigned long pc, | ||
82 | unsigned long sp) | ||
83 | { | ||
84 | register unsigned long zero asm("g1"); | ||
85 | |||
86 | regs->psr = (regs->psr & (PSR_CWP)) | PSR_S; | ||
87 | regs->pc = ((pc & (~3)) - 4); | ||
88 | regs->npc = regs->pc + 4; | ||
89 | regs->y = 0; | ||
90 | zero = 0; | ||
91 | __asm__ __volatile__("std\t%%g0, [%0 + %3 + 0x00]\n\t" | ||
92 | "std\t%%g0, [%0 + %3 + 0x08]\n\t" | ||
93 | "std\t%%g0, [%0 + %3 + 0x10]\n\t" | ||
94 | "std\t%%g0, [%0 + %3 + 0x18]\n\t" | ||
95 | "std\t%%g0, [%0 + %3 + 0x20]\n\t" | ||
96 | "std\t%%g0, [%0 + %3 + 0x28]\n\t" | ||
97 | "std\t%%g0, [%0 + %3 + 0x30]\n\t" | ||
98 | "st\t%1, [%0 + %3 + 0x38]\n\t" | ||
99 | "st\t%%g0, [%0 + %3 + 0x3c]" | ||
100 | : /* no outputs */ | ||
101 | : "r" (regs), | ||
102 | "r" (sp - sizeof(struct reg_window)), | ||
103 | "r" (zero), | ||
104 | "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0])) | ||
105 | : "memory"); | ||
106 | } | ||
107 | |||
108 | /* Free all resources held by a thread. */ | ||
109 | #define release_thread(tsk) do { } while(0) | ||
110 | extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); | ||
111 | |||
112 | /* Prepare to copy thread state - unlazy all lazy status */ | ||
113 | #define prepare_to_copy(tsk) do { } while (0) | ||
114 | |||
115 | extern unsigned long get_wchan(struct task_struct *); | ||
116 | |||
117 | #define KSTK_EIP(tsk) ((tsk)->thread.kregs->pc) | ||
118 | #define KSTK_ESP(tsk) ((tsk)->thread.kregs->u_regs[UREG_FP]) | ||
119 | |||
120 | #ifdef __KERNEL__ | ||
121 | |||
122 | extern struct task_struct *last_task_used_math; | ||
123 | |||
124 | #define cpu_relax() barrier() | ||
125 | |||
126 | #endif | ||
127 | |||
128 | #endif /* __ASM_SPARC_PROCESSOR_H */ | ||
diff --git a/include/asm-sparc/prom.h b/include/asm-sparc/prom.h deleted file mode 100644 index fd55522481cd..000000000000 --- a/include/asm-sparc/prom.h +++ /dev/null | |||
@@ -1,108 +0,0 @@ | |||
1 | #ifndef _SPARC_PROM_H | ||
2 | #define _SPARC_PROM_H | ||
3 | #ifdef __KERNEL__ | ||
4 | |||
5 | /* | ||
6 | * Definitions for talking to the Open Firmware PROM on | ||
7 | * Power Macintosh computers. | ||
8 | * | ||
9 | * Copyright (C) 1996-2005 Paul Mackerras. | ||
10 | * | ||
11 | * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp. | ||
12 | * Updates for SPARC by David S. Miller | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or | ||
15 | * modify it under the terms of the GNU General Public License | ||
16 | * as published by the Free Software Foundation; either version | ||
17 | * 2 of the License, or (at your option) any later version. | ||
18 | */ | ||
19 | #include <linux/types.h> | ||
20 | #include <linux/proc_fs.h> | ||
21 | #include <asm/atomic.h> | ||
22 | |||
23 | #define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 2 | ||
24 | #define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1 | ||
25 | |||
26 | #define of_compat_cmp(s1, s2, l) strncmp((s1), (s2), (l)) | ||
27 | #define of_prop_cmp(s1, s2) strcasecmp((s1), (s2)) | ||
28 | #define of_node_cmp(s1, s2) strcmp((s1), (s2)) | ||
29 | |||
30 | typedef u32 phandle; | ||
31 | typedef u32 ihandle; | ||
32 | |||
33 | struct property { | ||
34 | char *name; | ||
35 | int length; | ||
36 | void *value; | ||
37 | struct property *next; | ||
38 | unsigned long _flags; | ||
39 | unsigned int unique_id; | ||
40 | }; | ||
41 | |||
42 | struct of_irq_controller; | ||
43 | struct device_node { | ||
44 | const char *name; | ||
45 | const char *type; | ||
46 | phandle node; | ||
47 | char *path_component_name; | ||
48 | char *full_name; | ||
49 | |||
50 | struct property *properties; | ||
51 | struct property *deadprops; /* removed properties */ | ||
52 | struct device_node *parent; | ||
53 | struct device_node *child; | ||
54 | struct device_node *sibling; | ||
55 | struct device_node *next; /* next device of same type */ | ||
56 | struct device_node *allnext; /* next in list of all nodes */ | ||
57 | struct proc_dir_entry *pde; /* this node's proc directory */ | ||
58 | struct kref kref; | ||
59 | unsigned long _flags; | ||
60 | void *data; | ||
61 | unsigned int unique_id; | ||
62 | |||
63 | struct of_irq_controller *irq_trans; | ||
64 | }; | ||
65 | |||
66 | struct of_irq_controller { | ||
67 | unsigned int (*irq_build)(struct device_node *, unsigned int, void *); | ||
68 | void *data; | ||
69 | }; | ||
70 | |||
71 | #define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags) | ||
72 | #define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags) | ||
73 | |||
74 | extern struct device_node *of_find_node_by_cpuid(int cpuid); | ||
75 | extern int of_set_property(struct device_node *node, const char *name, void *val, int len); | ||
76 | extern int of_getintprop_default(struct device_node *np, | ||
77 | const char *name, | ||
78 | int def); | ||
79 | extern int of_find_in_proplist(const char *list, const char *match, int len); | ||
80 | #ifdef CONFIG_NUMA | ||
81 | extern int of_node_to_nid(struct device_node *dp); | ||
82 | #else | ||
83 | #define of_node_to_nid(dp) (-1) | ||
84 | #endif | ||
85 | |||
86 | extern void prom_build_devicetree(void); | ||
87 | |||
88 | /* Dummy ref counting routines - to be implemented later */ | ||
89 | static inline struct device_node *of_node_get(struct device_node *node) | ||
90 | { | ||
91 | return node; | ||
92 | } | ||
93 | static inline void of_node_put(struct device_node *node) | ||
94 | { | ||
95 | } | ||
96 | |||
97 | /* | ||
98 | * NB: This is here while we transition from using asm/prom.h | ||
99 | * to linux/of.h | ||
100 | */ | ||
101 | #include <linux/of.h> | ||
102 | |||
103 | extern struct device_node *of_console_device; | ||
104 | extern char *of_console_path; | ||
105 | extern char *of_console_options; | ||
106 | |||
107 | #endif /* __KERNEL__ */ | ||
108 | #endif /* _SPARC_PROM_H */ | ||
diff --git a/include/asm-sparc/psr.h b/include/asm-sparc/psr.h deleted file mode 100644 index b8c0e5f0a66b..000000000000 --- a/include/asm-sparc/psr.h +++ /dev/null | |||
@@ -1,93 +0,0 @@ | |||
1 | /* | ||
2 | * psr.h: This file holds the macros for masking off various parts of | ||
3 | * the processor status register on the Sparc. This is valid | ||
4 | * for Version 8. On the V9 this is renamed to the PSTATE | ||
5 | * register and its members are accessed as fields like | ||
6 | * PSTATE.PRIV for the current CPU privilege level. | ||
7 | * | ||
8 | * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) | ||
9 | */ | ||
10 | |||
11 | #ifndef __LINUX_SPARC_PSR_H | ||
12 | #define __LINUX_SPARC_PSR_H | ||
13 | |||
14 | /* The Sparc PSR fields are laid out as the following: | ||
15 | * | ||
16 | * ------------------------------------------------------------------------ | ||
17 | * | impl | vers | icc | resv | EC | EF | PIL | S | PS | ET | CWP | | ||
18 | * | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 | | ||
19 | * ------------------------------------------------------------------------ | ||
20 | */ | ||
21 | #define PSR_CWP 0x0000001f /* current window pointer */ | ||
22 | #define PSR_ET 0x00000020 /* enable traps field */ | ||
23 | #define PSR_PS 0x00000040 /* previous privilege level */ | ||
24 | #define PSR_S 0x00000080 /* current privilege level */ | ||
25 | #define PSR_PIL 0x00000f00 /* processor interrupt level */ | ||
26 | #define PSR_EF 0x00001000 /* enable floating point */ | ||
27 | #define PSR_EC 0x00002000 /* enable co-processor */ | ||
28 | #define PSR_SYSCALL 0x00004000 /* inside of a syscall */ | ||
29 | #define PSR_LE 0x00008000 /* SuperSparcII little-endian */ | ||
30 | #define PSR_ICC 0x00f00000 /* integer condition codes */ | ||
31 | #define PSR_C 0x00100000 /* carry bit */ | ||
32 | #define PSR_V 0x00200000 /* overflow bit */ | ||
33 | #define PSR_Z 0x00400000 /* zero bit */ | ||
34 | #define PSR_N 0x00800000 /* negative bit */ | ||
35 | #define PSR_VERS 0x0f000000 /* cpu-version field */ | ||
36 | #define PSR_IMPL 0xf0000000 /* cpu-implementation field */ | ||
37 | |||
38 | #ifdef __KERNEL__ | ||
39 | |||
40 | #ifndef __ASSEMBLY__ | ||
41 | /* Get the %psr register. */ | ||
42 | static inline unsigned int get_psr(void) | ||
43 | { | ||
44 | unsigned int psr; | ||
45 | __asm__ __volatile__( | ||
46 | "rd %%psr, %0\n\t" | ||
47 | "nop\n\t" | ||
48 | "nop\n\t" | ||
49 | "nop\n\t" | ||
50 | : "=r" (psr) | ||
51 | : /* no inputs */ | ||
52 | : "memory"); | ||
53 | |||
54 | return psr; | ||
55 | } | ||
56 | |||
57 | static inline void put_psr(unsigned int new_psr) | ||
58 | { | ||
59 | __asm__ __volatile__( | ||
60 | "wr %0, 0x0, %%psr\n\t" | ||
61 | "nop\n\t" | ||
62 | "nop\n\t" | ||
63 | "nop\n\t" | ||
64 | : /* no outputs */ | ||
65 | : "r" (new_psr) | ||
66 | : "memory", "cc"); | ||
67 | } | ||
68 | |||
69 | /* Get the %fsr register. Be careful, make sure the floating point | ||
70 | * enable bit is set in the %psr when you execute this or you will | ||
71 | * incur a trap. | ||
72 | */ | ||
73 | |||
74 | extern unsigned int fsr_storage; | ||
75 | |||
76 | static inline unsigned int get_fsr(void) | ||
77 | { | ||
78 | unsigned int fsr = 0; | ||
79 | |||
80 | __asm__ __volatile__( | ||
81 | "st %%fsr, %1\n\t" | ||
82 | "ld %1, %0\n\t" | ||
83 | : "=r" (fsr) | ||
84 | : "m" (fsr_storage)); | ||
85 | |||
86 | return fsr; | ||
87 | } | ||
88 | |||
89 | #endif /* !(__ASSEMBLY__) */ | ||
90 | |||
91 | #endif /* (__KERNEL__) */ | ||
92 | |||
93 | #endif /* !(__LINUX_SPARC_PSR_H) */ | ||
diff --git a/include/asm-sparc/ptrace.h b/include/asm-sparc/ptrace.h deleted file mode 100644 index 11f3bc2bb3f5..000000000000 --- a/include/asm-sparc/ptrace.h +++ /dev/null | |||
@@ -1,175 +0,0 @@ | |||
1 | #ifndef _SPARC_PTRACE_H | ||
2 | #define _SPARC_PTRACE_H | ||
3 | |||
4 | #include <asm/psr.h> | ||
5 | |||
6 | /* This struct defines the way the registers are stored on the | ||
7 | * stack during a system call and basically all traps. | ||
8 | */ | ||
9 | |||
10 | #ifndef __ASSEMBLY__ | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | |||
14 | struct pt_regs { | ||
15 | unsigned long psr; | ||
16 | unsigned long pc; | ||
17 | unsigned long npc; | ||
18 | unsigned long y; | ||
19 | unsigned long u_regs[16]; /* globals and ins */ | ||
20 | }; | ||
21 | |||
22 | #define UREG_G0 0 | ||
23 | #define UREG_G1 1 | ||
24 | #define UREG_G2 2 | ||
25 | #define UREG_G3 3 | ||
26 | #define UREG_G4 4 | ||
27 | #define UREG_G5 5 | ||
28 | #define UREG_G6 6 | ||
29 | #define UREG_G7 7 | ||
30 | #define UREG_I0 8 | ||
31 | #define UREG_I1 9 | ||
32 | #define UREG_I2 10 | ||
33 | #define UREG_I3 11 | ||
34 | #define UREG_I4 12 | ||
35 | #define UREG_I5 13 | ||
36 | #define UREG_I6 14 | ||
37 | #define UREG_I7 15 | ||
38 | #define UREG_WIM UREG_G0 | ||
39 | #define UREG_FADDR UREG_G0 | ||
40 | #define UREG_FP UREG_I6 | ||
41 | #define UREG_RETPC UREG_I7 | ||
42 | |||
43 | static inline bool pt_regs_is_syscall(struct pt_regs *regs) | ||
44 | { | ||
45 | return (regs->psr & PSR_SYSCALL); | ||
46 | } | ||
47 | |||
48 | static inline bool pt_regs_clear_syscall(struct pt_regs *regs) | ||
49 | { | ||
50 | return (regs->psr &= ~PSR_SYSCALL); | ||
51 | } | ||
52 | |||
53 | /* A register window */ | ||
54 | struct reg_window { | ||
55 | unsigned long locals[8]; | ||
56 | unsigned long ins[8]; | ||
57 | }; | ||
58 | |||
59 | /* A Sparc stack frame */ | ||
60 | struct sparc_stackf { | ||
61 | unsigned long locals[8]; | ||
62 | unsigned long ins[6]; | ||
63 | struct sparc_stackf *fp; | ||
64 | unsigned long callers_pc; | ||
65 | char *structptr; | ||
66 | unsigned long xargs[6]; | ||
67 | unsigned long xxargs[1]; | ||
68 | }; | ||
69 | |||
70 | #define TRACEREG_SZ sizeof(struct pt_regs) | ||
71 | #define STACKFRAME_SZ sizeof(struct sparc_stackf) | ||
72 | |||
73 | #ifdef __KERNEL__ | ||
74 | |||
75 | #define user_mode(regs) (!((regs)->psr & PSR_PS)) | ||
76 | #define instruction_pointer(regs) ((regs)->pc) | ||
77 | unsigned long profile_pc(struct pt_regs *); | ||
78 | extern void show_regs(struct pt_regs *); | ||
79 | #endif | ||
80 | |||
81 | #else /* __ASSEMBLY__ */ | ||
82 | /* For assembly code. */ | ||
83 | #define TRACEREG_SZ 0x50 | ||
84 | #define STACKFRAME_SZ 0x60 | ||
85 | #endif | ||
86 | |||
87 | /* | ||
88 | * The asm-offsets.h is a generated file, so we cannot include it. | ||
89 | * It may be OK for glibc headers, but it's utterly pointless for C code. | ||
90 | * The assembly code using those offsets has to include it explicitly. | ||
91 | */ | ||
92 | /* #include <asm/asm-offsets.h> */ | ||
93 | |||
94 | /* These are for pt_regs. */ | ||
95 | #define PT_PSR 0x0 | ||
96 | #define PT_PC 0x4 | ||
97 | #define PT_NPC 0x8 | ||
98 | #define PT_Y 0xc | ||
99 | #define PT_G0 0x10 | ||
100 | #define PT_WIM PT_G0 | ||
101 | #define PT_G1 0x14 | ||
102 | #define PT_G2 0x18 | ||
103 | #define PT_G3 0x1c | ||
104 | #define PT_G4 0x20 | ||
105 | #define PT_G5 0x24 | ||
106 | #define PT_G6 0x28 | ||
107 | #define PT_G7 0x2c | ||
108 | #define PT_I0 0x30 | ||
109 | #define PT_I1 0x34 | ||
110 | #define PT_I2 0x38 | ||
111 | #define PT_I3 0x3c | ||
112 | #define PT_I4 0x40 | ||
113 | #define PT_I5 0x44 | ||
114 | #define PT_I6 0x48 | ||
115 | #define PT_FP PT_I6 | ||
116 | #define PT_I7 0x4c | ||
117 | |||
118 | /* Reg_window offsets */ | ||
119 | #define RW_L0 0x00 | ||
120 | #define RW_L1 0x04 | ||
121 | #define RW_L2 0x08 | ||
122 | #define RW_L3 0x0c | ||
123 | #define RW_L4 0x10 | ||
124 | #define RW_L5 0x14 | ||
125 | #define RW_L6 0x18 | ||
126 | #define RW_L7 0x1c | ||
127 | #define RW_I0 0x20 | ||
128 | #define RW_I1 0x24 | ||
129 | #define RW_I2 0x28 | ||
130 | #define RW_I3 0x2c | ||
131 | #define RW_I4 0x30 | ||
132 | #define RW_I5 0x34 | ||
133 | #define RW_I6 0x38 | ||
134 | #define RW_I7 0x3c | ||
135 | |||
136 | /* Stack_frame offsets */ | ||
137 | #define SF_L0 0x00 | ||
138 | #define SF_L1 0x04 | ||
139 | #define SF_L2 0x08 | ||
140 | #define SF_L3 0x0c | ||
141 | #define SF_L4 0x10 | ||
142 | #define SF_L5 0x14 | ||
143 | #define SF_L6 0x18 | ||
144 | #define SF_L7 0x1c | ||
145 | #define SF_I0 0x20 | ||
146 | #define SF_I1 0x24 | ||
147 | #define SF_I2 0x28 | ||
148 | #define SF_I3 0x2c | ||
149 | #define SF_I4 0x30 | ||
150 | #define SF_I5 0x34 | ||
151 | #define SF_FP 0x38 | ||
152 | #define SF_PC 0x3c | ||
153 | #define SF_RETP 0x40 | ||
154 | #define SF_XARG0 0x44 | ||
155 | #define SF_XARG1 0x48 | ||
156 | #define SF_XARG2 0x4c | ||
157 | #define SF_XARG3 0x50 | ||
158 | #define SF_XARG4 0x54 | ||
159 | #define SF_XARG5 0x58 | ||
160 | #define SF_XXARG 0x5c | ||
161 | |||
162 | /* Stuff for the ptrace system call */ | ||
163 | #define PTRACE_SPARC_DETACH 11 | ||
164 | #define PTRACE_GETREGS 12 | ||
165 | #define PTRACE_SETREGS 13 | ||
166 | #define PTRACE_GETFPREGS 14 | ||
167 | #define PTRACE_SETFPREGS 15 | ||
168 | #define PTRACE_READDATA 16 | ||
169 | #define PTRACE_WRITEDATA 17 | ||
170 | #define PTRACE_READTEXT 18 | ||
171 | #define PTRACE_WRITETEXT 19 | ||
172 | #define PTRACE_GETFPAREGS 20 | ||
173 | #define PTRACE_SETFPAREGS 21 | ||
174 | |||
175 | #endif /* !(_SPARC_PTRACE_H) */ | ||
diff --git a/include/asm-sparc/reg.h b/include/asm-sparc/reg.h deleted file mode 100644 index ea0a7e590bb3..000000000000 --- a/include/asm-sparc/reg.h +++ /dev/null | |||
@@ -1,79 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm-sparc/reg.h | ||
3 | * Layout of the registers as expected by gdb on the Sparc | ||
4 | * we should replace the user.h definitions with those in | ||
5 | * this file, we don't even use the other | ||
6 | * -miguel | ||
7 | * | ||
8 | * The names of the structures, constants and aliases in this file | ||
9 | * have the same names as the sunos ones, some programs rely on these | ||
10 | * names (gdb for example). | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #ifndef __SPARC_REG_H | ||
15 | #define __SPARC_REG_H | ||
16 | |||
17 | struct regs { | ||
18 | int r_psr; | ||
19 | #define r_ps r_psr | ||
20 | int r_pc; | ||
21 | int r_npc; | ||
22 | int r_y; | ||
23 | int r_g1; | ||
24 | int r_g2; | ||
25 | int r_g3; | ||
26 | int r_g4; | ||
27 | int r_g5; | ||
28 | int r_g6; | ||
29 | int r_g7; | ||
30 | int r_o0; | ||
31 | int r_o1; | ||
32 | int r_o2; | ||
33 | int r_o3; | ||
34 | int r_o4; | ||
35 | int r_o5; | ||
36 | int r_o6; | ||
37 | int r_o7; | ||
38 | }; | ||
39 | |||
40 | struct fpq { | ||
41 | unsigned long *addr; | ||
42 | unsigned long instr; | ||
43 | }; | ||
44 | |||
45 | struct fq { | ||
46 | union { | ||
47 | double whole; | ||
48 | struct fpq fpq; | ||
49 | } FQu; | ||
50 | }; | ||
51 | |||
52 | #define FPU_REGS_TYPE unsigned int | ||
53 | #define FPU_FSR_TYPE unsigned | ||
54 | |||
55 | struct fp_status { | ||
56 | union { | ||
57 | FPU_REGS_TYPE Fpu_regs[32]; | ||
58 | double Fpu_dregs[16]; | ||
59 | } fpu_fr; | ||
60 | FPU_FSR_TYPE Fpu_fsr; | ||
61 | unsigned Fpu_flags; | ||
62 | unsigned Fpu_extra; | ||
63 | unsigned Fpu_qcnt; | ||
64 | struct fq Fpu_q[16]; | ||
65 | }; | ||
66 | |||
67 | #define fpu_regs f_fpstatus.fpu_fr.Fpu_regs | ||
68 | #define fpu_dregs f_fpstatus.fpu_fr.Fpu_dregs | ||
69 | #define fpu_fsr f_fpstatus.Fpu_fsr | ||
70 | #define fpu_flags f_fpstatus.Fpu_flags | ||
71 | #define fpu_extra f_fpstatus.Fpu_extra | ||
72 | #define fpu_q f_fpstatus.Fpu_q | ||
73 | #define fpu_qcnt f_fpstatus.Fpu_qcnt | ||
74 | |||
75 | struct fpu { | ||
76 | struct fp_status f_fpstatus; | ||
77 | }; | ||
78 | |||
79 | #endif /* __SPARC_REG_H */ | ||
diff --git a/include/asm-sparc/resource.h b/include/asm-sparc/resource.h deleted file mode 100644 index 985948a41299..000000000000 --- a/include/asm-sparc/resource.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * resource.h: Resource definitions. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_RESOURCE_H | ||
8 | #define _SPARC_RESOURCE_H | ||
9 | |||
10 | /* | ||
11 | * These two resource limit IDs have a Sparc/Linux-specific ordering, | ||
12 | * the rest comes from the generic header: | ||
13 | */ | ||
14 | #define RLIMIT_NOFILE 6 /* max number of open files */ | ||
15 | #define RLIMIT_NPROC 7 /* max number of processes */ | ||
16 | |||
17 | /* | ||
18 | * SuS says limits have to be unsigned. | ||
19 | * We make this unsigned, but keep the | ||
20 | * old value for compatibility: | ||
21 | */ | ||
22 | #define RLIM_INFINITY 0x7fffffff | ||
23 | |||
24 | #include <asm-generic/resource.h> | ||
25 | |||
26 | #endif /* !(_SPARC_RESOURCE_H) */ | ||
diff --git a/include/asm-sparc/ross.h b/include/asm-sparc/ross.h deleted file mode 100644 index ecb6e81786a6..000000000000 --- a/include/asm-sparc/ross.h +++ /dev/null | |||
@@ -1,191 +0,0 @@ | |||
1 | /* | ||
2 | * ross.h: Ross module specific definitions and defines. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_ROSS_H | ||
8 | #define _SPARC_ROSS_H | ||
9 | |||
10 | #include <asm/asi.h> | ||
11 | #include <asm/page.h> | ||
12 | |||
13 | /* Ross made Hypersparcs have a %psr 'impl' field of '0001'. The 'vers' | ||
14 | * field has '1111'. | ||
15 | */ | ||
16 | |||
17 | /* The MMU control register fields on the HyperSparc. | ||
18 | * | ||
19 | * ----------------------------------------------------------------- | ||
20 | * |implvers| RSV |CWR|SE|WBE| MID |BM| C|CS|MR|CM|RSV|CE|RSV|NF|ME| | ||
21 | * ----------------------------------------------------------------- | ||
22 | * 31 24 23-22 21 20 19 18-15 14 13 12 11 10 9 8 7-2 1 0 | ||
23 | * | ||
24 | * Phew, lots of fields there ;-) | ||
25 | * | ||
26 | * CWR: Cache Wrapping Enabled, if one cache wrapping is on. | ||
27 | * SE: Snoop Enable, turns on bus snooping for cache activity if one. | ||
28 | * WBE: Write Buffer Enable, one turns it on. | ||
29 | * MID: The ModuleID of the chip for MBus transactions. | ||
30 | * BM: Boot-Mode. One indicates the MMU is in boot mode. | ||
31 | * C: Indicates whether accesses are cachable while the MMU is | ||
32 | * disabled. | ||
33 | * CS: Cache Size -- 0 = 128k, 1 = 256k | ||
34 | * MR: Memory Reflection, one indicates that the memory bus connected | ||
35 | * to the MBus supports memory reflection. | ||
36 | * CM: Cache Mode -- 0 = write-through, 1 = copy-back | ||
37 | * CE: Cache Enable -- 0 = no caching, 1 = cache is on | ||
38 | * NF: No Fault -- 0 = faults trap the CPU from supervisor mode | ||
39 | * 1 = faults from supervisor mode do not generate traps | ||
40 | * ME: MMU Enable -- 0 = MMU is off, 1 = MMU is on | ||
41 | */ | ||
42 | |||
43 | #define HYPERSPARC_CWENABLE 0x00200000 | ||
44 | #define HYPERSPARC_SBENABLE 0x00100000 | ||
45 | #define HYPERSPARC_WBENABLE 0x00080000 | ||
46 | #define HYPERSPARC_MIDMASK 0x00078000 | ||
47 | #define HYPERSPARC_BMODE 0x00004000 | ||
48 | #define HYPERSPARC_ACENABLE 0x00002000 | ||
49 | #define HYPERSPARC_CSIZE 0x00001000 | ||
50 | #define HYPERSPARC_MRFLCT 0x00000800 | ||
51 | #define HYPERSPARC_CMODE 0x00000400 | ||
52 | #define HYPERSPARC_CENABLE 0x00000100 | ||
53 | #define HYPERSPARC_NFAULT 0x00000002 | ||
54 | #define HYPERSPARC_MENABLE 0x00000001 | ||
55 | |||
56 | |||
57 | /* The ICCR instruction cache register on the HyperSparc. | ||
58 | * | ||
59 | * ----------------------------------------------- | ||
60 | * | | FTD | ICE | | ||
61 | * ----------------------------------------------- | ||
62 | * 31 1 0 | ||
63 | * | ||
64 | * This register is accessed using the V8 'wrasr' and 'rdasr' | ||
65 | * opcodes, since not all assemblers understand them and those | ||
66 | * that do use different semantics I will just hard code the | ||
67 | * instruction with a '.word' statement. | ||
68 | * | ||
69 | * FTD: If set to one flush instructions executed during an | ||
70 | * instruction cache hit occurs, the corresponding line | ||
71 | * for said cache-hit is invalidated. If FTD is zero, | ||
72 | * an unimplemented 'flush' trap will occur when any | ||
73 | * flush is executed by the processor. | ||
74 | * | ||
75 | * ICE: If set to one, the instruction cache is enabled. If | ||
76 | * zero, the cache will not be used for instruction fetches. | ||
77 | * | ||
78 | * All other bits are read as zeros, and writes to them have no | ||
79 | * effect. | ||
80 | * | ||
81 | * Wheee, not many assemblers understand the %iccr register nor | ||
82 | * the generic asr r/w instructions. | ||
83 | * | ||
84 | * 1000 0011 0100 0111 1100 0000 0000 0000 ! rd %iccr, %g1 | ||
85 | * | ||
86 | * 0x 8 3 4 7 c 0 0 0 ! 0x8347c000 | ||
87 | * | ||
88 | * 1011 1111 1000 0000 0110 0000 0000 0000 ! wr %g1, 0x0, %iccr | ||
89 | * | ||
90 | * 0x b f 8 0 6 0 0 0 ! 0xbf806000 | ||
91 | * | ||
92 | */ | ||
93 | |||
94 | #define HYPERSPARC_ICCR_FTD 0x00000002 | ||
95 | #define HYPERSPARC_ICCR_ICE 0x00000001 | ||
96 | |||
97 | #ifndef __ASSEMBLY__ | ||
98 | |||
99 | static inline unsigned int get_ross_icr(void) | ||
100 | { | ||
101 | unsigned int icreg; | ||
102 | |||
103 | __asm__ __volatile__(".word 0x8347c000\n\t" /* rd %iccr, %g1 */ | ||
104 | "mov %%g1, %0\n\t" | ||
105 | : "=r" (icreg) | ||
106 | : /* no inputs */ | ||
107 | : "g1", "memory"); | ||
108 | |||
109 | return icreg; | ||
110 | } | ||
111 | |||
112 | static inline void put_ross_icr(unsigned int icreg) | ||
113 | { | ||
114 | __asm__ __volatile__("or %%g0, %0, %%g1\n\t" | ||
115 | ".word 0xbf806000\n\t" /* wr %g1, 0x0, %iccr */ | ||
116 | "nop\n\t" | ||
117 | "nop\n\t" | ||
118 | "nop\n\t" | ||
119 | : /* no outputs */ | ||
120 | : "r" (icreg) | ||
121 | : "g1", "memory"); | ||
122 | |||
123 | return; | ||
124 | } | ||
125 | |||
126 | /* HyperSparc specific cache flushing. */ | ||
127 | |||
128 | /* This is for the on-chip instruction cache. */ | ||
129 | static inline void hyper_flush_whole_icache(void) | ||
130 | { | ||
131 | __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" | ||
132 | : /* no outputs */ | ||
133 | : "i" (ASI_M_FLUSH_IWHOLE) | ||
134 | : "memory"); | ||
135 | return; | ||
136 | } | ||
137 | |||
138 | extern int vac_cache_size; | ||
139 | extern int vac_line_size; | ||
140 | |||
141 | static inline void hyper_clear_all_tags(void) | ||
142 | { | ||
143 | unsigned long addr; | ||
144 | |||
145 | for(addr = 0; addr < vac_cache_size; addr += vac_line_size) | ||
146 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
147 | : /* no outputs */ | ||
148 | : "r" (addr), "i" (ASI_M_DATAC_TAG) | ||
149 | : "memory"); | ||
150 | } | ||
151 | |||
152 | static inline void hyper_flush_unconditional_combined(void) | ||
153 | { | ||
154 | unsigned long addr; | ||
155 | |||
156 | for (addr = 0; addr < vac_cache_size; addr += vac_line_size) | ||
157 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
158 | : /* no outputs */ | ||
159 | : "r" (addr), "i" (ASI_M_FLUSH_CTX) | ||
160 | : "memory"); | ||
161 | } | ||
162 | |||
163 | static inline void hyper_flush_cache_user(void) | ||
164 | { | ||
165 | unsigned long addr; | ||
166 | |||
167 | for (addr = 0; addr < vac_cache_size; addr += vac_line_size) | ||
168 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
169 | : /* no outputs */ | ||
170 | : "r" (addr), "i" (ASI_M_FLUSH_USER) | ||
171 | : "memory"); | ||
172 | } | ||
173 | |||
174 | static inline void hyper_flush_cache_page(unsigned long page) | ||
175 | { | ||
176 | unsigned long end; | ||
177 | |||
178 | page &= PAGE_MASK; | ||
179 | end = page + PAGE_SIZE; | ||
180 | while (page < end) { | ||
181 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
182 | : /* no outputs */ | ||
183 | : "r" (page), "i" (ASI_M_FLUSH_PAGE) | ||
184 | : "memory"); | ||
185 | page += vac_line_size; | ||
186 | } | ||
187 | } | ||
188 | |||
189 | #endif /* !(__ASSEMBLY__) */ | ||
190 | |||
191 | #endif /* !(_SPARC_ROSS_H) */ | ||
diff --git a/include/asm-sparc/rtc.h b/include/asm-sparc/rtc.h deleted file mode 100644 index f9ecb1fe2ecd..000000000000 --- a/include/asm-sparc/rtc.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * rtc.h: Definitions for access to the Mostek real time clock | ||
3 | * | ||
4 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _RTC_H | ||
8 | #define _RTC_H | ||
9 | |||
10 | #include <linux/ioctl.h> | ||
11 | |||
12 | struct rtc_time | ||
13 | { | ||
14 | int sec; /* Seconds (0-59) */ | ||
15 | int min; /* Minutes (0-59) */ | ||
16 | int hour; /* Hour (0-23) */ | ||
17 | int dow; /* Day of the week (1-7) */ | ||
18 | int dom; /* Day of the month (1-31) */ | ||
19 | int month; /* Month of year (1-12) */ | ||
20 | int year; /* Year (0-99) */ | ||
21 | }; | ||
22 | |||
23 | #define RTCGET _IOR('p', 20, struct rtc_time) | ||
24 | #define RTCSET _IOW('p', 21, struct rtc_time) | ||
25 | |||
26 | #endif | ||
diff --git a/include/asm-sparc/sbi.h b/include/asm-sparc/sbi.h deleted file mode 100644 index 5eb7f1965d33..000000000000 --- a/include/asm-sparc/sbi.h +++ /dev/null | |||
@@ -1,115 +0,0 @@ | |||
1 | /* | ||
2 | * sbi.h: SBI (Sbus Interface on sun4d) definitions | ||
3 | * | ||
4 | * Copyright (C) 1997 Jakub Jelinek <jj@sunsite.mff.cuni.cz> | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_SBI_H | ||
8 | #define _SPARC_SBI_H | ||
9 | |||
10 | #include <asm/obio.h> | ||
11 | |||
12 | /* SBI */ | ||
13 | struct sbi_regs { | ||
14 | /* 0x0000 */ u32 cid; /* Component ID */ | ||
15 | /* 0x0004 */ u32 ctl; /* Control */ | ||
16 | /* 0x0008 */ u32 status; /* Status */ | ||
17 | u32 _unused1; | ||
18 | |||
19 | /* 0x0010 */ u32 cfg0; /* Slot0 config reg */ | ||
20 | /* 0x0014 */ u32 cfg1; /* Slot1 config reg */ | ||
21 | /* 0x0018 */ u32 cfg2; /* Slot2 config reg */ | ||
22 | /* 0x001c */ u32 cfg3; /* Slot3 config reg */ | ||
23 | |||
24 | /* 0x0020 */ u32 stb0; /* Streaming buf control for slot 0 */ | ||
25 | /* 0x0024 */ u32 stb1; /* Streaming buf control for slot 1 */ | ||
26 | /* 0x0028 */ u32 stb2; /* Streaming buf control for slot 2 */ | ||
27 | /* 0x002c */ u32 stb3; /* Streaming buf control for slot 3 */ | ||
28 | |||
29 | /* 0x0030 */ u32 intr_state; /* Interrupt state */ | ||
30 | /* 0x0034 */ u32 intr_tid; /* Interrupt target ID */ | ||
31 | /* 0x0038 */ u32 intr_diag; /* Interrupt diagnostics */ | ||
32 | }; | ||
33 | |||
34 | #define SBI_CID 0x02800000 | ||
35 | #define SBI_CTL 0x02800004 | ||
36 | #define SBI_STATUS 0x02800008 | ||
37 | #define SBI_CFG0 0x02800010 | ||
38 | #define SBI_CFG1 0x02800014 | ||
39 | #define SBI_CFG2 0x02800018 | ||
40 | #define SBI_CFG3 0x0280001c | ||
41 | #define SBI_STB0 0x02800020 | ||
42 | #define SBI_STB1 0x02800024 | ||
43 | #define SBI_STB2 0x02800028 | ||
44 | #define SBI_STB3 0x0280002c | ||
45 | #define SBI_INTR_STATE 0x02800030 | ||
46 | #define SBI_INTR_TID 0x02800034 | ||
47 | #define SBI_INTR_DIAG 0x02800038 | ||
48 | |||
49 | /* Burst bits for 8, 16, 32, 64 are in cfgX registers at bits 2, 3, 4, 5 respectively */ | ||
50 | #define SBI_CFG_BURST_MASK 0x0000001e | ||
51 | |||
52 | /* How to make devid from sbi no */ | ||
53 | #define SBI2DEVID(sbino) ((sbino<<4)|2) | ||
54 | |||
55 | /* intr_state has 4 bits for slots 0 .. 3 and these bits are repeated for each sbus irq level | ||
56 | * | ||
57 | * +-------+-------+-------+-------+-------+-------+-------+-------+ | ||
58 | * SBUS IRQ LEVEL | 7 | 6 | 5 | 4 | 3 | 2 | 1 | | | ||
59 | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ Reser | | ||
60 | * SLOT # |3|2|1|0|3|2|1|0|3|2|1|0|3|2|1|0|3|2|1|0|3|2|1|0|3|2|1|0| ved | | ||
61 | * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-------+ | ||
62 | * Bits 31 27 23 19 15 11 7 3 0 | ||
63 | */ | ||
64 | |||
65 | |||
66 | #ifndef __ASSEMBLY__ | ||
67 | |||
68 | static inline int acquire_sbi(int devid, int mask) | ||
69 | { | ||
70 | __asm__ __volatile__ ("swapa [%2] %3, %0" : | ||
71 | "=r" (mask) : | ||
72 | "0" (mask), | ||
73 | "r" (ECSR_DEV_BASE(devid) | SBI_INTR_STATE), | ||
74 | "i" (ASI_M_CTL)); | ||
75 | return mask; | ||
76 | } | ||
77 | |||
78 | static inline void release_sbi(int devid, int mask) | ||
79 | { | ||
80 | __asm__ __volatile__ ("sta %0, [%1] %2" : : | ||
81 | "r" (mask), | ||
82 | "r" (ECSR_DEV_BASE(devid) | SBI_INTR_STATE), | ||
83 | "i" (ASI_M_CTL)); | ||
84 | } | ||
85 | |||
86 | static inline void set_sbi_tid(int devid, int targetid) | ||
87 | { | ||
88 | __asm__ __volatile__ ("sta %0, [%1] %2" : : | ||
89 | "r" (targetid), | ||
90 | "r" (ECSR_DEV_BASE(devid) | SBI_INTR_TID), | ||
91 | "i" (ASI_M_CTL)); | ||
92 | } | ||
93 | |||
94 | static inline int get_sbi_ctl(int devid, int cfgno) | ||
95 | { | ||
96 | int cfg; | ||
97 | |||
98 | __asm__ __volatile__ ("lda [%1] %2, %0" : | ||
99 | "=r" (cfg) : | ||
100 | "r" ((ECSR_DEV_BASE(devid) | SBI_CFG0) + (cfgno<<2)), | ||
101 | "i" (ASI_M_CTL)); | ||
102 | return cfg; | ||
103 | } | ||
104 | |||
105 | static inline void set_sbi_ctl(int devid, int cfgno, int cfg) | ||
106 | { | ||
107 | __asm__ __volatile__ ("sta %0, [%1] %2" : : | ||
108 | "r" (cfg), | ||
109 | "r" ((ECSR_DEV_BASE(devid) | SBI_CFG0) + (cfgno<<2)), | ||
110 | "i" (ASI_M_CTL)); | ||
111 | } | ||
112 | |||
113 | #endif /* !__ASSEMBLY__ */ | ||
114 | |||
115 | #endif /* !(_SPARC_SBI_H) */ | ||
diff --git a/include/asm-sparc/sbus.h b/include/asm-sparc/sbus.h deleted file mode 100644 index f1d2fe1c9a30..000000000000 --- a/include/asm-sparc/sbus.h +++ /dev/null | |||
@@ -1,153 +0,0 @@ | |||
1 | /* | ||
2 | * sbus.h: Defines for the Sun SBus. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_SBUS_H | ||
8 | #define _SPARC_SBUS_H | ||
9 | |||
10 | #include <linux/dma-mapping.h> | ||
11 | #include <linux/ioport.h> | ||
12 | |||
13 | #include <asm/oplib.h> | ||
14 | #include <asm/prom.h> | ||
15 | #include <asm/of_device.h> | ||
16 | #include <asm/scatterlist.h> | ||
17 | |||
18 | /* We scan which devices are on the SBus using the PROM node device | ||
19 | * tree. SBus devices are described in two different ways. You can | ||
20 | * either get an absolute address at which to access the device, or | ||
21 | * you can get a SBus 'slot' number and an offset within that slot. | ||
22 | */ | ||
23 | |||
24 | /* The base address at which to calculate device OBIO addresses. */ | ||
25 | #define SUN_SBUS_BVADDR 0xf8000000 | ||
26 | #define SBUS_OFF_MASK 0x01ffffff | ||
27 | |||
28 | /* These routines are used to calculate device address from slot | ||
29 | * numbers + offsets, and vice versa. | ||
30 | */ | ||
31 | |||
32 | static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) | ||
33 | { | ||
34 | return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset)); | ||
35 | } | ||
36 | |||
37 | static inline int sbus_dev_slot(unsigned long dev_addr) | ||
38 | { | ||
39 | return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25); | ||
40 | } | ||
41 | |||
42 | struct sbus_bus; | ||
43 | |||
44 | /* Linux SBUS device tables */ | ||
45 | struct sbus_dev { | ||
46 | struct of_device ofdev; | ||
47 | struct sbus_bus *bus; | ||
48 | struct sbus_dev *next; | ||
49 | struct sbus_dev *child; | ||
50 | struct sbus_dev *parent; | ||
51 | int prom_node; | ||
52 | char prom_name[64]; | ||
53 | int slot; | ||
54 | |||
55 | struct resource resource[PROMREG_MAX]; | ||
56 | |||
57 | struct linux_prom_registers reg_addrs[PROMREG_MAX]; | ||
58 | int num_registers; | ||
59 | |||
60 | struct linux_prom_ranges device_ranges[PROMREG_MAX]; | ||
61 | int num_device_ranges; | ||
62 | |||
63 | unsigned int irqs[4]; | ||
64 | int num_irqs; | ||
65 | }; | ||
66 | #define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev) | ||
67 | |||
68 | /* This struct describes the SBus(s) found on this machine. */ | ||
69 | struct sbus_bus { | ||
70 | struct of_device ofdev; | ||
71 | struct sbus_dev *devices; /* Link to devices on this SBus */ | ||
72 | struct sbus_bus *next; /* next SBus, if more than one SBus */ | ||
73 | int prom_node; /* PROM device tree node for this SBus */ | ||
74 | char prom_name[64]; /* Usually "sbus" or "sbi" */ | ||
75 | int clock_freq; | ||
76 | |||
77 | struct linux_prom_ranges sbus_ranges[PROMREG_MAX]; | ||
78 | int num_sbus_ranges; | ||
79 | |||
80 | int devid; | ||
81 | int board; | ||
82 | }; | ||
83 | #define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev) | ||
84 | |||
85 | extern struct sbus_bus *sbus_root; | ||
86 | |||
87 | static inline int | ||
88 | sbus_is_slave(struct sbus_dev *dev) | ||
89 | { | ||
90 | /* XXX Have to write this for sun4c's */ | ||
91 | return 0; | ||
92 | } | ||
93 | |||
94 | /* Device probing routines could find these handy */ | ||
95 | #define for_each_sbus(bus) \ | ||
96 | for((bus) = sbus_root; (bus); (bus)=(bus)->next) | ||
97 | |||
98 | #define for_each_sbusdev(device, bus) \ | ||
99 | for((device) = (bus)->devices; (device); (device)=(device)->next) | ||
100 | |||
101 | #define for_all_sbusdev(device, bus) \ | ||
102 | for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \ | ||
103 | for ((device) = (bus)->devices; (device); (device) = (device)->next) | ||
104 | |||
105 | /* Driver DVMA interfaces. */ | ||
106 | #define sbus_can_dma_64bit(sdev) (0) /* actually, sparc_cpu_model==sun4d */ | ||
107 | #define sbus_can_burst64(sdev) (0) /* actually, sparc_cpu_model==sun4d */ | ||
108 | extern void sbus_set_sbus64(struct sbus_dev *, int); | ||
109 | extern void sbus_fill_device_irq(struct sbus_dev *); | ||
110 | |||
111 | /* These yield IOMMU mappings in consistent mode. */ | ||
112 | extern void *sbus_alloc_consistent(struct sbus_dev *, long, u32 *dma_addrp); | ||
113 | extern void sbus_free_consistent(struct sbus_dev *, long, void *, u32); | ||
114 | void prom_adjust_ranges(struct linux_prom_ranges *, int, | ||
115 | struct linux_prom_ranges *, int); | ||
116 | |||
117 | #define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL | ||
118 | #define SBUS_DMA_TODEVICE DMA_TO_DEVICE | ||
119 | #define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE | ||
120 | #define SBUS_DMA_NONE DMA_NONE | ||
121 | |||
122 | /* All the rest use streaming mode mappings. */ | ||
123 | extern dma_addr_t sbus_map_single(struct sbus_dev *, void *, size_t, int); | ||
124 | extern void sbus_unmap_single(struct sbus_dev *, dma_addr_t, size_t, int); | ||
125 | extern int sbus_map_sg(struct sbus_dev *, struct scatterlist *, int, int); | ||
126 | extern void sbus_unmap_sg(struct sbus_dev *, struct scatterlist *, int, int); | ||
127 | |||
128 | /* Finally, allow explicit synchronization of streamable mappings. */ | ||
129 | extern void sbus_dma_sync_single_for_cpu(struct sbus_dev *, dma_addr_t, size_t, int); | ||
130 | #define sbus_dma_sync_single sbus_dma_sync_single_for_cpu | ||
131 | extern void sbus_dma_sync_single_for_device(struct sbus_dev *, dma_addr_t, size_t, int); | ||
132 | extern void sbus_dma_sync_sg_for_cpu(struct sbus_dev *, struct scatterlist *, int, int); | ||
133 | #define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu | ||
134 | extern void sbus_dma_sync_sg_for_device(struct sbus_dev *, struct scatterlist *, int, int); | ||
135 | |||
136 | /* Eric Brower (ebrower@usa.net) | ||
137 | * Translate SBus interrupt levels to ino values-- | ||
138 | * this is used when converting sbus "interrupts" OBP | ||
139 | * node values to "intr" node values, and is platform | ||
140 | * dependent. If only we could call OBP with | ||
141 | * "sbus-intr>cpu (sbint -- ino)" from kernel... | ||
142 | * See .../drivers/sbus/sbus.c for details. | ||
143 | */ | ||
144 | BTFIXUPDEF_CALL(unsigned int, sbint_to_irq, struct sbus_dev *sdev, unsigned int) | ||
145 | #define sbint_to_irq(sdev, sbint) BTFIXUP_CALL(sbint_to_irq)(sdev, sbint) | ||
146 | |||
147 | extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); | ||
148 | extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); | ||
149 | extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *); | ||
150 | extern int sbus_arch_preinit(void); | ||
151 | extern void sbus_arch_postinit(void); | ||
152 | |||
153 | #endif /* !(_SPARC_SBUS_H) */ | ||
diff --git a/include/asm-sparc/scatterlist.h b/include/asm-sparc/scatterlist.h deleted file mode 100644 index c82609ca1d0f..000000000000 --- a/include/asm-sparc/scatterlist.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | #ifndef _SPARC_SCATTERLIST_H | ||
2 | #define _SPARC_SCATTERLIST_H | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | |||
6 | struct scatterlist { | ||
7 | #ifdef CONFIG_DEBUG_SG | ||
8 | unsigned long sg_magic; | ||
9 | #endif | ||
10 | unsigned long page_link; | ||
11 | unsigned int offset; | ||
12 | |||
13 | unsigned int length; | ||
14 | |||
15 | __u32 dvma_address; /* A place to hang host-specific addresses at. */ | ||
16 | __u32 dvma_length; | ||
17 | }; | ||
18 | |||
19 | #define sg_dma_address(sg) ((sg)->dvma_address) | ||
20 | #define sg_dma_len(sg) ((sg)->dvma_length) | ||
21 | |||
22 | #define ISA_DMA_THRESHOLD (~0UL) | ||
23 | |||
24 | #define ARCH_HAS_SG_CHAIN | ||
25 | |||
26 | #endif /* !(_SPARC_SCATTERLIST_H) */ | ||
diff --git a/include/asm-sparc/sections.h b/include/asm-sparc/sections.h deleted file mode 100644 index 6832841df051..000000000000 --- a/include/asm-sparc/sections.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _SPARC_SECTIONS_H | ||
2 | #define _SPARC_SECTIONS_H | ||
3 | |||
4 | #include <asm-generic/sections.h> | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-sparc/semaphore.h b/include/asm-sparc/semaphore.h deleted file mode 100644 index d9b2034ed1d2..000000000000 --- a/include/asm-sparc/semaphore.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #include <linux/semaphore.h> | ||
diff --git a/include/asm-sparc/sembuf.h b/include/asm-sparc/sembuf.h deleted file mode 100644 index a79c4bb3c08a..000000000000 --- a/include/asm-sparc/sembuf.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | #ifndef _SPARC_SEMBUF_H | ||
2 | #define _SPARC_SEMBUF_H | ||
3 | |||
4 | /* | ||
5 | * The semid64_ds structure for sparc architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct semid64_ds { | ||
15 | struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ | ||
16 | unsigned int __pad1; | ||
17 | __kernel_time_t sem_otime; /* last semop time */ | ||
18 | unsigned int __pad2; | ||
19 | __kernel_time_t sem_ctime; /* last change time */ | ||
20 | unsigned long sem_nsems; /* no. of semaphores in array */ | ||
21 | unsigned long __unused1; | ||
22 | unsigned long __unused2; | ||
23 | }; | ||
24 | |||
25 | #endif /* _SPARC64_SEMBUF_H */ | ||
diff --git a/include/asm-sparc/setup.h b/include/asm-sparc/setup.h deleted file mode 100644 index b3af958a2ad2..000000000000 --- a/include/asm-sparc/setup.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | /* | ||
2 | * Just a place holder. | ||
3 | */ | ||
4 | |||
5 | #ifndef _SPARC_SETUP_H | ||
6 | #define _SPARC_SETUP_H | ||
7 | |||
8 | #define COMMAND_LINE_SIZE 256 | ||
9 | |||
10 | #endif /* _SPARC_SETUP_H */ | ||
diff --git a/include/asm-sparc/sfp-machine.h b/include/asm-sparc/sfp-machine.h deleted file mode 100644 index 266a42b8f99f..000000000000 --- a/include/asm-sparc/sfp-machine.h +++ /dev/null | |||
@@ -1,212 +0,0 @@ | |||
1 | /* Machine-dependent software floating-point definitions. | ||
2 | Sparc userland (_Q_*) version. | ||
3 | Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. | ||
4 | This file is part of the GNU C Library. | ||
5 | Contributed by Richard Henderson (rth@cygnus.com), | ||
6 | Jakub Jelinek (jj@ultra.linux.cz), | ||
7 | David S. Miller (davem@redhat.com) and | ||
8 | Peter Maydell (pmaydell@chiark.greenend.org.uk). | ||
9 | |||
10 | The GNU C Library is free software; you can redistribute it and/or | ||
11 | modify it under the terms of the GNU Library General Public License as | ||
12 | published by the Free Software Foundation; either version 2 of the | ||
13 | License, or (at your option) any later version. | ||
14 | |||
15 | The GNU C Library is distributed in the hope that it will be useful, | ||
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
18 | Library General Public License for more details. | ||
19 | |||
20 | You should have received a copy of the GNU Library General Public | ||
21 | License along with the GNU C Library; see the file COPYING.LIB. If | ||
22 | not, write to the Free Software Foundation, Inc., | ||
23 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | ||
24 | |||
25 | #ifndef _SFP_MACHINE_H | ||
26 | #define _SFP_MACHINE_H | ||
27 | |||
28 | |||
29 | #define _FP_W_TYPE_SIZE 32 | ||
30 | #define _FP_W_TYPE unsigned long | ||
31 | #define _FP_WS_TYPE signed long | ||
32 | #define _FP_I_TYPE long | ||
33 | |||
34 | #define _FP_MUL_MEAT_S(R,X,Y) \ | ||
35 | _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) | ||
36 | #define _FP_MUL_MEAT_D(R,X,Y) \ | ||
37 | _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) | ||
38 | #define _FP_MUL_MEAT_Q(R,X,Y) \ | ||
39 | _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) | ||
40 | |||
41 | #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) | ||
42 | #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) | ||
43 | #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) | ||
44 | |||
45 | #define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) | ||
46 | #define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 | ||
47 | #define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 | ||
48 | #define _FP_NANSIGN_S 0 | ||
49 | #define _FP_NANSIGN_D 0 | ||
50 | #define _FP_NANSIGN_Q 0 | ||
51 | |||
52 | #define _FP_KEEPNANFRACP 1 | ||
53 | |||
54 | /* If one NaN is signaling and the other is not, | ||
55 | * we choose that one, otherwise we choose X. | ||
56 | */ | ||
57 | /* For _Qp_* and _Q_*, this should prefer X, for | ||
58 | * CPU instruction emulation this should prefer Y. | ||
59 | * (see SPAMv9 B.2.2 section). | ||
60 | */ | ||
61 | #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ | ||
62 | do { \ | ||
63 | if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \ | ||
64 | && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \ | ||
65 | { \ | ||
66 | R##_s = X##_s; \ | ||
67 | _FP_FRAC_COPY_##wc(R,X); \ | ||
68 | } \ | ||
69 | else \ | ||
70 | { \ | ||
71 | R##_s = Y##_s; \ | ||
72 | _FP_FRAC_COPY_##wc(R,Y); \ | ||
73 | } \ | ||
74 | R##_c = FP_CLS_NAN; \ | ||
75 | } while (0) | ||
76 | |||
77 | /* Some assembly to speed things up. */ | ||
78 | #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ | ||
79 | __asm__ ("addcc %r7,%8,%2\n\t" \ | ||
80 | "addxcc %r5,%6,%1\n\t" \ | ||
81 | "addx %r3,%4,%0\n" \ | ||
82 | : "=r" ((USItype)(r2)), \ | ||
83 | "=&r" ((USItype)(r1)), \ | ||
84 | "=&r" ((USItype)(r0)) \ | ||
85 | : "%rJ" ((USItype)(x2)), \ | ||
86 | "rI" ((USItype)(y2)), \ | ||
87 | "%rJ" ((USItype)(x1)), \ | ||
88 | "rI" ((USItype)(y1)), \ | ||
89 | "%rJ" ((USItype)(x0)), \ | ||
90 | "rI" ((USItype)(y0)) \ | ||
91 | : "cc") | ||
92 | |||
93 | #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ | ||
94 | __asm__ ("subcc %r7,%8,%2\n\t" \ | ||
95 | "subxcc %r5,%6,%1\n\t" \ | ||
96 | "subx %r3,%4,%0\n" \ | ||
97 | : "=r" ((USItype)(r2)), \ | ||
98 | "=&r" ((USItype)(r1)), \ | ||
99 | "=&r" ((USItype)(r0)) \ | ||
100 | : "%rJ" ((USItype)(x2)), \ | ||
101 | "rI" ((USItype)(y2)), \ | ||
102 | "%rJ" ((USItype)(x1)), \ | ||
103 | "rI" ((USItype)(y1)), \ | ||
104 | "%rJ" ((USItype)(x0)), \ | ||
105 | "rI" ((USItype)(y0)) \ | ||
106 | : "cc") | ||
107 | |||
108 | #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ | ||
109 | do { \ | ||
110 | /* We need to fool gcc, as we need to pass more than 10 \ | ||
111 | input/outputs. */ \ | ||
112 | register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \ | ||
113 | __asm__ __volatile__ ( \ | ||
114 | "addcc %r8,%9,%1\n\t" \ | ||
115 | "addxcc %r6,%7,%0\n\t" \ | ||
116 | "addxcc %r4,%5,%%g2\n\t" \ | ||
117 | "addx %r2,%3,%%g1\n\t" \ | ||
118 | : "=&r" ((USItype)(r1)), \ | ||
119 | "=&r" ((USItype)(r0)) \ | ||
120 | : "%rJ" ((USItype)(x3)), \ | ||
121 | "rI" ((USItype)(y3)), \ | ||
122 | "%rJ" ((USItype)(x2)), \ | ||
123 | "rI" ((USItype)(y2)), \ | ||
124 | "%rJ" ((USItype)(x1)), \ | ||
125 | "rI" ((USItype)(y1)), \ | ||
126 | "%rJ" ((USItype)(x0)), \ | ||
127 | "rI" ((USItype)(y0)) \ | ||
128 | : "cc", "g1", "g2"); \ | ||
129 | __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \ | ||
130 | r3 = _t1; r2 = _t2; \ | ||
131 | } while (0) | ||
132 | |||
133 | #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ | ||
134 | do { \ | ||
135 | /* We need to fool gcc, as we need to pass more than 10 \ | ||
136 | input/outputs. */ \ | ||
137 | register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \ | ||
138 | __asm__ __volatile__ ( \ | ||
139 | "subcc %r8,%9,%1\n\t" \ | ||
140 | "subxcc %r6,%7,%0\n\t" \ | ||
141 | "subxcc %r4,%5,%%g2\n\t" \ | ||
142 | "subx %r2,%3,%%g1\n\t" \ | ||
143 | : "=&r" ((USItype)(r1)), \ | ||
144 | "=&r" ((USItype)(r0)) \ | ||
145 | : "%rJ" ((USItype)(x3)), \ | ||
146 | "rI" ((USItype)(y3)), \ | ||
147 | "%rJ" ((USItype)(x2)), \ | ||
148 | "rI" ((USItype)(y2)), \ | ||
149 | "%rJ" ((USItype)(x1)), \ | ||
150 | "rI" ((USItype)(y1)), \ | ||
151 | "%rJ" ((USItype)(x0)), \ | ||
152 | "rI" ((USItype)(y0)) \ | ||
153 | : "cc", "g1", "g2"); \ | ||
154 | __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \ | ||
155 | r3 = _t1; r2 = _t2; \ | ||
156 | } while (0) | ||
157 | |||
158 | #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) | ||
159 | |||
160 | #define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0) | ||
161 | |||
162 | #define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \ | ||
163 | __asm__ ("addcc %3,%4,%3\n\t" \ | ||
164 | "addxcc %2,%%g0,%2\n\t" \ | ||
165 | "addxcc %1,%%g0,%1\n\t" \ | ||
166 | "addx %0,%%g0,%0\n\t" \ | ||
167 | : "=&r" ((USItype)(x3)), \ | ||
168 | "=&r" ((USItype)(x2)), \ | ||
169 | "=&r" ((USItype)(x1)), \ | ||
170 | "=&r" ((USItype)(x0)) \ | ||
171 | : "rI" ((USItype)(i)), \ | ||
172 | "0" ((USItype)(x3)), \ | ||
173 | "1" ((USItype)(x2)), \ | ||
174 | "2" ((USItype)(x1)), \ | ||
175 | "3" ((USItype)(x0)) \ | ||
176 | : "cc") | ||
177 | |||
178 | #ifndef CONFIG_SMP | ||
179 | extern struct task_struct *last_task_used_math; | ||
180 | #endif | ||
181 | |||
182 | /* Obtain the current rounding mode. */ | ||
183 | #ifndef FP_ROUNDMODE | ||
184 | #ifdef CONFIG_SMP | ||
185 | #define FP_ROUNDMODE ((current->thread.fsr >> 30) & 0x3) | ||
186 | #else | ||
187 | #define FP_ROUNDMODE ((last_task_used_math->thread.fsr >> 30) & 0x3) | ||
188 | #endif | ||
189 | #endif | ||
190 | |||
191 | /* Exception flags. */ | ||
192 | #define FP_EX_INVALID (1 << 4) | ||
193 | #define FP_EX_OVERFLOW (1 << 3) | ||
194 | #define FP_EX_UNDERFLOW (1 << 2) | ||
195 | #define FP_EX_DIVZERO (1 << 1) | ||
196 | #define FP_EX_INEXACT (1 << 0) | ||
197 | |||
198 | #define FP_HANDLE_EXCEPTIONS return _fex | ||
199 | |||
200 | #ifdef CONFIG_SMP | ||
201 | #define FP_INHIBIT_RESULTS ((current->thread.fsr >> 23) & _fex) | ||
202 | #else | ||
203 | #define FP_INHIBIT_RESULTS ((last_task_used_math->thread.fsr >> 23) & _fex) | ||
204 | #endif | ||
205 | |||
206 | #ifdef CONFIG_SMP | ||
207 | #define FP_TRAPPING_EXCEPTIONS ((current->thread.fsr >> 23) & 0x1f) | ||
208 | #else | ||
209 | #define FP_TRAPPING_EXCEPTIONS ((last_task_used_math->thread.fsr >> 23) & 0x1f) | ||
210 | #endif | ||
211 | |||
212 | #endif | ||
diff --git a/include/asm-sparc/shmbuf.h b/include/asm-sparc/shmbuf.h deleted file mode 100644 index 1ff9da8bec73..000000000000 --- a/include/asm-sparc/shmbuf.h +++ /dev/null | |||
@@ -1,42 +0,0 @@ | |||
1 | #ifndef _SPARC_SHMBUF_H | ||
2 | #define _SPARC_SHMBUF_H | ||
3 | |||
4 | /* | ||
5 | * The shmid64_ds structure for sparc architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct shmid64_ds { | ||
15 | struct ipc64_perm shm_perm; /* operation perms */ | ||
16 | unsigned int __pad1; | ||
17 | __kernel_time_t shm_atime; /* last attach time */ | ||
18 | unsigned int __pad2; | ||
19 | __kernel_time_t shm_dtime; /* last detach time */ | ||
20 | unsigned int __pad3; | ||
21 | __kernel_time_t shm_ctime; /* last change time */ | ||
22 | size_t shm_segsz; /* size of segment (bytes) */ | ||
23 | __kernel_pid_t shm_cpid; /* pid of creator */ | ||
24 | __kernel_pid_t shm_lpid; /* pid of last operator */ | ||
25 | unsigned long shm_nattch; /* no. of current attaches */ | ||
26 | unsigned long __unused1; | ||
27 | unsigned long __unused2; | ||
28 | }; | ||
29 | |||
30 | struct shminfo64 { | ||
31 | unsigned long shmmax; | ||
32 | unsigned long shmmin; | ||
33 | unsigned long shmmni; | ||
34 | unsigned long shmseg; | ||
35 | unsigned long shmall; | ||
36 | unsigned long __unused1; | ||
37 | unsigned long __unused2; | ||
38 | unsigned long __unused3; | ||
39 | unsigned long __unused4; | ||
40 | }; | ||
41 | |||
42 | #endif /* _SPARC_SHMBUF_H */ | ||
diff --git a/include/asm-sparc/shmparam.h b/include/asm-sparc/shmparam.h deleted file mode 100644 index 59a1243c12f3..000000000000 --- a/include/asm-sparc/shmparam.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | #ifndef _ASMSPARC_SHMPARAM_H | ||
2 | #define _ASMSPARC_SHMPARAM_H | ||
3 | |||
4 | #define __ARCH_FORCE_SHMLBA 1 | ||
5 | |||
6 | extern int vac_cache_size; | ||
7 | #define SHMLBA (vac_cache_size ? vac_cache_size : \ | ||
8 | (sparc_cpu_model == sun4c ? (64 * 1024) : \ | ||
9 | (sparc_cpu_model == sun4 ? (128 * 1024) : PAGE_SIZE))) | ||
10 | |||
11 | #endif /* _ASMSPARC_SHMPARAM_H */ | ||
diff --git a/include/asm-sparc/sigcontext.h b/include/asm-sparc/sigcontext.h deleted file mode 100644 index c5fb60dcbd75..000000000000 --- a/include/asm-sparc/sigcontext.h +++ /dev/null | |||
@@ -1,62 +0,0 @@ | |||
1 | #ifndef __SPARC_SIGCONTEXT_H | ||
2 | #define __SPARC_SIGCONTEXT_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | #include <asm/ptrace.h> | ||
6 | |||
7 | #ifndef __ASSEMBLY__ | ||
8 | |||
9 | #define __SUNOS_MAXWIN 31 | ||
10 | |||
11 | /* This is what SunOS does, so shall I. */ | ||
12 | struct sigcontext { | ||
13 | int sigc_onstack; /* state to restore */ | ||
14 | int sigc_mask; /* sigmask to restore */ | ||
15 | int sigc_sp; /* stack pointer */ | ||
16 | int sigc_pc; /* program counter */ | ||
17 | int sigc_npc; /* next program counter */ | ||
18 | int sigc_psr; /* for condition codes etc */ | ||
19 | int sigc_g1; /* User uses these two registers */ | ||
20 | int sigc_o0; /* within the trampoline code. */ | ||
21 | |||
22 | /* Now comes information regarding the users window set | ||
23 | * at the time of the signal. | ||
24 | */ | ||
25 | int sigc_oswins; /* outstanding windows */ | ||
26 | |||
27 | /* stack ptrs for each regwin buf */ | ||
28 | char *sigc_spbuf[__SUNOS_MAXWIN]; | ||
29 | |||
30 | /* Windows to restore after signal */ | ||
31 | struct { | ||
32 | unsigned long locals[8]; | ||
33 | unsigned long ins[8]; | ||
34 | } sigc_wbuf[__SUNOS_MAXWIN]; | ||
35 | }; | ||
36 | |||
37 | typedef struct { | ||
38 | struct { | ||
39 | unsigned long psr; | ||
40 | unsigned long pc; | ||
41 | unsigned long npc; | ||
42 | unsigned long y; | ||
43 | unsigned long u_regs[16]; /* globals and ins */ | ||
44 | } si_regs; | ||
45 | int si_mask; | ||
46 | } __siginfo_t; | ||
47 | |||
48 | typedef struct { | ||
49 | unsigned long si_float_regs [32]; | ||
50 | unsigned long si_fsr; | ||
51 | unsigned long si_fpqdepth; | ||
52 | struct { | ||
53 | unsigned long *insn_addr; | ||
54 | unsigned long insn; | ||
55 | } si_fpqueue [16]; | ||
56 | } __siginfo_fpu_t; | ||
57 | |||
58 | #endif /* !(__ASSEMBLY__) */ | ||
59 | |||
60 | #endif /* (__KERNEL__) */ | ||
61 | |||
62 | #endif /* !(__SPARC_SIGCONTEXT_H) */ | ||
diff --git a/include/asm-sparc/siginfo.h b/include/asm-sparc/siginfo.h deleted file mode 100644 index 3c71af135c52..000000000000 --- a/include/asm-sparc/siginfo.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | #ifndef _SPARC_SIGINFO_H | ||
2 | #define _SPARC_SIGINFO_H | ||
3 | |||
4 | #define __ARCH_SI_UID_T unsigned int | ||
5 | #define __ARCH_SI_TRAPNO | ||
6 | |||
7 | #include <asm-generic/siginfo.h> | ||
8 | |||
9 | #define SI_NOINFO 32767 /* no information in siginfo_t */ | ||
10 | |||
11 | /* | ||
12 | * SIGEMT si_codes | ||
13 | */ | ||
14 | #define EMT_TAGOVF (__SI_FAULT|1) /* tag overflow */ | ||
15 | #define NSIGEMT 1 | ||
16 | |||
17 | #endif /* !(_SPARC_SIGINFO_H) */ | ||
diff --git a/include/asm-sparc/signal.h b/include/asm-sparc/signal.h deleted file mode 100644 index 683657d6e685..000000000000 --- a/include/asm-sparc/signal.h +++ /dev/null | |||
@@ -1,207 +0,0 @@ | |||
1 | #ifndef _ASMSPARC_SIGNAL_H | ||
2 | #define _ASMSPARC_SIGNAL_H | ||
3 | |||
4 | #include <asm/sigcontext.h> | ||
5 | #include <linux/compiler.h> | ||
6 | |||
7 | #ifdef __KERNEL__ | ||
8 | #ifndef __ASSEMBLY__ | ||
9 | #include <linux/personality.h> | ||
10 | #include <linux/types.h> | ||
11 | #endif | ||
12 | #endif | ||
13 | |||
14 | /* On the Sparc the signal handlers get passed a 'sub-signal' code | ||
15 | * for certain signal types, which we document here. | ||
16 | */ | ||
17 | #define SIGHUP 1 | ||
18 | #define SIGINT 2 | ||
19 | #define SIGQUIT 3 | ||
20 | #define SIGILL 4 | ||
21 | #define SUBSIG_STACK 0 | ||
22 | #define SUBSIG_ILLINST 2 | ||
23 | #define SUBSIG_PRIVINST 3 | ||
24 | #define SUBSIG_BADTRAP(t) (0x80 + (t)) | ||
25 | |||
26 | #define SIGTRAP 5 | ||
27 | #define SIGABRT 6 | ||
28 | #define SIGIOT 6 | ||
29 | |||
30 | #define SIGEMT 7 | ||
31 | #define SUBSIG_TAG 10 | ||
32 | |||
33 | #define SIGFPE 8 | ||
34 | #define SUBSIG_FPDISABLED 0x400 | ||
35 | #define SUBSIG_FPERROR 0x404 | ||
36 | #define SUBSIG_FPINTOVFL 0x001 | ||
37 | #define SUBSIG_FPSTSIG 0x002 | ||
38 | #define SUBSIG_IDIVZERO 0x014 | ||
39 | #define SUBSIG_FPINEXACT 0x0c4 | ||
40 | #define SUBSIG_FPDIVZERO 0x0c8 | ||
41 | #define SUBSIG_FPUNFLOW 0x0cc | ||
42 | #define SUBSIG_FPOPERROR 0x0d0 | ||
43 | #define SUBSIG_FPOVFLOW 0x0d4 | ||
44 | |||
45 | #define SIGKILL 9 | ||
46 | #define SIGBUS 10 | ||
47 | #define SUBSIG_BUSTIMEOUT 1 | ||
48 | #define SUBSIG_ALIGNMENT 2 | ||
49 | #define SUBSIG_MISCERROR 5 | ||
50 | |||
51 | #define SIGSEGV 11 | ||
52 | #define SUBSIG_NOMAPPING 3 | ||
53 | #define SUBSIG_PROTECTION 4 | ||
54 | #define SUBSIG_SEGERROR 5 | ||
55 | |||
56 | #define SIGSYS 12 | ||
57 | |||
58 | #define SIGPIPE 13 | ||
59 | #define SIGALRM 14 | ||
60 | #define SIGTERM 15 | ||
61 | #define SIGURG 16 | ||
62 | |||
63 | /* SunOS values which deviate from the Linux/i386 ones */ | ||
64 | #define SIGSTOP 17 | ||
65 | #define SIGTSTP 18 | ||
66 | #define SIGCONT 19 | ||
67 | #define SIGCHLD 20 | ||
68 | #define SIGTTIN 21 | ||
69 | #define SIGTTOU 22 | ||
70 | #define SIGIO 23 | ||
71 | #define SIGPOLL SIGIO /* SysV name for SIGIO */ | ||
72 | #define SIGXCPU 24 | ||
73 | #define SIGXFSZ 25 | ||
74 | #define SIGVTALRM 26 | ||
75 | #define SIGPROF 27 | ||
76 | #define SIGWINCH 28 | ||
77 | #define SIGLOST 29 | ||
78 | #define SIGPWR SIGLOST | ||
79 | #define SIGUSR1 30 | ||
80 | #define SIGUSR2 31 | ||
81 | |||
82 | /* Most things should be clean enough to redefine this at will, if care | ||
83 | * is taken to make libc match. | ||
84 | */ | ||
85 | |||
86 | #define __OLD_NSIG 32 | ||
87 | #define __NEW_NSIG 64 | ||
88 | #define _NSIG_BPW 32 | ||
89 | #define _NSIG_WORDS (__NEW_NSIG / _NSIG_BPW) | ||
90 | |||
91 | #define SIGRTMIN 32 | ||
92 | #define SIGRTMAX __NEW_NSIG | ||
93 | |||
94 | #if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__) | ||
95 | #define _NSIG __NEW_NSIG | ||
96 | #define __new_sigset_t sigset_t | ||
97 | #define __new_sigaction sigaction | ||
98 | #define __old_sigset_t old_sigset_t | ||
99 | #define __old_sigaction old_sigaction | ||
100 | #else | ||
101 | #define _NSIG __OLD_NSIG | ||
102 | #define __old_sigset_t sigset_t | ||
103 | #define __old_sigaction sigaction | ||
104 | #endif | ||
105 | |||
106 | #ifndef __ASSEMBLY__ | ||
107 | |||
108 | typedef unsigned long __old_sigset_t; | ||
109 | |||
110 | typedef struct { | ||
111 | unsigned long sig[_NSIG_WORDS]; | ||
112 | } __new_sigset_t; | ||
113 | |||
114 | |||
115 | #ifdef __KERNEL__ | ||
116 | /* A SunOS sigstack */ | ||
117 | struct sigstack { | ||
118 | char *the_stack; | ||
119 | int cur_status; | ||
120 | }; | ||
121 | #endif | ||
122 | |||
123 | /* Sigvec flags */ | ||
124 | #define _SV_SSTACK 1u /* This signal handler should use sig-stack */ | ||
125 | #define _SV_INTR 2u /* Sig return should not restart system call */ | ||
126 | #define _SV_RESET 4u /* Set handler to SIG_DFL upon taken signal */ | ||
127 | #define _SV_IGNCHILD 8u /* Do not send SIGCHLD */ | ||
128 | |||
129 | /* | ||
130 | * sa_flags values: SA_STACK is not currently supported, but will allow the | ||
131 | * usage of signal stacks by using the (now obsolete) sa_restorer field in | ||
132 | * the sigaction structure as a stack pointer. This is now possible due to | ||
133 | * the changes in signal handling. LBT 010493. | ||
134 | * SA_RESTART flag to get restarting signals (which were the default long ago) | ||
135 | */ | ||
136 | #define SA_NOCLDSTOP _SV_IGNCHILD | ||
137 | #define SA_STACK _SV_SSTACK | ||
138 | #define SA_ONSTACK _SV_SSTACK | ||
139 | #define SA_RESTART _SV_INTR | ||
140 | #define SA_ONESHOT _SV_RESET | ||
141 | #define SA_NOMASK 0x20u | ||
142 | #define SA_NOCLDWAIT 0x100u | ||
143 | #define SA_SIGINFO 0x200u | ||
144 | |||
145 | #define SIG_BLOCK 0x01 /* for blocking signals */ | ||
146 | #define SIG_UNBLOCK 0x02 /* for unblocking signals */ | ||
147 | #define SIG_SETMASK 0x04 /* for setting the signal mask */ | ||
148 | |||
149 | /* | ||
150 | * sigaltstack controls | ||
151 | */ | ||
152 | #define SS_ONSTACK 1 | ||
153 | #define SS_DISABLE 2 | ||
154 | |||
155 | #define MINSIGSTKSZ 4096 | ||
156 | #define SIGSTKSZ 16384 | ||
157 | |||
158 | #ifdef __KERNEL__ | ||
159 | /* | ||
160 | * DJHR | ||
161 | * SA_STATIC_ALLOC is used for the SPARC system to indicate that this | ||
162 | * interrupt handler's irq structure should be statically allocated | ||
163 | * by the request_irq routine. | ||
164 | * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge | ||
165 | * of interrupt usage and that sucks. Also without a flag like this | ||
166 | * it may be possible for the free_irq routine to attempt to free | ||
167 | * statically allocated data.. which is NOT GOOD. | ||
168 | * | ||
169 | */ | ||
170 | #define SA_STATIC_ALLOC 0x8000 | ||
171 | #endif | ||
172 | |||
173 | #include <asm-generic/signal.h> | ||
174 | |||
175 | #ifdef __KERNEL__ | ||
176 | struct __new_sigaction { | ||
177 | __sighandler_t sa_handler; | ||
178 | unsigned long sa_flags; | ||
179 | void (*sa_restorer)(void); /* Not used by Linux/SPARC */ | ||
180 | __new_sigset_t sa_mask; | ||
181 | }; | ||
182 | |||
183 | struct k_sigaction { | ||
184 | struct __new_sigaction sa; | ||
185 | void __user *ka_restorer; | ||
186 | }; | ||
187 | |||
188 | struct __old_sigaction { | ||
189 | __sighandler_t sa_handler; | ||
190 | __old_sigset_t sa_mask; | ||
191 | unsigned long sa_flags; | ||
192 | void (*sa_restorer) (void); /* not used by Linux/SPARC */ | ||
193 | }; | ||
194 | |||
195 | typedef struct sigaltstack { | ||
196 | void __user *ss_sp; | ||
197 | int ss_flags; | ||
198 | size_t ss_size; | ||
199 | } stack_t; | ||
200 | |||
201 | #define ptrace_signal_deliver(regs, cookie) do { } while (0) | ||
202 | |||
203 | #endif /* !(__KERNEL__) */ | ||
204 | |||
205 | #endif /* !(__ASSEMBLY__) */ | ||
206 | |||
207 | #endif /* !(_ASMSPARC_SIGNAL_H) */ | ||
diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h deleted file mode 100644 index b61e74bea06a..000000000000 --- a/include/asm-sparc/smp.h +++ /dev/null | |||
@@ -1,173 +0,0 @@ | |||
1 | /* smp.h: Sparc specific SMP stuff. | ||
2 | * | ||
3 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | ||
4 | */ | ||
5 | |||
6 | #ifndef _SPARC_SMP_H | ||
7 | #define _SPARC_SMP_H | ||
8 | |||
9 | #include <linux/threads.h> | ||
10 | #include <asm/head.h> | ||
11 | #include <asm/btfixup.h> | ||
12 | |||
13 | #ifndef __ASSEMBLY__ | ||
14 | |||
15 | #include <linux/cpumask.h> | ||
16 | |||
17 | #endif /* __ASSEMBLY__ */ | ||
18 | |||
19 | #ifdef CONFIG_SMP | ||
20 | |||
21 | #ifndef __ASSEMBLY__ | ||
22 | |||
23 | #include <asm/ptrace.h> | ||
24 | #include <asm/asi.h> | ||
25 | #include <asm/atomic.h> | ||
26 | |||
27 | /* | ||
28 | * Private routines/data | ||
29 | */ | ||
30 | |||
31 | extern unsigned char boot_cpu_id; | ||
32 | extern cpumask_t phys_cpu_present_map; | ||
33 | #define cpu_possible_map phys_cpu_present_map | ||
34 | |||
35 | typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, | ||
36 | unsigned long, unsigned long); | ||
37 | |||
38 | /* | ||
39 | * General functions that each host system must provide. | ||
40 | */ | ||
41 | |||
42 | void sun4m_init_smp(void); | ||
43 | void sun4d_init_smp(void); | ||
44 | |||
45 | void smp_callin(void); | ||
46 | void smp_boot_cpus(void); | ||
47 | void smp_store_cpu_info(int); | ||
48 | |||
49 | struct seq_file; | ||
50 | void smp_bogo(struct seq_file *); | ||
51 | void smp_info(struct seq_file *); | ||
52 | |||
53 | BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long) | ||
54 | BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void) | ||
55 | BTFIXUPDEF_BLACKBOX(hard_smp_processor_id) | ||
56 | BTFIXUPDEF_BLACKBOX(load_current) | ||
57 | |||
58 | #define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5) | ||
59 | |||
60 | static inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); } | ||
61 | static inline void xc1(smpfunc_t func, unsigned long arg1) | ||
62 | { smp_cross_call(func, arg1, 0, 0, 0, 0); } | ||
63 | static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) | ||
64 | { smp_cross_call(func, arg1, arg2, 0, 0, 0); } | ||
65 | static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, | ||
66 | unsigned long arg3) | ||
67 | { smp_cross_call(func, arg1, arg2, arg3, 0, 0); } | ||
68 | static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, | ||
69 | unsigned long arg3, unsigned long arg4) | ||
70 | { smp_cross_call(func, arg1, arg2, arg3, arg4, 0); } | ||
71 | static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2, | ||
72 | unsigned long arg3, unsigned long arg4, unsigned long arg5) | ||
73 | { smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); } | ||
74 | |||
75 | static inline int smp_call_function(void (*func)(void *info), void *info, int wait) | ||
76 | { | ||
77 | xc1((smpfunc_t)func, (unsigned long)info); | ||
78 | return 0; | ||
79 | } | ||
80 | |||
81 | static inline int cpu_logical_map(int cpu) | ||
82 | { | ||
83 | return cpu; | ||
84 | } | ||
85 | |||
86 | static inline int hard_smp4m_processor_id(void) | ||
87 | { | ||
88 | int cpuid; | ||
89 | |||
90 | __asm__ __volatile__("rd %%tbr, %0\n\t" | ||
91 | "srl %0, 12, %0\n\t" | ||
92 | "and %0, 3, %0\n\t" : | ||
93 | "=&r" (cpuid)); | ||
94 | return cpuid; | ||
95 | } | ||
96 | |||
97 | static inline int hard_smp4d_processor_id(void) | ||
98 | { | ||
99 | int cpuid; | ||
100 | |||
101 | __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : | ||
102 | "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1)); | ||
103 | return cpuid; | ||
104 | } | ||
105 | |||
106 | #ifndef MODULE | ||
107 | static inline int hard_smp_processor_id(void) | ||
108 | { | ||
109 | int cpuid; | ||
110 | |||
111 | /* Black box - sun4m | ||
112 | __asm__ __volatile__("rd %%tbr, %0\n\t" | ||
113 | "srl %0, 12, %0\n\t" | ||
114 | "and %0, 3, %0\n\t" : | ||
115 | "=&r" (cpuid)); | ||
116 | - sun4d | ||
117 | __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t" | ||
118 | "nop; nop" : | ||
119 | "=&r" (cpuid)); | ||
120 | See btfixup.h and btfixupprep.c to understand how a blackbox works. | ||
121 | */ | ||
122 | __asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t" | ||
123 | "sethi %%hi(boot_cpu_id), %0\n\t" | ||
124 | "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" : | ||
125 | "=&r" (cpuid)); | ||
126 | return cpuid; | ||
127 | } | ||
128 | #else | ||
129 | static inline int hard_smp_processor_id(void) | ||
130 | { | ||
131 | int cpuid; | ||
132 | |||
133 | __asm__ __volatile__("mov %%o7, %%g1\n\t" | ||
134 | "call ___f___hard_smp_processor_id\n\t" | ||
135 | " nop\n\t" | ||
136 | "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2"); | ||
137 | return cpuid; | ||
138 | } | ||
139 | #endif | ||
140 | |||
141 | #define raw_smp_processor_id() (current_thread_info()->cpu) | ||
142 | |||
143 | #define prof_multiplier(__cpu) cpu_data(__cpu).multiplier | ||
144 | #define prof_counter(__cpu) cpu_data(__cpu).counter | ||
145 | |||
146 | void smp_setup_cpu_possible_map(void); | ||
147 | |||
148 | #endif /* !(__ASSEMBLY__) */ | ||
149 | |||
150 | /* Sparc specific messages. */ | ||
151 | #define MSG_CROSS_CALL 0x0005 /* run func on cpus */ | ||
152 | |||
153 | /* Empirical PROM processor mailbox constants. If the per-cpu mailbox | ||
154 | * contains something other than one of these then the ipi is from | ||
155 | * Linux's active_kernel_processor. This facility exists so that | ||
156 | * the boot monitor can capture all the other cpus when one catches | ||
157 | * a watchdog reset or the user enters the monitor using L1-A keys. | ||
158 | */ | ||
159 | #define MBOX_STOPCPU 0xFB | ||
160 | #define MBOX_IDLECPU 0xFC | ||
161 | #define MBOX_IDLECPU2 0xFD | ||
162 | #define MBOX_STOPCPU2 0xFE | ||
163 | |||
164 | #else /* SMP */ | ||
165 | |||
166 | #define hard_smp_processor_id() 0 | ||
167 | #define smp_setup_cpu_possible_map() do { } while (0) | ||
168 | |||
169 | #endif /* !(SMP) */ | ||
170 | |||
171 | #define NO_PROC_ID 0xFF | ||
172 | |||
173 | #endif /* !(_SPARC_SMP_H) */ | ||
diff --git a/include/asm-sparc/smpprim.h b/include/asm-sparc/smpprim.h deleted file mode 100644 index eb849d862c64..000000000000 --- a/include/asm-sparc/smpprim.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* | ||
2 | * smpprim.h: SMP locking primitives on the Sparc | ||
3 | * | ||
4 | * God knows we won't be actually using this code for some time | ||
5 | * but I thought I'd write it since I knew how. | ||
6 | * | ||
7 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
8 | */ | ||
9 | |||
10 | #ifndef __SPARC_SMPPRIM_H | ||
11 | #define __SPARC_SMPPRIM_H | ||
12 | |||
13 | /* Test and set the unsigned byte at ADDR to 1. Returns the previous | ||
14 | * value. On the Sparc we use the ldstub instruction since it is | ||
15 | * atomic. | ||
16 | */ | ||
17 | |||
18 | static inline __volatile__ char test_and_set(void *addr) | ||
19 | { | ||
20 | char state = 0; | ||
21 | |||
22 | __asm__ __volatile__("ldstub [%0], %1 ! test_and_set\n\t" | ||
23 | "=r" (addr), "=r" (state) : | ||
24 | "0" (addr), "1" (state) : "memory"); | ||
25 | |||
26 | return state; | ||
27 | } | ||
28 | |||
29 | /* Initialize a spin-lock. */ | ||
30 | static inline __volatile__ smp_initlock(void *spinlock) | ||
31 | { | ||
32 | /* Unset the lock. */ | ||
33 | *((unsigned char *) spinlock) = 0; | ||
34 | |||
35 | return; | ||
36 | } | ||
37 | |||
38 | /* This routine spins until it acquires the lock at ADDR. */ | ||
39 | static inline __volatile__ smp_lock(void *addr) | ||
40 | { | ||
41 | while(test_and_set(addr) == 0xff) | ||
42 | ; | ||
43 | |||
44 | /* We now have the lock */ | ||
45 | return; | ||
46 | } | ||
47 | |||
48 | /* This routine releases the lock at ADDR. */ | ||
49 | static inline __volatile__ smp_unlock(void *addr) | ||
50 | { | ||
51 | *((unsigned char *) addr) = 0; | ||
52 | } | ||
53 | |||
54 | #endif /* !(__SPARC_SMPPRIM_H) */ | ||
diff --git a/include/asm-sparc/socket.h b/include/asm-sparc/socket.h deleted file mode 100644 index bf50d0c2d583..000000000000 --- a/include/asm-sparc/socket.h +++ /dev/null | |||
@@ -1,58 +0,0 @@ | |||
1 | #ifndef _ASM_SOCKET_H | ||
2 | #define _ASM_SOCKET_H | ||
3 | |||
4 | #include <asm/sockios.h> | ||
5 | |||
6 | /* For setsockopt(2) */ | ||
7 | #define SOL_SOCKET 0xffff | ||
8 | |||
9 | #define SO_DEBUG 0x0001 | ||
10 | #define SO_PASSCRED 0x0002 | ||
11 | #define SO_REUSEADDR 0x0004 | ||
12 | #define SO_KEEPALIVE 0x0008 | ||
13 | #define SO_DONTROUTE 0x0010 | ||
14 | #define SO_BROADCAST 0x0020 | ||
15 | #define SO_PEERCRED 0x0040 | ||
16 | #define SO_LINGER 0x0080 | ||
17 | #define SO_OOBINLINE 0x0100 | ||
18 | /* To add :#define SO_REUSEPORT 0x0200 */ | ||
19 | #define SO_BSDCOMPAT 0x0400 | ||
20 | #define SO_RCVLOWAT 0x0800 | ||
21 | #define SO_SNDLOWAT 0x1000 | ||
22 | #define SO_RCVTIMEO 0x2000 | ||
23 | #define SO_SNDTIMEO 0x4000 | ||
24 | #define SO_ACCEPTCONN 0x8000 | ||
25 | |||
26 | #define SO_SNDBUF 0x1001 | ||
27 | #define SO_RCVBUF 0x1002 | ||
28 | #define SO_SNDBUFFORCE 0x100a | ||
29 | #define SO_RCVBUFFORCE 0x100b | ||
30 | #define SO_ERROR 0x1007 | ||
31 | #define SO_TYPE 0x1008 | ||
32 | |||
33 | /* Linux specific, keep the same. */ | ||
34 | #define SO_NO_CHECK 0x000b | ||
35 | #define SO_PRIORITY 0x000c | ||
36 | |||
37 | #define SO_BINDTODEVICE 0x000d | ||
38 | |||
39 | #define SO_ATTACH_FILTER 0x001a | ||
40 | #define SO_DETACH_FILTER 0x001b | ||
41 | |||
42 | #define SO_PEERNAME 0x001c | ||
43 | #define SO_TIMESTAMP 0x001d | ||
44 | #define SCM_TIMESTAMP SO_TIMESTAMP | ||
45 | |||
46 | #define SO_PEERSEC 0x001e | ||
47 | #define SO_PASSSEC 0x001f | ||
48 | #define SO_TIMESTAMPNS 0x0021 | ||
49 | #define SCM_TIMESTAMPNS SO_TIMESTAMPNS | ||
50 | |||
51 | #define SO_MARK 0x0022 | ||
52 | |||
53 | /* Security levels - as per NRL IPv6 - don't actually do anything */ | ||
54 | #define SO_SECURITY_AUTHENTICATION 0x5001 | ||
55 | #define SO_SECURITY_ENCRYPTION_TRANSPORT 0x5002 | ||
56 | #define SO_SECURITY_ENCRYPTION_NETWORK 0x5004 | ||
57 | |||
58 | #endif /* _ASM_SOCKET_H */ | ||
diff --git a/include/asm-sparc/sockios.h b/include/asm-sparc/sockios.h deleted file mode 100644 index 990ea746486b..000000000000 --- a/include/asm-sparc/sockios.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | #ifndef _ASM_SPARC_SOCKIOS_H | ||
2 | #define _ASM_SPARC_SOCKIOS_H | ||
3 | |||
4 | /* Socket-level I/O control calls. */ | ||
5 | #define FIOSETOWN 0x8901 | ||
6 | #define SIOCSPGRP 0x8902 | ||
7 | #define FIOGETOWN 0x8903 | ||
8 | #define SIOCGPGRP 0x8904 | ||
9 | #define SIOCATMARK 0x8905 | ||
10 | #define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ | ||
11 | #define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ | ||
12 | |||
13 | #endif /* !(_ASM_SPARC_SOCKIOS_H) */ | ||
14 | |||
diff --git a/include/asm-sparc/spinlock.h b/include/asm-sparc/spinlock.h deleted file mode 100644 index de2249b267c6..000000000000 --- a/include/asm-sparc/spinlock.h +++ /dev/null | |||
@@ -1,192 +0,0 @@ | |||
1 | /* spinlock.h: 32-bit Sparc spinlock support. | ||
2 | * | ||
3 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) | ||
4 | */ | ||
5 | |||
6 | #ifndef __SPARC_SPINLOCK_H | ||
7 | #define __SPARC_SPINLOCK_H | ||
8 | |||
9 | #include <linux/threads.h> /* For NR_CPUS */ | ||
10 | |||
11 | #ifndef __ASSEMBLY__ | ||
12 | |||
13 | #include <asm/psr.h> | ||
14 | |||
15 | #define __raw_spin_is_locked(lock) (*((volatile unsigned char *)(lock)) != 0) | ||
16 | |||
17 | #define __raw_spin_unlock_wait(lock) \ | ||
18 | do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) | ||
19 | |||
20 | static inline void __raw_spin_lock(raw_spinlock_t *lock) | ||
21 | { | ||
22 | __asm__ __volatile__( | ||
23 | "\n1:\n\t" | ||
24 | "ldstub [%0], %%g2\n\t" | ||
25 | "orcc %%g2, 0x0, %%g0\n\t" | ||
26 | "bne,a 2f\n\t" | ||
27 | " ldub [%0], %%g2\n\t" | ||
28 | ".subsection 2\n" | ||
29 | "2:\n\t" | ||
30 | "orcc %%g2, 0x0, %%g0\n\t" | ||
31 | "bne,a 2b\n\t" | ||
32 | " ldub [%0], %%g2\n\t" | ||
33 | "b,a 1b\n\t" | ||
34 | ".previous\n" | ||
35 | : /* no outputs */ | ||
36 | : "r" (lock) | ||
37 | : "g2", "memory", "cc"); | ||
38 | } | ||
39 | |||
40 | static inline int __raw_spin_trylock(raw_spinlock_t *lock) | ||
41 | { | ||
42 | unsigned int result; | ||
43 | __asm__ __volatile__("ldstub [%1], %0" | ||
44 | : "=r" (result) | ||
45 | : "r" (lock) | ||
46 | : "memory"); | ||
47 | return (result == 0); | ||
48 | } | ||
49 | |||
50 | static inline void __raw_spin_unlock(raw_spinlock_t *lock) | ||
51 | { | ||
52 | __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); | ||
53 | } | ||
54 | |||
55 | /* Read-write spinlocks, allowing multiple readers | ||
56 | * but only one writer. | ||
57 | * | ||
58 | * NOTE! it is quite common to have readers in interrupts | ||
59 | * but no interrupt writers. For those circumstances we | ||
60 | * can "mix" irq-safe locks - any writer needs to get a | ||
61 | * irq-safe write-lock, but readers can get non-irqsafe | ||
62 | * read-locks. | ||
63 | * | ||
64 | * XXX This might create some problems with my dual spinlock | ||
65 | * XXX scheme, deadlocks etc. -DaveM | ||
66 | * | ||
67 | * Sort of like atomic_t's on Sparc, but even more clever. | ||
68 | * | ||
69 | * ------------------------------------ | ||
70 | * | 24-bit counter | wlock | raw_rwlock_t | ||
71 | * ------------------------------------ | ||
72 | * 31 8 7 0 | ||
73 | * | ||
74 | * wlock signifies the one writer is in or somebody is updating | ||
75 | * counter. For a writer, if he successfully acquires the wlock, | ||
76 | * but counter is non-zero, he has to release the lock and wait, | ||
77 | * till both counter and wlock are zero. | ||
78 | * | ||
79 | * Unfortunately this scheme limits us to ~16,000,000 cpus. | ||
80 | */ | ||
81 | static inline void __read_lock(raw_rwlock_t *rw) | ||
82 | { | ||
83 | register raw_rwlock_t *lp asm("g1"); | ||
84 | lp = rw; | ||
85 | __asm__ __volatile__( | ||
86 | "mov %%o7, %%g4\n\t" | ||
87 | "call ___rw_read_enter\n\t" | ||
88 | " ldstub [%%g1 + 3], %%g2\n" | ||
89 | : /* no outputs */ | ||
90 | : "r" (lp) | ||
91 | : "g2", "g4", "memory", "cc"); | ||
92 | } | ||
93 | |||
94 | #define __raw_read_lock(lock) \ | ||
95 | do { unsigned long flags; \ | ||
96 | local_irq_save(flags); \ | ||
97 | __read_lock(lock); \ | ||
98 | local_irq_restore(flags); \ | ||
99 | } while(0) | ||
100 | |||
101 | static inline void __read_unlock(raw_rwlock_t *rw) | ||
102 | { | ||
103 | register raw_rwlock_t *lp asm("g1"); | ||
104 | lp = rw; | ||
105 | __asm__ __volatile__( | ||
106 | "mov %%o7, %%g4\n\t" | ||
107 | "call ___rw_read_exit\n\t" | ||
108 | " ldstub [%%g1 + 3], %%g2\n" | ||
109 | : /* no outputs */ | ||
110 | : "r" (lp) | ||
111 | : "g2", "g4", "memory", "cc"); | ||
112 | } | ||
113 | |||
114 | #define __raw_read_unlock(lock) \ | ||
115 | do { unsigned long flags; \ | ||
116 | local_irq_save(flags); \ | ||
117 | __read_unlock(lock); \ | ||
118 | local_irq_restore(flags); \ | ||
119 | } while(0) | ||
120 | |||
121 | static inline void __raw_write_lock(raw_rwlock_t *rw) | ||
122 | { | ||
123 | register raw_rwlock_t *lp asm("g1"); | ||
124 | lp = rw; | ||
125 | __asm__ __volatile__( | ||
126 | "mov %%o7, %%g4\n\t" | ||
127 | "call ___rw_write_enter\n\t" | ||
128 | " ldstub [%%g1 + 3], %%g2\n" | ||
129 | : /* no outputs */ | ||
130 | : "r" (lp) | ||
131 | : "g2", "g4", "memory", "cc"); | ||
132 | *(volatile __u32 *)&lp->lock = ~0U; | ||
133 | } | ||
134 | |||
135 | static inline int __raw_write_trylock(raw_rwlock_t *rw) | ||
136 | { | ||
137 | unsigned int val; | ||
138 | |||
139 | __asm__ __volatile__("ldstub [%1 + 3], %0" | ||
140 | : "=r" (val) | ||
141 | : "r" (&rw->lock) | ||
142 | : "memory"); | ||
143 | |||
144 | if (val == 0) { | ||
145 | val = rw->lock & ~0xff; | ||
146 | if (val) | ||
147 | ((volatile u8*)&rw->lock)[3] = 0; | ||
148 | else | ||
149 | *(volatile u32*)&rw->lock = ~0U; | ||
150 | } | ||
151 | |||
152 | return (val == 0); | ||
153 | } | ||
154 | |||
155 | static inline int __read_trylock(raw_rwlock_t *rw) | ||
156 | { | ||
157 | register raw_rwlock_t *lp asm("g1"); | ||
158 | register int res asm("o0"); | ||
159 | lp = rw; | ||
160 | __asm__ __volatile__( | ||
161 | "mov %%o7, %%g4\n\t" | ||
162 | "call ___rw_read_try\n\t" | ||
163 | " ldstub [%%g1 + 3], %%g2\n" | ||
164 | : "=r" (res) | ||
165 | : "r" (lp) | ||
166 | : "g2", "g4", "memory", "cc"); | ||
167 | return res; | ||
168 | } | ||
169 | |||
170 | #define __raw_read_trylock(lock) \ | ||
171 | ({ unsigned long flags; \ | ||
172 | int res; \ | ||
173 | local_irq_save(flags); \ | ||
174 | res = __read_trylock(lock); \ | ||
175 | local_irq_restore(flags); \ | ||
176 | res; \ | ||
177 | }) | ||
178 | |||
179 | #define __raw_write_unlock(rw) do { (rw)->lock = 0; } while(0) | ||
180 | |||
181 | #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) | ||
182 | |||
183 | #define _raw_spin_relax(lock) cpu_relax() | ||
184 | #define _raw_read_relax(lock) cpu_relax() | ||
185 | #define _raw_write_relax(lock) cpu_relax() | ||
186 | |||
187 | #define __raw_read_can_lock(rw) (!((rw)->lock & 0xff)) | ||
188 | #define __raw_write_can_lock(rw) (!(rw)->lock) | ||
189 | |||
190 | #endif /* !(__ASSEMBLY__) */ | ||
191 | |||
192 | #endif /* __SPARC_SPINLOCK_H */ | ||
diff --git a/include/asm-sparc/spinlock_types.h b/include/asm-sparc/spinlock_types.h deleted file mode 100644 index 0a0fb116c4ec..000000000000 --- a/include/asm-sparc/spinlock_types.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | #ifndef __SPARC_SPINLOCK_TYPES_H | ||
2 | #define __SPARC_SPINLOCK_TYPES_H | ||
3 | |||
4 | #ifndef __LINUX_SPINLOCK_TYPES_H | ||
5 | # error "please don't include this file directly" | ||
6 | #endif | ||
7 | |||
8 | typedef struct { | ||
9 | unsigned char lock; | ||
10 | } raw_spinlock_t; | ||
11 | |||
12 | #define __RAW_SPIN_LOCK_UNLOCKED { 0 } | ||
13 | |||
14 | typedef struct { | ||
15 | volatile unsigned int lock; | ||
16 | } raw_rwlock_t; | ||
17 | |||
18 | #define __RAW_RW_LOCK_UNLOCKED { 0 } | ||
19 | |||
20 | #endif | ||
diff --git a/include/asm-sparc/stat.h b/include/asm-sparc/stat.h deleted file mode 100644 index 2299e1d5d94c..000000000000 --- a/include/asm-sparc/stat.h +++ /dev/null | |||
@@ -1,76 +0,0 @@ | |||
1 | #ifndef _SPARC_STAT_H | ||
2 | #define _SPARC_STAT_H | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | |||
6 | struct __old_kernel_stat { | ||
7 | unsigned short st_dev; | ||
8 | unsigned short st_ino; | ||
9 | unsigned short st_mode; | ||
10 | unsigned short st_nlink; | ||
11 | unsigned short st_uid; | ||
12 | unsigned short st_gid; | ||
13 | unsigned short st_rdev; | ||
14 | unsigned long st_size; | ||
15 | unsigned long st_atime; | ||
16 | unsigned long st_mtime; | ||
17 | unsigned long st_ctime; | ||
18 | }; | ||
19 | |||
20 | struct stat { | ||
21 | unsigned short st_dev; | ||
22 | unsigned long st_ino; | ||
23 | unsigned short st_mode; | ||
24 | short st_nlink; | ||
25 | unsigned short st_uid; | ||
26 | unsigned short st_gid; | ||
27 | unsigned short st_rdev; | ||
28 | long st_size; | ||
29 | long st_atime; | ||
30 | unsigned long st_atime_nsec; | ||
31 | long st_mtime; | ||
32 | unsigned long st_mtime_nsec; | ||
33 | long st_ctime; | ||
34 | unsigned long st_ctime_nsec; | ||
35 | long st_blksize; | ||
36 | long st_blocks; | ||
37 | unsigned long __unused4[2]; | ||
38 | }; | ||
39 | |||
40 | #define STAT_HAVE_NSEC 1 | ||
41 | |||
42 | struct stat64 { | ||
43 | unsigned long long st_dev; | ||
44 | |||
45 | unsigned long long st_ino; | ||
46 | |||
47 | unsigned int st_mode; | ||
48 | unsigned int st_nlink; | ||
49 | |||
50 | unsigned int st_uid; | ||
51 | unsigned int st_gid; | ||
52 | |||
53 | unsigned long long st_rdev; | ||
54 | |||
55 | unsigned char __pad3[8]; | ||
56 | |||
57 | long long st_size; | ||
58 | unsigned int st_blksize; | ||
59 | |||
60 | unsigned char __pad4[8]; | ||
61 | unsigned int st_blocks; | ||
62 | |||
63 | unsigned int st_atime; | ||
64 | unsigned int st_atime_nsec; | ||
65 | |||
66 | unsigned int st_mtime; | ||
67 | unsigned int st_mtime_nsec; | ||
68 | |||
69 | unsigned int st_ctime; | ||
70 | unsigned int st_ctime_nsec; | ||
71 | |||
72 | unsigned int __unused4; | ||
73 | unsigned int __unused5; | ||
74 | }; | ||
75 | |||
76 | #endif | ||
diff --git a/include/asm-sparc/statfs.h b/include/asm-sparc/statfs.h deleted file mode 100644 index 304520fa8863..000000000000 --- a/include/asm-sparc/statfs.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _SPARC_STATFS_H | ||
2 | #define _SPARC_STATFS_H | ||
3 | |||
4 | #include <asm-generic/statfs.h> | ||
5 | |||
6 | #endif | ||
diff --git a/include/asm-sparc/string.h b/include/asm-sparc/string.h deleted file mode 100644 index 8d7c0dd4f299..000000000000 --- a/include/asm-sparc/string.h +++ /dev/null | |||
@@ -1,205 +0,0 @@ | |||
1 | /* | ||
2 | * string.h: External definitions for optimized assembly string | ||
3 | * routines for the Linux Kernel. | ||
4 | * | ||
5 | * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) | ||
6 | * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | ||
7 | */ | ||
8 | |||
9 | #ifndef __SPARC_STRING_H__ | ||
10 | #define __SPARC_STRING_H__ | ||
11 | |||
12 | #include <asm/page.h> | ||
13 | |||
14 | /* Really, userland/ksyms should not see any of this stuff. */ | ||
15 | |||
16 | #ifdef __KERNEL__ | ||
17 | |||
18 | extern void __memmove(void *,const void *,__kernel_size_t); | ||
19 | extern __kernel_size_t __memcpy(void *,const void *,__kernel_size_t); | ||
20 | extern __kernel_size_t __memset(void *,int,__kernel_size_t); | ||
21 | |||
22 | #ifndef EXPORT_SYMTAB_STROPS | ||
23 | |||
24 | /* First the mem*() things. */ | ||
25 | #define __HAVE_ARCH_MEMMOVE | ||
26 | #undef memmove | ||
27 | #define memmove(_to, _from, _n) \ | ||
28 | ({ \ | ||
29 | void *_t = (_to); \ | ||
30 | __memmove(_t, (_from), (_n)); \ | ||
31 | _t; \ | ||
32 | }) | ||
33 | |||
34 | #define __HAVE_ARCH_MEMCPY | ||
35 | |||
36 | static inline void *__constant_memcpy(void *to, const void *from, __kernel_size_t n) | ||
37 | { | ||
38 | extern void __copy_1page(void *, const void *); | ||
39 | |||
40 | if(n <= 32) { | ||
41 | __builtin_memcpy(to, from, n); | ||
42 | } else if (((unsigned int) to & 7) != 0) { | ||
43 | /* Destination is not aligned on the double-word boundary */ | ||
44 | __memcpy(to, from, n); | ||
45 | } else { | ||
46 | switch(n) { | ||
47 | case PAGE_SIZE: | ||
48 | __copy_1page(to, from); | ||
49 | break; | ||
50 | default: | ||
51 | __memcpy(to, from, n); | ||
52 | break; | ||
53 | } | ||
54 | } | ||
55 | return to; | ||
56 | } | ||
57 | |||
58 | static inline void *__nonconstant_memcpy(void *to, const void *from, __kernel_size_t n) | ||
59 | { | ||
60 | __memcpy(to, from, n); | ||
61 | return to; | ||
62 | } | ||
63 | |||
64 | #undef memcpy | ||
65 | #define memcpy(t, f, n) \ | ||
66 | (__builtin_constant_p(n) ? \ | ||
67 | __constant_memcpy((t),(f),(n)) : \ | ||
68 | __nonconstant_memcpy((t),(f),(n))) | ||
69 | |||
70 | #define __HAVE_ARCH_MEMSET | ||
71 | |||
72 | static inline void *__constant_c_and_count_memset(void *s, char c, __kernel_size_t count) | ||
73 | { | ||
74 | extern void bzero_1page(void *); | ||
75 | extern __kernel_size_t __bzero(void *, __kernel_size_t); | ||
76 | |||
77 | if(!c) { | ||
78 | if(count == PAGE_SIZE) | ||
79 | bzero_1page(s); | ||
80 | else | ||
81 | __bzero(s, count); | ||
82 | } else { | ||
83 | __memset(s, c, count); | ||
84 | } | ||
85 | return s; | ||
86 | } | ||
87 | |||
88 | static inline void *__constant_c_memset(void *s, char c, __kernel_size_t count) | ||
89 | { | ||
90 | extern __kernel_size_t __bzero(void *, __kernel_size_t); | ||
91 | |||
92 | if(!c) | ||
93 | __bzero(s, count); | ||
94 | else | ||
95 | __memset(s, c, count); | ||
96 | return s; | ||
97 | } | ||
98 | |||
99 | static inline void *__nonconstant_memset(void *s, char c, __kernel_size_t count) | ||
100 | { | ||
101 | __memset(s, c, count); | ||
102 | return s; | ||
103 | } | ||
104 | |||
105 | #undef memset | ||
106 | #define memset(s, c, count) \ | ||
107 | (__builtin_constant_p(c) ? (__builtin_constant_p(count) ? \ | ||
108 | __constant_c_and_count_memset((s), (c), (count)) : \ | ||
109 | __constant_c_memset((s), (c), (count))) \ | ||
110 | : __nonconstant_memset((s), (c), (count))) | ||
111 | |||
112 | #define __HAVE_ARCH_MEMSCAN | ||
113 | |||
114 | #undef memscan | ||
115 | #define memscan(__arg0, __char, __arg2) \ | ||
116 | ({ \ | ||
117 | extern void *__memscan_zero(void *, size_t); \ | ||
118 | extern void *__memscan_generic(void *, int, size_t); \ | ||
119 | void *__retval, *__addr = (__arg0); \ | ||
120 | size_t __size = (__arg2); \ | ||
121 | \ | ||
122 | if(__builtin_constant_p(__char) && !(__char)) \ | ||
123 | __retval = __memscan_zero(__addr, __size); \ | ||
124 | else \ | ||
125 | __retval = __memscan_generic(__addr, (__char), __size); \ | ||
126 | \ | ||
127 | __retval; \ | ||
128 | }) | ||
129 | |||
130 | #define __HAVE_ARCH_MEMCMP | ||
131 | extern int memcmp(const void *,const void *,__kernel_size_t); | ||
132 | |||
133 | /* Now the str*() stuff... */ | ||
134 | #define __HAVE_ARCH_STRLEN | ||
135 | extern __kernel_size_t strlen(const char *); | ||
136 | |||
137 | #define __HAVE_ARCH_STRNCMP | ||
138 | |||
139 | extern int __strncmp(const char *, const char *, __kernel_size_t); | ||
140 | |||
141 | static inline int __constant_strncmp(const char *src, const char *dest, __kernel_size_t count) | ||
142 | { | ||
143 | register int retval; | ||
144 | switch(count) { | ||
145 | case 0: return 0; | ||
146 | case 1: return (src[0] - dest[0]); | ||
147 | case 2: retval = (src[0] - dest[0]); | ||
148 | if(!retval && src[0]) | ||
149 | retval = (src[1] - dest[1]); | ||
150 | return retval; | ||
151 | case 3: retval = (src[0] - dest[0]); | ||
152 | if(!retval && src[0]) { | ||
153 | retval = (src[1] - dest[1]); | ||
154 | if(!retval && src[1]) | ||
155 | retval = (src[2] - dest[2]); | ||
156 | } | ||
157 | return retval; | ||
158 | case 4: retval = (src[0] - dest[0]); | ||
159 | if(!retval && src[0]) { | ||
160 | retval = (src[1] - dest[1]); | ||
161 | if(!retval && src[1]) { | ||
162 | retval = (src[2] - dest[2]); | ||
163 | if (!retval && src[2]) | ||
164 | retval = (src[3] - dest[3]); | ||
165 | } | ||
166 | } | ||
167 | return retval; | ||
168 | case 5: retval = (src[0] - dest[0]); | ||
169 | if(!retval && src[0]) { | ||
170 | retval = (src[1] - dest[1]); | ||
171 | if(!retval && src[1]) { | ||
172 | retval = (src[2] - dest[2]); | ||
173 | if (!retval && src[2]) { | ||
174 | retval = (src[3] - dest[3]); | ||
175 | if (!retval && src[3]) | ||
176 | retval = (src[4] - dest[4]); | ||
177 | } | ||
178 | } | ||
179 | } | ||
180 | return retval; | ||
181 | default: | ||
182 | retval = (src[0] - dest[0]); | ||
183 | if(!retval && src[0]) { | ||
184 | retval = (src[1] - dest[1]); | ||
185 | if(!retval && src[1]) { | ||
186 | retval = (src[2] - dest[2]); | ||
187 | if(!retval && src[2]) | ||
188 | retval = __strncmp(src+3,dest+3,count-3); | ||
189 | } | ||
190 | } | ||
191 | return retval; | ||
192 | } | ||
193 | } | ||
194 | |||
195 | #undef strncmp | ||
196 | #define strncmp(__arg0, __arg1, __arg2) \ | ||
197 | (__builtin_constant_p(__arg2) ? \ | ||
198 | __constant_strncmp(__arg0, __arg1, __arg2) : \ | ||
199 | __strncmp(__arg0, __arg1, __arg2)) | ||
200 | |||
201 | #endif /* !EXPORT_SYMTAB_STROPS */ | ||
202 | |||
203 | #endif /* __KERNEL__ */ | ||
204 | |||
205 | #endif /* !(__SPARC_STRING_H__) */ | ||
diff --git a/include/asm-sparc/sun4paddr.h b/include/asm-sparc/sun4paddr.h deleted file mode 100644 index d52985f19f42..000000000000 --- a/include/asm-sparc/sun4paddr.h +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /* | ||
2 | * sun4paddr.h: Various physical addresses on sun4 machines | ||
3 | * | ||
4 | * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au) | ||
5 | * Copyright (C) 1998 Chris Davis (cdavis@cois.on.ca) | ||
6 | * | ||
7 | * Now supports more sun4's | ||
8 | */ | ||
9 | |||
10 | #ifndef _SPARC_SUN4PADDR_H | ||
11 | #define _SPARC_SUN4PADDR_H | ||
12 | |||
13 | #define SUN4_IE_PHYSADDR 0xf5000000 | ||
14 | #define SUN4_UNUSED_PHYSADDR 0 | ||
15 | |||
16 | /* these work for me */ | ||
17 | #define SUN4_200_MEMREG_PHYSADDR 0xf4000000 | ||
18 | #define SUN4_200_CLOCK_PHYSADDR 0xf3000000 | ||
19 | #define SUN4_200_BWTWO_PHYSADDR 0xfd000000 | ||
20 | #define SUN4_200_ETH_PHYSADDR 0xf6000000 | ||
21 | #define SUN4_200_SI_PHYSADDR 0xff200000 | ||
22 | |||
23 | /* these were here before */ | ||
24 | #define SUN4_300_MEMREG_PHYSADDR 0xf4000000 | ||
25 | #define SUN4_300_CLOCK_PHYSADDR 0xf2000000 | ||
26 | #define SUN4_300_TIMER_PHYSADDR 0xef000000 | ||
27 | #define SUN4_300_ETH_PHYSADDR 0xf9000000 | ||
28 | #define SUN4_300_BWTWO_PHYSADDR 0xfb400000 | ||
29 | #define SUN4_300_DMA_PHYSADDR 0xfa001000 | ||
30 | #define SUN4_300_ESP_PHYSADDR 0xfa000000 | ||
31 | |||
32 | /* Are these right? */ | ||
33 | #define SUN4_400_MEMREG_PHYSADDR 0xf4000000 | ||
34 | #define SUN4_400_CLOCK_PHYSADDR 0xf2000000 | ||
35 | #define SUN4_400_TIMER_PHYSADDR 0xef000000 | ||
36 | #define SUN4_400_ETH_PHYSADDR 0xf9000000 | ||
37 | #define SUN4_400_BWTWO_PHYSADDR 0xfb400000 | ||
38 | #define SUN4_400_DMA_PHYSADDR 0xfa001000 | ||
39 | #define SUN4_400_ESP_PHYSADDR 0xfa000000 | ||
40 | |||
41 | /* | ||
42 | these are the actual values set and used in the code. Unused items set | ||
43 | to SUN_UNUSED_PHYSADDR | ||
44 | */ | ||
45 | |||
46 | extern int sun4_memreg_physaddr; /* memory register (ecc?) */ | ||
47 | extern int sun4_clock_physaddr; /* system clock */ | ||
48 | extern int sun4_timer_physaddr; /* timer, where applicable */ | ||
49 | extern int sun4_eth_physaddr; /* onboard ethernet (ie/le) */ | ||
50 | extern int sun4_si_physaddr; /* sun3 scsi adapter */ | ||
51 | extern int sun4_bwtwo_physaddr; /* onboard bw2 */ | ||
52 | extern int sun4_dma_physaddr; /* scsi dma */ | ||
53 | extern int sun4_esp_physaddr; /* esp scsi */ | ||
54 | extern int sun4_ie_physaddr; /* interrupt enable */ | ||
55 | |||
56 | #endif /* !(_SPARC_SUN4PADDR_H) */ | ||
diff --git a/include/asm-sparc/sun4prom.h b/include/asm-sparc/sun4prom.h deleted file mode 100644 index 9c8b4cbf629a..000000000000 --- a/include/asm-sparc/sun4prom.h +++ /dev/null | |||
@@ -1,83 +0,0 @@ | |||
1 | /* | ||
2 | * sun4prom.h -- interface to sun4 PROM monitor. We don't use most of this, | ||
3 | * so most of these are just placeholders. | ||
4 | */ | ||
5 | |||
6 | #ifndef _SUN4PROM_H_ | ||
7 | #define _SUN4PROM_H_ | ||
8 | |||
9 | /* | ||
10 | * Although this looks similar to an romvec for a OpenProm machine, it is | ||
11 | * actually closer to what was used in the Sun2 and Sun3. | ||
12 | * | ||
13 | * V2 entries exist only in version 2 PROMs and later, V3 in version 3 and later. | ||
14 | * | ||
15 | * Many of the function prototypes are guesses. Some are certainly wrong. | ||
16 | * Use with care. | ||
17 | */ | ||
18 | |||
19 | typedef struct { | ||
20 | char *initSP; /* Initial system stack ptr */ | ||
21 | void (*startmon)(void); /* Initial PC for hardware */ | ||
22 | int *diagberr; /* Bus err handler for diags */ | ||
23 | struct linux_arguments_v0 **bootParam; /* Info for bootstrapped pgm */ | ||
24 | unsigned int *memorysize; /* Usable memory in bytes */ | ||
25 | unsigned char (*getchar)(void); /* Get char from input device */ | ||
26 | void (*putchar)(char); /* Put char to output device */ | ||
27 | int (*mayget)(void); /* Maybe get char, or -1 */ | ||
28 | int (*mayput)(int); /* Maybe put char, or -1 */ | ||
29 | unsigned char *echo; /* Should getchar echo? */ | ||
30 | unsigned char *insource; /* Input source selector */ | ||
31 | unsigned char *outsink; /* Output sink selector */ | ||
32 | int (*getkey)(void); /* Get next key if one exists */ | ||
33 | void (*initgetkey)(void); /* Initialize get key */ | ||
34 | unsigned int *translation; /* Kbd translation selector */ | ||
35 | unsigned char *keybid; /* Keyboard ID byte */ | ||
36 | int *screen_x; /* V2: Screen x pos (r/o) */ | ||
37 | int *screen_y; /* V2: Screen y pos (r/o) */ | ||
38 | struct keybuf *keybuf; /* Up/down keycode buffer */ | ||
39 | char *monid; /* Monitor version ID */ | ||
40 | void (*fbwritechar)(char); /* Write a character to FB */ | ||
41 | int *fbAddr; /* Address of frame buffer */ | ||
42 | char **font; /* Font table for FB */ | ||
43 | void (*fbwritestr)(char *); /* Write string to FB */ | ||
44 | void (*reboot)(char *); /* e.g. reboot("sd()vmlinux") */ | ||
45 | unsigned char *linebuf; /* The line input buffer */ | ||
46 | unsigned char **lineptr; /* Cur pointer into linebuf */ | ||
47 | int *linesize; /* length of line in linebuf */ | ||
48 | void (*getline)(char *); /* Get line from user */ | ||
49 | unsigned char (*getnextchar)(void); /* Get next char from linebuf */ | ||
50 | unsigned char (*peeknextchar)(void); /* Peek at next char */ | ||
51 | int *fbthere; /* =1 if frame buffer there */ | ||
52 | int (*getnum)(void); /* Grab hex num from line */ | ||
53 | int (*printf)(char *, ...); /* See prom_printf() instead */ | ||
54 | void (*printhex)(int); /* Format N digits in hex */ | ||
55 | unsigned char *leds; /* RAM copy of LED register */ | ||
56 | void (*setLEDs)(unsigned char *); /* Sets LED's and RAM copy */ | ||
57 | void (*NMIaddr)(void *); /* Addr for level 7 vector */ | ||
58 | void (*abortentry)(void); /* Entry for keyboard abort */ | ||
59 | int *nmiclock; /* Counts up in msec */ | ||
60 | int *FBtype; /* Frame buffer type */ | ||
61 | unsigned int romvecversion; /* Version number for this romvec */ | ||
62 | struct globram *globram; /* monitor global variables ??? */ | ||
63 | void * kbdaddr; /* Addr of keyboard in use */ | ||
64 | int *keyrinit; /* ms before kbd repeat */ | ||
65 | unsigned char *keyrtick; /* ms between repetitions */ | ||
66 | unsigned int *memoryavail; /* V1: Main mem usable size */ | ||
67 | long *resetaddr; /* where to jump on a reset */ | ||
68 | long *resetmap; /* pgmap entry for resetaddr */ | ||
69 | void (*exittomon)(void); /* Exit from user program */ | ||
70 | unsigned char **memorybitmap; /* V1: &{0 or &bits} */ | ||
71 | void (*setcxsegmap)(int ctxt, char *va, int pmeg); /* Set seg in any context */ | ||
72 | void (**vector_cmd)(void *); /* V2: Handler for 'v' cmd */ | ||
73 | unsigned long *expectedtrapsig; /* V3: Location of the expected trap signal */ | ||
74 | unsigned long *trapvectorbasetable; /* V3: Address of the trap vector table */ | ||
75 | int unused1; | ||
76 | int unused2; | ||
77 | int unused3; | ||
78 | int unused4; | ||
79 | } linux_sun4_romvec; | ||
80 | |||
81 | extern linux_sun4_romvec *sun4_romvec; | ||
82 | |||
83 | #endif /* _SUN4PROM_H_ */ | ||
diff --git a/include/asm-sparc/sunbpp.h b/include/asm-sparc/sunbpp.h deleted file mode 100644 index 92ee1a8ff3a2..000000000000 --- a/include/asm-sparc/sunbpp.h +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sparc/sunbpp.h | ||
3 | */ | ||
4 | |||
5 | #ifndef _ASM_SPARC_SUNBPP_H | ||
6 | #define _ASM_SPARC_SUNBPP_H | ||
7 | |||
8 | struct bpp_regs { | ||
9 | /* DMA registers */ | ||
10 | __volatile__ __u32 p_csr; /* DMA Control/Status Register */ | ||
11 | __volatile__ __u32 p_addr; /* Address Register */ | ||
12 | __volatile__ __u32 p_bcnt; /* Byte Count Register */ | ||
13 | __volatile__ __u32 p_tst_csr; /* Test Control/Status (DMA2 only) */ | ||
14 | /* Parallel Port registers */ | ||
15 | __volatile__ __u16 p_hcr; /* Hardware Configuration Register */ | ||
16 | __volatile__ __u16 p_ocr; /* Operation Configuration Register */ | ||
17 | __volatile__ __u8 p_dr; /* Parallel Data Register */ | ||
18 | __volatile__ __u8 p_tcr; /* Transfer Control Register */ | ||
19 | __volatile__ __u8 p_or; /* Output Register */ | ||
20 | __volatile__ __u8 p_ir; /* Input Register */ | ||
21 | __volatile__ __u16 p_icr; /* Interrupt Control Register */ | ||
22 | }; | ||
23 | |||
24 | /* P_HCR. Time is in increments of SBus clock. */ | ||
25 | #define P_HCR_TEST 0x8000 /* Allows buried counters to be read */ | ||
26 | #define P_HCR_DSW 0x7f00 /* Data strobe width (in ticks) */ | ||
27 | #define P_HCR_DDS 0x007f /* Data setup before strobe (in ticks) */ | ||
28 | |||
29 | /* P_OCR. */ | ||
30 | #define P_OCR_MEM_CLR 0x8000 | ||
31 | #define P_OCR_DATA_SRC 0x4000 /* ) */ | ||
32 | #define P_OCR_DS_DSEL 0x2000 /* ) Bidirectional */ | ||
33 | #define P_OCR_BUSY_DSEL 0x1000 /* ) selects */ | ||
34 | #define P_OCR_ACK_DSEL 0x0800 /* ) */ | ||
35 | #define P_OCR_EN_DIAG 0x0400 | ||
36 | #define P_OCR_BUSY_OP 0x0200 /* Busy operation */ | ||
37 | #define P_OCR_ACK_OP 0x0100 /* Ack operation */ | ||
38 | #define P_OCR_SRST 0x0080 /* Reset state machines. Not selfcleaning. */ | ||
39 | #define P_OCR_IDLE 0x0008 /* PP data transfer state machine is idle */ | ||
40 | #define P_OCR_V_ILCK 0x0002 /* Versatec faded. Zebra only. */ | ||
41 | #define P_OCR_EN_VER 0x0001 /* Enable Versatec (0 - enable). Zebra only. */ | ||
42 | |||
43 | /* P_TCR */ | ||
44 | #define P_TCR_DIR 0x08 | ||
45 | #define P_TCR_BUSY 0x04 | ||
46 | #define P_TCR_ACK 0x02 | ||
47 | #define P_TCR_DS 0x01 /* Strobe */ | ||
48 | |||
49 | /* P_OR */ | ||
50 | #define P_OR_V3 0x20 /* ) */ | ||
51 | #define P_OR_V2 0x10 /* ) on Zebra only */ | ||
52 | #define P_OR_V1 0x08 /* ) */ | ||
53 | #define P_OR_INIT 0x04 | ||
54 | #define P_OR_AFXN 0x02 /* Auto Feed */ | ||
55 | #define P_OR_SLCT_IN 0x01 | ||
56 | |||
57 | /* P_IR */ | ||
58 | #define P_IR_PE 0x04 | ||
59 | #define P_IR_SLCT 0x02 | ||
60 | #define P_IR_ERR 0x01 | ||
61 | |||
62 | /* P_ICR */ | ||
63 | #define P_DS_IRQ 0x8000 /* RW1 */ | ||
64 | #define P_ACK_IRQ 0x4000 /* RW1 */ | ||
65 | #define P_BUSY_IRQ 0x2000 /* RW1 */ | ||
66 | #define P_PE_IRQ 0x1000 /* RW1 */ | ||
67 | #define P_SLCT_IRQ 0x0800 /* RW1 */ | ||
68 | #define P_ERR_IRQ 0x0400 /* RW1 */ | ||
69 | #define P_DS_IRQ_EN 0x0200 /* RW Always on rising edge */ | ||
70 | #define P_ACK_IRQ_EN 0x0100 /* RW Always on rising edge */ | ||
71 | #define P_BUSY_IRP 0x0080 /* RW 1= rising edge */ | ||
72 | #define P_BUSY_IRQ_EN 0x0040 /* RW */ | ||
73 | #define P_PE_IRP 0x0020 /* RW 1= rising edge */ | ||
74 | #define P_PE_IRQ_EN 0x0010 /* RW */ | ||
75 | #define P_SLCT_IRP 0x0008 /* RW 1= rising edge */ | ||
76 | #define P_SLCT_IRQ_EN 0x0004 /* RW */ | ||
77 | #define P_ERR_IRP 0x0002 /* RW1 1= rising edge */ | ||
78 | #define P_ERR_IRQ_EN 0x0001 /* RW */ | ||
79 | |||
80 | #endif /* !(_ASM_SPARC_SUNBPP_H) */ | ||
diff --git a/include/asm-sparc/swift.h b/include/asm-sparc/swift.h deleted file mode 100644 index e535061bf755..000000000000 --- a/include/asm-sparc/swift.h +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | /* swift.h: Specific definitions for the _broken_ Swift SRMMU | ||
2 | * MMU module. | ||
3 | * | ||
4 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_SWIFT_H | ||
8 | #define _SPARC_SWIFT_H | ||
9 | |||
10 | /* Swift is so brain damaged, here is the mmu control register. */ | ||
11 | #define SWIFT_ST 0x00800000 /* SW tablewalk enable */ | ||
12 | #define SWIFT_WP 0x00400000 /* Watchpoint enable */ | ||
13 | |||
14 | /* Branch folding (buggy, disable on production systems!) */ | ||
15 | #define SWIFT_BF 0x00200000 | ||
16 | #define SWIFT_PMC 0x00180000 /* Page mode control */ | ||
17 | #define SWIFT_PE 0x00040000 /* Parity enable */ | ||
18 | #define SWIFT_PC 0x00020000 /* Parity control */ | ||
19 | #define SWIFT_AP 0x00010000 /* Graphics page mode control (TCX/SX) */ | ||
20 | #define SWIFT_AC 0x00008000 /* Alternate Cacheability (see viking.h) */ | ||
21 | #define SWIFT_BM 0x00004000 /* Boot mode */ | ||
22 | #define SWIFT_RC 0x00003c00 /* DRAM refresh control */ | ||
23 | #define SWIFT_IE 0x00000200 /* Instruction cache enable */ | ||
24 | #define SWIFT_DE 0x00000100 /* Data cache enable */ | ||
25 | #define SWIFT_SA 0x00000080 /* Store Allocate */ | ||
26 | #define SWIFT_NF 0x00000002 /* No fault mode */ | ||
27 | #define SWIFT_EN 0x00000001 /* MMU enable */ | ||
28 | |||
29 | /* Bits [13:5] select one of 512 instruction cache tags */ | ||
30 | static inline void swift_inv_insn_tag(unsigned long addr) | ||
31 | { | ||
32 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
33 | : /* no outputs */ | ||
34 | : "r" (addr), "i" (ASI_M_TXTC_TAG) | ||
35 | : "memory"); | ||
36 | } | ||
37 | |||
38 | /* Bits [12:4] select one of 512 data cache tags */ | ||
39 | static inline void swift_inv_data_tag(unsigned long addr) | ||
40 | { | ||
41 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
42 | : /* no outputs */ | ||
43 | : "r" (addr), "i" (ASI_M_DATAC_TAG) | ||
44 | : "memory"); | ||
45 | } | ||
46 | |||
47 | static inline void swift_flush_dcache(void) | ||
48 | { | ||
49 | unsigned long addr; | ||
50 | |||
51 | for (addr = 0; addr < 0x2000; addr += 0x10) | ||
52 | swift_inv_data_tag(addr); | ||
53 | } | ||
54 | |||
55 | static inline void swift_flush_icache(void) | ||
56 | { | ||
57 | unsigned long addr; | ||
58 | |||
59 | for (addr = 0; addr < 0x4000; addr += 0x20) | ||
60 | swift_inv_insn_tag(addr); | ||
61 | } | ||
62 | |||
63 | static inline void swift_idflash_clear(void) | ||
64 | { | ||
65 | unsigned long addr; | ||
66 | |||
67 | for (addr = 0; addr < 0x2000; addr += 0x10) { | ||
68 | swift_inv_insn_tag(addr<<1); | ||
69 | swift_inv_data_tag(addr); | ||
70 | } | ||
71 | } | ||
72 | |||
73 | /* Swift is so broken, it isn't even safe to use the following. */ | ||
74 | static inline void swift_flush_page(unsigned long page) | ||
75 | { | ||
76 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
77 | : /* no outputs */ | ||
78 | : "r" (page), "i" (ASI_M_FLUSH_PAGE) | ||
79 | : "memory"); | ||
80 | } | ||
81 | |||
82 | static inline void swift_flush_segment(unsigned long addr) | ||
83 | { | ||
84 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
85 | : /* no outputs */ | ||
86 | : "r" (addr), "i" (ASI_M_FLUSH_SEG) | ||
87 | : "memory"); | ||
88 | } | ||
89 | |||
90 | static inline void swift_flush_region(unsigned long addr) | ||
91 | { | ||
92 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
93 | : /* no outputs */ | ||
94 | : "r" (addr), "i" (ASI_M_FLUSH_REGION) | ||
95 | : "memory"); | ||
96 | } | ||
97 | |||
98 | static inline void swift_flush_context(void) | ||
99 | { | ||
100 | __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" | ||
101 | : /* no outputs */ | ||
102 | : "i" (ASI_M_FLUSH_CTX) | ||
103 | : "memory"); | ||
104 | } | ||
105 | |||
106 | #endif /* !(_SPARC_SWIFT_H) */ | ||
diff --git a/include/asm-sparc/sysen.h b/include/asm-sparc/sysen.h deleted file mode 100644 index 6af34abde6e7..000000000000 --- a/include/asm-sparc/sysen.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * sysen.h: Bit fields within the "System Enable" register accessed via | ||
3 | * the ASI_CONTROL address space at address AC_SYSENABLE. | ||
4 | * | ||
5 | * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) | ||
6 | */ | ||
7 | |||
8 | #ifndef _SPARC_SYSEN_H | ||
9 | #define _SPARC_SYSEN_H | ||
10 | |||
11 | #define SENABLE_DVMA 0x20 /* enable dvma transfers */ | ||
12 | #define SENABLE_CACHE 0x10 /* enable VAC cache */ | ||
13 | #define SENABLE_RESET 0x04 /* reset whole machine, danger Will Robinson */ | ||
14 | |||
15 | #endif /* _SPARC_SYSEN_H */ | ||
diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h deleted file mode 100644 index b4b024445fc9..000000000000 --- a/include/asm-sparc/system.h +++ /dev/null | |||
@@ -1,288 +0,0 @@ | |||
1 | #ifndef __SPARC_SYSTEM_H | ||
2 | #define __SPARC_SYSTEM_H | ||
3 | |||
4 | #include <linux/kernel.h> | ||
5 | #include <linux/threads.h> /* NR_CPUS */ | ||
6 | #include <linux/thread_info.h> | ||
7 | |||
8 | #include <asm/page.h> | ||
9 | #include <asm/psr.h> | ||
10 | #include <asm/ptrace.h> | ||
11 | #include <asm/btfixup.h> | ||
12 | #include <asm/smp.h> | ||
13 | |||
14 | #ifndef __ASSEMBLY__ | ||
15 | |||
16 | #include <linux/irqflags.h> | ||
17 | |||
18 | /* | ||
19 | * Sparc (general) CPU types | ||
20 | */ | ||
21 | enum sparc_cpu { | ||
22 | sun4 = 0x00, | ||
23 | sun4c = 0x01, | ||
24 | sun4m = 0x02, | ||
25 | sun4d = 0x03, | ||
26 | sun4e = 0x04, | ||
27 | sun4u = 0x05, /* V8 ploos ploos */ | ||
28 | sun_unknown = 0x06, | ||
29 | ap1000 = 0x07, /* almost a sun4m */ | ||
30 | }; | ||
31 | |||
32 | /* Really, userland should not be looking at any of this... */ | ||
33 | #ifdef __KERNEL__ | ||
34 | |||
35 | extern enum sparc_cpu sparc_cpu_model; | ||
36 | |||
37 | #ifndef CONFIG_SUN4 | ||
38 | #define ARCH_SUN4C_SUN4 (sparc_cpu_model==sun4c) | ||
39 | #define ARCH_SUN4 0 | ||
40 | #else | ||
41 | #define ARCH_SUN4C_SUN4 1 | ||
42 | #define ARCH_SUN4 1 | ||
43 | #endif | ||
44 | |||
45 | #define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */ | ||
46 | |||
47 | extern char reboot_command[]; | ||
48 | |||
49 | extern struct thread_info *current_set[NR_CPUS]; | ||
50 | |||
51 | extern unsigned long empty_bad_page; | ||
52 | extern unsigned long empty_bad_page_table; | ||
53 | extern unsigned long empty_zero_page; | ||
54 | |||
55 | extern void sun_do_break(void); | ||
56 | extern int serial_console; | ||
57 | extern int stop_a_enabled; | ||
58 | |||
59 | static inline int con_is_present(void) | ||
60 | { | ||
61 | return serial_console ? 0 : 1; | ||
62 | } | ||
63 | |||
64 | /* When a context switch happens we must flush all user windows so that | ||
65 | * the windows of the current process are flushed onto its stack. This | ||
66 | * way the windows are all clean for the next process and the stack | ||
67 | * frames are up to date. | ||
68 | */ | ||
69 | extern void flush_user_windows(void); | ||
70 | extern void kill_user_windows(void); | ||
71 | extern void synchronize_user_stack(void); | ||
72 | extern void fpsave(unsigned long *fpregs, unsigned long *fsr, | ||
73 | void *fpqueue, unsigned long *fpqdepth); | ||
74 | |||
75 | #ifdef CONFIG_SMP | ||
76 | #define SWITCH_ENTER(prv) \ | ||
77 | do { \ | ||
78 | if (test_tsk_thread_flag(prv, TIF_USEDFPU)) { \ | ||
79 | put_psr(get_psr() | PSR_EF); \ | ||
80 | fpsave(&(prv)->thread.float_regs[0], &(prv)->thread.fsr, \ | ||
81 | &(prv)->thread.fpqueue[0], &(prv)->thread.fpqdepth); \ | ||
82 | clear_tsk_thread_flag(prv, TIF_USEDFPU); \ | ||
83 | (prv)->thread.kregs->psr &= ~PSR_EF; \ | ||
84 | } \ | ||
85 | } while(0) | ||
86 | |||
87 | #define SWITCH_DO_LAZY_FPU(next) /* */ | ||
88 | #else | ||
89 | #define SWITCH_ENTER(prv) /* */ | ||
90 | #define SWITCH_DO_LAZY_FPU(nxt) \ | ||
91 | do { \ | ||
92 | if (last_task_used_math != (nxt)) \ | ||
93 | (nxt)->thread.kregs->psr&=~PSR_EF; \ | ||
94 | } while(0) | ||
95 | #endif | ||
96 | |||
97 | extern void flushw_all(void); | ||
98 | |||
99 | /* | ||
100 | * Flush windows so that the VM switch which follows | ||
101 | * would not pull the stack from under us. | ||
102 | * | ||
103 | * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work) | ||
104 | * XXX WTF is the above comment? Found in late teen 2.4.x. | ||
105 | */ | ||
106 | #define prepare_arch_switch(next) do { \ | ||
107 | __asm__ __volatile__( \ | ||
108 | ".globl\tflush_patch_switch\nflush_patch_switch:\n\t" \ | ||
109 | "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \ | ||
110 | "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \ | ||
111 | "save %sp, -0x40, %sp\n\t" \ | ||
112 | "restore; restore; restore; restore; restore; restore; restore"); \ | ||
113 | } while(0) | ||
114 | |||
115 | /* Much care has gone into this code, do not touch it. | ||
116 | * | ||
117 | * We need to loadup regs l0/l1 for the newly forked child | ||
118 | * case because the trap return path relies on those registers | ||
119 | * holding certain values, gcc is told that they are clobbered. | ||
120 | * Gcc needs registers for 3 values in and 1 value out, so we | ||
121 | * clobber every non-fixed-usage register besides l2/l3/o4/o5. -DaveM | ||
122 | * | ||
123 | * Hey Dave, that do not touch sign is too much of an incentive | ||
124 | * - Anton & Pete | ||
125 | */ | ||
126 | #define switch_to(prev, next, last) do { \ | ||
127 | SWITCH_ENTER(prev); \ | ||
128 | SWITCH_DO_LAZY_FPU(next); \ | ||
129 | cpu_set(smp_processor_id(), next->active_mm->cpu_vm_mask); \ | ||
130 | __asm__ __volatile__( \ | ||
131 | "sethi %%hi(here - 0x8), %%o7\n\t" \ | ||
132 | "mov %%g6, %%g3\n\t" \ | ||
133 | "or %%o7, %%lo(here - 0x8), %%o7\n\t" \ | ||
134 | "rd %%psr, %%g4\n\t" \ | ||
135 | "std %%sp, [%%g6 + %4]\n\t" \ | ||
136 | "rd %%wim, %%g5\n\t" \ | ||
137 | "wr %%g4, 0x20, %%psr\n\t" \ | ||
138 | "nop\n\t" \ | ||
139 | "std %%g4, [%%g6 + %3]\n\t" \ | ||
140 | "ldd [%2 + %3], %%g4\n\t" \ | ||
141 | "mov %2, %%g6\n\t" \ | ||
142 | ".globl patchme_store_new_current\n" \ | ||
143 | "patchme_store_new_current:\n\t" \ | ||
144 | "st %2, [%1]\n\t" \ | ||
145 | "wr %%g4, 0x20, %%psr\n\t" \ | ||
146 | "nop\n\t" \ | ||
147 | "nop\n\t" \ | ||
148 | "nop\n\t" /* LEON needs all 3 nops: load to %sp depends on CWP. */ \ | ||
149 | "ldd [%%g6 + %4], %%sp\n\t" \ | ||
150 | "wr %%g5, 0x0, %%wim\n\t" \ | ||
151 | "ldd [%%sp + 0x00], %%l0\n\t" \ | ||
152 | "ldd [%%sp + 0x38], %%i6\n\t" \ | ||
153 | "wr %%g4, 0x0, %%psr\n\t" \ | ||
154 | "nop\n\t" \ | ||
155 | "nop\n\t" \ | ||
156 | "jmpl %%o7 + 0x8, %%g0\n\t" \ | ||
157 | " ld [%%g3 + %5], %0\n\t" \ | ||
158 | "here:\n" \ | ||
159 | : "=&r" (last) \ | ||
160 | : "r" (&(current_set[hard_smp_processor_id()])), \ | ||
161 | "r" (task_thread_info(next)), \ | ||
162 | "i" (TI_KPSR), \ | ||
163 | "i" (TI_KSP), \ | ||
164 | "i" (TI_TASK) \ | ||
165 | : "g1", "g2", "g3", "g4", "g5", "g7", \ | ||
166 | "l0", "l1", "l3", "l4", "l5", "l6", "l7", \ | ||
167 | "i0", "i1", "i2", "i3", "i4", "i5", \ | ||
168 | "o0", "o1", "o2", "o3", "o7"); \ | ||
169 | } while(0) | ||
170 | |||
171 | /* XXX Change this if we ever use a PSO mode kernel. */ | ||
172 | #define mb() __asm__ __volatile__ ("" : : : "memory") | ||
173 | #define rmb() mb() | ||
174 | #define wmb() mb() | ||
175 | #define read_barrier_depends() do { } while(0) | ||
176 | #define set_mb(__var, __value) do { __var = __value; mb(); } while(0) | ||
177 | #define smp_mb() __asm__ __volatile__("":::"memory") | ||
178 | #define smp_rmb() __asm__ __volatile__("":::"memory") | ||
179 | #define smp_wmb() __asm__ __volatile__("":::"memory") | ||
180 | #define smp_read_barrier_depends() do { } while(0) | ||
181 | |||
182 | #define nop() __asm__ __volatile__ ("nop") | ||
183 | |||
184 | /* This has special calling conventions */ | ||
185 | #ifndef CONFIG_SMP | ||
186 | BTFIXUPDEF_CALL(void, ___xchg32, void) | ||
187 | #endif | ||
188 | |||
189 | static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val) | ||
190 | { | ||
191 | #ifdef CONFIG_SMP | ||
192 | __asm__ __volatile__("swap [%2], %0" | ||
193 | : "=&r" (val) | ||
194 | : "0" (val), "r" (m) | ||
195 | : "memory"); | ||
196 | return val; | ||
197 | #else | ||
198 | register unsigned long *ptr asm("g1"); | ||
199 | register unsigned long ret asm("g2"); | ||
200 | |||
201 | ptr = (unsigned long *) m; | ||
202 | ret = val; | ||
203 | |||
204 | /* Note: this is magic and the nop there is | ||
205 | really needed. */ | ||
206 | __asm__ __volatile__( | ||
207 | "mov %%o7, %%g4\n\t" | ||
208 | "call ___f____xchg32\n\t" | ||
209 | " nop\n\t" | ||
210 | : "=&r" (ret) | ||
211 | : "0" (ret), "r" (ptr) | ||
212 | : "g3", "g4", "g7", "memory", "cc"); | ||
213 | |||
214 | return ret; | ||
215 | #endif | ||
216 | } | ||
217 | |||
218 | #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) | ||
219 | |||
220 | extern void __xchg_called_with_bad_pointer(void); | ||
221 | |||
222 | static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size) | ||
223 | { | ||
224 | switch (size) { | ||
225 | case 4: | ||
226 | return xchg_u32(ptr, x); | ||
227 | }; | ||
228 | __xchg_called_with_bad_pointer(); | ||
229 | return x; | ||
230 | } | ||
231 | |||
232 | /* Emulate cmpxchg() the same way we emulate atomics, | ||
233 | * by hashing the object address and indexing into an array | ||
234 | * of spinlocks to get a bit of performance... | ||
235 | * | ||
236 | * See arch/sparc/lib/atomic32.c for implementation. | ||
237 | * | ||
238 | * Cribbed from <asm-parisc/atomic.h> | ||
239 | */ | ||
240 | #define __HAVE_ARCH_CMPXCHG 1 | ||
241 | |||
242 | /* bug catcher for when unsupported size is used - won't link */ | ||
243 | extern void __cmpxchg_called_with_bad_pointer(void); | ||
244 | /* we only need to support cmpxchg of a u32 on sparc */ | ||
245 | extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_); | ||
246 | |||
247 | /* don't worry...optimizer will get rid of most of this */ | ||
248 | static inline unsigned long | ||
249 | __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size) | ||
250 | { | ||
251 | switch (size) { | ||
252 | case 4: | ||
253 | return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_); | ||
254 | default: | ||
255 | __cmpxchg_called_with_bad_pointer(); | ||
256 | break; | ||
257 | } | ||
258 | return old; | ||
259 | } | ||
260 | |||
261 | #define cmpxchg(ptr, o, n) \ | ||
262 | ({ \ | ||
263 | __typeof__(*(ptr)) _o_ = (o); \ | ||
264 | __typeof__(*(ptr)) _n_ = (n); \ | ||
265 | (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ | ||
266 | (unsigned long)_n_, sizeof(*(ptr))); \ | ||
267 | }) | ||
268 | |||
269 | #include <asm-generic/cmpxchg-local.h> | ||
270 | |||
271 | /* | ||
272 | * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make | ||
273 | * them available. | ||
274 | */ | ||
275 | #define cmpxchg_local(ptr, o, n) \ | ||
276 | ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ | ||
277 | (unsigned long)(n), sizeof(*(ptr)))) | ||
278 | #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) | ||
279 | |||
280 | extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); | ||
281 | |||
282 | #endif /* __KERNEL__ */ | ||
283 | |||
284 | #endif /* __ASSEMBLY__ */ | ||
285 | |||
286 | #define arch_align_stack(x) (x) | ||
287 | |||
288 | #endif /* !(__SPARC_SYSTEM_H) */ | ||
diff --git a/include/asm-sparc/termbits.h b/include/asm-sparc/termbits.h deleted file mode 100644 index 90cf2210118b..000000000000 --- a/include/asm-sparc/termbits.h +++ /dev/null | |||
@@ -1,261 +0,0 @@ | |||
1 | #ifndef _SPARC_TERMBITS_H | ||
2 | #define _SPARC_TERMBITS_H | ||
3 | |||
4 | #include <linux/posix_types.h> | ||
5 | |||
6 | typedef unsigned char cc_t; | ||
7 | typedef unsigned int speed_t; | ||
8 | typedef unsigned long tcflag_t; | ||
9 | |||
10 | #define NCC 8 | ||
11 | struct termio { | ||
12 | unsigned short c_iflag; /* input mode flags */ | ||
13 | unsigned short c_oflag; /* output mode flags */ | ||
14 | unsigned short c_cflag; /* control mode flags */ | ||
15 | unsigned short c_lflag; /* local mode flags */ | ||
16 | unsigned char c_line; /* line discipline */ | ||
17 | unsigned char c_cc[NCC]; /* control characters */ | ||
18 | }; | ||
19 | |||
20 | #define NCCS 17 | ||
21 | struct termios { | ||
22 | tcflag_t c_iflag; /* input mode flags */ | ||
23 | tcflag_t c_oflag; /* output mode flags */ | ||
24 | tcflag_t c_cflag; /* control mode flags */ | ||
25 | tcflag_t c_lflag; /* local mode flags */ | ||
26 | cc_t c_line; /* line discipline */ | ||
27 | cc_t c_cc[NCCS]; /* control characters */ | ||
28 | #ifdef __KERNEL__ | ||
29 | #define SIZEOF_USER_TERMIOS sizeof (struct termios) - (2*sizeof (cc_t)) | ||
30 | cc_t _x_cc[2]; /* We need them to hold vmin/vtime */ | ||
31 | #endif | ||
32 | }; | ||
33 | |||
34 | struct termios2 { | ||
35 | tcflag_t c_iflag; /* input mode flags */ | ||
36 | tcflag_t c_oflag; /* output mode flags */ | ||
37 | tcflag_t c_cflag; /* control mode flags */ | ||
38 | tcflag_t c_lflag; /* local mode flags */ | ||
39 | cc_t c_line; /* line discipline */ | ||
40 | cc_t c_cc[NCCS]; /* control characters */ | ||
41 | cc_t _x_cc[2]; /* padding to match ktermios */ | ||
42 | speed_t c_ispeed; /* input speed */ | ||
43 | speed_t c_ospeed; /* output speed */ | ||
44 | }; | ||
45 | |||
46 | struct ktermios { | ||
47 | tcflag_t c_iflag; /* input mode flags */ | ||
48 | tcflag_t c_oflag; /* output mode flags */ | ||
49 | tcflag_t c_cflag; /* control mode flags */ | ||
50 | tcflag_t c_lflag; /* local mode flags */ | ||
51 | cc_t c_line; /* line discipline */ | ||
52 | cc_t c_cc[NCCS]; /* control characters */ | ||
53 | cc_t _x_cc[2]; /* We need them to hold vmin/vtime */ | ||
54 | speed_t c_ispeed; /* input speed */ | ||
55 | speed_t c_ospeed; /* output speed */ | ||
56 | }; | ||
57 | |||
58 | /* c_cc characters */ | ||
59 | #define VINTR 0 | ||
60 | #define VQUIT 1 | ||
61 | #define VERASE 2 | ||
62 | #define VKILL 3 | ||
63 | #define VEOF 4 | ||
64 | #define VEOL 5 | ||
65 | #define VEOL2 6 | ||
66 | #define VSWTC 7 | ||
67 | #define VSTART 8 | ||
68 | #define VSTOP 9 | ||
69 | |||
70 | |||
71 | |||
72 | #define VSUSP 10 | ||
73 | #define VDSUSP 11 /* SunOS POSIX nicety I do believe... */ | ||
74 | #define VREPRINT 12 | ||
75 | #define VDISCARD 13 | ||
76 | #define VWERASE 14 | ||
77 | #define VLNEXT 15 | ||
78 | |||
79 | /* Kernel keeps vmin/vtime separated, user apps assume vmin/vtime is | ||
80 | * shared with eof/eol | ||
81 | */ | ||
82 | #ifdef __KERNEL__ | ||
83 | #define VMIN 16 | ||
84 | #define VTIME 17 | ||
85 | #else | ||
86 | #define VMIN VEOF | ||
87 | #define VTIME VEOL | ||
88 | #endif | ||
89 | |||
90 | /* c_iflag bits */ | ||
91 | #define IGNBRK 0x00000001 | ||
92 | #define BRKINT 0x00000002 | ||
93 | #define IGNPAR 0x00000004 | ||
94 | #define PARMRK 0x00000008 | ||
95 | #define INPCK 0x00000010 | ||
96 | #define ISTRIP 0x00000020 | ||
97 | #define INLCR 0x00000040 | ||
98 | #define IGNCR 0x00000080 | ||
99 | #define ICRNL 0x00000100 | ||
100 | #define IUCLC 0x00000200 | ||
101 | #define IXON 0x00000400 | ||
102 | #define IXANY 0x00000800 | ||
103 | #define IXOFF 0x00001000 | ||
104 | #define IMAXBEL 0x00002000 | ||
105 | #define IUTF8 0x00004000 | ||
106 | |||
107 | /* c_oflag bits */ | ||
108 | #define OPOST 0x00000001 | ||
109 | #define OLCUC 0x00000002 | ||
110 | #define ONLCR 0x00000004 | ||
111 | #define OCRNL 0x00000008 | ||
112 | #define ONOCR 0x00000010 | ||
113 | #define ONLRET 0x00000020 | ||
114 | #define OFILL 0x00000040 | ||
115 | #define OFDEL 0x00000080 | ||
116 | #define NLDLY 0x00000100 | ||
117 | #define NL0 0x00000000 | ||
118 | #define NL1 0x00000100 | ||
119 | #define CRDLY 0x00000600 | ||
120 | #define CR0 0x00000000 | ||
121 | #define CR1 0x00000200 | ||
122 | #define CR2 0x00000400 | ||
123 | #define CR3 0x00000600 | ||
124 | #define TABDLY 0x00001800 | ||
125 | #define TAB0 0x00000000 | ||
126 | #define TAB1 0x00000800 | ||
127 | #define TAB2 0x00001000 | ||
128 | #define TAB3 0x00001800 | ||
129 | #define XTABS 0x00001800 | ||
130 | #define BSDLY 0x00002000 | ||
131 | #define BS0 0x00000000 | ||
132 | #define BS1 0x00002000 | ||
133 | #define VTDLY 0x00004000 | ||
134 | #define VT0 0x00000000 | ||
135 | #define VT1 0x00004000 | ||
136 | #define FFDLY 0x00008000 | ||
137 | #define FF0 0x00000000 | ||
138 | #define FF1 0x00008000 | ||
139 | #define PAGEOUT 0x00010000 /* SUNOS specific */ | ||
140 | #define WRAP 0x00020000 /* SUNOS specific */ | ||
141 | |||
142 | /* c_cflag bit meaning */ | ||
143 | #define CBAUD 0x0000100f | ||
144 | #define B0 0x00000000 /* hang up */ | ||
145 | #define B50 0x00000001 | ||
146 | #define B75 0x00000002 | ||
147 | #define B110 0x00000003 | ||
148 | #define B134 0x00000004 | ||
149 | #define B150 0x00000005 | ||
150 | #define B200 0x00000006 | ||
151 | #define B300 0x00000007 | ||
152 | #define B600 0x00000008 | ||
153 | #define B1200 0x00000009 | ||
154 | #define B1800 0x0000000a | ||
155 | #define B2400 0x0000000b | ||
156 | #define B4800 0x0000000c | ||
157 | #define B9600 0x0000000d | ||
158 | #define B19200 0x0000000e | ||
159 | #define B38400 0x0000000f | ||
160 | #define EXTA B19200 | ||
161 | #define EXTB B38400 | ||
162 | #define CSIZE 0x00000030 | ||
163 | #define CS5 0x00000000 | ||
164 | #define CS6 0x00000010 | ||
165 | #define CS7 0x00000020 | ||
166 | #define CS8 0x00000030 | ||
167 | #define CSTOPB 0x00000040 | ||
168 | #define CREAD 0x00000080 | ||
169 | #define PARENB 0x00000100 | ||
170 | #define PARODD 0x00000200 | ||
171 | #define HUPCL 0x00000400 | ||
172 | #define CLOCAL 0x00000800 | ||
173 | #define CBAUDEX 0x00001000 | ||
174 | /* We'll never see these speeds with the Zilogs, but for completeness... */ | ||
175 | #define BOTHER 0x00001000 | ||
176 | #define B57600 0x00001001 | ||
177 | #define B115200 0x00001002 | ||
178 | #define B230400 0x00001003 | ||
179 | #define B460800 0x00001004 | ||
180 | /* This is what we can do with the Zilogs. */ | ||
181 | #define B76800 0x00001005 | ||
182 | /* This is what we can do with the SAB82532. */ | ||
183 | #define B153600 0x00001006 | ||
184 | #define B307200 0x00001007 | ||
185 | #define B614400 0x00001008 | ||
186 | #define B921600 0x00001009 | ||
187 | /* And these are the rest... */ | ||
188 | #define B500000 0x0000100a | ||
189 | #define B576000 0x0000100b | ||
190 | #define B1000000 0x0000100c | ||
191 | #define B1152000 0x0000100d | ||
192 | #define B1500000 0x0000100e | ||
193 | #define B2000000 0x0000100f | ||
194 | /* These have totally bogus values and nobody uses them | ||
195 | so far. Later on we'd have to use say 0x10000x and | ||
196 | adjust CBAUD constant and drivers accordingly. | ||
197 | #define B2500000 0x00001010 | ||
198 | #define B3000000 0x00001011 | ||
199 | #define B3500000 0x00001012 | ||
200 | #define B4000000 0x00001013 */ | ||
201 | #define CIBAUD 0x100f0000 /* input baud rate (not used) */ | ||
202 | #define CMSPAR 0x40000000 /* mark or space (stick) parity */ | ||
203 | #define CRTSCTS 0x80000000 /* flow control */ | ||
204 | |||
205 | #define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ | ||
206 | |||
207 | /* c_lflag bits */ | ||
208 | #define ISIG 0x00000001 | ||
209 | #define ICANON 0x00000002 | ||
210 | #define XCASE 0x00000004 | ||
211 | #define ECHO 0x00000008 | ||
212 | #define ECHOE 0x00000010 | ||
213 | #define ECHOK 0x00000020 | ||
214 | #define ECHONL 0x00000040 | ||
215 | #define NOFLSH 0x00000080 | ||
216 | #define TOSTOP 0x00000100 | ||
217 | #define ECHOCTL 0x00000200 | ||
218 | #define ECHOPRT 0x00000400 | ||
219 | #define ECHOKE 0x00000800 | ||
220 | #define DEFECHO 0x00001000 /* SUNOS thing, what is it? */ | ||
221 | #define FLUSHO 0x00002000 | ||
222 | #define PENDIN 0x00004000 | ||
223 | #define IEXTEN 0x00008000 | ||
224 | |||
225 | /* modem lines */ | ||
226 | #define TIOCM_LE 0x001 | ||
227 | #define TIOCM_DTR 0x002 | ||
228 | #define TIOCM_RTS 0x004 | ||
229 | #define TIOCM_ST 0x008 | ||
230 | #define TIOCM_SR 0x010 | ||
231 | #define TIOCM_CTS 0x020 | ||
232 | #define TIOCM_CAR 0x040 | ||
233 | #define TIOCM_RNG 0x080 | ||
234 | #define TIOCM_DSR 0x100 | ||
235 | #define TIOCM_CD TIOCM_CAR | ||
236 | #define TIOCM_RI TIOCM_RNG | ||
237 | #define TIOCM_OUT1 0x2000 | ||
238 | #define TIOCM_OUT2 0x4000 | ||
239 | #define TIOCM_LOOP 0x8000 | ||
240 | |||
241 | /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ | ||
242 | #define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ | ||
243 | |||
244 | |||
245 | /* tcflow() and TCXONC use these */ | ||
246 | #define TCOOFF 0 | ||
247 | #define TCOON 1 | ||
248 | #define TCIOFF 2 | ||
249 | #define TCION 3 | ||
250 | |||
251 | /* tcflush() and TCFLSH use these */ | ||
252 | #define TCIFLUSH 0 | ||
253 | #define TCOFLUSH 1 | ||
254 | #define TCIOFLUSH 2 | ||
255 | |||
256 | /* tcsetattr uses these */ | ||
257 | #define TCSANOW 0 | ||
258 | #define TCSADRAIN 1 | ||
259 | #define TCSAFLUSH 2 | ||
260 | |||
261 | #endif /* !(_SPARC_TERMBITS_H) */ | ||
diff --git a/include/asm-sparc/termios.h b/include/asm-sparc/termios.h deleted file mode 100644 index f7b4409c35ff..000000000000 --- a/include/asm-sparc/termios.h +++ /dev/null | |||
@@ -1,183 +0,0 @@ | |||
1 | #ifndef _SPARC_TERMIOS_H | ||
2 | #define _SPARC_TERMIOS_H | ||
3 | |||
4 | #include <asm/ioctls.h> | ||
5 | #include <asm/termbits.h> | ||
6 | |||
7 | #if defined(__KERNEL__) || defined(__DEFINE_BSD_TERMIOS) | ||
8 | struct sgttyb { | ||
9 | char sg_ispeed; | ||
10 | char sg_ospeed; | ||
11 | char sg_erase; | ||
12 | char sg_kill; | ||
13 | short sg_flags; | ||
14 | }; | ||
15 | |||
16 | struct tchars { | ||
17 | char t_intrc; | ||
18 | char t_quitc; | ||
19 | char t_startc; | ||
20 | char t_stopc; | ||
21 | char t_eofc; | ||
22 | char t_brkc; | ||
23 | }; | ||
24 | |||
25 | struct ltchars { | ||
26 | char t_suspc; | ||
27 | char t_dsuspc; | ||
28 | char t_rprntc; | ||
29 | char t_flushc; | ||
30 | char t_werasc; | ||
31 | char t_lnextc; | ||
32 | }; | ||
33 | #endif /* __KERNEL__ */ | ||
34 | |||
35 | struct winsize { | ||
36 | unsigned short ws_row; | ||
37 | unsigned short ws_col; | ||
38 | unsigned short ws_xpixel; | ||
39 | unsigned short ws_ypixel; | ||
40 | }; | ||
41 | |||
42 | #ifdef __KERNEL__ | ||
43 | #include <linux/module.h> | ||
44 | |||
45 | /* | ||
46 | * c_cc characters in the termio structure. Oh, how I love being | ||
47 | * backwardly compatible. Notice that character 4 and 5 are | ||
48 | * interpreted differently depending on whether ICANON is set in | ||
49 | * c_lflag. If it's set, they are used as _VEOF and _VEOL, otherwise | ||
50 | * as _VMIN and V_TIME. This is for compatibility with OSF/1 (which | ||
51 | * is compatible with sysV)... | ||
52 | */ | ||
53 | #define _VMIN 4 | ||
54 | #define _VTIME 5 | ||
55 | |||
56 | |||
57 | /* intr=^C quit=^\ erase=del kill=^U | ||
58 | eof=^D eol=\0 eol2=\0 sxtc=\0 | ||
59 | start=^Q stop=^S susp=^Z dsusp=^Y | ||
60 | reprint=^R discard=^U werase=^W lnext=^V | ||
61 | vmin=\1 vtime=\0 | ||
62 | */ | ||
63 | #define INIT_C_CC "\003\034\177\025\004\000\000\000\021\023\032\031\022\025\027\026\001" | ||
64 | |||
65 | /* | ||
66 | * Translate a "termio" structure into a "termios". Ugh. | ||
67 | */ | ||
68 | #define user_termio_to_kernel_termios(termios, termio) \ | ||
69 | ({ \ | ||
70 | unsigned short tmp; \ | ||
71 | get_user(tmp, &(termio)->c_iflag); \ | ||
72 | (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \ | ||
73 | get_user(tmp, &(termio)->c_oflag); \ | ||
74 | (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \ | ||
75 | get_user(tmp, &(termio)->c_cflag); \ | ||
76 | (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \ | ||
77 | get_user(tmp, &(termio)->c_lflag); \ | ||
78 | (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \ | ||
79 | copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ | ||
80 | 0; \ | ||
81 | }) | ||
82 | |||
83 | /* | ||
84 | * Translate a "termios" structure into a "termio". Ugh. | ||
85 | * | ||
86 | * Note the "fun" _VMIN overloading. | ||
87 | */ | ||
88 | #define kernel_termios_to_user_termio(termio, termios) \ | ||
89 | ({ \ | ||
90 | put_user((termios)->c_iflag, &(termio)->c_iflag); \ | ||
91 | put_user((termios)->c_oflag, &(termio)->c_oflag); \ | ||
92 | put_user((termios)->c_cflag, &(termio)->c_cflag); \ | ||
93 | put_user((termios)->c_lflag, &(termio)->c_lflag); \ | ||
94 | put_user((termios)->c_line, &(termio)->c_line); \ | ||
95 | copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ | ||
96 | if (!((termios)->c_lflag & ICANON)) { \ | ||
97 | put_user((termios)->c_cc[VMIN], &(termio)->c_cc[_VMIN]); \ | ||
98 | put_user((termios)->c_cc[VTIME], &(termio)->c_cc[_VTIME]); \ | ||
99 | } \ | ||
100 | 0; \ | ||
101 | }) | ||
102 | |||
103 | #define user_termios_to_kernel_termios(k, u) \ | ||
104 | ({ \ | ||
105 | int err; \ | ||
106 | err = get_user((k)->c_iflag, &(u)->c_iflag); \ | ||
107 | err |= get_user((k)->c_oflag, &(u)->c_oflag); \ | ||
108 | err |= get_user((k)->c_cflag, &(u)->c_cflag); \ | ||
109 | err |= get_user((k)->c_lflag, &(u)->c_lflag); \ | ||
110 | err |= get_user((k)->c_line, &(u)->c_line); \ | ||
111 | err |= copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \ | ||
112 | if ((k)->c_lflag & ICANON) { \ | ||
113 | err |= get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ | ||
114 | err |= get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ | ||
115 | } else { \ | ||
116 | err |= get_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ | ||
117 | err |= get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ | ||
118 | } \ | ||
119 | err |= get_user((k)->c_ispeed, &(u)->c_ispeed); \ | ||
120 | err |= get_user((k)->c_ospeed, &(u)->c_ospeed); \ | ||
121 | err; \ | ||
122 | }) | ||
123 | |||
124 | #define kernel_termios_to_user_termios(u, k) \ | ||
125 | ({ \ | ||
126 | int err; \ | ||
127 | err = put_user((k)->c_iflag, &(u)->c_iflag); \ | ||
128 | err |= put_user((k)->c_oflag, &(u)->c_oflag); \ | ||
129 | err |= put_user((k)->c_cflag, &(u)->c_cflag); \ | ||
130 | err |= put_user((k)->c_lflag, &(u)->c_lflag); \ | ||
131 | err |= put_user((k)->c_line, &(u)->c_line); \ | ||
132 | err |= copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \ | ||
133 | if (!((k)->c_lflag & ICANON)) { \ | ||
134 | err |= put_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ | ||
135 | err |= put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ | ||
136 | } else { \ | ||
137 | err |= put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ | ||
138 | err |= put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ | ||
139 | } \ | ||
140 | err |= put_user((k)->c_ispeed, &(u)->c_ispeed); \ | ||
141 | err |= put_user((k)->c_ospeed, &(u)->c_ospeed); \ | ||
142 | err; \ | ||
143 | }) | ||
144 | |||
145 | #define user_termios_to_kernel_termios_1(k, u) \ | ||
146 | ({ \ | ||
147 | get_user((k)->c_iflag, &(u)->c_iflag); \ | ||
148 | get_user((k)->c_oflag, &(u)->c_oflag); \ | ||
149 | get_user((k)->c_cflag, &(u)->c_cflag); \ | ||
150 | get_user((k)->c_lflag, &(u)->c_lflag); \ | ||
151 | get_user((k)->c_line, &(u)->c_line); \ | ||
152 | copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \ | ||
153 | if ((k)->c_lflag & ICANON) { \ | ||
154 | get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ | ||
155 | get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ | ||
156 | } else { \ | ||
157 | get_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ | ||
158 | get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ | ||
159 | } \ | ||
160 | 0; \ | ||
161 | }) | ||
162 | |||
163 | #define kernel_termios_to_user_termios_1(u, k) \ | ||
164 | ({ \ | ||
165 | put_user((k)->c_iflag, &(u)->c_iflag); \ | ||
166 | put_user((k)->c_oflag, &(u)->c_oflag); \ | ||
167 | put_user((k)->c_cflag, &(u)->c_cflag); \ | ||
168 | put_user((k)->c_lflag, &(u)->c_lflag); \ | ||
169 | put_user((k)->c_line, &(u)->c_line); \ | ||
170 | copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \ | ||
171 | if (!((k)->c_lflag & ICANON)) { \ | ||
172 | put_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ | ||
173 | put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ | ||
174 | } else { \ | ||
175 | put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ | ||
176 | put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ | ||
177 | } \ | ||
178 | 0; \ | ||
179 | }) | ||
180 | |||
181 | #endif /* __KERNEL__ */ | ||
182 | |||
183 | #endif /* _SPARC_TERMIOS_H */ | ||
diff --git a/include/asm-sparc/thread_info.h b/include/asm-sparc/thread_info.h deleted file mode 100644 index 91b9f5888c85..000000000000 --- a/include/asm-sparc/thread_info.h +++ /dev/null | |||
@@ -1,151 +0,0 @@ | |||
1 | /* | ||
2 | * thread_info.h: sparc low-level thread information | ||
3 | * adapted from the ppc version by Pete Zaitcev, which was | ||
4 | * adapted from the i386 version by Paul Mackerras | ||
5 | * | ||
6 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) | ||
7 | * Copyright (c) 2002 Pete Zaitcev (zaitcev@yahoo.com) | ||
8 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller | ||
9 | */ | ||
10 | |||
11 | #ifndef _ASM_THREAD_INFO_H | ||
12 | #define _ASM_THREAD_INFO_H | ||
13 | |||
14 | #ifdef __KERNEL__ | ||
15 | |||
16 | #ifndef __ASSEMBLY__ | ||
17 | |||
18 | #include <asm/btfixup.h> | ||
19 | #include <asm/ptrace.h> | ||
20 | #include <asm/page.h> | ||
21 | |||
22 | /* | ||
23 | * Low level task data. | ||
24 | * | ||
25 | * If you change this, change the TI_* offsets below to match. | ||
26 | */ | ||
27 | #define NSWINS 8 | ||
28 | struct thread_info { | ||
29 | unsigned long uwinmask; | ||
30 | struct task_struct *task; /* main task structure */ | ||
31 | struct exec_domain *exec_domain; /* execution domain */ | ||
32 | unsigned long flags; /* low level flags */ | ||
33 | int cpu; /* cpu we're on */ | ||
34 | int preempt_count; /* 0 => preemptable, | ||
35 | <0 => BUG */ | ||
36 | int softirq_count; | ||
37 | int hardirq_count; | ||
38 | |||
39 | /* Context switch saved kernel state. */ | ||
40 | unsigned long ksp; /* ... ksp __attribute__ ((aligned (8))); */ | ||
41 | unsigned long kpc; | ||
42 | unsigned long kpsr; | ||
43 | unsigned long kwim; | ||
44 | |||
45 | /* A place to store user windows and stack pointers | ||
46 | * when the stack needs inspection. | ||
47 | */ | ||
48 | struct reg_window reg_window[NSWINS]; /* align for ldd! */ | ||
49 | unsigned long rwbuf_stkptrs[NSWINS]; | ||
50 | unsigned long w_saved; | ||
51 | |||
52 | struct restart_block restart_block; | ||
53 | }; | ||
54 | |||
55 | /* | ||
56 | * macros/functions for gaining access to the thread information structure | ||
57 | * | ||
58 | * preempt_count needs to be 1 initially, until the scheduler is functional. | ||
59 | */ | ||
60 | #define INIT_THREAD_INFO(tsk) \ | ||
61 | { \ | ||
62 | .uwinmask = 0, \ | ||
63 | .task = &tsk, \ | ||
64 | .exec_domain = &default_exec_domain, \ | ||
65 | .flags = 0, \ | ||
66 | .cpu = 0, \ | ||
67 | .preempt_count = 1, \ | ||
68 | .restart_block = { \ | ||
69 | .fn = do_no_restart_syscall, \ | ||
70 | }, \ | ||
71 | } | ||
72 | |||
73 | #define init_thread_info (init_thread_union.thread_info) | ||
74 | #define init_stack (init_thread_union.stack) | ||
75 | |||
76 | /* how to get the thread information struct from C */ | ||
77 | register struct thread_info *current_thread_info_reg asm("g6"); | ||
78 | #define current_thread_info() (current_thread_info_reg) | ||
79 | |||
80 | /* | ||
81 | * thread information allocation | ||
82 | */ | ||
83 | #if PAGE_SHIFT == 13 | ||
84 | #define THREAD_INFO_ORDER 0 | ||
85 | #else /* PAGE_SHIFT */ | ||
86 | #define THREAD_INFO_ORDER 1 | ||
87 | #endif | ||
88 | |||
89 | BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void) | ||
90 | #define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)() | ||
91 | |||
92 | BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) | ||
93 | #define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti) | ||
94 | |||
95 | #endif /* __ASSEMBLY__ */ | ||
96 | |||
97 | /* | ||
98 | * Size of kernel stack for each process. | ||
99 | * Observe the order of get_free_pages() in alloc_thread_info(). | ||
100 | * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste. | ||
101 | */ | ||
102 | #define THREAD_SIZE 8192 | ||
103 | |||
104 | /* | ||
105 | * Offsets in thread_info structure, used in assembly code | ||
106 | * The "#define REGWIN_SZ 0x40" was abolished, so no multiplications. | ||
107 | */ | ||
108 | #define TI_UWINMASK 0x00 /* uwinmask */ | ||
109 | #define TI_TASK 0x04 | ||
110 | #define TI_EXECDOMAIN 0x08 /* exec_domain */ | ||
111 | #define TI_FLAGS 0x0c | ||
112 | #define TI_CPU 0x10 | ||
113 | #define TI_PREEMPT 0x14 /* preempt_count */ | ||
114 | #define TI_SOFTIRQ 0x18 /* softirq_count */ | ||
115 | #define TI_HARDIRQ 0x1c /* hardirq_count */ | ||
116 | #define TI_KSP 0x20 /* ksp */ | ||
117 | #define TI_KPC 0x24 /* kpc (ldd'ed with kpc) */ | ||
118 | #define TI_KPSR 0x28 /* kpsr */ | ||
119 | #define TI_KWIM 0x2c /* kwim (ldd'ed with kpsr) */ | ||
120 | #define TI_REG_WINDOW 0x30 | ||
121 | #define TI_RWIN_SPTRS 0x230 | ||
122 | #define TI_W_SAVED 0x250 | ||
123 | /* #define TI_RESTART_BLOCK 0x25n */ /* Nobody cares */ | ||
124 | |||
125 | #define PREEMPT_ACTIVE 0x4000000 | ||
126 | |||
127 | /* | ||
128 | * thread information flag bit numbers | ||
129 | */ | ||
130 | #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ | ||
131 | /* flag bit 1 is available */ | ||
132 | #define TIF_SIGPENDING 2 /* signal pending */ | ||
133 | #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ | ||
134 | #define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ | ||
135 | #define TIF_USEDFPU 8 /* FPU was used by this task | ||
136 | * this quantum (SMP) */ | ||
137 | #define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling | ||
138 | * TIF_NEED_RESCHED */ | ||
139 | #define TIF_MEMDIE 10 | ||
140 | |||
141 | /* as above, but as bit values */ | ||
142 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | ||
143 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) | ||
144 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) | ||
145 | #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) | ||
146 | #define _TIF_USEDFPU (1<<TIF_USEDFPU) | ||
147 | #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) | ||
148 | |||
149 | #endif /* __KERNEL__ */ | ||
150 | |||
151 | #endif /* _ASM_THREAD_INFO_H */ | ||
diff --git a/include/asm-sparc/timer.h b/include/asm-sparc/timer.h deleted file mode 100644 index d909565f9410..000000000000 --- a/include/asm-sparc/timer.h +++ /dev/null | |||
@@ -1,109 +0,0 @@ | |||
1 | /* | ||
2 | * timer.h: Definitions for the timer chips on the Sparc. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | |||
8 | #ifndef _SPARC_TIMER_H | ||
9 | #define _SPARC_TIMER_H | ||
10 | |||
11 | #include <asm/system.h> /* For SUN4M_NCPUS */ | ||
12 | #include <asm/sun4paddr.h> | ||
13 | #include <asm/btfixup.h> | ||
14 | |||
15 | /* Timer structures. The interrupt timer has two properties which | ||
16 | * are the counter (which is handled in do_timer in sched.c) and the limit. | ||
17 | * This limit is where the timer's counter 'wraps' around. Oddly enough, | ||
18 | * the sun4c timer when it hits the limit wraps back to 1 and not zero | ||
19 | * thus when calculating the value at which it will fire a microsecond you | ||
20 | * must adjust by one. Thanks SUN for designing such great hardware ;( | ||
21 | */ | ||
22 | |||
23 | /* Note that I am only going to use the timer that interrupts at | ||
24 | * Sparc IRQ 10. There is another one available that can fire at | ||
25 | * IRQ 14. Currently it is left untouched, we keep the PROM's limit | ||
26 | * register value and let the prom take these interrupts. This allows | ||
27 | * L1-A to work. | ||
28 | */ | ||
29 | |||
30 | struct sun4c_timer_info { | ||
31 | __volatile__ unsigned int cur_count10; | ||
32 | __volatile__ unsigned int timer_limit10; | ||
33 | __volatile__ unsigned int cur_count14; | ||
34 | __volatile__ unsigned int timer_limit14; | ||
35 | }; | ||
36 | |||
37 | #define SUN4C_TIMER_PHYSADDR 0xf3000000 | ||
38 | #ifdef CONFIG_SUN4 | ||
39 | #define SUN_TIMER_PHYSADDR SUN4_300_TIMER_PHYSADDR | ||
40 | #else | ||
41 | #define SUN_TIMER_PHYSADDR SUN4C_TIMER_PHYSADDR | ||
42 | #endif | ||
43 | |||
44 | /* A sun4m has two blocks of registers which are probably of the same | ||
45 | * structure. LSI Logic's L64851 is told to _decrement_ from the limit | ||
46 | * value. Aurora behaves similarly but its limit value is compacted in | ||
47 | * other fashion (it's wider). Documented fields are defined here. | ||
48 | */ | ||
49 | |||
50 | /* As with the interrupt register, we have two classes of timer registers | ||
51 | * which are per-cpu and master. Per-cpu timers only hit that cpu and are | ||
52 | * only level 14 ticks, master timer hits all cpus and is level 10. | ||
53 | */ | ||
54 | |||
55 | #define SUN4M_PRM_CNT_L 0x80000000 | ||
56 | #define SUN4M_PRM_CNT_LVALUE 0x7FFFFC00 | ||
57 | |||
58 | struct sun4m_timer_percpu_info { | ||
59 | __volatile__ unsigned int l14_timer_limit; /* Initial value is 0x009c4000 */ | ||
60 | __volatile__ unsigned int l14_cur_count; | ||
61 | |||
62 | /* This register appears to be write only and/or inaccessible | ||
63 | * on Uni-Processor sun4m machines. | ||
64 | */ | ||
65 | __volatile__ unsigned int l14_limit_noclear; /* Data access error is here */ | ||
66 | |||
67 | __volatile__ unsigned int cntrl; /* =1 after POST on Aurora */ | ||
68 | __volatile__ unsigned char space[PAGE_SIZE - 16]; | ||
69 | }; | ||
70 | |||
71 | struct sun4m_timer_regs { | ||
72 | struct sun4m_timer_percpu_info cpu_timers[SUN4M_NCPUS]; | ||
73 | volatile unsigned int l10_timer_limit; | ||
74 | volatile unsigned int l10_cur_count; | ||
75 | |||
76 | /* Again, this appears to be write only and/or inaccessible | ||
77 | * on uni-processor sun4m machines. | ||
78 | */ | ||
79 | volatile unsigned int l10_limit_noclear; | ||
80 | |||
81 | /* This register too, it must be magic. */ | ||
82 | volatile unsigned int foobar; | ||
83 | |||
84 | volatile unsigned int cfg; /* equals zero at boot time... */ | ||
85 | }; | ||
86 | |||
87 | extern struct sun4m_timer_regs *sun4m_timers; | ||
88 | |||
89 | #define SUN4D_PRM_CNT_L 0x80000000 | ||
90 | #define SUN4D_PRM_CNT_LVALUE 0x7FFFFC00 | ||
91 | |||
92 | struct sun4d_timer_regs { | ||
93 | volatile unsigned int l10_timer_limit; | ||
94 | volatile unsigned int l10_cur_countx; | ||
95 | volatile unsigned int l10_limit_noclear; | ||
96 | volatile unsigned int ctrl; | ||
97 | volatile unsigned int l10_cur_count; | ||
98 | }; | ||
99 | |||
100 | extern struct sun4d_timer_regs *sun4d_timers; | ||
101 | |||
102 | extern __volatile__ unsigned int *master_l10_counter; | ||
103 | extern __volatile__ unsigned int *master_l10_limit; | ||
104 | |||
105 | /* FIXME: Make do_[gs]ettimeofday btfixup calls */ | ||
106 | BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv) | ||
107 | #define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv) | ||
108 | |||
109 | #endif /* !(_SPARC_TIMER_H) */ | ||
diff --git a/include/asm-sparc/timex.h b/include/asm-sparc/timex.h deleted file mode 100644 index 71b45c90ccae..000000000000 --- a/include/asm-sparc/timex.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm-sparc/timex.h | ||
3 | * | ||
4 | * sparc architecture timex specifications | ||
5 | */ | ||
6 | #ifndef _ASMsparc_TIMEX_H | ||
7 | #define _ASMsparc_TIMEX_H | ||
8 | |||
9 | #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ | ||
10 | |||
11 | /* XXX Maybe do something better at some point... -DaveM */ | ||
12 | typedef unsigned long cycles_t; | ||
13 | #define get_cycles() (0) | ||
14 | |||
15 | #endif | ||
diff --git a/include/asm-sparc/tlb.h b/include/asm-sparc/tlb.h deleted file mode 100644 index 6d02d1ce53f3..000000000000 --- a/include/asm-sparc/tlb.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | #ifndef _SPARC_TLB_H | ||
2 | #define _SPARC_TLB_H | ||
3 | |||
4 | #define tlb_start_vma(tlb, vma) \ | ||
5 | do { \ | ||
6 | flush_cache_range(vma, vma->vm_start, vma->vm_end); \ | ||
7 | } while (0) | ||
8 | |||
9 | #define tlb_end_vma(tlb, vma) \ | ||
10 | do { \ | ||
11 | flush_tlb_range(vma, vma->vm_start, vma->vm_end); \ | ||
12 | } while (0) | ||
13 | |||
14 | #define __tlb_remove_tlb_entry(tlb, pte, address) \ | ||
15 | do { } while (0) | ||
16 | |||
17 | #define tlb_flush(tlb) \ | ||
18 | do { \ | ||
19 | flush_tlb_mm((tlb)->mm); \ | ||
20 | } while (0) | ||
21 | |||
22 | #include <asm-generic/tlb.h> | ||
23 | |||
24 | #endif /* _SPARC_TLB_H */ | ||
diff --git a/include/asm-sparc/tlbflush.h b/include/asm-sparc/tlbflush.h deleted file mode 100644 index b957e29d2ae1..000000000000 --- a/include/asm-sparc/tlbflush.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | #ifndef _SPARC_TLBFLUSH_H | ||
2 | #define _SPARC_TLBFLUSH_H | ||
3 | |||
4 | #include <linux/mm.h> | ||
5 | // #include <asm/processor.h> | ||
6 | |||
7 | /* | ||
8 | * TLB flushing: | ||
9 | * | ||
10 | * - flush_tlb() flushes the current mm struct TLBs XXX Exists? | ||
11 | * - flush_tlb_all() flushes all processes TLBs | ||
12 | * - flush_tlb_mm(mm) flushes the specified mm context TLB's | ||
13 | * - flush_tlb_page(vma, vmaddr) flushes one page | ||
14 | * - flush_tlb_range(vma, start, end) flushes a range of pages | ||
15 | * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages | ||
16 | */ | ||
17 | |||
18 | #ifdef CONFIG_SMP | ||
19 | |||
20 | BTFIXUPDEF_CALL(void, local_flush_tlb_all, void) | ||
21 | BTFIXUPDEF_CALL(void, local_flush_tlb_mm, struct mm_struct *) | ||
22 | BTFIXUPDEF_CALL(void, local_flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) | ||
23 | BTFIXUPDEF_CALL(void, local_flush_tlb_page, struct vm_area_struct *, unsigned long) | ||
24 | |||
25 | #define local_flush_tlb_all() BTFIXUP_CALL(local_flush_tlb_all)() | ||
26 | #define local_flush_tlb_mm(mm) BTFIXUP_CALL(local_flush_tlb_mm)(mm) | ||
27 | #define local_flush_tlb_range(vma,start,end) BTFIXUP_CALL(local_flush_tlb_range)(vma,start,end) | ||
28 | #define local_flush_tlb_page(vma,addr) BTFIXUP_CALL(local_flush_tlb_page)(vma,addr) | ||
29 | |||
30 | extern void smp_flush_tlb_all(void); | ||
31 | extern void smp_flush_tlb_mm(struct mm_struct *mm); | ||
32 | extern void smp_flush_tlb_range(struct vm_area_struct *vma, | ||
33 | unsigned long start, | ||
34 | unsigned long end); | ||
35 | extern void smp_flush_tlb_page(struct vm_area_struct *mm, unsigned long page); | ||
36 | |||
37 | #endif /* CONFIG_SMP */ | ||
38 | |||
39 | BTFIXUPDEF_CALL(void, flush_tlb_all, void) | ||
40 | BTFIXUPDEF_CALL(void, flush_tlb_mm, struct mm_struct *) | ||
41 | BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) | ||
42 | BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long) | ||
43 | |||
44 | #define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)() | ||
45 | #define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm) | ||
46 | #define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end) | ||
47 | #define flush_tlb_page(vma,addr) BTFIXUP_CALL(flush_tlb_page)(vma,addr) | ||
48 | |||
49 | // #define flush_tlb() flush_tlb_mm(current->active_mm) /* XXX Sure? */ | ||
50 | |||
51 | /* | ||
52 | * This is a kludge, until I know better. --zaitcev XXX | ||
53 | */ | ||
54 | static inline void flush_tlb_kernel_range(unsigned long start, | ||
55 | unsigned long end) | ||
56 | { | ||
57 | flush_tlb_all(); | ||
58 | } | ||
59 | |||
60 | #endif /* _SPARC_TLBFLUSH_H */ | ||
diff --git a/include/asm-sparc/topology.h b/include/asm-sparc/topology.h deleted file mode 100644 index ee5ac9c9da28..000000000000 --- a/include/asm-sparc/topology.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _ASM_SPARC_TOPOLOGY_H | ||
2 | #define _ASM_SPARC_TOPOLOGY_H | ||
3 | |||
4 | #include <asm-generic/topology.h> | ||
5 | |||
6 | #endif /* _ASM_SPARC_TOPOLOGY_H */ | ||
diff --git a/include/asm-sparc/traps.h b/include/asm-sparc/traps.h deleted file mode 100644 index bebdbf8f43a8..000000000000 --- a/include/asm-sparc/traps.h +++ /dev/null | |||
@@ -1,140 +0,0 @@ | |||
1 | /* | ||
2 | * traps.h: Format of entries for the Sparc trap table. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_TRAPS_H | ||
8 | #define _SPARC_TRAPS_H | ||
9 | |||
10 | #define NUM_SPARC_TRAPS 255 | ||
11 | |||
12 | #ifndef __ASSEMBLY__ | ||
13 | |||
14 | /* This is for V8 compliant Sparc CPUS */ | ||
15 | struct tt_entry { | ||
16 | unsigned long inst_one; | ||
17 | unsigned long inst_two; | ||
18 | unsigned long inst_three; | ||
19 | unsigned long inst_four; | ||
20 | }; | ||
21 | |||
22 | /* We set this to _start in system setup. */ | ||
23 | extern struct tt_entry *sparc_ttable; | ||
24 | |||
25 | static inline unsigned long get_tbr(void) | ||
26 | { | ||
27 | unsigned long tbr; | ||
28 | |||
29 | __asm__ __volatile__("rd %%tbr, %0\n\t" : "=r" (tbr)); | ||
30 | return tbr; | ||
31 | } | ||
32 | |||
33 | #endif /* !(__ASSEMBLY__) */ | ||
34 | |||
35 | /* For patching the trap table at boot time, we need to know how to | ||
36 | * form various common Sparc instructions. Thus these macros... | ||
37 | */ | ||
38 | |||
39 | #define SPARC_MOV_CONST_L3(const) (0xa6102000 | (const&0xfff)) | ||
40 | |||
41 | /* The following assumes that the branch lies before the place we | ||
42 | * are branching to. This is the case for a trap vector... | ||
43 | * You have been warned. | ||
44 | */ | ||
45 | #define SPARC_BRANCH(dest_addr, inst_addr) \ | ||
46 | (0x10800000 | (((dest_addr-inst_addr)>>2)&0x3fffff)) | ||
47 | |||
48 | #define SPARC_RD_PSR_L0 (0xa1480000) | ||
49 | #define SPARC_RD_WIM_L3 (0xa7500000) | ||
50 | #define SPARC_NOP (0x01000000) | ||
51 | |||
52 | /* Various interesting trap levels. */ | ||
53 | /* First, hardware traps. */ | ||
54 | #define SP_TRAP_TFLT 0x1 /* Text fault */ | ||
55 | #define SP_TRAP_II 0x2 /* Illegal Instruction */ | ||
56 | #define SP_TRAP_PI 0x3 /* Privileged Instruction */ | ||
57 | #define SP_TRAP_FPD 0x4 /* Floating Point Disabled */ | ||
58 | #define SP_TRAP_WOVF 0x5 /* Window Overflow */ | ||
59 | #define SP_TRAP_WUNF 0x6 /* Window Underflow */ | ||
60 | #define SP_TRAP_MNA 0x7 /* Memory Address Unaligned */ | ||
61 | #define SP_TRAP_FPE 0x8 /* Floating Point Exception */ | ||
62 | #define SP_TRAP_DFLT 0x9 /* Data Fault */ | ||
63 | #define SP_TRAP_TOF 0xa /* Tag Overflow */ | ||
64 | #define SP_TRAP_WDOG 0xb /* Watchpoint Detected */ | ||
65 | #define SP_TRAP_IRQ1 0x11 /* IRQ level 1 */ | ||
66 | #define SP_TRAP_IRQ2 0x12 /* IRQ level 2 */ | ||
67 | #define SP_TRAP_IRQ3 0x13 /* IRQ level 3 */ | ||
68 | #define SP_TRAP_IRQ4 0x14 /* IRQ level 4 */ | ||
69 | #define SP_TRAP_IRQ5 0x15 /* IRQ level 5 */ | ||
70 | #define SP_TRAP_IRQ6 0x16 /* IRQ level 6 */ | ||
71 | #define SP_TRAP_IRQ7 0x17 /* IRQ level 7 */ | ||
72 | #define SP_TRAP_IRQ8 0x18 /* IRQ level 8 */ | ||
73 | #define SP_TRAP_IRQ9 0x19 /* IRQ level 9 */ | ||
74 | #define SP_TRAP_IRQ10 0x1a /* IRQ level 10 */ | ||
75 | #define SP_TRAP_IRQ11 0x1b /* IRQ level 11 */ | ||
76 | #define SP_TRAP_IRQ12 0x1c /* IRQ level 12 */ | ||
77 | #define SP_TRAP_IRQ13 0x1d /* IRQ level 13 */ | ||
78 | #define SP_TRAP_IRQ14 0x1e /* IRQ level 14 */ | ||
79 | #define SP_TRAP_IRQ15 0x1f /* IRQ level 15 Non-maskable */ | ||
80 | #define SP_TRAP_RACC 0x20 /* Register Access Error ??? */ | ||
81 | #define SP_TRAP_IACC 0x21 /* Instruction Access Error */ | ||
82 | #define SP_TRAP_CPDIS 0x24 /* Co-Processor Disabled */ | ||
83 | #define SP_TRAP_BADFL 0x25 /* Unimplemented Flush Instruction */ | ||
84 | #define SP_TRAP_CPEXP 0x28 /* Co-Processor Exception */ | ||
85 | #define SP_TRAP_DACC 0x29 /* Data Access Error */ | ||
86 | #define SP_TRAP_DIVZ 0x2a /* Divide By Zero */ | ||
87 | #define SP_TRAP_DSTORE 0x2b /* Data Store Error ??? */ | ||
88 | #define SP_TRAP_DMM 0x2c /* Data Access MMU Miss ??? */ | ||
89 | #define SP_TRAP_IMM 0x3c /* Instruction Access MMU Miss ??? */ | ||
90 | |||
91 | /* Now the Software Traps... */ | ||
92 | #define SP_TRAP_SUNOS 0x80 /* SunOS System Call */ | ||
93 | #define SP_TRAP_SBPT 0x81 /* Software Breakpoint */ | ||
94 | #define SP_TRAP_SDIVZ 0x82 /* Software Divide-by-Zero trap */ | ||
95 | #define SP_TRAP_FWIN 0x83 /* Flush Windows */ | ||
96 | #define SP_TRAP_CWIN 0x84 /* Clean Windows */ | ||
97 | #define SP_TRAP_RCHK 0x85 /* Range Check */ | ||
98 | #define SP_TRAP_FUNA 0x86 /* Fix Unaligned Access */ | ||
99 | #define SP_TRAP_IOWFL 0x87 /* Integer Overflow */ | ||
100 | #define SP_TRAP_SOLARIS 0x88 /* Solaris System Call */ | ||
101 | #define SP_TRAP_NETBSD 0x89 /* NetBSD System Call */ | ||
102 | #define SP_TRAP_LINUX 0x90 /* Linux System Call */ | ||
103 | |||
104 | /* Names used for compatibility with SunOS */ | ||
105 | #define ST_SYSCALL 0x00 | ||
106 | #define ST_BREAKPOINT 0x01 | ||
107 | #define ST_DIV0 0x02 | ||
108 | #define ST_FLUSH_WINDOWS 0x03 | ||
109 | #define ST_CLEAN_WINDOWS 0x04 | ||
110 | #define ST_RANGE_CHECK 0x05 | ||
111 | #define ST_FIX_ALIGN 0x06 | ||
112 | #define ST_INT_OVERFLOW 0x07 | ||
113 | |||
114 | /* Special traps... */ | ||
115 | #define SP_TRAP_KBPT1 0xfe /* KADB/PROM Breakpoint one */ | ||
116 | #define SP_TRAP_KBPT2 0xff /* KADB/PROM Breakpoint two */ | ||
117 | |||
118 | /* Handy Macros */ | ||
119 | /* Is this a trap we never expect to get? */ | ||
120 | #define BAD_TRAP_P(level) \ | ||
121 | ((level > SP_TRAP_WDOG && level < SP_TRAP_IRQ1) || \ | ||
122 | (level > SP_TRAP_IACC && level < SP_TRAP_CPDIS) || \ | ||
123 | (level > SP_TRAP_BADFL && level < SP_TRAP_CPEXP) || \ | ||
124 | (level > SP_TRAP_DMM && level < SP_TRAP_IMM) || \ | ||
125 | (level > SP_TRAP_IMM && level < SP_TRAP_SUNOS) || \ | ||
126 | (level > SP_TRAP_LINUX && level < SP_TRAP_KBPT1)) | ||
127 | |||
128 | /* Is this a Hardware trap? */ | ||
129 | #define HW_TRAP_P(level) ((level > 0) && (level < SP_TRAP_SUNOS)) | ||
130 | |||
131 | /* Is this a Software trap? */ | ||
132 | #define SW_TRAP_P(level) ((level >= SP_TRAP_SUNOS) && (level <= SP_TRAP_KBPT2)) | ||
133 | |||
134 | /* Is this a system call for some OS we know about? */ | ||
135 | #define SCALL_TRAP_P(level) ((level == SP_TRAP_SUNOS) || \ | ||
136 | (level == SP_TRAP_SOLARIS) || \ | ||
137 | (level == SP_TRAP_NETBSD) || \ | ||
138 | (level == SP_TRAP_LINUX)) | ||
139 | |||
140 | #endif /* !(_SPARC_TRAPS_H) */ | ||
diff --git a/include/asm-sparc/tsunami.h b/include/asm-sparc/tsunami.h deleted file mode 100644 index 5bbd1d523baa..000000000000 --- a/include/asm-sparc/tsunami.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* | ||
2 | * tsunami.h: Module specific definitions for Tsunami V8 Sparcs | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_TSUNAMI_H | ||
8 | #define _SPARC_TSUNAMI_H | ||
9 | |||
10 | #include <asm/asi.h> | ||
11 | |||
12 | /* The MMU control register on the Tsunami: | ||
13 | * | ||
14 | * ----------------------------------------------------------------------- | ||
15 | * | implvers |SW|AV|DV|MV| RSV |PC|ITD|ALC| RSV |PE| RC |IE|DE|RSV|NF|ME| | ||
16 | * ----------------------------------------------------------------------- | ||
17 | * 31 24 23 22 21 20 19-18 17 16 14 13-12 11 10-9 8 7 6-2 1 0 | ||
18 | * | ||
19 | * SW: Enable Software Table Walks 0=off 1=on | ||
20 | * AV: Address View bit | ||
21 | * DV: Data View bit | ||
22 | * MV: Memory View bit | ||
23 | * PC: Parity Control | ||
24 | * ITD: ITBR disable | ||
25 | * ALC: Alternate Cacheable | ||
26 | * PE: Parity Enable 0=off 1=on | ||
27 | * RC: Refresh Control | ||
28 | * IE: Instruction cache Enable 0=off 1=on | ||
29 | * DE: Data cache Enable 0=off 1=on | ||
30 | * NF: No Fault, same as all other SRMMUs | ||
31 | * ME: MMU Enable, same as all other SRMMUs | ||
32 | */ | ||
33 | |||
34 | #define TSUNAMI_SW 0x00800000 | ||
35 | #define TSUNAMI_AV 0x00400000 | ||
36 | #define TSUNAMI_DV 0x00200000 | ||
37 | #define TSUNAMI_MV 0x00100000 | ||
38 | #define TSUNAMI_PC 0x00020000 | ||
39 | #define TSUNAMI_ITD 0x00010000 | ||
40 | #define TSUNAMI_ALC 0x00008000 | ||
41 | #define TSUNAMI_PE 0x00001000 | ||
42 | #define TSUNAMI_RCMASK 0x00000C00 | ||
43 | #define TSUNAMI_IENAB 0x00000200 | ||
44 | #define TSUNAMI_DENAB 0x00000100 | ||
45 | #define TSUNAMI_NF 0x00000002 | ||
46 | #define TSUNAMI_ME 0x00000001 | ||
47 | |||
48 | static inline void tsunami_flush_icache(void) | ||
49 | { | ||
50 | __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" | ||
51 | : /* no outputs */ | ||
52 | : "i" (ASI_M_IC_FLCLEAR) | ||
53 | : "memory"); | ||
54 | } | ||
55 | |||
56 | static inline void tsunami_flush_dcache(void) | ||
57 | { | ||
58 | __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" | ||
59 | : /* no outputs */ | ||
60 | : "i" (ASI_M_DC_FLCLEAR) | ||
61 | : "memory"); | ||
62 | } | ||
63 | |||
64 | #endif /* !(_SPARC_TSUNAMI_H) */ | ||
diff --git a/include/asm-sparc/turbosparc.h b/include/asm-sparc/turbosparc.h deleted file mode 100644 index 17c73282db0a..000000000000 --- a/include/asm-sparc/turbosparc.h +++ /dev/null | |||
@@ -1,125 +0,0 @@ | |||
1 | /* | ||
2 | * turbosparc.h: Defines specific to the TurboSparc module. | ||
3 | * This is SRMMU stuff. | ||
4 | * | ||
5 | * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | ||
6 | */ | ||
7 | #ifndef _SPARC_TURBOSPARC_H | ||
8 | #define _SPARC_TURBOSPARC_H | ||
9 | |||
10 | #include <asm/asi.h> | ||
11 | #include <asm/pgtsrmmu.h> | ||
12 | |||
13 | /* Bits in the SRMMU control register for TurboSparc modules. | ||
14 | * | ||
15 | * ------------------------------------------------------------------- | ||
16 | * |impl-vers| RSV| PMC |PE|PC| RSV |BM| RFR |IC|DC|PSO|RSV|ICS|NF|ME| | ||
17 | * ------------------------------------------------------------------- | ||
18 | * 31 24 23-21 20-19 18 17 16-15 14 13-10 9 8 7 6-3 2 1 0 | ||
19 | * | ||
20 | * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode | ||
21 | * | ||
22 | * This indicates whether the TurboSparc is in boot-mode or not. | ||
23 | * | ||
24 | * IC: Instruction Cache -- 0 = off, 1 = on | ||
25 | * DC: Data Cache -- 0 = off, 1 = 0n | ||
26 | * | ||
27 | * These bits enable the on-cpu TurboSparc split I/D caches. | ||
28 | * | ||
29 | * ICS: ICache Snooping -- 0 = disable, 1 = enable snooping of icache | ||
30 | * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap | ||
31 | * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating | ||
32 | * | ||
33 | */ | ||
34 | |||
35 | #define TURBOSPARC_MMUENABLE 0x00000001 | ||
36 | #define TURBOSPARC_NOFAULT 0x00000002 | ||
37 | #define TURBOSPARC_ICSNOOP 0x00000004 | ||
38 | #define TURBOSPARC_PSO 0x00000080 | ||
39 | #define TURBOSPARC_DCENABLE 0x00000100 /* Enable data cache */ | ||
40 | #define TURBOSPARC_ICENABLE 0x00000200 /* Enable instruction cache */ | ||
41 | #define TURBOSPARC_BMODE 0x00004000 | ||
42 | #define TURBOSPARC_PARITYODD 0x00020000 /* Parity odd, if enabled */ | ||
43 | #define TURBOSPARC_PCENABLE 0x00040000 /* Enable parity checking */ | ||
44 | |||
45 | /* Bits in the CPU configuration register for TurboSparc modules. | ||
46 | * | ||
47 | * ------------------------------------------------------- | ||
48 | * |IOClk|SNP|AXClk| RAH | WS | RSV |SBC|WT|uS2|SE|SCC| | ||
49 | * ------------------------------------------------------- | ||
50 | * 31 30 29-28 27-26 25-23 22-8 7-6 5 4 3 2-0 | ||
51 | * | ||
52 | */ | ||
53 | |||
54 | #define TURBOSPARC_SCENABLE 0x00000008 /* Secondary cache enable */ | ||
55 | #define TURBOSPARC_uS2 0x00000010 /* Swift compatibility mode */ | ||
56 | #define TURBOSPARC_WTENABLE 0x00000020 /* Write thru for dcache */ | ||
57 | #define TURBOSPARC_SNENABLE 0x40000000 /* DVMA snoop enable */ | ||
58 | |||
59 | #ifndef __ASSEMBLY__ | ||
60 | |||
61 | /* Bits [13:5] select one of 512 instruction cache tags */ | ||
62 | static inline void turbosparc_inv_insn_tag(unsigned long addr) | ||
63 | { | ||
64 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
65 | : /* no outputs */ | ||
66 | : "r" (addr), "i" (ASI_M_TXTC_TAG) | ||
67 | : "memory"); | ||
68 | } | ||
69 | |||
70 | /* Bits [13:5] select one of 512 data cache tags */ | ||
71 | static inline void turbosparc_inv_data_tag(unsigned long addr) | ||
72 | { | ||
73 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
74 | : /* no outputs */ | ||
75 | : "r" (addr), "i" (ASI_M_DATAC_TAG) | ||
76 | : "memory"); | ||
77 | } | ||
78 | |||
79 | static inline void turbosparc_flush_icache(void) | ||
80 | { | ||
81 | unsigned long addr; | ||
82 | |||
83 | for (addr = 0; addr < 0x4000; addr += 0x20) | ||
84 | turbosparc_inv_insn_tag(addr); | ||
85 | } | ||
86 | |||
87 | static inline void turbosparc_flush_dcache(void) | ||
88 | { | ||
89 | unsigned long addr; | ||
90 | |||
91 | for (addr = 0; addr < 0x4000; addr += 0x20) | ||
92 | turbosparc_inv_data_tag(addr); | ||
93 | } | ||
94 | |||
95 | static inline void turbosparc_idflash_clear(void) | ||
96 | { | ||
97 | unsigned long addr; | ||
98 | |||
99 | for (addr = 0; addr < 0x4000; addr += 0x20) { | ||
100 | turbosparc_inv_insn_tag(addr); | ||
101 | turbosparc_inv_data_tag(addr); | ||
102 | } | ||
103 | } | ||
104 | |||
105 | static inline void turbosparc_set_ccreg(unsigned long regval) | ||
106 | { | ||
107 | __asm__ __volatile__("sta %0, [%1] %2\n\t" | ||
108 | : /* no outputs */ | ||
109 | : "r" (regval), "r" (0x600), "i" (ASI_M_MMUREGS) | ||
110 | : "memory"); | ||
111 | } | ||
112 | |||
113 | static inline unsigned long turbosparc_get_ccreg(void) | ||
114 | { | ||
115 | unsigned long regval; | ||
116 | |||
117 | __asm__ __volatile__("lda [%1] %2, %0\n\t" | ||
118 | : "=r" (regval) | ||
119 | : "r" (0x600), "i" (ASI_M_MMUREGS)); | ||
120 | return regval; | ||
121 | } | ||
122 | |||
123 | #endif /* !__ASSEMBLY__ */ | ||
124 | |||
125 | #endif /* !(_SPARC_TURBOSPARC_H) */ | ||
diff --git a/include/asm-sparc/types.h b/include/asm-sparc/types.h deleted file mode 100644 index 07734f942405..000000000000 --- a/include/asm-sparc/types.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | #ifndef _SPARC_TYPES_H | ||
2 | #define _SPARC_TYPES_H | ||
3 | |||
4 | /* | ||
5 | * This file is never included by application software unless | ||
6 | * explicitly requested (e.g., via linux/types.h) in which case the | ||
7 | * application is Linux specific so (user-) name space pollution is | ||
8 | * not a major issue. However, for interoperability, libraries still | ||
9 | * need to be careful to avoid a name clashes. | ||
10 | */ | ||
11 | #include <asm-generic/int-ll64.h> | ||
12 | |||
13 | #ifndef __ASSEMBLY__ | ||
14 | |||
15 | typedef unsigned short umode_t; | ||
16 | |||
17 | #endif /* __ASSEMBLY__ */ | ||
18 | |||
19 | #ifdef __KERNEL__ | ||
20 | |||
21 | #define BITS_PER_LONG 32 | ||
22 | |||
23 | #ifndef __ASSEMBLY__ | ||
24 | |||
25 | typedef u32 dma_addr_t; | ||
26 | typedef u32 dma64_addr_t; | ||
27 | |||
28 | #endif /* __ASSEMBLY__ */ | ||
29 | |||
30 | #endif /* __KERNEL__ */ | ||
31 | |||
32 | #endif /* defined(_SPARC_TYPES_H) */ | ||
diff --git a/include/asm-sparc/uaccess.h b/include/asm-sparc/uaccess.h deleted file mode 100644 index 47d5619d43fa..000000000000 --- a/include/asm-sparc/uaccess.h +++ /dev/null | |||
@@ -1,336 +0,0 @@ | |||
1 | /* | ||
2 | * uaccess.h: User space memore access functions. | ||
3 | * | ||
4 | * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) | ||
5 | * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | ||
6 | */ | ||
7 | #ifndef _ASM_UACCESS_H | ||
8 | #define _ASM_UACCESS_H | ||
9 | |||
10 | #ifdef __KERNEL__ | ||
11 | #include <linux/compiler.h> | ||
12 | #include <linux/sched.h> | ||
13 | #include <linux/string.h> | ||
14 | #include <linux/errno.h> | ||
15 | #include <asm/vac-ops.h> | ||
16 | #endif | ||
17 | |||
18 | #ifndef __ASSEMBLY__ | ||
19 | |||
20 | /* Sparc is not segmented, however we need to be able to fool access_ok() | ||
21 | * when doing system calls from kernel mode legitimately. | ||
22 | * | ||
23 | * "For historical reasons, these macros are grossly misnamed." -Linus | ||
24 | */ | ||
25 | |||
26 | #define KERNEL_DS ((mm_segment_t) { 0 }) | ||
27 | #define USER_DS ((mm_segment_t) { -1 }) | ||
28 | |||
29 | #define VERIFY_READ 0 | ||
30 | #define VERIFY_WRITE 1 | ||
31 | |||
32 | #define get_ds() (KERNEL_DS) | ||
33 | #define get_fs() (current->thread.current_ds) | ||
34 | #define set_fs(val) ((current->thread.current_ds) = (val)) | ||
35 | |||
36 | #define segment_eq(a,b) ((a).seg == (b).seg) | ||
37 | |||
38 | /* We have there a nice not-mapped page at PAGE_OFFSET - PAGE_SIZE, so that this test | ||
39 | * can be fairly lightweight. | ||
40 | * No one can read/write anything from userland in the kernel space by setting | ||
41 | * large size and address near to PAGE_OFFSET - a fault will break his intentions. | ||
42 | */ | ||
43 | #define __user_ok(addr, size) ({ (void)(size); (addr) < STACK_TOP; }) | ||
44 | #define __kernel_ok (segment_eq(get_fs(), KERNEL_DS)) | ||
45 | #define __access_ok(addr,size) (__user_ok((addr) & get_fs().seg,(size))) | ||
46 | #define access_ok(type, addr, size) \ | ||
47 | ({ (void)(type); __access_ok((unsigned long)(addr), size); }) | ||
48 | |||
49 | /* | ||
50 | * The exception table consists of pairs of addresses: the first is the | ||
51 | * address of an instruction that is allowed to fault, and the second is | ||
52 | * the address at which the program should continue. No registers are | ||
53 | * modified, so it is entirely up to the continuation code to figure out | ||
54 | * what to do. | ||
55 | * | ||
56 | * All the routines below use bits of fixup code that are out of line | ||
57 | * with the main instruction path. This means when everything is well, | ||
58 | * we don't even have to jump over them. Further, they do not intrude | ||
59 | * on our cache or tlb entries. | ||
60 | * | ||
61 | * There is a special way how to put a range of potentially faulting | ||
62 | * insns (like twenty ldd/std's with now intervening other instructions) | ||
63 | * You specify address of first in insn and 0 in fixup and in the next | ||
64 | * exception_table_entry you specify last potentially faulting insn + 1 | ||
65 | * and in fixup the routine which should handle the fault. | ||
66 | * That fixup code will get | ||
67 | * (faulting_insn_address - first_insn_in_the_range_address)/4 | ||
68 | * in %g2 (ie. index of the faulting instruction in the range). | ||
69 | */ | ||
70 | |||
71 | struct exception_table_entry | ||
72 | { | ||
73 | unsigned long insn, fixup; | ||
74 | }; | ||
75 | |||
76 | /* Returns 0 if exception not found and fixup otherwise. */ | ||
77 | extern unsigned long search_extables_range(unsigned long addr, unsigned long *g2); | ||
78 | |||
79 | extern void __ret_efault(void); | ||
80 | |||
81 | /* Uh, these should become the main single-value transfer routines.. | ||
82 | * They automatically use the right size if we just have the right | ||
83 | * pointer type.. | ||
84 | * | ||
85 | * This gets kind of ugly. We want to return _two_ values in "get_user()" | ||
86 | * and yet we don't want to do any pointers, because that is too much | ||
87 | * of a performance impact. Thus we have a few rather ugly macros here, | ||
88 | * and hide all the ugliness from the user. | ||
89 | */ | ||
90 | #define put_user(x,ptr) ({ \ | ||
91 | unsigned long __pu_addr = (unsigned long)(ptr); \ | ||
92 | __chk_user_ptr(ptr); \ | ||
93 | __put_user_check((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); }) | ||
94 | |||
95 | #define get_user(x,ptr) ({ \ | ||
96 | unsigned long __gu_addr = (unsigned long)(ptr); \ | ||
97 | __chk_user_ptr(ptr); \ | ||
98 | __get_user_check((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); }) | ||
99 | |||
100 | /* | ||
101 | * The "__xxx" versions do not do address space checking, useful when | ||
102 | * doing multiple accesses to the same area (the user has to do the | ||
103 | * checks by hand with "access_ok()") | ||
104 | */ | ||
105 | #define __put_user(x,ptr) __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) | ||
106 | #define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr)),__typeof__(*(ptr))) | ||
107 | |||
108 | struct __large_struct { unsigned long buf[100]; }; | ||
109 | #define __m(x) ((struct __large_struct __user *)(x)) | ||
110 | |||
111 | #define __put_user_check(x,addr,size) ({ \ | ||
112 | register int __pu_ret; \ | ||
113 | if (__access_ok(addr,size)) { \ | ||
114 | switch (size) { \ | ||
115 | case 1: __put_user_asm(x,b,addr,__pu_ret); break; \ | ||
116 | case 2: __put_user_asm(x,h,addr,__pu_ret); break; \ | ||
117 | case 4: __put_user_asm(x,,addr,__pu_ret); break; \ | ||
118 | case 8: __put_user_asm(x,d,addr,__pu_ret); break; \ | ||
119 | default: __pu_ret = __put_user_bad(); break; \ | ||
120 | } } else { __pu_ret = -EFAULT; } __pu_ret; }) | ||
121 | |||
122 | #define __put_user_nocheck(x,addr,size) ({ \ | ||
123 | register int __pu_ret; \ | ||
124 | switch (size) { \ | ||
125 | case 1: __put_user_asm(x,b,addr,__pu_ret); break; \ | ||
126 | case 2: __put_user_asm(x,h,addr,__pu_ret); break; \ | ||
127 | case 4: __put_user_asm(x,,addr,__pu_ret); break; \ | ||
128 | case 8: __put_user_asm(x,d,addr,__pu_ret); break; \ | ||
129 | default: __pu_ret = __put_user_bad(); break; \ | ||
130 | } __pu_ret; }) | ||
131 | |||
132 | #define __put_user_asm(x,size,addr,ret) \ | ||
133 | __asm__ __volatile__( \ | ||
134 | "/* Put user asm, inline. */\n" \ | ||
135 | "1:\t" "st"#size " %1, %2\n\t" \ | ||
136 | "clr %0\n" \ | ||
137 | "2:\n\n\t" \ | ||
138 | ".section .fixup,#alloc,#execinstr\n\t" \ | ||
139 | ".align 4\n" \ | ||
140 | "3:\n\t" \ | ||
141 | "b 2b\n\t" \ | ||
142 | " mov %3, %0\n\t" \ | ||
143 | ".previous\n\n\t" \ | ||
144 | ".section __ex_table,#alloc\n\t" \ | ||
145 | ".align 4\n\t" \ | ||
146 | ".word 1b, 3b\n\t" \ | ||
147 | ".previous\n\n\t" \ | ||
148 | : "=&r" (ret) : "r" (x), "m" (*__m(addr)), \ | ||
149 | "i" (-EFAULT)) | ||
150 | |||
151 | extern int __put_user_bad(void); | ||
152 | |||
153 | #define __get_user_check(x,addr,size,type) ({ \ | ||
154 | register int __gu_ret; \ | ||
155 | register unsigned long __gu_val; \ | ||
156 | if (__access_ok(addr,size)) { \ | ||
157 | switch (size) { \ | ||
158 | case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ | ||
159 | case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ | ||
160 | case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \ | ||
161 | case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \ | ||
162 | default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ | ||
163 | } } else { __gu_val = 0; __gu_ret = -EFAULT; } x = (type) __gu_val; __gu_ret; }) | ||
164 | |||
165 | #define __get_user_check_ret(x,addr,size,type,retval) ({ \ | ||
166 | register unsigned long __gu_val __asm__ ("l1"); \ | ||
167 | if (__access_ok(addr,size)) { \ | ||
168 | switch (size) { \ | ||
169 | case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ | ||
170 | case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ | ||
171 | case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \ | ||
172 | case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \ | ||
173 | default: if (__get_user_bad()) return retval; \ | ||
174 | } x = (type) __gu_val; } else return retval; }) | ||
175 | |||
176 | #define __get_user_nocheck(x,addr,size,type) ({ \ | ||
177 | register int __gu_ret; \ | ||
178 | register unsigned long __gu_val; \ | ||
179 | switch (size) { \ | ||
180 | case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ | ||
181 | case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ | ||
182 | case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \ | ||
183 | case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \ | ||
184 | default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ | ||
185 | } x = (type) __gu_val; __gu_ret; }) | ||
186 | |||
187 | #define __get_user_nocheck_ret(x,addr,size,type,retval) ({ \ | ||
188 | register unsigned long __gu_val __asm__ ("l1"); \ | ||
189 | switch (size) { \ | ||
190 | case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ | ||
191 | case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ | ||
192 | case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \ | ||
193 | case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \ | ||
194 | default: if (__get_user_bad()) return retval; \ | ||
195 | } x = (type) __gu_val; }) | ||
196 | |||
197 | #define __get_user_asm(x,size,addr,ret) \ | ||
198 | __asm__ __volatile__( \ | ||
199 | "/* Get user asm, inline. */\n" \ | ||
200 | "1:\t" "ld"#size " %2, %1\n\t" \ | ||
201 | "clr %0\n" \ | ||
202 | "2:\n\n\t" \ | ||
203 | ".section .fixup,#alloc,#execinstr\n\t" \ | ||
204 | ".align 4\n" \ | ||
205 | "3:\n\t" \ | ||
206 | "clr %1\n\t" \ | ||
207 | "b 2b\n\t" \ | ||
208 | " mov %3, %0\n\n\t" \ | ||
209 | ".previous\n\t" \ | ||
210 | ".section __ex_table,#alloc\n\t" \ | ||
211 | ".align 4\n\t" \ | ||
212 | ".word 1b, 3b\n\n\t" \ | ||
213 | ".previous\n\t" \ | ||
214 | : "=&r" (ret), "=&r" (x) : "m" (*__m(addr)), \ | ||
215 | "i" (-EFAULT)) | ||
216 | |||
217 | #define __get_user_asm_ret(x,size,addr,retval) \ | ||
218 | if (__builtin_constant_p(retval) && retval == -EFAULT) \ | ||
219 | __asm__ __volatile__( \ | ||
220 | "/* Get user asm ret, inline. */\n" \ | ||
221 | "1:\t" "ld"#size " %1, %0\n\n\t" \ | ||
222 | ".section __ex_table,#alloc\n\t" \ | ||
223 | ".align 4\n\t" \ | ||
224 | ".word 1b,__ret_efault\n\n\t" \ | ||
225 | ".previous\n\t" \ | ||
226 | : "=&r" (x) : "m" (*__m(addr))); \ | ||
227 | else \ | ||
228 | __asm__ __volatile__( \ | ||
229 | "/* Get user asm ret, inline. */\n" \ | ||
230 | "1:\t" "ld"#size " %1, %0\n\n\t" \ | ||
231 | ".section .fixup,#alloc,#execinstr\n\t" \ | ||
232 | ".align 4\n" \ | ||
233 | "3:\n\t" \ | ||
234 | "ret\n\t" \ | ||
235 | " restore %%g0, %2, %%o0\n\n\t" \ | ||
236 | ".previous\n\t" \ | ||
237 | ".section __ex_table,#alloc\n\t" \ | ||
238 | ".align 4\n\t" \ | ||
239 | ".word 1b, 3b\n\n\t" \ | ||
240 | ".previous\n\t" \ | ||
241 | : "=&r" (x) : "m" (*__m(addr)), "i" (retval)) | ||
242 | |||
243 | extern int __get_user_bad(void); | ||
244 | |||
245 | extern unsigned long __copy_user(void __user *to, const void __user *from, unsigned long size); | ||
246 | |||
247 | static inline unsigned long copy_to_user(void __user *to, const void *from, unsigned long n) | ||
248 | { | ||
249 | if (n && __access_ok((unsigned long) to, n)) | ||
250 | return __copy_user(to, (__force void __user *) from, n); | ||
251 | else | ||
252 | return n; | ||
253 | } | ||
254 | |||
255 | static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n) | ||
256 | { | ||
257 | return __copy_user(to, (__force void __user *) from, n); | ||
258 | } | ||
259 | |||
260 | static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n) | ||
261 | { | ||
262 | if (n && __access_ok((unsigned long) from, n)) | ||
263 | return __copy_user((__force void __user *) to, from, n); | ||
264 | else | ||
265 | return n; | ||
266 | } | ||
267 | |||
268 | static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n) | ||
269 | { | ||
270 | return __copy_user((__force void __user *) to, from, n); | ||
271 | } | ||
272 | |||
273 | #define __copy_to_user_inatomic __copy_to_user | ||
274 | #define __copy_from_user_inatomic __copy_from_user | ||
275 | |||
276 | static inline unsigned long __clear_user(void __user *addr, unsigned long size) | ||
277 | { | ||
278 | unsigned long ret; | ||
279 | |||
280 | __asm__ __volatile__ ( | ||
281 | ".section __ex_table,#alloc\n\t" | ||
282 | ".align 4\n\t" | ||
283 | ".word 1f,3\n\t" | ||
284 | ".previous\n\t" | ||
285 | "mov %2, %%o1\n" | ||
286 | "1:\n\t" | ||
287 | "call __bzero\n\t" | ||
288 | " mov %1, %%o0\n\t" | ||
289 | "mov %%o0, %0\n" | ||
290 | : "=r" (ret) : "r" (addr), "r" (size) : | ||
291 | "o0", "o1", "o2", "o3", "o4", "o5", "o7", | ||
292 | "g1", "g2", "g3", "g4", "g5", "g7", "cc"); | ||
293 | |||
294 | return ret; | ||
295 | } | ||
296 | |||
297 | static inline unsigned long clear_user(void __user *addr, unsigned long n) | ||
298 | { | ||
299 | if (n && __access_ok((unsigned long) addr, n)) | ||
300 | return __clear_user(addr, n); | ||
301 | else | ||
302 | return n; | ||
303 | } | ||
304 | |||
305 | extern long __strncpy_from_user(char *dest, const char __user *src, long count); | ||
306 | |||
307 | static inline long strncpy_from_user(char *dest, const char __user *src, long count) | ||
308 | { | ||
309 | if (__access_ok((unsigned long) src, count)) | ||
310 | return __strncpy_from_user(dest, src, count); | ||
311 | else | ||
312 | return -EFAULT; | ||
313 | } | ||
314 | |||
315 | extern long __strlen_user(const char __user *); | ||
316 | extern long __strnlen_user(const char __user *, long len); | ||
317 | |||
318 | static inline long strlen_user(const char __user *str) | ||
319 | { | ||
320 | if (!access_ok(VERIFY_READ, str, 0)) | ||
321 | return 0; | ||
322 | else | ||
323 | return __strlen_user(str); | ||
324 | } | ||
325 | |||
326 | static inline long strnlen_user(const char __user *str, long len) | ||
327 | { | ||
328 | if (!access_ok(VERIFY_READ, str, 0)) | ||
329 | return 0; | ||
330 | else | ||
331 | return __strnlen_user(str, len); | ||
332 | } | ||
333 | |||
334 | #endif /* __ASSEMBLY__ */ | ||
335 | |||
336 | #endif /* _ASM_UACCESS_H */ | ||
diff --git a/include/asm-sparc/unaligned.h b/include/asm-sparc/unaligned.h deleted file mode 100644 index 11d2d5fb5902..000000000000 --- a/include/asm-sparc/unaligned.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef _ASM_SPARC_UNALIGNED_H | ||
2 | #define _ASM_SPARC_UNALIGNED_H | ||
3 | |||
4 | #include <linux/unaligned/be_struct.h> | ||
5 | #include <linux/unaligned/le_byteshift.h> | ||
6 | #include <linux/unaligned/generic.h> | ||
7 | #define get_unaligned __get_unaligned_be | ||
8 | #define put_unaligned __put_unaligned_be | ||
9 | |||
10 | #endif /* _ASM_SPARC_UNALIGNED_H */ | ||
diff --git a/include/asm-sparc/unistd.h b/include/asm-sparc/unistd.h deleted file mode 100644 index 2338a0276377..000000000000 --- a/include/asm-sparc/unistd.h +++ /dev/null | |||
@@ -1,378 +0,0 @@ | |||
1 | #ifndef _SPARC_UNISTD_H | ||
2 | #define _SPARC_UNISTD_H | ||
3 | |||
4 | /* | ||
5 | * System calls under the Sparc. | ||
6 | * | ||
7 | * Don't be scared by the ugly clobbers, it is the only way I can | ||
8 | * think of right now to force the arguments into fixed registers | ||
9 | * before the trap into the system call with gcc 'asm' statements. | ||
10 | * | ||
11 | * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) | ||
12 | * | ||
13 | * SunOS compatibility based upon preliminary work which is: | ||
14 | * | ||
15 | * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) | ||
16 | */ | ||
17 | |||
18 | #define __NR_restart_syscall 0 /* Linux Specific */ | ||
19 | #define __NR_exit 1 /* Common */ | ||
20 | #define __NR_fork 2 /* Common */ | ||
21 | #define __NR_read 3 /* Common */ | ||
22 | #define __NR_write 4 /* Common */ | ||
23 | #define __NR_open 5 /* Common */ | ||
24 | #define __NR_close 6 /* Common */ | ||
25 | #define __NR_wait4 7 /* Common */ | ||
26 | #define __NR_creat 8 /* Common */ | ||
27 | #define __NR_link 9 /* Common */ | ||
28 | #define __NR_unlink 10 /* Common */ | ||
29 | #define __NR_execv 11 /* SunOS Specific */ | ||
30 | #define __NR_chdir 12 /* Common */ | ||
31 | #define __NR_chown 13 /* Common */ | ||
32 | #define __NR_mknod 14 /* Common */ | ||
33 | #define __NR_chmod 15 /* Common */ | ||
34 | #define __NR_lchown 16 /* Common */ | ||
35 | #define __NR_brk 17 /* Common */ | ||
36 | #define __NR_perfctr 18 /* Performance counter operations */ | ||
37 | #define __NR_lseek 19 /* Common */ | ||
38 | #define __NR_getpid 20 /* Common */ | ||
39 | #define __NR_capget 21 /* Linux Specific */ | ||
40 | #define __NR_capset 22 /* Linux Specific */ | ||
41 | #define __NR_setuid 23 /* Implemented via setreuid in SunOS */ | ||
42 | #define __NR_getuid 24 /* Common */ | ||
43 | #define __NR_vmsplice 25 /* ENOSYS under SunOS */ | ||
44 | #define __NR_ptrace 26 /* Common */ | ||
45 | #define __NR_alarm 27 /* Implemented via setitimer in SunOS */ | ||
46 | #define __NR_sigaltstack 28 /* Common */ | ||
47 | #define __NR_pause 29 /* Is sigblock(0)->sigpause() in SunOS */ | ||
48 | #define __NR_utime 30 /* Implemented via utimes() under SunOS */ | ||
49 | #define __NR_lchown32 31 /* Linux sparc32 specific */ | ||
50 | #define __NR_fchown32 32 /* Linux sparc32 specific */ | ||
51 | #define __NR_access 33 /* Common */ | ||
52 | #define __NR_nice 34 /* Implemented via get/setpriority() in SunOS */ | ||
53 | #define __NR_chown32 35 /* Linux sparc32 specific */ | ||
54 | #define __NR_sync 36 /* Common */ | ||
55 | #define __NR_kill 37 /* Common */ | ||
56 | #define __NR_stat 38 /* Common */ | ||
57 | #define __NR_sendfile 39 /* Linux Specific */ | ||
58 | #define __NR_lstat 40 /* Common */ | ||
59 | #define __NR_dup 41 /* Common */ | ||
60 | #define __NR_pipe 42 /* Common */ | ||
61 | #define __NR_times 43 /* Implemented via getrusage() in SunOS */ | ||
62 | #define __NR_getuid32 44 /* Linux sparc32 specific */ | ||
63 | #define __NR_umount2 45 /* Linux Specific */ | ||
64 | #define __NR_setgid 46 /* Implemented via setregid() in SunOS */ | ||
65 | #define __NR_getgid 47 /* Common */ | ||
66 | #define __NR_signal 48 /* Implemented via sigvec() in SunOS */ | ||
67 | #define __NR_geteuid 49 /* SunOS calls getuid() */ | ||
68 | #define __NR_getegid 50 /* SunOS calls getgid() */ | ||
69 | #define __NR_acct 51 /* Common */ | ||
70 | /* #define __NR_memory_ordering 52 Linux sparc64 specific */ | ||
71 | #define __NR_getgid32 53 /* Linux sparc32 specific */ | ||
72 | #define __NR_ioctl 54 /* Common */ | ||
73 | #define __NR_reboot 55 /* Common */ | ||
74 | #define __NR_mmap2 56 /* Linux sparc32 Specific */ | ||
75 | #define __NR_symlink 57 /* Common */ | ||
76 | #define __NR_readlink 58 /* Common */ | ||
77 | #define __NR_execve 59 /* Common */ | ||
78 | #define __NR_umask 60 /* Common */ | ||
79 | #define __NR_chroot 61 /* Common */ | ||
80 | #define __NR_fstat 62 /* Common */ | ||
81 | #define __NR_fstat64 63 /* Linux Specific */ | ||
82 | #define __NR_getpagesize 64 /* Common */ | ||
83 | #define __NR_msync 65 /* Common in newer 1.3.x revs... */ | ||
84 | #define __NR_vfork 66 /* Common */ | ||
85 | #define __NR_pread64 67 /* Linux Specific */ | ||
86 | #define __NR_pwrite64 68 /* Linux Specific */ | ||
87 | #define __NR_geteuid32 69 /* Linux sparc32, sbrk under SunOS */ | ||
88 | #define __NR_getegid32 70 /* Linux sparc32, sstk under SunOS */ | ||
89 | #define __NR_mmap 71 /* Common */ | ||
90 | #define __NR_setreuid32 72 /* Linux sparc32, vadvise under SunOS */ | ||
91 | #define __NR_munmap 73 /* Common */ | ||
92 | #define __NR_mprotect 74 /* Common */ | ||
93 | #define __NR_madvise 75 /* Common */ | ||
94 | #define __NR_vhangup 76 /* Common */ | ||
95 | #define __NR_truncate64 77 /* Linux sparc32 Specific */ | ||
96 | #define __NR_mincore 78 /* Common */ | ||
97 | #define __NR_getgroups 79 /* Common */ | ||
98 | #define __NR_setgroups 80 /* Common */ | ||
99 | #define __NR_getpgrp 81 /* Common */ | ||
100 | #define __NR_setgroups32 82 /* Linux sparc32, setpgrp under SunOS */ | ||
101 | #define __NR_setitimer 83 /* Common */ | ||
102 | #define __NR_ftruncate64 84 /* Linux sparc32 Specific */ | ||
103 | #define __NR_swapon 85 /* Common */ | ||
104 | #define __NR_getitimer 86 /* Common */ | ||
105 | #define __NR_setuid32 87 /* Linux sparc32, gethostname under SunOS */ | ||
106 | #define __NR_sethostname 88 /* Common */ | ||
107 | #define __NR_setgid32 89 /* Linux sparc32, getdtablesize under SunOS */ | ||
108 | #define __NR_dup2 90 /* Common */ | ||
109 | #define __NR_setfsuid32 91 /* Linux sparc32, getdopt under SunOS */ | ||
110 | #define __NR_fcntl 92 /* Common */ | ||
111 | #define __NR_select 93 /* Common */ | ||
112 | #define __NR_setfsgid32 94 /* Linux sparc32, setdopt under SunOS */ | ||
113 | #define __NR_fsync 95 /* Common */ | ||
114 | #define __NR_setpriority 96 /* Common */ | ||
115 | #define __NR_socket 97 /* Common */ | ||
116 | #define __NR_connect 98 /* Common */ | ||
117 | #define __NR_accept 99 /* Common */ | ||
118 | #define __NR_getpriority 100 /* Common */ | ||
119 | #define __NR_rt_sigreturn 101 /* Linux Specific */ | ||
120 | #define __NR_rt_sigaction 102 /* Linux Specific */ | ||
121 | #define __NR_rt_sigprocmask 103 /* Linux Specific */ | ||
122 | #define __NR_rt_sigpending 104 /* Linux Specific */ | ||
123 | #define __NR_rt_sigtimedwait 105 /* Linux Specific */ | ||
124 | #define __NR_rt_sigqueueinfo 106 /* Linux Specific */ | ||
125 | #define __NR_rt_sigsuspend 107 /* Linux Specific */ | ||
126 | #define __NR_setresuid32 108 /* Linux Specific, sigvec under SunOS */ | ||
127 | #define __NR_getresuid32 109 /* Linux Specific, sigblock under SunOS */ | ||
128 | #define __NR_setresgid32 110 /* Linux Specific, sigsetmask under SunOS */ | ||
129 | #define __NR_getresgid32 111 /* Linux Specific, sigpause under SunOS */ | ||
130 | #define __NR_setregid32 112 /* Linux sparc32, sigstack under SunOS */ | ||
131 | #define __NR_recvmsg 113 /* Common */ | ||
132 | #define __NR_sendmsg 114 /* Common */ | ||
133 | #define __NR_getgroups32 115 /* Linux sparc32, vtrace under SunOS */ | ||
134 | #define __NR_gettimeofday 116 /* Common */ | ||
135 | #define __NR_getrusage 117 /* Common */ | ||
136 | #define __NR_getsockopt 118 /* Common */ | ||
137 | #define __NR_getcwd 119 /* Linux Specific */ | ||
138 | #define __NR_readv 120 /* Common */ | ||
139 | #define __NR_writev 121 /* Common */ | ||
140 | #define __NR_settimeofday 122 /* Common */ | ||
141 | #define __NR_fchown 123 /* Common */ | ||
142 | #define __NR_fchmod 124 /* Common */ | ||
143 | #define __NR_recvfrom 125 /* Common */ | ||
144 | #define __NR_setreuid 126 /* Common */ | ||
145 | #define __NR_setregid 127 /* Common */ | ||
146 | #define __NR_rename 128 /* Common */ | ||
147 | #define __NR_truncate 129 /* Common */ | ||
148 | #define __NR_ftruncate 130 /* Common */ | ||
149 | #define __NR_flock 131 /* Common */ | ||
150 | #define __NR_lstat64 132 /* Linux Specific */ | ||
151 | #define __NR_sendto 133 /* Common */ | ||
152 | #define __NR_shutdown 134 /* Common */ | ||
153 | #define __NR_socketpair 135 /* Common */ | ||
154 | #define __NR_mkdir 136 /* Common */ | ||
155 | #define __NR_rmdir 137 /* Common */ | ||
156 | #define __NR_utimes 138 /* SunOS Specific */ | ||
157 | #define __NR_stat64 139 /* Linux Specific */ | ||
158 | #define __NR_sendfile64 140 /* adjtime under SunOS */ | ||
159 | #define __NR_getpeername 141 /* Common */ | ||
160 | #define __NR_futex 142 /* gethostid under SunOS */ | ||
161 | #define __NR_gettid 143 /* ENOSYS under SunOS */ | ||
162 | #define __NR_getrlimit 144 /* Common */ | ||
163 | #define __NR_setrlimit 145 /* Common */ | ||
164 | #define __NR_pivot_root 146 /* Linux Specific, killpg under SunOS */ | ||
165 | #define __NR_prctl 147 /* ENOSYS under SunOS */ | ||
166 | #define __NR_pciconfig_read 148 /* ENOSYS under SunOS */ | ||
167 | #define __NR_pciconfig_write 149 /* ENOSYS under SunOS */ | ||
168 | #define __NR_getsockname 150 /* Common */ | ||
169 | #define __NR_inotify_init 151 /* Linux specific */ | ||
170 | #define __NR_inotify_add_watch 152 /* Linux specific */ | ||
171 | #define __NR_poll 153 /* Common */ | ||
172 | #define __NR_getdents64 154 /* Linux specific */ | ||
173 | #define __NR_fcntl64 155 /* Linux sparc32 Specific */ | ||
174 | #define __NR_inotify_rm_watch 156 /* Linux specific */ | ||
175 | #define __NR_statfs 157 /* Common */ | ||
176 | #define __NR_fstatfs 158 /* Common */ | ||
177 | #define __NR_umount 159 /* Common */ | ||
178 | #define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS */ | ||
179 | #define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS */ | ||
180 | #define __NR_getdomainname 162 /* SunOS Specific */ | ||
181 | #define __NR_setdomainname 163 /* Common */ | ||
182 | /* #define __NR_utrap_install 164 Linux sparc64 specific */ | ||
183 | #define __NR_quotactl 165 /* Common */ | ||
184 | #define __NR_set_tid_address 166 /* Linux specific, exportfs under SunOS */ | ||
185 | #define __NR_mount 167 /* Common */ | ||
186 | #define __NR_ustat 168 /* Common */ | ||
187 | #define __NR_setxattr 169 /* SunOS: semsys */ | ||
188 | #define __NR_lsetxattr 170 /* SunOS: msgsys */ | ||
189 | #define __NR_fsetxattr 171 /* SunOS: shmsys */ | ||
190 | #define __NR_getxattr 172 /* SunOS: auditsys */ | ||
191 | #define __NR_lgetxattr 173 /* SunOS: rfssys */ | ||
192 | #define __NR_getdents 174 /* Common */ | ||
193 | #define __NR_setsid 175 /* Common */ | ||
194 | #define __NR_fchdir 176 /* Common */ | ||
195 | #define __NR_fgetxattr 177 /* SunOS: fchroot */ | ||
196 | #define __NR_listxattr 178 /* SunOS: vpixsys */ | ||
197 | #define __NR_llistxattr 179 /* SunOS: aioread */ | ||
198 | #define __NR_flistxattr 180 /* SunOS: aiowrite */ | ||
199 | #define __NR_removexattr 181 /* SunOS: aiowait */ | ||
200 | #define __NR_lremovexattr 182 /* SunOS: aiocancel */ | ||
201 | #define __NR_sigpending 183 /* Common */ | ||
202 | #define __NR_query_module 184 /* Linux Specific */ | ||
203 | #define __NR_setpgid 185 /* Common */ | ||
204 | #define __NR_fremovexattr 186 /* SunOS: pathconf */ | ||
205 | #define __NR_tkill 187 /* SunOS: fpathconf */ | ||
206 | #define __NR_exit_group 188 /* Linux specific, sysconf undef SunOS */ | ||
207 | #define __NR_uname 189 /* Linux Specific */ | ||
208 | #define __NR_init_module 190 /* Linux Specific */ | ||
209 | #define __NR_personality 191 /* Linux Specific */ | ||
210 | #define __NR_remap_file_pages 192 /* Linux Specific */ | ||
211 | #define __NR_epoll_create 193 /* Linux Specific */ | ||
212 | #define __NR_epoll_ctl 194 /* Linux Specific */ | ||
213 | #define __NR_epoll_wait 195 /* Linux Specific */ | ||
214 | #define __NR_ioprio_set 196 /* Linux Specific */ | ||
215 | #define __NR_getppid 197 /* Linux Specific */ | ||
216 | #define __NR_sigaction 198 /* Linux Specific */ | ||
217 | #define __NR_sgetmask 199 /* Linux Specific */ | ||
218 | #define __NR_ssetmask 200 /* Linux Specific */ | ||
219 | #define __NR_sigsuspend 201 /* Linux Specific */ | ||
220 | #define __NR_oldlstat 202 /* Linux Specific */ | ||
221 | #define __NR_uselib 203 /* Linux Specific */ | ||
222 | #define __NR_readdir 204 /* Linux Specific */ | ||
223 | #define __NR_readahead 205 /* Linux Specific */ | ||
224 | #define __NR_socketcall 206 /* Linux Specific */ | ||
225 | #define __NR_syslog 207 /* Linux Specific */ | ||
226 | #define __NR_lookup_dcookie 208 /* Linux Specific */ | ||
227 | #define __NR_fadvise64 209 /* Linux Specific */ | ||
228 | #define __NR_fadvise64_64 210 /* Linux Specific */ | ||
229 | #define __NR_tgkill 211 /* Linux Specific */ | ||
230 | #define __NR_waitpid 212 /* Linux Specific */ | ||
231 | #define __NR_swapoff 213 /* Linux Specific */ | ||
232 | #define __NR_sysinfo 214 /* Linux Specific */ | ||
233 | #define __NR_ipc 215 /* Linux Specific */ | ||
234 | #define __NR_sigreturn 216 /* Linux Specific */ | ||
235 | #define __NR_clone 217 /* Linux Specific */ | ||
236 | #define __NR_ioprio_get 218 /* Linux Specific */ | ||
237 | #define __NR_adjtimex 219 /* Linux Specific */ | ||
238 | #define __NR_sigprocmask 220 /* Linux Specific */ | ||
239 | #define __NR_create_module 221 /* Linux Specific */ | ||
240 | #define __NR_delete_module 222 /* Linux Specific */ | ||
241 | #define __NR_get_kernel_syms 223 /* Linux Specific */ | ||
242 | #define __NR_getpgid 224 /* Linux Specific */ | ||
243 | #define __NR_bdflush 225 /* Linux Specific */ | ||
244 | #define __NR_sysfs 226 /* Linux Specific */ | ||
245 | #define __NR_afs_syscall 227 /* Linux Specific */ | ||
246 | #define __NR_setfsuid 228 /* Linux Specific */ | ||
247 | #define __NR_setfsgid 229 /* Linux Specific */ | ||
248 | #define __NR__newselect 230 /* Linux Specific */ | ||
249 | #define __NR_time 231 /* Linux Specific */ | ||
250 | #define __NR_splice 232 /* Linux Specific */ | ||
251 | #define __NR_stime 233 /* Linux Specific */ | ||
252 | #define __NR_statfs64 234 /* Linux Specific */ | ||
253 | #define __NR_fstatfs64 235 /* Linux Specific */ | ||
254 | #define __NR__llseek 236 /* Linux Specific */ | ||
255 | #define __NR_mlock 237 | ||
256 | #define __NR_munlock 238 | ||
257 | #define __NR_mlockall 239 | ||
258 | #define __NR_munlockall 240 | ||
259 | #define __NR_sched_setparam 241 | ||
260 | #define __NR_sched_getparam 242 | ||
261 | #define __NR_sched_setscheduler 243 | ||
262 | #define __NR_sched_getscheduler 244 | ||
263 | #define __NR_sched_yield 245 | ||
264 | #define __NR_sched_get_priority_max 246 | ||
265 | #define __NR_sched_get_priority_min 247 | ||
266 | #define __NR_sched_rr_get_interval 248 | ||
267 | #define __NR_nanosleep 249 | ||
268 | #define __NR_mremap 250 | ||
269 | #define __NR__sysctl 251 | ||
270 | #define __NR_getsid 252 | ||
271 | #define __NR_fdatasync 253 | ||
272 | #define __NR_nfsservctl 254 | ||
273 | #define __NR_sync_file_range 255 | ||
274 | #define __NR_clock_settime 256 | ||
275 | #define __NR_clock_gettime 257 | ||
276 | #define __NR_clock_getres 258 | ||
277 | #define __NR_clock_nanosleep 259 | ||
278 | #define __NR_sched_getaffinity 260 | ||
279 | #define __NR_sched_setaffinity 261 | ||
280 | #define __NR_timer_settime 262 | ||
281 | #define __NR_timer_gettime 263 | ||
282 | #define __NR_timer_getoverrun 264 | ||
283 | #define __NR_timer_delete 265 | ||
284 | #define __NR_timer_create 266 | ||
285 | /* #define __NR_vserver 267 Reserved for VSERVER */ | ||
286 | #define __NR_io_setup 268 | ||
287 | #define __NR_io_destroy 269 | ||
288 | #define __NR_io_submit 270 | ||
289 | #define __NR_io_cancel 271 | ||
290 | #define __NR_io_getevents 272 | ||
291 | #define __NR_mq_open 273 | ||
292 | #define __NR_mq_unlink 274 | ||
293 | #define __NR_mq_timedsend 275 | ||
294 | #define __NR_mq_timedreceive 276 | ||
295 | #define __NR_mq_notify 277 | ||
296 | #define __NR_mq_getsetattr 278 | ||
297 | #define __NR_waitid 279 | ||
298 | #define __NR_tee 280 | ||
299 | #define __NR_add_key 281 | ||
300 | #define __NR_request_key 282 | ||
301 | #define __NR_keyctl 283 | ||
302 | #define __NR_openat 284 | ||
303 | #define __NR_mkdirat 285 | ||
304 | #define __NR_mknodat 286 | ||
305 | #define __NR_fchownat 287 | ||
306 | #define __NR_futimesat 288 | ||
307 | #define __NR_fstatat64 289 | ||
308 | #define __NR_unlinkat 290 | ||
309 | #define __NR_renameat 291 | ||
310 | #define __NR_linkat 292 | ||
311 | #define __NR_symlinkat 293 | ||
312 | #define __NR_readlinkat 294 | ||
313 | #define __NR_fchmodat 295 | ||
314 | #define __NR_faccessat 296 | ||
315 | #define __NR_pselect6 297 | ||
316 | #define __NR_ppoll 298 | ||
317 | #define __NR_unshare 299 | ||
318 | #define __NR_set_robust_list 300 | ||
319 | #define __NR_get_robust_list 301 | ||
320 | #define __NR_migrate_pages 302 | ||
321 | #define __NR_mbind 303 | ||
322 | #define __NR_get_mempolicy 304 | ||
323 | #define __NR_set_mempolicy 305 | ||
324 | #define __NR_kexec_load 306 | ||
325 | #define __NR_move_pages 307 | ||
326 | #define __NR_getcpu 308 | ||
327 | #define __NR_epoll_pwait 309 | ||
328 | #define __NR_utimensat 310 | ||
329 | #define __NR_signalfd 311 | ||
330 | #define __NR_timerfd_create 312 | ||
331 | #define __NR_eventfd 313 | ||
332 | #define __NR_fallocate 314 | ||
333 | #define __NR_timerfd_settime 315 | ||
334 | #define __NR_timerfd_gettime 316 | ||
335 | |||
336 | #define NR_SYSCALLS 317 | ||
337 | |||
338 | /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, | ||
339 | * it never had the plain ones and there is no value to adding those | ||
340 | * old versions into the syscall table. | ||
341 | */ | ||
342 | #define __IGNORE_setresuid | ||
343 | #define __IGNORE_getresuid | ||
344 | #define __IGNORE_setresgid | ||
345 | #define __IGNORE_getresgid | ||
346 | |||
347 | #ifdef __KERNEL__ | ||
348 | #define __ARCH_WANT_IPC_PARSE_VERSION | ||
349 | #define __ARCH_WANT_OLD_READDIR | ||
350 | #define __ARCH_WANT_STAT64 | ||
351 | #define __ARCH_WANT_SYS_ALARM | ||
352 | #define __ARCH_WANT_SYS_GETHOSTNAME | ||
353 | #define __ARCH_WANT_SYS_PAUSE | ||
354 | #define __ARCH_WANT_SYS_SGETMASK | ||
355 | #define __ARCH_WANT_SYS_SIGNAL | ||
356 | #define __ARCH_WANT_SYS_TIME | ||
357 | #define __ARCH_WANT_SYS_UTIME | ||
358 | #define __ARCH_WANT_SYS_WAITPID | ||
359 | #define __ARCH_WANT_SYS_SOCKETCALL | ||
360 | #define __ARCH_WANT_SYS_FADVISE64 | ||
361 | #define __ARCH_WANT_SYS_GETPGRP | ||
362 | #define __ARCH_WANT_SYS_LLSEEK | ||
363 | #define __ARCH_WANT_SYS_NICE | ||
364 | #define __ARCH_WANT_SYS_OLDUMOUNT | ||
365 | #define __ARCH_WANT_SYS_SIGPENDING | ||
366 | #define __ARCH_WANT_SYS_SIGPROCMASK | ||
367 | #define __ARCH_WANT_SYS_RT_SIGSUSPEND | ||
368 | |||
369 | /* | ||
370 | * "Conditional" syscalls | ||
371 | * | ||
372 | * What we want is __attribute__((weak,alias("sys_ni_syscall"))), | ||
373 | * but it doesn't work on all toolchains, so we just do it by hand | ||
374 | */ | ||
375 | #define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") | ||
376 | |||
377 | #endif /* __KERNEL__ */ | ||
378 | #endif /* _SPARC_UNISTD_H */ | ||
diff --git a/include/asm-sparc/user.h b/include/asm-sparc/user.h deleted file mode 100644 index 3400ea87f148..000000000000 --- a/include/asm-sparc/user.h +++ /dev/null | |||
@@ -1,6 +0,0 @@ | |||
1 | #ifndef _SPARC_USER_H | ||
2 | #define _SPARC_USER_H | ||
3 | |||
4 | /* Nothing to define. */ | ||
5 | |||
6 | #endif /* !(_SPARC_USER_H) */ | ||
diff --git a/include/asm-sparc/vac-ops.h b/include/asm-sparc/vac-ops.h deleted file mode 100644 index d10527611f11..000000000000 --- a/include/asm-sparc/vac-ops.h +++ /dev/null | |||
@@ -1,134 +0,0 @@ | |||
1 | #ifndef _SPARC_VAC_OPS_H | ||
2 | #define _SPARC_VAC_OPS_H | ||
3 | |||
4 | /* vac-ops.h: Inline assembly routines to do operations on the Sparc | ||
5 | * VAC (virtual address cache) for the sun4c. | ||
6 | * | ||
7 | * Copyright (C) 1994, David S. Miller (davem@caip.rutgers.edu) | ||
8 | */ | ||
9 | |||
10 | #include <asm/sysen.h> | ||
11 | #include <asm/contregs.h> | ||
12 | #include <asm/asi.h> | ||
13 | |||
14 | /* The SUN4C models have a virtually addressed write-through | ||
15 | * cache. | ||
16 | * | ||
17 | * The cache tags are directly accessible through an ASI and | ||
18 | * each have the form: | ||
19 | * | ||
20 | * ------------------------------------------------------------ | ||
21 | * | MBZ | CONTEXT | WRITE | PRIV | VALID | MBZ | TagID | MBZ | | ||
22 | * ------------------------------------------------------------ | ||
23 | * 31 25 24 22 21 20 19 18 16 15 2 1 0 | ||
24 | * | ||
25 | * MBZ: These bits are either unused and/or reserved and should | ||
26 | * be written as zeroes. | ||
27 | * | ||
28 | * CONTEXT: Records the context to which this cache line belongs. | ||
29 | * | ||
30 | * WRITE: A copy of the writable bit from the mmu pte access bits. | ||
31 | * | ||
32 | * PRIV: A copy of the privileged bit from the pte access bits. | ||
33 | * | ||
34 | * VALID: If set, this line is valid, else invalid. | ||
35 | * | ||
36 | * TagID: Fourteen bits of tag ID. | ||
37 | * | ||
38 | * Every virtual address is seen by the cache like this: | ||
39 | * | ||
40 | * ---------------------------------------- | ||
41 | * | RESV | TagID | LINE | BYTE-in-LINE | | ||
42 | * ---------------------------------------- | ||
43 | * 31 30 29 16 15 4 3 0 | ||
44 | * | ||
45 | * RESV: Unused/reserved. | ||
46 | * | ||
47 | * TagID: Used to match the Tag-ID in that vac tags. | ||
48 | * | ||
49 | * LINE: Which line within the cache | ||
50 | * | ||
51 | * BYTE-in-LINE: Which byte within the cache line. | ||
52 | */ | ||
53 | |||
54 | /* Sun4c VAC Tags */ | ||
55 | #define S4CVACTAG_CID 0x01c00000 | ||
56 | #define S4CVACTAG_W 0x00200000 | ||
57 | #define S4CVACTAG_P 0x00100000 | ||
58 | #define S4CVACTAG_V 0x00080000 | ||
59 | #define S4CVACTAG_TID 0x0000fffc | ||
60 | |||
61 | /* Sun4c VAC Virtual Address */ | ||
62 | /* These aren't used, why bother? (Anton) */ | ||
63 | #if 0 | ||
64 | #define S4CVACVA_TID 0x3fff0000 | ||
65 | #define S4CVACVA_LINE 0x0000fff0 | ||
66 | #define S4CVACVA_BIL 0x0000000f | ||
67 | #endif | ||
68 | |||
69 | /* The indexing of cache lines creates a problem. Because the line | ||
70 | * field of a virtual address extends past the page offset within | ||
71 | * the virtual address it is possible to have what are called | ||
72 | * 'bad aliases' which will create inconsistencies. So we must make | ||
73 | * sure that within a context that if a physical page is mapped | ||
74 | * more than once, that 'extra' line bits are the same. If this is | ||
75 | * not the case, and thus is a 'bad alias' we must turn off the | ||
76 | * cacheable bit in the pte's of all such pages. | ||
77 | */ | ||
78 | |||
79 | #ifdef CONFIG_SUN4 | ||
80 | #define S4CVAC_BADBITS 0x0001e000 | ||
81 | #else | ||
82 | #define S4CVAC_BADBITS 0x0000f000 | ||
83 | #endif | ||
84 | |||
85 | /* The following is true if vaddr1 and vaddr2 would cause | ||
86 | * a 'bad alias'. | ||
87 | */ | ||
88 | #define S4CVAC_BADALIAS(vaddr1, vaddr2) \ | ||
89 | ((((unsigned long) (vaddr1)) ^ ((unsigned long) (vaddr2))) & \ | ||
90 | (S4CVAC_BADBITS)) | ||
91 | |||
92 | /* The following structure describes the characteristics of a sun4c | ||
93 | * VAC as probed from the prom during boot time. | ||
94 | */ | ||
95 | struct sun4c_vac_props { | ||
96 | unsigned int num_bytes; /* Size of the cache */ | ||
97 | unsigned int num_lines; /* Number of cache lines */ | ||
98 | unsigned int do_hwflushes; /* Hardware flushing available? */ | ||
99 | enum { VAC_NONE, VAC_WRITE_THROUGH, | ||
100 | VAC_WRITE_BACK } type; /* What type of VAC? */ | ||
101 | unsigned int linesize; /* Size of each line in bytes */ | ||
102 | unsigned int log2lsize; /* log2(linesize) */ | ||
103 | unsigned int on; /* VAC is enabled */ | ||
104 | }; | ||
105 | |||
106 | extern struct sun4c_vac_props sun4c_vacinfo; | ||
107 | |||
108 | /* sun4c_enable_vac() enables the sun4c virtual address cache. */ | ||
109 | static inline void sun4c_enable_vac(void) | ||
110 | { | ||
111 | __asm__ __volatile__("lduba [%0] %1, %%g1\n\t" | ||
112 | "or %%g1, %2, %%g1\n\t" | ||
113 | "stba %%g1, [%0] %1\n\t" | ||
114 | : /* no outputs */ | ||
115 | : "r" ((unsigned int) AC_SENABLE), | ||
116 | "i" (ASI_CONTROL), "i" (SENABLE_CACHE) | ||
117 | : "g1", "memory"); | ||
118 | sun4c_vacinfo.on = 1; | ||
119 | } | ||
120 | |||
121 | /* sun4c_disable_vac() disables the virtual address cache. */ | ||
122 | static inline void sun4c_disable_vac(void) | ||
123 | { | ||
124 | __asm__ __volatile__("lduba [%0] %1, %%g1\n\t" | ||
125 | "andn %%g1, %2, %%g1\n\t" | ||
126 | "stba %%g1, [%0] %1\n\t" | ||
127 | : /* no outputs */ | ||
128 | : "r" ((unsigned int) AC_SENABLE), | ||
129 | "i" (ASI_CONTROL), "i" (SENABLE_CACHE) | ||
130 | : "g1", "memory"); | ||
131 | sun4c_vacinfo.on = 0; | ||
132 | } | ||
133 | |||
134 | #endif /* !(_SPARC_VAC_OPS_H) */ | ||
diff --git a/include/asm-sparc/vaddrs.h b/include/asm-sparc/vaddrs.h deleted file mode 100644 index f6ca4779056c..000000000000 --- a/include/asm-sparc/vaddrs.h +++ /dev/null | |||
@@ -1,69 +0,0 @@ | |||
1 | #ifndef _SPARC_VADDRS_H | ||
2 | #define _SPARC_VADDRS_H | ||
3 | |||
4 | #include <asm/head.h> | ||
5 | |||
6 | /* | ||
7 | * asm-sparc/vaddrs.h: Here we define the virtual addresses at | ||
8 | * which important things will be mapped. | ||
9 | * | ||
10 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
11 | * Copyright (C) 2000 Anton Blanchard (anton@samba.org) | ||
12 | */ | ||
13 | |||
14 | #define SRMMU_MAXMEM 0x0c000000 | ||
15 | |||
16 | #define SRMMU_NOCACHE_VADDR (KERNBASE + SRMMU_MAXMEM) | ||
17 | /* = 0x0fc000000 */ | ||
18 | /* XXX Empiricals - this needs to go away - KMW */ | ||
19 | #define SRMMU_MIN_NOCACHE_PAGES (550) | ||
20 | #define SRMMU_MAX_NOCACHE_PAGES (1280) | ||
21 | |||
22 | /* The following constant is used in mm/srmmu.c::srmmu_nocache_calcsize() | ||
23 | * to determine the amount of memory that will be reserved as nocache: | ||
24 | * | ||
25 | * 256 pages will be taken as nocache per each | ||
26 | * SRMMU_NOCACHE_ALCRATIO MB of system memory. | ||
27 | * | ||
28 | * limits enforced: nocache minimum = 256 pages | ||
29 | * nocache maximum = 1280 pages | ||
30 | */ | ||
31 | #define SRMMU_NOCACHE_ALCRATIO 64 /* 256 pages per 64MB of system RAM */ | ||
32 | |||
33 | #define SUN4M_IOBASE_VADDR 0xfd000000 /* Base for mapping pages */ | ||
34 | #define IOBASE_VADDR 0xfe000000 | ||
35 | #define IOBASE_END 0xfe600000 | ||
36 | |||
37 | #define VMALLOC_START 0xfe600000 | ||
38 | |||
39 | /* XXX Alter this when I get around to fixing sun4c - Anton */ | ||
40 | #define VMALLOC_END 0xffc00000 | ||
41 | |||
42 | /* | ||
43 | * On the sun4/4c we need a place | ||
44 | * to reliably map locked down kernel data. This includes the | ||
45 | * task_struct and kernel stack pages of each process plus the | ||
46 | * scsi buffers during dvma IO transfers, also the floppy buffers | ||
47 | * during pseudo dma which runs with traps off (no faults allowed). | ||
48 | * Some quick calculations yield: | ||
49 | * NR_TASKS <512> * (3 * PAGE_SIZE) == 0x600000 | ||
50 | * Subtract this from 0xc00000 and you get 0x927C0 of vm left | ||
51 | * over to map SCSI dvma + floppy pseudo-dma buffers. So be | ||
52 | * careful if you change NR_TASKS or else there won't be enough | ||
53 | * room for it all. | ||
54 | */ | ||
55 | #define SUN4C_LOCK_VADDR 0xff000000 | ||
56 | #define SUN4C_LOCK_END 0xffc00000 | ||
57 | |||
58 | #define KADB_DEBUGGER_BEGVM 0xffc00000 /* Where kern debugger is in virt-mem */ | ||
59 | #define KADB_DEBUGGER_ENDVM 0xffd00000 | ||
60 | #define DEBUG_FIRSTVADDR KADB_DEBUGGER_BEGVM | ||
61 | #define DEBUG_LASTVADDR KADB_DEBUGGER_ENDVM | ||
62 | |||
63 | #define LINUX_OPPROM_BEGVM 0xffd00000 | ||
64 | #define LINUX_OPPROM_ENDVM 0xfff00000 | ||
65 | |||
66 | #define DVMA_VADDR 0xfff00000 /* Base area of the DVMA on suns */ | ||
67 | #define DVMA_END 0xfffc0000 | ||
68 | |||
69 | #endif /* !(_SPARC_VADDRS_H) */ | ||
diff --git a/include/asm-sparc/vfc_ioctls.h b/include/asm-sparc/vfc_ioctls.h deleted file mode 100644 index af8b69007b22..000000000000 --- a/include/asm-sparc/vfc_ioctls.h +++ /dev/null | |||
@@ -1,58 +0,0 @@ | |||
1 | /* Copyright (c) 1996 by Manish Vachharajani */ | ||
2 | |||
3 | #ifndef _LINUX_VFC_IOCTLS_H_ | ||
4 | #define _LINUX_VFC_IOCTLS_H_ | ||
5 | |||
6 | /* IOCTLs */ | ||
7 | #define VFC_IOCTL(a) (('j' << 8) | a) | ||
8 | #define VFCGCTRL (VFC_IOCTL (0)) /* get vfc attributes */ | ||
9 | #define VFCSCTRL (VFC_IOCTL (1)) /* set vfc attributes */ | ||
10 | #define VFCGVID (VFC_IOCTL (2)) /* get video decoder attributes */ | ||
11 | #define VFCSVID (VFC_IOCTL (3)) /* set video decoder attributes */ | ||
12 | #define VFCHUE (VFC_IOCTL (4)) /* set hue */ | ||
13 | #define VFCPORTCHG (VFC_IOCTL (5)) /* change port */ | ||
14 | #define VFCRDINFO (VFC_IOCTL (6)) /* read info */ | ||
15 | |||
16 | /* Options for setting the vfc attributes and status */ | ||
17 | #define MEMPRST 0x1 /* reset FIFO ptr. */ | ||
18 | #define CAPTRCMD 0x2 /* start capture and wait */ | ||
19 | #define DIAGMODE 0x3 /* diag mode */ | ||
20 | #define NORMMODE 0x4 /* normal mode */ | ||
21 | #define CAPTRSTR 0x5 /* start capture */ | ||
22 | #define CAPTRWAIT 0x6 /* wait for capture to finish */ | ||
23 | |||
24 | |||
25 | /* Options for the decoder */ | ||
26 | #define STD_NTSC 0x1 /* NTSC mode */ | ||
27 | #define STD_PAL 0x2 /* PAL mode */ | ||
28 | #define COLOR_ON 0x3 /* force color ON */ | ||
29 | #define MONO 0x4 /* force color OFF */ | ||
30 | |||
31 | /* Values returned by ioctl 2 */ | ||
32 | |||
33 | #define NO_LOCK 1 | ||
34 | #define NTSC_COLOR 2 | ||
35 | #define NTSC_NOCOLOR 3 | ||
36 | #define PAL_COLOR 4 | ||
37 | #define PAL_NOCOLOR 5 | ||
38 | |||
39 | /* Not too sure what this does yet */ | ||
40 | /* Options for setting Field number */ | ||
41 | #define ODD_FIELD 0x1 | ||
42 | #define EVEN_FIELD 0x0 | ||
43 | #define ACTIVE_ONLY 0x2 | ||
44 | #define NON_ACTIVE 0x0 | ||
45 | |||
46 | /* Debug options */ | ||
47 | #define VFC_I2C_SEND 0 | ||
48 | #define VFC_I2C_RECV 1 | ||
49 | |||
50 | struct vfc_debug_inout | ||
51 | { | ||
52 | unsigned long addr; | ||
53 | unsigned long ret; | ||
54 | unsigned long len; | ||
55 | unsigned char __user *buffer; | ||
56 | }; | ||
57 | |||
58 | #endif /* _LINUX_VFC_IOCTLS_H_ */ | ||
diff --git a/include/asm-sparc/vga.h b/include/asm-sparc/vga.h deleted file mode 100644 index c69d5b2ba19a..000000000000 --- a/include/asm-sparc/vga.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * Access to VGA videoram | ||
3 | * | ||
4 | * (c) 1998 Martin Mares <mj@ucw.cz> | ||
5 | */ | ||
6 | |||
7 | #ifndef _LINUX_ASM_VGA_H_ | ||
8 | #define _LINUX_ASM_VGA_H_ | ||
9 | |||
10 | #include <asm/types.h> | ||
11 | |||
12 | #define VT_BUF_HAVE_RW | ||
13 | |||
14 | #undef scr_writew | ||
15 | #undef scr_readw | ||
16 | |||
17 | static inline void scr_writew(u16 val, u16 *addr) | ||
18 | { | ||
19 | BUG_ON((long) addr >= 0); | ||
20 | |||
21 | *addr = val; | ||
22 | } | ||
23 | |||
24 | static inline u16 scr_readw(const u16 *addr) | ||
25 | { | ||
26 | BUG_ON((long) addr >= 0); | ||
27 | |||
28 | return *addr; | ||
29 | } | ||
30 | |||
31 | #define VGA_MAP_MEM(x,s) (x) | ||
32 | |||
33 | #endif | ||
diff --git a/include/asm-sparc/viking.h b/include/asm-sparc/viking.h deleted file mode 100644 index 989930aeb093..000000000000 --- a/include/asm-sparc/viking.h +++ /dev/null | |||
@@ -1,253 +0,0 @@ | |||
1 | /* | ||
2 | * viking.h: Defines specific to the GNU/Viking MBUS module. | ||
3 | * This is SRMMU stuff. | ||
4 | * | ||
5 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
6 | */ | ||
7 | #ifndef _SPARC_VIKING_H | ||
8 | #define _SPARC_VIKING_H | ||
9 | |||
10 | #include <asm/asi.h> | ||
11 | #include <asm/mxcc.h> | ||
12 | #include <asm/pgtsrmmu.h> | ||
13 | |||
14 | /* Bits in the SRMMU control register for GNU/Viking modules. | ||
15 | * | ||
16 | * ----------------------------------------------------------- | ||
17 | * |impl-vers| RSV |TC|AC|SP|BM|PC|MBM|SB|IC|DC|PSO|RSV|NF|ME| | ||
18 | * ----------------------------------------------------------- | ||
19 | * 31 24 23-17 16 15 14 13 12 11 10 9 8 7 6-2 1 0 | ||
20 | * | ||
21 | * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable in E-cache | ||
22 | * 1 = Twalks are cacheable in E-cache | ||
23 | * | ||
24 | * GNU/Viking will only cache tablewalks in the E-cache (mxcc) if present | ||
25 | * and never caches them internally (or so states the docs). Therefore | ||
26 | * for machines lacking an E-cache (ie. in MBUS mode) this bit must | ||
27 | * remain cleared. | ||
28 | * | ||
29 | * AC: Alternate Cacheable -- 0 = Passthru physical accesses not cacheable | ||
30 | * 1 = Passthru physical accesses cacheable | ||
31 | * | ||
32 | * This indicates whether accesses are cacheable when no cachable bit | ||
33 | * is present in the pte when the processor is in boot-mode or the | ||
34 | * access does not need pte's for translation (ie. pass-thru ASI's). | ||
35 | * "Cachable" is only referring to E-cache (if present) and not the | ||
36 | * on chip split I/D caches of the GNU/Viking. | ||
37 | * | ||
38 | * SP: SnooP Enable -- 0 = bus snooping off, 1 = bus snooping on | ||
39 | * | ||
40 | * This enables snooping on the GNU/Viking bus. This must be on | ||
41 | * for the hardware cache consistency mechanisms of the GNU/Viking | ||
42 | * to work at all. On non-mxcc GNU/Viking modules the split I/D | ||
43 | * caches will snoop regardless of whether they are enabled, this | ||
44 | * takes care of the case where the I or D or both caches are turned | ||
45 | * off yet still contain valid data. Note also that this bit does | ||
46 | * not affect GNU/Viking store-buffer snoops, those happen if the | ||
47 | * store-buffer is enabled no matter what. | ||
48 | * | ||
49 | * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode | ||
50 | * | ||
51 | * This indicates whether the GNU/Viking is in boot-mode or not, | ||
52 | * if it is then all instruction fetch physical addresses are | ||
53 | * computed as 0xff0000000 + low 28 bits of requested address. | ||
54 | * GNU/Viking boot-mode does not affect data accesses. Also, | ||
55 | * in boot mode instruction accesses bypass the split on chip I/D | ||
56 | * caches, they may be cached by the GNU/MXCC if present and enabled. | ||
57 | * | ||
58 | * MBM: MBus Mode -- 0 = not in MBus mode, 1 = in MBus mode | ||
59 | * | ||
60 | * This indicated the GNU/Viking configuration present. If in | ||
61 | * MBUS mode, the GNU/Viking lacks a GNU/MXCC E-cache. If it is | ||
62 | * not then the GNU/Viking is on a module VBUS connected directly | ||
63 | * to a GNU/MXCC cache controller. The GNU/MXCC can be thus connected | ||
64 | * to either an GNU/MBUS (sun4m) or the packet-switched GNU/XBus (sun4d). | ||
65 | * | ||
66 | * SB: StoreBuffer enable -- 0 = store buffer off, 1 = store buffer on | ||
67 | * | ||
68 | * The GNU/Viking store buffer allows the chip to continue execution | ||
69 | * after a store even if the data cannot be placed in one of the | ||
70 | * caches during that cycle. If disabled, all stores operations | ||
71 | * occur synchronously. | ||
72 | * | ||
73 | * IC: Instruction Cache -- 0 = off, 1 = on | ||
74 | * DC: Data Cache -- 0 = off, 1 = 0n | ||
75 | * | ||
76 | * These bits enable the on-cpu GNU/Viking split I/D caches. Note, | ||
77 | * as mentioned above, these caches will snoop the bus in GNU/MBUS | ||
78 | * configurations even when disabled to avoid data corruption. | ||
79 | * | ||
80 | * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap | ||
81 | * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating | ||
82 | * | ||
83 | */ | ||
84 | |||
85 | #define VIKING_MMUENABLE 0x00000001 | ||
86 | #define VIKING_NOFAULT 0x00000002 | ||
87 | #define VIKING_PSO 0x00000080 | ||
88 | #define VIKING_DCENABLE 0x00000100 /* Enable data cache */ | ||
89 | #define VIKING_ICENABLE 0x00000200 /* Enable instruction cache */ | ||
90 | #define VIKING_SBENABLE 0x00000400 /* Enable store buffer */ | ||
91 | #define VIKING_MMODE 0x00000800 /* MBUS mode */ | ||
92 | #define VIKING_PCENABLE 0x00001000 /* Enable parity checking */ | ||
93 | #define VIKING_BMODE 0x00002000 | ||
94 | #define VIKING_SPENABLE 0x00004000 /* Enable bus cache snooping */ | ||
95 | #define VIKING_ACENABLE 0x00008000 /* Enable alternate caching */ | ||
96 | #define VIKING_TCENABLE 0x00010000 /* Enable table-walks to be cached */ | ||
97 | #define VIKING_DPENABLE 0x00040000 /* Enable the data prefetcher */ | ||
98 | |||
99 | /* | ||
100 | * GNU/Viking Breakpoint Action Register fields. | ||
101 | */ | ||
102 | #define VIKING_ACTION_MIX 0x00001000 /* Enable multiple instructions */ | ||
103 | |||
104 | /* | ||
105 | * GNU/Viking Cache Tags. | ||
106 | */ | ||
107 | #define VIKING_PTAG_VALID 0x01000000 /* Cache block is valid */ | ||
108 | #define VIKING_PTAG_DIRTY 0x00010000 /* Block has been modified */ | ||
109 | #define VIKING_PTAG_SHARED 0x00000100 /* Shared with some other cache */ | ||
110 | |||
111 | #ifndef __ASSEMBLY__ | ||
112 | |||
113 | static inline void viking_flush_icache(void) | ||
114 | { | ||
115 | __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" | ||
116 | : /* no outputs */ | ||
117 | : "i" (ASI_M_IC_FLCLEAR) | ||
118 | : "memory"); | ||
119 | } | ||
120 | |||
121 | static inline void viking_flush_dcache(void) | ||
122 | { | ||
123 | __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" | ||
124 | : /* no outputs */ | ||
125 | : "i" (ASI_M_DC_FLCLEAR) | ||
126 | : "memory"); | ||
127 | } | ||
128 | |||
129 | static inline void viking_unlock_icache(void) | ||
130 | { | ||
131 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
132 | : /* no outputs */ | ||
133 | : "r" (0x80000000), "i" (ASI_M_IC_FLCLEAR) | ||
134 | : "memory"); | ||
135 | } | ||
136 | |||
137 | static inline void viking_unlock_dcache(void) | ||
138 | { | ||
139 | __asm__ __volatile__("sta %%g0, [%0] %1\n\t" | ||
140 | : /* no outputs */ | ||
141 | : "r" (0x80000000), "i" (ASI_M_DC_FLCLEAR) | ||
142 | : "memory"); | ||
143 | } | ||
144 | |||
145 | static inline void viking_set_bpreg(unsigned long regval) | ||
146 | { | ||
147 | __asm__ __volatile__("sta %0, [%%g0] %1\n\t" | ||
148 | : /* no outputs */ | ||
149 | : "r" (regval), "i" (ASI_M_ACTION) | ||
150 | : "memory"); | ||
151 | } | ||
152 | |||
153 | static inline unsigned long viking_get_bpreg(void) | ||
154 | { | ||
155 | unsigned long regval; | ||
156 | |||
157 | __asm__ __volatile__("lda [%%g0] %1, %0\n\t" | ||
158 | : "=r" (regval) | ||
159 | : "i" (ASI_M_ACTION)); | ||
160 | return regval; | ||
161 | } | ||
162 | |||
163 | static inline void viking_get_dcache_ptag(int set, int block, | ||
164 | unsigned long *data) | ||
165 | { | ||
166 | unsigned long ptag = ((set & 0x7f) << 5) | ((block & 0x3) << 26) | | ||
167 | 0x80000000; | ||
168 | unsigned long info, page; | ||
169 | |||
170 | __asm__ __volatile__ ("ldda [%2] %3, %%g2\n\t" | ||
171 | "or %%g0, %%g2, %0\n\t" | ||
172 | "or %%g0, %%g3, %1\n\t" | ||
173 | : "=r" (info), "=r" (page) | ||
174 | : "r" (ptag), "i" (ASI_M_DATAC_TAG) | ||
175 | : "g2", "g3"); | ||
176 | data[0] = info; | ||
177 | data[1] = page; | ||
178 | } | ||
179 | |||
180 | static inline void viking_mxcc_turn_off_parity(unsigned long *mregp, | ||
181 | unsigned long *mxcc_cregp) | ||
182 | { | ||
183 | unsigned long mreg = *mregp; | ||
184 | unsigned long mxcc_creg = *mxcc_cregp; | ||
185 | |||
186 | mreg &= ~(VIKING_PCENABLE); | ||
187 | mxcc_creg &= ~(MXCC_CTL_PARE); | ||
188 | |||
189 | __asm__ __volatile__ ("set 1f, %%g2\n\t" | ||
190 | "andcc %%g2, 4, %%g0\n\t" | ||
191 | "bne 2f\n\t" | ||
192 | " nop\n" | ||
193 | "1:\n\t" | ||
194 | "sta %0, [%%g0] %3\n\t" | ||
195 | "sta %1, [%2] %4\n\t" | ||
196 | "b 1f\n\t" | ||
197 | " nop\n\t" | ||
198 | "nop\n" | ||
199 | "2:\n\t" | ||
200 | "sta %0, [%%g0] %3\n\t" | ||
201 | "sta %1, [%2] %4\n" | ||
202 | "1:\n\t" | ||
203 | : /* no output */ | ||
204 | : "r" (mreg), "r" (mxcc_creg), | ||
205 | "r" (MXCC_CREG), "i" (ASI_M_MMUREGS), | ||
206 | "i" (ASI_M_MXCC) | ||
207 | : "g2", "memory", "cc"); | ||
208 | *mregp = mreg; | ||
209 | *mxcc_cregp = mxcc_creg; | ||
210 | } | ||
211 | |||
212 | static inline unsigned long viking_hwprobe(unsigned long vaddr) | ||
213 | { | ||
214 | unsigned long val; | ||
215 | |||
216 | vaddr &= PAGE_MASK; | ||
217 | /* Probe all MMU entries. */ | ||
218 | __asm__ __volatile__("lda [%1] %2, %0\n\t" | ||
219 | : "=r" (val) | ||
220 | : "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); | ||
221 | if (!val) | ||
222 | return 0; | ||
223 | |||
224 | /* Probe region. */ | ||
225 | __asm__ __volatile__("lda [%1] %2, %0\n\t" | ||
226 | : "=r" (val) | ||
227 | : "r" (vaddr | 0x200), "i" (ASI_M_FLUSH_PROBE)); | ||
228 | if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) { | ||
229 | vaddr &= ~SRMMU_PGDIR_MASK; | ||
230 | vaddr >>= PAGE_SHIFT; | ||
231 | return val | (vaddr << 8); | ||
232 | } | ||
233 | |||
234 | /* Probe segment. */ | ||
235 | __asm__ __volatile__("lda [%1] %2, %0\n\t" | ||
236 | : "=r" (val) | ||
237 | : "r" (vaddr | 0x100), "i" (ASI_M_FLUSH_PROBE)); | ||
238 | if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) { | ||
239 | vaddr &= ~SRMMU_REAL_PMD_MASK; | ||
240 | vaddr >>= PAGE_SHIFT; | ||
241 | return val | (vaddr << 8); | ||
242 | } | ||
243 | |||
244 | /* Probe page. */ | ||
245 | __asm__ __volatile__("lda [%1] %2, %0\n\t" | ||
246 | : "=r" (val) | ||
247 | : "r" (vaddr), "i" (ASI_M_FLUSH_PROBE)); | ||
248 | return val; | ||
249 | } | ||
250 | |||
251 | #endif /* !__ASSEMBLY__ */ | ||
252 | |||
253 | #endif /* !(_SPARC_VIKING_H) */ | ||
diff --git a/include/asm-sparc/winmacro.h b/include/asm-sparc/winmacro.h deleted file mode 100644 index 5b0a06dc3bcb..000000000000 --- a/include/asm-sparc/winmacro.h +++ /dev/null | |||
@@ -1,135 +0,0 @@ | |||
1 | /* | ||
2 | * winmacro.h: Window loading-unloading macros. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef _SPARC_WINMACRO_H | ||
8 | #define _SPARC_WINMACRO_H | ||
9 | |||
10 | #include <asm/ptrace.h> | ||
11 | |||
12 | /* Store the register window onto the 8-byte aligned area starting | ||
13 | * at %reg. It might be %sp, it might not, we don't care. | ||
14 | */ | ||
15 | #define STORE_WINDOW(reg) \ | ||
16 | std %l0, [%reg + RW_L0]; \ | ||
17 | std %l2, [%reg + RW_L2]; \ | ||
18 | std %l4, [%reg + RW_L4]; \ | ||
19 | std %l6, [%reg + RW_L6]; \ | ||
20 | std %i0, [%reg + RW_I0]; \ | ||
21 | std %i2, [%reg + RW_I2]; \ | ||
22 | std %i4, [%reg + RW_I4]; \ | ||
23 | std %i6, [%reg + RW_I6]; | ||
24 | |||
25 | /* Load a register window from the area beginning at %reg. */ | ||
26 | #define LOAD_WINDOW(reg) \ | ||
27 | ldd [%reg + RW_L0], %l0; \ | ||
28 | ldd [%reg + RW_L2], %l2; \ | ||
29 | ldd [%reg + RW_L4], %l4; \ | ||
30 | ldd [%reg + RW_L6], %l6; \ | ||
31 | ldd [%reg + RW_I0], %i0; \ | ||
32 | ldd [%reg + RW_I2], %i2; \ | ||
33 | ldd [%reg + RW_I4], %i4; \ | ||
34 | ldd [%reg + RW_I6], %i6; | ||
35 | |||
36 | /* Loading and storing struct pt_reg trap frames. */ | ||
37 | #define LOAD_PT_INS(base_reg) \ | ||
38 | ldd [%base_reg + STACKFRAME_SZ + PT_I0], %i0; \ | ||
39 | ldd [%base_reg + STACKFRAME_SZ + PT_I2], %i2; \ | ||
40 | ldd [%base_reg + STACKFRAME_SZ + PT_I4], %i4; \ | ||
41 | ldd [%base_reg + STACKFRAME_SZ + PT_I6], %i6; | ||
42 | |||
43 | #define LOAD_PT_GLOBALS(base_reg) \ | ||
44 | ld [%base_reg + STACKFRAME_SZ + PT_G1], %g1; \ | ||
45 | ldd [%base_reg + STACKFRAME_SZ + PT_G2], %g2; \ | ||
46 | ldd [%base_reg + STACKFRAME_SZ + PT_G4], %g4; \ | ||
47 | ldd [%base_reg + STACKFRAME_SZ + PT_G6], %g6; | ||
48 | |||
49 | #define LOAD_PT_YREG(base_reg, scratch) \ | ||
50 | ld [%base_reg + STACKFRAME_SZ + PT_Y], %scratch; \ | ||
51 | wr %scratch, 0x0, %y; | ||
52 | |||
53 | #define LOAD_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) \ | ||
54 | ld [%base_reg + STACKFRAME_SZ + PT_PSR], %pt_psr; \ | ||
55 | ld [%base_reg + STACKFRAME_SZ + PT_PC], %pt_pc; \ | ||
56 | ld [%base_reg + STACKFRAME_SZ + PT_NPC], %pt_npc; | ||
57 | |||
58 | #define LOAD_PT_ALL(base_reg, pt_psr, pt_pc, pt_npc, scratch) \ | ||
59 | LOAD_PT_YREG(base_reg, scratch) \ | ||
60 | LOAD_PT_INS(base_reg) \ | ||
61 | LOAD_PT_GLOBALS(base_reg) \ | ||
62 | LOAD_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) | ||
63 | |||
64 | #define STORE_PT_INS(base_reg) \ | ||
65 | std %i0, [%base_reg + STACKFRAME_SZ + PT_I0]; \ | ||
66 | std %i2, [%base_reg + STACKFRAME_SZ + PT_I2]; \ | ||
67 | std %i4, [%base_reg + STACKFRAME_SZ + PT_I4]; \ | ||
68 | std %i6, [%base_reg + STACKFRAME_SZ + PT_I6]; | ||
69 | |||
70 | #define STORE_PT_GLOBALS(base_reg) \ | ||
71 | st %g1, [%base_reg + STACKFRAME_SZ + PT_G1]; \ | ||
72 | std %g2, [%base_reg + STACKFRAME_SZ + PT_G2]; \ | ||
73 | std %g4, [%base_reg + STACKFRAME_SZ + PT_G4]; \ | ||
74 | std %g6, [%base_reg + STACKFRAME_SZ + PT_G6]; | ||
75 | |||
76 | #define STORE_PT_YREG(base_reg, scratch) \ | ||
77 | rd %y, %scratch; \ | ||
78 | st %scratch, [%base_reg + STACKFRAME_SZ + PT_Y]; | ||
79 | |||
80 | #define STORE_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) \ | ||
81 | st %pt_psr, [%base_reg + STACKFRAME_SZ + PT_PSR]; \ | ||
82 | st %pt_pc, [%base_reg + STACKFRAME_SZ + PT_PC]; \ | ||
83 | st %pt_npc, [%base_reg + STACKFRAME_SZ + PT_NPC]; | ||
84 | |||
85 | #define STORE_PT_ALL(base_reg, reg_psr, reg_pc, reg_npc, g_scratch) \ | ||
86 | STORE_PT_PRIV(base_reg, reg_psr, reg_pc, reg_npc) \ | ||
87 | STORE_PT_GLOBALS(base_reg) \ | ||
88 | STORE_PT_YREG(base_reg, g_scratch) \ | ||
89 | STORE_PT_INS(base_reg) | ||
90 | |||
91 | #define SAVE_BOLIXED_USER_STACK(cur_reg, scratch) \ | ||
92 | ld [%cur_reg + TI_W_SAVED], %scratch; \ | ||
93 | sll %scratch, 2, %scratch; \ | ||
94 | add %scratch, %cur_reg, %scratch; \ | ||
95 | st %sp, [%scratch + TI_RWIN_SPTRS]; \ | ||
96 | sub %scratch, %cur_reg, %scratch; \ | ||
97 | sll %scratch, 4, %scratch; \ | ||
98 | add %scratch, %cur_reg, %scratch; \ | ||
99 | STORE_WINDOW(scratch + TI_REG_WINDOW); \ | ||
100 | sub %scratch, %cur_reg, %scratch; \ | ||
101 | srl %scratch, 6, %scratch; \ | ||
102 | add %scratch, 1, %scratch; \ | ||
103 | st %scratch, [%cur_reg + TI_W_SAVED]; | ||
104 | |||
105 | #ifdef CONFIG_SMP | ||
106 | #define LOAD_CURRENT4M(dest_reg, idreg) \ | ||
107 | rd %tbr, %idreg; \ | ||
108 | sethi %hi(current_set), %dest_reg; \ | ||
109 | srl %idreg, 10, %idreg; \ | ||
110 | or %dest_reg, %lo(current_set), %dest_reg; \ | ||
111 | and %idreg, 0xc, %idreg; \ | ||
112 | ld [%idreg + %dest_reg], %dest_reg; | ||
113 | |||
114 | #define LOAD_CURRENT4D(dest_reg, idreg) \ | ||
115 | lda [%g0] ASI_M_VIKING_TMP1, %idreg; \ | ||
116 | sethi %hi(C_LABEL(current_set)), %dest_reg; \ | ||
117 | sll %idreg, 2, %idreg; \ | ||
118 | or %dest_reg, %lo(C_LABEL(current_set)), %dest_reg; \ | ||
119 | ld [%idreg + %dest_reg], %dest_reg; | ||
120 | |||
121 | /* Blackbox - take care with this... - check smp4m and smp4d before changing this. */ | ||
122 | #define LOAD_CURRENT(dest_reg, idreg) \ | ||
123 | sethi %hi(___b_load_current), %idreg; \ | ||
124 | sethi %hi(current_set), %dest_reg; \ | ||
125 | sethi %hi(boot_cpu_id4), %idreg; \ | ||
126 | or %dest_reg, %lo(current_set), %dest_reg; \ | ||
127 | ldub [%idreg + %lo(boot_cpu_id4)], %idreg; \ | ||
128 | ld [%idreg + %dest_reg], %dest_reg; | ||
129 | #else | ||
130 | #define LOAD_CURRENT(dest_reg, idreg) \ | ||
131 | sethi %hi(current_set), %idreg; \ | ||
132 | ld [%idreg + %lo(current_set)], %dest_reg; | ||
133 | #endif | ||
134 | |||
135 | #endif /* !(_SPARC_WINMACRO_H) */ | ||
diff --git a/include/asm-sparc/xor.h b/include/asm-sparc/xor.h deleted file mode 100644 index f34b2cfa8206..000000000000 --- a/include/asm-sparc/xor.h +++ /dev/null | |||
@@ -1,269 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-sparc/xor.h | ||
3 | * | ||
4 | * Optimized RAID-5 checksumming functions for 32-bit Sparc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2, or (at your option) | ||
9 | * any later version. | ||
10 | * | ||
11 | * You should have received a copy of the GNU General Public License | ||
12 | * (for example /usr/src/linux/COPYING); if not, write to the Free | ||
13 | * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
14 | */ | ||
15 | |||
16 | /* | ||
17 | * High speed xor_block operation for RAID4/5 utilizing the | ||
18 | * ldd/std SPARC instructions. | ||
19 | * | ||
20 | * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz) | ||
21 | */ | ||
22 | |||
23 | static void | ||
24 | sparc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) | ||
25 | { | ||
26 | int lines = bytes / (sizeof (long)) / 8; | ||
27 | |||
28 | do { | ||
29 | __asm__ __volatile__( | ||
30 | "ldd [%0 + 0x00], %%g2\n\t" | ||
31 | "ldd [%0 + 0x08], %%g4\n\t" | ||
32 | "ldd [%0 + 0x10], %%o0\n\t" | ||
33 | "ldd [%0 + 0x18], %%o2\n\t" | ||
34 | "ldd [%1 + 0x00], %%o4\n\t" | ||
35 | "ldd [%1 + 0x08], %%l0\n\t" | ||
36 | "ldd [%1 + 0x10], %%l2\n\t" | ||
37 | "ldd [%1 + 0x18], %%l4\n\t" | ||
38 | "xor %%g2, %%o4, %%g2\n\t" | ||
39 | "xor %%g3, %%o5, %%g3\n\t" | ||
40 | "xor %%g4, %%l0, %%g4\n\t" | ||
41 | "xor %%g5, %%l1, %%g5\n\t" | ||
42 | "xor %%o0, %%l2, %%o0\n\t" | ||
43 | "xor %%o1, %%l3, %%o1\n\t" | ||
44 | "xor %%o2, %%l4, %%o2\n\t" | ||
45 | "xor %%o3, %%l5, %%o3\n\t" | ||
46 | "std %%g2, [%0 + 0x00]\n\t" | ||
47 | "std %%g4, [%0 + 0x08]\n\t" | ||
48 | "std %%o0, [%0 + 0x10]\n\t" | ||
49 | "std %%o2, [%0 + 0x18]\n" | ||
50 | : | ||
51 | : "r" (p1), "r" (p2) | ||
52 | : "g2", "g3", "g4", "g5", | ||
53 | "o0", "o1", "o2", "o3", "o4", "o5", | ||
54 | "l0", "l1", "l2", "l3", "l4", "l5"); | ||
55 | p1 += 8; | ||
56 | p2 += 8; | ||
57 | } while (--lines > 0); | ||
58 | } | ||
59 | |||
60 | static void | ||
61 | sparc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, | ||
62 | unsigned long *p3) | ||
63 | { | ||
64 | int lines = bytes / (sizeof (long)) / 8; | ||
65 | |||
66 | do { | ||
67 | __asm__ __volatile__( | ||
68 | "ldd [%0 + 0x00], %%g2\n\t" | ||
69 | "ldd [%0 + 0x08], %%g4\n\t" | ||
70 | "ldd [%0 + 0x10], %%o0\n\t" | ||
71 | "ldd [%0 + 0x18], %%o2\n\t" | ||
72 | "ldd [%1 + 0x00], %%o4\n\t" | ||
73 | "ldd [%1 + 0x08], %%l0\n\t" | ||
74 | "ldd [%1 + 0x10], %%l2\n\t" | ||
75 | "ldd [%1 + 0x18], %%l4\n\t" | ||
76 | "xor %%g2, %%o4, %%g2\n\t" | ||
77 | "xor %%g3, %%o5, %%g3\n\t" | ||
78 | "ldd [%2 + 0x00], %%o4\n\t" | ||
79 | "xor %%g4, %%l0, %%g4\n\t" | ||
80 | "xor %%g5, %%l1, %%g5\n\t" | ||
81 | "ldd [%2 + 0x08], %%l0\n\t" | ||
82 | "xor %%o0, %%l2, %%o0\n\t" | ||
83 | "xor %%o1, %%l3, %%o1\n\t" | ||
84 | "ldd [%2 + 0x10], %%l2\n\t" | ||
85 | "xor %%o2, %%l4, %%o2\n\t" | ||
86 | "xor %%o3, %%l5, %%o3\n\t" | ||
87 | "ldd [%2 + 0x18], %%l4\n\t" | ||
88 | "xor %%g2, %%o4, %%g2\n\t" | ||
89 | "xor %%g3, %%o5, %%g3\n\t" | ||
90 | "xor %%g4, %%l0, %%g4\n\t" | ||
91 | "xor %%g5, %%l1, %%g5\n\t" | ||
92 | "xor %%o0, %%l2, %%o0\n\t" | ||
93 | "xor %%o1, %%l3, %%o1\n\t" | ||
94 | "xor %%o2, %%l4, %%o2\n\t" | ||
95 | "xor %%o3, %%l5, %%o3\n\t" | ||
96 | "std %%g2, [%0 + 0x00]\n\t" | ||
97 | "std %%g4, [%0 + 0x08]\n\t" | ||
98 | "std %%o0, [%0 + 0x10]\n\t" | ||
99 | "std %%o2, [%0 + 0x18]\n" | ||
100 | : | ||
101 | : "r" (p1), "r" (p2), "r" (p3) | ||
102 | : "g2", "g3", "g4", "g5", | ||
103 | "o0", "o1", "o2", "o3", "o4", "o5", | ||
104 | "l0", "l1", "l2", "l3", "l4", "l5"); | ||
105 | p1 += 8; | ||
106 | p2 += 8; | ||
107 | p3 += 8; | ||
108 | } while (--lines > 0); | ||
109 | } | ||
110 | |||
111 | static void | ||
112 | sparc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, | ||
113 | unsigned long *p3, unsigned long *p4) | ||
114 | { | ||
115 | int lines = bytes / (sizeof (long)) / 8; | ||
116 | |||
117 | do { | ||
118 | __asm__ __volatile__( | ||
119 | "ldd [%0 + 0x00], %%g2\n\t" | ||
120 | "ldd [%0 + 0x08], %%g4\n\t" | ||
121 | "ldd [%0 + 0x10], %%o0\n\t" | ||
122 | "ldd [%0 + 0x18], %%o2\n\t" | ||
123 | "ldd [%1 + 0x00], %%o4\n\t" | ||
124 | "ldd [%1 + 0x08], %%l0\n\t" | ||
125 | "ldd [%1 + 0x10], %%l2\n\t" | ||
126 | "ldd [%1 + 0x18], %%l4\n\t" | ||
127 | "xor %%g2, %%o4, %%g2\n\t" | ||
128 | "xor %%g3, %%o5, %%g3\n\t" | ||
129 | "ldd [%2 + 0x00], %%o4\n\t" | ||
130 | "xor %%g4, %%l0, %%g4\n\t" | ||
131 | "xor %%g5, %%l1, %%g5\n\t" | ||
132 | "ldd [%2 + 0x08], %%l0\n\t" | ||
133 | "xor %%o0, %%l2, %%o0\n\t" | ||
134 | "xor %%o1, %%l3, %%o1\n\t" | ||
135 | "ldd [%2 + 0x10], %%l2\n\t" | ||
136 | "xor %%o2, %%l4, %%o2\n\t" | ||
137 | "xor %%o3, %%l5, %%o3\n\t" | ||
138 | "ldd [%2 + 0x18], %%l4\n\t" | ||
139 | "xor %%g2, %%o4, %%g2\n\t" | ||
140 | "xor %%g3, %%o5, %%g3\n\t" | ||
141 | "ldd [%3 + 0x00], %%o4\n\t" | ||
142 | "xor %%g4, %%l0, %%g4\n\t" | ||
143 | "xor %%g5, %%l1, %%g5\n\t" | ||
144 | "ldd [%3 + 0x08], %%l0\n\t" | ||
145 | "xor %%o0, %%l2, %%o0\n\t" | ||
146 | "xor %%o1, %%l3, %%o1\n\t" | ||
147 | "ldd [%3 + 0x10], %%l2\n\t" | ||
148 | "xor %%o2, %%l4, %%o2\n\t" | ||
149 | "xor %%o3, %%l5, %%o3\n\t" | ||
150 | "ldd [%3 + 0x18], %%l4\n\t" | ||
151 | "xor %%g2, %%o4, %%g2\n\t" | ||
152 | "xor %%g3, %%o5, %%g3\n\t" | ||
153 | "xor %%g4, %%l0, %%g4\n\t" | ||
154 | "xor %%g5, %%l1, %%g5\n\t" | ||
155 | "xor %%o0, %%l2, %%o0\n\t" | ||
156 | "xor %%o1, %%l3, %%o1\n\t" | ||
157 | "xor %%o2, %%l4, %%o2\n\t" | ||
158 | "xor %%o3, %%l5, %%o3\n\t" | ||
159 | "std %%g2, [%0 + 0x00]\n\t" | ||
160 | "std %%g4, [%0 + 0x08]\n\t" | ||
161 | "std %%o0, [%0 + 0x10]\n\t" | ||
162 | "std %%o2, [%0 + 0x18]\n" | ||
163 | : | ||
164 | : "r" (p1), "r" (p2), "r" (p3), "r" (p4) | ||
165 | : "g2", "g3", "g4", "g5", | ||
166 | "o0", "o1", "o2", "o3", "o4", "o5", | ||
167 | "l0", "l1", "l2", "l3", "l4", "l5"); | ||
168 | p1 += 8; | ||
169 | p2 += 8; | ||
170 | p3 += 8; | ||
171 | p4 += 8; | ||
172 | } while (--lines > 0); | ||
173 | } | ||
174 | |||
175 | static void | ||
176 | sparc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, | ||
177 | unsigned long *p3, unsigned long *p4, unsigned long *p5) | ||
178 | { | ||
179 | int lines = bytes / (sizeof (long)) / 8; | ||
180 | |||
181 | do { | ||
182 | __asm__ __volatile__( | ||
183 | "ldd [%0 + 0x00], %%g2\n\t" | ||
184 | "ldd [%0 + 0x08], %%g4\n\t" | ||
185 | "ldd [%0 + 0x10], %%o0\n\t" | ||
186 | "ldd [%0 + 0x18], %%o2\n\t" | ||
187 | "ldd [%1 + 0x00], %%o4\n\t" | ||
188 | "ldd [%1 + 0x08], %%l0\n\t" | ||
189 | "ldd [%1 + 0x10], %%l2\n\t" | ||
190 | "ldd [%1 + 0x18], %%l4\n\t" | ||
191 | "xor %%g2, %%o4, %%g2\n\t" | ||
192 | "xor %%g3, %%o5, %%g3\n\t" | ||
193 | "ldd [%2 + 0x00], %%o4\n\t" | ||
194 | "xor %%g4, %%l0, %%g4\n\t" | ||
195 | "xor %%g5, %%l1, %%g5\n\t" | ||
196 | "ldd [%2 + 0x08], %%l0\n\t" | ||
197 | "xor %%o0, %%l2, %%o0\n\t" | ||
198 | "xor %%o1, %%l3, %%o1\n\t" | ||
199 | "ldd [%2 + 0x10], %%l2\n\t" | ||
200 | "xor %%o2, %%l4, %%o2\n\t" | ||
201 | "xor %%o3, %%l5, %%o3\n\t" | ||
202 | "ldd [%2 + 0x18], %%l4\n\t" | ||
203 | "xor %%g2, %%o4, %%g2\n\t" | ||
204 | "xor %%g3, %%o5, %%g3\n\t" | ||
205 | "ldd [%3 + 0x00], %%o4\n\t" | ||
206 | "xor %%g4, %%l0, %%g4\n\t" | ||
207 | "xor %%g5, %%l1, %%g5\n\t" | ||
208 | "ldd [%3 + 0x08], %%l0\n\t" | ||
209 | "xor %%o0, %%l2, %%o0\n\t" | ||
210 | "xor %%o1, %%l3, %%o1\n\t" | ||
211 | "ldd [%3 + 0x10], %%l2\n\t" | ||
212 | "xor %%o2, %%l4, %%o2\n\t" | ||
213 | "xor %%o3, %%l5, %%o3\n\t" | ||
214 | "ldd [%3 + 0x18], %%l4\n\t" | ||
215 | "xor %%g2, %%o4, %%g2\n\t" | ||
216 | "xor %%g3, %%o5, %%g3\n\t" | ||
217 | "ldd [%4 + 0x00], %%o4\n\t" | ||
218 | "xor %%g4, %%l0, %%g4\n\t" | ||
219 | "xor %%g5, %%l1, %%g5\n\t" | ||
220 | "ldd [%4 + 0x08], %%l0\n\t" | ||
221 | "xor %%o0, %%l2, %%o0\n\t" | ||
222 | "xor %%o1, %%l3, %%o1\n\t" | ||
223 | "ldd [%4 + 0x10], %%l2\n\t" | ||
224 | "xor %%o2, %%l4, %%o2\n\t" | ||
225 | "xor %%o3, %%l5, %%o3\n\t" | ||
226 | "ldd [%4 + 0x18], %%l4\n\t" | ||
227 | "xor %%g2, %%o4, %%g2\n\t" | ||
228 | "xor %%g3, %%o5, %%g3\n\t" | ||
229 | "xor %%g4, %%l0, %%g4\n\t" | ||
230 | "xor %%g5, %%l1, %%g5\n\t" | ||
231 | "xor %%o0, %%l2, %%o0\n\t" | ||
232 | "xor %%o1, %%l3, %%o1\n\t" | ||
233 | "xor %%o2, %%l4, %%o2\n\t" | ||
234 | "xor %%o3, %%l5, %%o3\n\t" | ||
235 | "std %%g2, [%0 + 0x00]\n\t" | ||
236 | "std %%g4, [%0 + 0x08]\n\t" | ||
237 | "std %%o0, [%0 + 0x10]\n\t" | ||
238 | "std %%o2, [%0 + 0x18]\n" | ||
239 | : | ||
240 | : "r" (p1), "r" (p2), "r" (p3), "r" (p4), "r" (p5) | ||
241 | : "g2", "g3", "g4", "g5", | ||
242 | "o0", "o1", "o2", "o3", "o4", "o5", | ||
243 | "l0", "l1", "l2", "l3", "l4", "l5"); | ||
244 | p1 += 8; | ||
245 | p2 += 8; | ||
246 | p3 += 8; | ||
247 | p4 += 8; | ||
248 | p5 += 8; | ||
249 | } while (--lines > 0); | ||
250 | } | ||
251 | |||
252 | static struct xor_block_template xor_block_SPARC = { | ||
253 | .name = "SPARC", | ||
254 | .do_2 = sparc_2, | ||
255 | .do_3 = sparc_3, | ||
256 | .do_4 = sparc_4, | ||
257 | .do_5 = sparc_5, | ||
258 | }; | ||
259 | |||
260 | /* For grins, also test the generic routines. */ | ||
261 | #include <asm-generic/xor.h> | ||
262 | |||
263 | #undef XOR_TRY_TEMPLATES | ||
264 | #define XOR_TRY_TEMPLATES \ | ||
265 | do { \ | ||
266 | xor_speed(&xor_block_8regs); \ | ||
267 | xor_speed(&xor_block_32regs); \ | ||
268 | xor_speed(&xor_block_SPARC); \ | ||
269 | } while (0) | ||