diff options
Diffstat (limited to 'include/asm-sparc64')
-rw-r--r-- | include/asm-sparc64/display7seg.h | 80 | ||||
-rw-r--r-- | include/asm-sparc64/envctrl.h | 104 | ||||
-rw-r--r-- | include/asm-sparc64/psrcompat.h | 46 | ||||
-rw-r--r-- | include/asm-sparc64/pstate.h | 92 | ||||
-rw-r--r-- | include/asm-sparc64/uctx.h | 72 | ||||
-rw-r--r-- | include/asm-sparc64/utrap.h | 52 | ||||
-rw-r--r-- | include/asm-sparc64/watchdog.h | 32 |
7 files changed, 7 insertions, 471 deletions
diff --git a/include/asm-sparc64/display7seg.h b/include/asm-sparc64/display7seg.h index c066a8964eab..e74f046b41de 100644 --- a/include/asm-sparc64/display7seg.h +++ b/include/asm-sparc64/display7seg.h | |||
@@ -1,79 +1 @@ | |||
1 | /* | #include <asm-sparc/display7seg.h> | |
2 | * | ||
3 | * display7seg - Driver interface for the 7-segment display | ||
4 | * present on Sun Microsystems CP1400 and CP1500 | ||
5 | * | ||
6 | * Copyright (c) 2000 Eric Brower <ebrower@usa.net> | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #ifndef __display7seg_h__ | ||
11 | #define __display7seg_h__ | ||
12 | |||
13 | #define D7S_IOC 'p' | ||
14 | |||
15 | #define D7SIOCRD _IOR(D7S_IOC, 0x45, int) /* Read device state */ | ||
16 | #define D7SIOCWR _IOW(D7S_IOC, 0x46, int) /* Write device state */ | ||
17 | #define D7SIOCTM _IO (D7S_IOC, 0x47) /* Translate mode (FLIP)*/ | ||
18 | |||
19 | /* | ||
20 | * ioctl flag definitions | ||
21 | * | ||
22 | * POINT - Toggle decimal point (0=absent 1=present) | ||
23 | * ALARM - Toggle alarm LED (0=green 1=red) | ||
24 | * FLIP - Toggle inverted mode (0=normal 1=flipped) | ||
25 | * bits 0-4 - Character displayed (see definitions below) | ||
26 | * | ||
27 | * Display segments are defined as follows, | ||
28 | * subject to D7S_FLIP register state: | ||
29 | * | ||
30 | * a | ||
31 | * --- | ||
32 | * f| |b | ||
33 | * -g- | ||
34 | * e| |c | ||
35 | * --- | ||
36 | * d | ||
37 | */ | ||
38 | |||
39 | #define D7S_POINT (1 << 7) /* Decimal point*/ | ||
40 | #define D7S_ALARM (1 << 6) /* Alarm LED */ | ||
41 | #define D7S_FLIP (1 << 5) /* Flip display */ | ||
42 | |||
43 | #define D7S_0 0x00 /* Numerals 0-9 */ | ||
44 | #define D7S_1 0x01 | ||
45 | #define D7S_2 0x02 | ||
46 | #define D7S_3 0x03 | ||
47 | #define D7S_4 0x04 | ||
48 | #define D7S_5 0x05 | ||
49 | #define D7S_6 0x06 | ||
50 | #define D7S_7 0x07 | ||
51 | #define D7S_8 0x08 | ||
52 | #define D7S_9 0x09 | ||
53 | #define D7S_A 0x0A /* Letters A-F, H, L, P */ | ||
54 | #define D7S_B 0x0B | ||
55 | #define D7S_C 0x0C | ||
56 | #define D7S_D 0x0D | ||
57 | #define D7S_E 0x0E | ||
58 | #define D7S_F 0x0F | ||
59 | #define D7S_H 0x10 | ||
60 | #define D7S_E2 0x11 | ||
61 | #define D7S_L 0x12 | ||
62 | #define D7S_P 0x13 | ||
63 | #define D7S_SEGA 0x14 /* Individual segments */ | ||
64 | #define D7S_SEGB 0x15 | ||
65 | #define D7S_SEGC 0x16 | ||
66 | #define D7S_SEGD 0x17 | ||
67 | #define D7S_SEGE 0x18 | ||
68 | #define D7S_SEGF 0x19 | ||
69 | #define D7S_SEGG 0x1A | ||
70 | #define D7S_SEGABFG 0x1B /* Segment groupings */ | ||
71 | #define D7S_SEGCDEG 0x1C | ||
72 | #define D7S_SEGBCEF 0x1D | ||
73 | #define D7S_SEGADG 0x1E | ||
74 | #define D7S_BLANK 0x1F /* Clear all segments */ | ||
75 | |||
76 | #define D7S_MIN_VAL 0x0 | ||
77 | #define D7S_MAX_VAL 0x1F | ||
78 | |||
79 | #endif /* ifndef __display7seg_h__ */ | ||
diff --git a/include/asm-sparc64/envctrl.h b/include/asm-sparc64/envctrl.h index a5668a082b14..a2cc0ca334ba 100644 --- a/include/asm-sparc64/envctrl.h +++ b/include/asm-sparc64/envctrl.h | |||
@@ -1,103 +1 @@ | |||
1 | /* | #include <asm-sparc/envctrl.h> | |
2 | * | ||
3 | * envctrl.h: Definitions for access to the i2c environment | ||
4 | * monitoring on Ultrasparc systems. | ||
5 | * | ||
6 | * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) | ||
7 | * Copyright (C) 2000 Vinh Truong (vinh.truong@eng.sun.com) | ||
8 | * VT - Add all ioctl commands and environment status definitions | ||
9 | * VT - Add application note | ||
10 | */ | ||
11 | #ifndef _SPARC64_ENVCTRL_H | ||
12 | #define _SPARC64_ENVCTRL_H 1 | ||
13 | |||
14 | #include <linux/ioctl.h> | ||
15 | |||
16 | /* Application note: | ||
17 | * | ||
18 | * The driver supports 4 operations: open(), close(), ioctl(), read() | ||
19 | * The device name is /dev/envctrl. | ||
20 | * Below is sample usage: | ||
21 | * | ||
22 | * fd = open("/dev/envtrl", O_RDONLY); | ||
23 | * if (ioctl(fd, ENVCTRL_READ_SHUTDOWN_TEMPERATURE, 0) < 0) | ||
24 | * printf("error\n"); | ||
25 | * ret = read(fd, buf, 10); | ||
26 | * close(fd); | ||
27 | * | ||
28 | * Notice in the case of cpu voltage and temperature, the default is | ||
29 | * cpu0. If we need to know the info of cpu1, cpu2, cpu3, we need to | ||
30 | * pass in cpu number in ioctl() last parameter. For example, to | ||
31 | * get the voltage of cpu2: | ||
32 | * | ||
33 | * ioctlbuf[0] = 2; | ||
34 | * if (ioctl(fd, ENVCTRL_READ_CPU_VOLTAGE, ioctlbuf) < 0) | ||
35 | * printf("error\n"); | ||
36 | * ret = read(fd, buf, 10); | ||
37 | * | ||
38 | * All the return values are in ascii. So check read return value | ||
39 | * and do appropriate conversions in your application. | ||
40 | */ | ||
41 | |||
42 | /* IOCTL commands */ | ||
43 | |||
44 | /* Note: these commands reflect possible monitor features. | ||
45 | * Some boards choose to support some of the features only. | ||
46 | */ | ||
47 | #define ENVCTRL_RD_CPU_TEMPERATURE _IOR('p', 0x40, int) | ||
48 | #define ENVCTRL_RD_CPU_VOLTAGE _IOR('p', 0x41, int) | ||
49 | #define ENVCTRL_RD_FAN_STATUS _IOR('p', 0x42, int) | ||
50 | #define ENVCTRL_RD_WARNING_TEMPERATURE _IOR('p', 0x43, int) | ||
51 | #define ENVCTRL_RD_SHUTDOWN_TEMPERATURE _IOR('p', 0x44, int) | ||
52 | #define ENVCTRL_RD_VOLTAGE_STATUS _IOR('p', 0x45, int) | ||
53 | #define ENVCTRL_RD_SCSI_TEMPERATURE _IOR('p', 0x46, int) | ||
54 | #define ENVCTRL_RD_ETHERNET_TEMPERATURE _IOR('p', 0x47, int) | ||
55 | #define ENVCTRL_RD_MTHRBD_TEMPERATURE _IOR('p', 0x48, int) | ||
56 | |||
57 | #define ENVCTRL_RD_GLOBALADDRESS _IOR('p', 0x49, int) | ||
58 | |||
59 | /* Read return values for a voltage status request. */ | ||
60 | #define ENVCTRL_VOLTAGE_POWERSUPPLY_GOOD 0x01 | ||
61 | #define ENVCTRL_VOLTAGE_BAD 0x02 | ||
62 | #define ENVCTRL_POWERSUPPLY_BAD 0x03 | ||
63 | #define ENVCTRL_VOLTAGE_POWERSUPPLY_BAD 0x04 | ||
64 | |||
65 | /* Read return values for a fan status request. | ||
66 | * A failure match means either the fan fails or | ||
67 | * the fan is not connected. Some boards have optional | ||
68 | * connectors to connect extra fans. | ||
69 | * | ||
70 | * There are maximum 8 monitor fans. Some are cpu fans | ||
71 | * some are system fans. The mask below only indicates | ||
72 | * fan by order number. | ||
73 | * Below is a sample application: | ||
74 | * | ||
75 | * if (ioctl(fd, ENVCTRL_READ_FAN_STATUS, 0) < 0) { | ||
76 | * printf("ioctl fan failed\n"); | ||
77 | * } | ||
78 | * if (read(fd, rslt, 1) <= 0) { | ||
79 | * printf("error or fan not monitored\n"); | ||
80 | * } else { | ||
81 | * if (rslt[0] == ENVCTRL_ALL_FANS_GOOD) { | ||
82 | * printf("all fans good\n"); | ||
83 | * } else if (rslt[0] == ENVCTRL_ALL_FANS_BAD) { | ||
84 | * printf("all fans bad\n"); | ||
85 | * } else { | ||
86 | * if (rslt[0] & ENVCTRL_FAN0_FAILURE_MASK) { | ||
87 | * printf("fan 0 failed or not connected\n"); | ||
88 | * } | ||
89 | * ...... | ||
90 | */ | ||
91 | |||
92 | #define ENVCTRL_ALL_FANS_GOOD 0x00 | ||
93 | #define ENVCTRL_FAN0_FAILURE_MASK 0x01 | ||
94 | #define ENVCTRL_FAN1_FAILURE_MASK 0x02 | ||
95 | #define ENVCTRL_FAN2_FAILURE_MASK 0x04 | ||
96 | #define ENVCTRL_FAN3_FAILURE_MASK 0x08 | ||
97 | #define ENVCTRL_FAN4_FAILURE_MASK 0x10 | ||
98 | #define ENVCTRL_FAN5_FAILURE_MASK 0x20 | ||
99 | #define ENVCTRL_FAN6_FAILURE_MASK 0x40 | ||
100 | #define ENVCTRL_FAN7_FAILURE_MASK 0x80 | ||
101 | #define ENVCTRL_ALL_FANS_BAD 0xFF | ||
102 | |||
103 | #endif /* !(_SPARC64_ENVCTRL_H) */ | ||
diff --git a/include/asm-sparc64/psrcompat.h b/include/asm-sparc64/psrcompat.h index 44b6327dbbf5..587846f48358 100644 --- a/include/asm-sparc64/psrcompat.h +++ b/include/asm-sparc64/psrcompat.h | |||
@@ -1,45 +1 @@ | |||
1 | #ifndef _SPARC64_PSRCOMPAT_H | #include <asm-sparc/psrcompat.h> | |
2 | #define _SPARC64_PSRCOMPAT_H | ||
3 | |||
4 | #include <asm/pstate.h> | ||
5 | |||
6 | /* Old 32-bit PSR fields for the compatibility conversion code. */ | ||
7 | #define PSR_CWP 0x0000001f /* current window pointer */ | ||
8 | #define PSR_ET 0x00000020 /* enable traps field */ | ||
9 | #define PSR_PS 0x00000040 /* previous privilege level */ | ||
10 | #define PSR_S 0x00000080 /* current privilege level */ | ||
11 | #define PSR_PIL 0x00000f00 /* processor interrupt level */ | ||
12 | #define PSR_EF 0x00001000 /* enable floating point */ | ||
13 | #define PSR_EC 0x00002000 /* enable co-processor */ | ||
14 | #define PSR_SYSCALL 0x00004000 /* inside of a syscall */ | ||
15 | #define PSR_LE 0x00008000 /* SuperSparcII little-endian */ | ||
16 | #define PSR_ICC 0x00f00000 /* integer condition codes */ | ||
17 | #define PSR_C 0x00100000 /* carry bit */ | ||
18 | #define PSR_V 0x00200000 /* overflow bit */ | ||
19 | #define PSR_Z 0x00400000 /* zero bit */ | ||
20 | #define PSR_N 0x00800000 /* negative bit */ | ||
21 | #define PSR_VERS 0x0f000000 /* cpu-version field */ | ||
22 | #define PSR_IMPL 0xf0000000 /* cpu-implementation field */ | ||
23 | |||
24 | #define PSR_V8PLUS 0xff000000 /* fake impl/ver, meaning a 64bit CPU is present */ | ||
25 | #define PSR_XCC 0x000f0000 /* if PSR_V8PLUS, this is %xcc */ | ||
26 | |||
27 | static inline unsigned int tstate_to_psr(unsigned long tstate) | ||
28 | { | ||
29 | return ((tstate & TSTATE_CWP) | | ||
30 | PSR_S | | ||
31 | ((tstate & TSTATE_ICC) >> 12) | | ||
32 | ((tstate & TSTATE_XCC) >> 20) | | ||
33 | ((tstate & TSTATE_SYSCALL) ? PSR_SYSCALL : 0) | | ||
34 | PSR_V8PLUS); | ||
35 | } | ||
36 | |||
37 | static inline unsigned long psr_to_tstate_icc(unsigned int psr) | ||
38 | { | ||
39 | unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12; | ||
40 | if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) | ||
41 | tstate |= ((unsigned long)(psr & PSR_XCC)) << 20; | ||
42 | return tstate; | ||
43 | } | ||
44 | |||
45 | #endif /* !(_SPARC64_PSRCOMPAT_H) */ | ||
diff --git a/include/asm-sparc64/pstate.h b/include/asm-sparc64/pstate.h index a26a53777bb0..3ccf0be25360 100644 --- a/include/asm-sparc64/pstate.h +++ b/include/asm-sparc64/pstate.h | |||
@@ -1,91 +1 @@ | |||
1 | #ifndef _SPARC64_PSTATE_H | #include <asm-sparc/pstate.h> | |
2 | #define _SPARC64_PSTATE_H | ||
3 | |||
4 | #include <linux/const.h> | ||
5 | |||
6 | /* The V9 PSTATE Register (with SpitFire extensions). | ||
7 | * | ||
8 | * ----------------------------------------------------------------------- | ||
9 | * | Resv | IG | MG | CLE | TLE | MM | RED | PEF | AM | PRIV | IE | AG | | ||
10 | * ----------------------------------------------------------------------- | ||
11 | * 63 12 11 10 9 8 7 6 5 4 3 2 1 0 | ||
12 | */ | ||
13 | #define PSTATE_IG _AC(0x0000000000000800,UL) /* Interrupt Globals. */ | ||
14 | #define PSTATE_MG _AC(0x0000000000000400,UL) /* MMU Globals. */ | ||
15 | #define PSTATE_CLE _AC(0x0000000000000200,UL) /* Current Little Endian.*/ | ||
16 | #define PSTATE_TLE _AC(0x0000000000000100,UL) /* Trap Little Endian. */ | ||
17 | #define PSTATE_MM _AC(0x00000000000000c0,UL) /* Memory Model. */ | ||
18 | #define PSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TotalStoreOrder */ | ||
19 | #define PSTATE_PSO _AC(0x0000000000000040,UL) /* MM: PartialStoreOrder */ | ||
20 | #define PSTATE_RMO _AC(0x0000000000000080,UL) /* MM: RelaxedMemoryOrder*/ | ||
21 | #define PSTATE_RED _AC(0x0000000000000020,UL) /* Reset Error Debug. */ | ||
22 | #define PSTATE_PEF _AC(0x0000000000000010,UL) /* Floating Point Enable.*/ | ||
23 | #define PSTATE_AM _AC(0x0000000000000008,UL) /* Address Mask. */ | ||
24 | #define PSTATE_PRIV _AC(0x0000000000000004,UL) /* Privilege. */ | ||
25 | #define PSTATE_IE _AC(0x0000000000000002,UL) /* Interrupt Enable. */ | ||
26 | #define PSTATE_AG _AC(0x0000000000000001,UL) /* Alternate Globals. */ | ||
27 | |||
28 | /* The V9 TSTATE Register (with SpitFire and Linux extensions). | ||
29 | * | ||
30 | * --------------------------------------------------------------------- | ||
31 | * | Resv | GL | CCR | ASI | %pil | PSTATE | Resv | CWP | | ||
32 | * --------------------------------------------------------------------- | ||
33 | * 63 43 42 40 39 32 31 24 23 20 19 8 7 5 4 0 | ||
34 | */ | ||
35 | #define TSTATE_GL _AC(0x0000070000000000,UL) /* Global reg level */ | ||
36 | #define TSTATE_CCR _AC(0x000000ff00000000,UL) /* Condition Codes. */ | ||
37 | #define TSTATE_XCC _AC(0x000000f000000000,UL) /* Condition Codes. */ | ||
38 | #define TSTATE_XNEG _AC(0x0000008000000000,UL) /* %xcc Negative. */ | ||
39 | #define TSTATE_XZERO _AC(0x0000004000000000,UL) /* %xcc Zero. */ | ||
40 | #define TSTATE_XOVFL _AC(0x0000002000000000,UL) /* %xcc Overflow. */ | ||
41 | #define TSTATE_XCARRY _AC(0x0000001000000000,UL) /* %xcc Carry. */ | ||
42 | #define TSTATE_ICC _AC(0x0000000f00000000,UL) /* Condition Codes. */ | ||
43 | #define TSTATE_INEG _AC(0x0000000800000000,UL) /* %icc Negative. */ | ||
44 | #define TSTATE_IZERO _AC(0x0000000400000000,UL) /* %icc Zero. */ | ||
45 | #define TSTATE_IOVFL _AC(0x0000000200000000,UL) /* %icc Overflow. */ | ||
46 | #define TSTATE_ICARRY _AC(0x0000000100000000,UL) /* %icc Carry. */ | ||
47 | #define TSTATE_ASI _AC(0x00000000ff000000,UL) /* AddrSpace ID. */ | ||
48 | #define TSTATE_PIL _AC(0x0000000000f00000,UL) /* %pil (Linux traps)*/ | ||
49 | #define TSTATE_PSTATE _AC(0x00000000000fff00,UL) /* PSTATE. */ | ||
50 | #define TSTATE_IG _AC(0x0000000000080000,UL) /* Interrupt Globals.*/ | ||
51 | #define TSTATE_MG _AC(0x0000000000040000,UL) /* MMU Globals. */ | ||
52 | #define TSTATE_CLE _AC(0x0000000000020000,UL) /* CurrLittleEndian. */ | ||
53 | #define TSTATE_TLE _AC(0x0000000000010000,UL) /* TrapLittleEndian. */ | ||
54 | #define TSTATE_MM _AC(0x000000000000c000,UL) /* Memory Model. */ | ||
55 | #define TSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TSO */ | ||
56 | #define TSTATE_PSO _AC(0x0000000000004000,UL) /* MM: PSO */ | ||
57 | #define TSTATE_RMO _AC(0x0000000000008000,UL) /* MM: RMO */ | ||
58 | #define TSTATE_RED _AC(0x0000000000002000,UL) /* Reset Error Debug.*/ | ||
59 | #define TSTATE_PEF _AC(0x0000000000001000,UL) /* FPU Enable. */ | ||
60 | #define TSTATE_AM _AC(0x0000000000000800,UL) /* Address Mask. */ | ||
61 | #define TSTATE_PRIV _AC(0x0000000000000400,UL) /* Privilege. */ | ||
62 | #define TSTATE_IE _AC(0x0000000000000200,UL) /* Interrupt Enable. */ | ||
63 | #define TSTATE_AG _AC(0x0000000000000100,UL) /* Alternate Globals.*/ | ||
64 | #define TSTATE_SYSCALL _AC(0x0000000000000020,UL) /* in syscall trap */ | ||
65 | #define TSTATE_CWP _AC(0x000000000000001f,UL) /* Curr Win-Pointer. */ | ||
66 | |||
67 | /* Floating-Point Registers State Register. | ||
68 | * | ||
69 | * -------------------------------- | ||
70 | * | Resv | FEF | DU | DL | | ||
71 | * -------------------------------- | ||
72 | * 63 3 2 1 0 | ||
73 | */ | ||
74 | #define FPRS_FEF _AC(0x0000000000000004,UL) /* FPU Enable. */ | ||
75 | #define FPRS_DU _AC(0x0000000000000002,UL) /* Dirty Upper. */ | ||
76 | #define FPRS_DL _AC(0x0000000000000001,UL) /* Dirty Lower. */ | ||
77 | |||
78 | /* Version Register. | ||
79 | * | ||
80 | * ------------------------------------------------------ | ||
81 | * | MANUF | IMPL | MASK | Resv | MAXTL | Resv | MAXWIN | | ||
82 | * ------------------------------------------------------ | ||
83 | * 63 48 47 32 31 24 23 16 15 8 7 5 4 0 | ||
84 | */ | ||
85 | #define VERS_MANUF _AC(0xffff000000000000,UL) /* Manufacturer. */ | ||
86 | #define VERS_IMPL _AC(0x0000ffff00000000,UL) /* Implementation. */ | ||
87 | #define VERS_MASK _AC(0x00000000ff000000,UL) /* Mask Set Revision.*/ | ||
88 | #define VERS_MAXTL _AC(0x000000000000ff00,UL) /* Max Trap Level. */ | ||
89 | #define VERS_MAXWIN _AC(0x000000000000001f,UL) /* Max RegWindow Idx.*/ | ||
90 | |||
91 | #endif /* !(_SPARC64_PSTATE_H) */ | ||
diff --git a/include/asm-sparc64/uctx.h b/include/asm-sparc64/uctx.h index dc937c75ffdd..9e1b5794b07f 100644 --- a/include/asm-sparc64/uctx.h +++ b/include/asm-sparc64/uctx.h | |||
@@ -1,71 +1 @@ | |||
1 | /* | #include <asm-sparc/uctx.h> | |
2 | * uctx.h: Sparc64 {set,get}context() register state layouts. | ||
3 | * | ||
4 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | |||
7 | #ifndef __SPARC64_UCTX_H | ||
8 | #define __SPARC64_UCTX_H | ||
9 | |||
10 | #define MC_TSTATE 0 | ||
11 | #define MC_PC 1 | ||
12 | #define MC_NPC 2 | ||
13 | #define MC_Y 3 | ||
14 | #define MC_G1 4 | ||
15 | #define MC_G2 5 | ||
16 | #define MC_G3 6 | ||
17 | #define MC_G4 7 | ||
18 | #define MC_G5 8 | ||
19 | #define MC_G6 9 | ||
20 | #define MC_G7 10 | ||
21 | #define MC_O0 11 | ||
22 | #define MC_O1 12 | ||
23 | #define MC_O2 13 | ||
24 | #define MC_O3 14 | ||
25 | #define MC_O4 15 | ||
26 | #define MC_O5 16 | ||
27 | #define MC_O6 17 | ||
28 | #define MC_O7 18 | ||
29 | #define MC_NGREG 19 | ||
30 | |||
31 | typedef unsigned long mc_greg_t; | ||
32 | typedef mc_greg_t mc_gregset_t[MC_NGREG]; | ||
33 | |||
34 | #define MC_MAXFPQ 16 | ||
35 | struct mc_fq { | ||
36 | unsigned long *mcfq_addr; | ||
37 | unsigned int mcfq_insn; | ||
38 | }; | ||
39 | |||
40 | struct mc_fpu { | ||
41 | union { | ||
42 | unsigned int sregs[32]; | ||
43 | unsigned long dregs[32]; | ||
44 | long double qregs[16]; | ||
45 | } mcfpu_fregs; | ||
46 | unsigned long mcfpu_fsr; | ||
47 | unsigned long mcfpu_fprs; | ||
48 | unsigned long mcfpu_gsr; | ||
49 | struct mc_fq *mcfpu_fq; | ||
50 | unsigned char mcfpu_qcnt; | ||
51 | unsigned char mcfpu_qentsz; | ||
52 | unsigned char mcfpu_enab; | ||
53 | }; | ||
54 | typedef struct mc_fpu mc_fpu_t; | ||
55 | |||
56 | typedef struct { | ||
57 | mc_gregset_t mc_gregs; | ||
58 | mc_greg_t mc_fp; | ||
59 | mc_greg_t mc_i7; | ||
60 | mc_fpu_t mc_fpregs; | ||
61 | } mcontext_t; | ||
62 | |||
63 | struct ucontext { | ||
64 | struct ucontext *uc_link; | ||
65 | unsigned long uc_flags; | ||
66 | sigset_t uc_sigmask; | ||
67 | mcontext_t uc_mcontext; | ||
68 | }; | ||
69 | typedef struct ucontext ucontext_t; | ||
70 | |||
71 | #endif /* __SPARC64_UCTX_H */ | ||
diff --git a/include/asm-sparc64/utrap.h b/include/asm-sparc64/utrap.h index e49e5c46ad68..b030a41f1895 100644 --- a/include/asm-sparc64/utrap.h +++ b/include/asm-sparc64/utrap.h | |||
@@ -1,51 +1 @@ | |||
1 | /* | #include <asm-sparc/utrap.h> | |
2 | * include/asm-sparc64/utrap.h | ||
3 | * | ||
4 | * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | ||
5 | */ | ||
6 | |||
7 | #ifndef __ASM_SPARC64_UTRAP_H | ||
8 | #define __ASM_SPARC64_UTRAP_H | ||
9 | |||
10 | #define UT_INSTRUCTION_EXCEPTION 1 | ||
11 | #define UT_INSTRUCTION_ERROR 2 | ||
12 | #define UT_INSTRUCTION_PROTECTION 3 | ||
13 | #define UT_ILLTRAP_INSTRUCTION 4 | ||
14 | #define UT_ILLEGAL_INSTRUCTION 5 | ||
15 | #define UT_PRIVILEGED_OPCODE 6 | ||
16 | #define UT_FP_DISABLED 7 | ||
17 | #define UT_FP_EXCEPTION_IEEE_754 8 | ||
18 | #define UT_FP_EXCEPTION_OTHER 9 | ||
19 | #define UT_TAG_OVERVIEW 10 | ||
20 | #define UT_DIVISION_BY_ZERO 11 | ||
21 | #define UT_DATA_EXCEPTION 12 | ||
22 | #define UT_DATA_ERROR 13 | ||
23 | #define UT_DATA_PROTECTION 14 | ||
24 | #define UT_MEM_ADDRESS_NOT_ALIGNED 15 | ||
25 | #define UT_PRIVILEGED_ACTION 16 | ||
26 | #define UT_ASYNC_DATA_ERROR 17 | ||
27 | #define UT_TRAP_INSTRUCTION_16 18 | ||
28 | #define UT_TRAP_INSTRUCTION_17 19 | ||
29 | #define UT_TRAP_INSTRUCTION_18 20 | ||
30 | #define UT_TRAP_INSTRUCTION_19 21 | ||
31 | #define UT_TRAP_INSTRUCTION_20 22 | ||
32 | #define UT_TRAP_INSTRUCTION_21 23 | ||
33 | #define UT_TRAP_INSTRUCTION_22 24 | ||
34 | #define UT_TRAP_INSTRUCTION_23 25 | ||
35 | #define UT_TRAP_INSTRUCTION_24 26 | ||
36 | #define UT_TRAP_INSTRUCTION_25 27 | ||
37 | #define UT_TRAP_INSTRUCTION_26 28 | ||
38 | #define UT_TRAP_INSTRUCTION_27 29 | ||
39 | #define UT_TRAP_INSTRUCTION_28 30 | ||
40 | #define UT_TRAP_INSTRUCTION_29 31 | ||
41 | #define UT_TRAP_INSTRUCTION_30 32 | ||
42 | #define UT_TRAP_INSTRUCTION_31 33 | ||
43 | |||
44 | #define UTH_NOCHANGE (-1) | ||
45 | |||
46 | #ifndef __ASSEMBLY__ | ||
47 | typedef int utrap_entry_t; | ||
48 | typedef void *utrap_handler_t; | ||
49 | #endif /* __ASSEMBLY__ */ | ||
50 | |||
51 | #endif /* !(__ASM_SPARC64_PROCESSOR_H) */ | ||
diff --git a/include/asm-sparc64/watchdog.h b/include/asm-sparc64/watchdog.h index 5baf2d3919cf..b0f2857145f7 100644 --- a/include/asm-sparc64/watchdog.h +++ b/include/asm-sparc64/watchdog.h | |||
@@ -1,31 +1 @@ | |||
1 | /* | #include <asm-sparc/watchdog.h> | |
2 | * | ||
3 | * watchdog - Driver interface for the hardware watchdog timers | ||
4 | * present on Sun Microsystems boardsets | ||
5 | * | ||
6 | * Copyright (c) 2000 Eric Brower <ebrower@usa.net> | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #ifndef _SPARC64_WATCHDOG_H | ||
11 | #define _SPARC64_WATCHDOG_H | ||
12 | |||
13 | #include <linux/watchdog.h> | ||
14 | |||
15 | /* Solaris compatibility ioctls-- | ||
16 | * Ref. <linux/watchdog.h> for standard linux watchdog ioctls | ||
17 | */ | ||
18 | #define WIOCSTART _IO (WATCHDOG_IOCTL_BASE, 10) /* Start Timer */ | ||
19 | #define WIOCSTOP _IO (WATCHDOG_IOCTL_BASE, 11) /* Stop Timer */ | ||
20 | #define WIOCGSTAT _IOR(WATCHDOG_IOCTL_BASE, 12, int)/* Get Timer Status */ | ||
21 | |||
22 | /* Status flags from WIOCGSTAT ioctl | ||
23 | */ | ||
24 | #define WD_FREERUN 0x01 /* timer is running, interrupts disabled */ | ||
25 | #define WD_EXPIRED 0x02 /* timer has expired */ | ||
26 | #define WD_RUNNING 0x04 /* timer is running, interrupts enabled */ | ||
27 | #define WD_STOPPED 0x08 /* timer has not been started */ | ||
28 | #define WD_SERVICED 0x10 /* timer interrupt was serviced */ | ||
29 | |||
30 | #endif /* ifndef _SPARC64_WATCHDOG_H */ | ||
31 | |||