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-rw-r--r--include/asm-sparc64/auxio.h2
-rw-r--r--include/asm-sparc64/compat.h1
-rw-r--r--include/asm-sparc64/floppy.h16
-rw-r--r--include/asm-sparc64/irq.h56
-rw-r--r--include/asm-sparc64/kdebug.h2
-rw-r--r--include/asm-sparc64/page.h2
-rw-r--r--include/asm-sparc64/param.h5
-rw-r--r--include/asm-sparc64/parport.h4
-rw-r--r--include/asm-sparc64/pbm.h3
-rw-r--r--include/asm-sparc64/pci.h19
-rw-r--r--include/asm-sparc64/pgtable.h1
-rw-r--r--include/asm-sparc64/processor.h34
-rw-r--r--include/asm-sparc64/rwsem.h3
-rw-r--r--include/asm-sparc64/seccomp.h21
-rw-r--r--include/asm-sparc64/signal.h15
-rw-r--r--include/asm-sparc64/smp.h2
-rw-r--r--include/asm-sparc64/spinlock.h29
-rw-r--r--include/asm-sparc64/spitfire.h1
-rw-r--r--include/asm-sparc64/system.h14
-rw-r--r--include/asm-sparc64/termios.h78
-rw-r--r--include/asm-sparc64/thread_info.h13
-rw-r--r--include/asm-sparc64/unistd.h4
22 files changed, 195 insertions, 130 deletions
diff --git a/include/asm-sparc64/auxio.h b/include/asm-sparc64/auxio.h
index 5eb01dd47150..81a590a50a1f 100644
--- a/include/asm-sparc64/auxio.h
+++ b/include/asm-sparc64/auxio.h
@@ -75,6 +75,8 @@
75 75
76#ifndef __ASSEMBLY__ 76#ifndef __ASSEMBLY__
77 77
78extern void __iomem *auxio_register;
79
78#define AUXIO_LTE_ON 1 80#define AUXIO_LTE_ON 1
79#define AUXIO_LTE_OFF 0 81#define AUXIO_LTE_OFF 0
80 82
diff --git a/include/asm-sparc64/compat.h b/include/asm-sparc64/compat.h
index 22f58055b8ab..b59122dd176d 100644
--- a/include/asm-sparc64/compat.h
+++ b/include/asm-sparc64/compat.h
@@ -25,6 +25,7 @@ typedef s32 compat_daddr_t;
25typedef u32 compat_caddr_t; 25typedef u32 compat_caddr_t;
26typedef __kernel_fsid_t compat_fsid_t; 26typedef __kernel_fsid_t compat_fsid_t;
27typedef s32 compat_key_t; 27typedef s32 compat_key_t;
28typedef s32 compat_timer_t;
28 29
29typedef s32 compat_int_t; 30typedef s32 compat_int_t;
30typedef s32 compat_long_t; 31typedef s32 compat_long_t;
diff --git a/include/asm-sparc64/floppy.h b/include/asm-sparc64/floppy.h
index e071b4b4edfd..49d49a285943 100644
--- a/include/asm-sparc64/floppy.h
+++ b/include/asm-sparc64/floppy.h
@@ -159,7 +159,7 @@ static void sun_82077_fd_outb(unsigned char value, unsigned long port)
159 * underruns. If non-zero, doing_pdma encodes the direction of 159 * underruns. If non-zero, doing_pdma encodes the direction of
160 * the transfer for debugging. 1=read 2=write 160 * the transfer for debugging. 1=read 2=write
161 */ 161 */
162char *pdma_vaddr; 162unsigned char *pdma_vaddr;
163unsigned long pdma_size; 163unsigned long pdma_size;
164volatile int doing_pdma = 0; 164volatile int doing_pdma = 0;
165 165
@@ -209,8 +209,7 @@ static void sun_fd_enable_dma(void)
209 pdma_areasize = pdma_size; 209 pdma_areasize = pdma_size;
210} 210}
211 211
212/* Our low-level entry point in arch/sparc/kernel/entry.S */ 212extern irqreturn_t sparc_floppy_irq(int, void *, struct pt_regs *);
213extern irqreturn_t floppy_hardint(int irq, void *unused, struct pt_regs *regs);
214 213
215static int sun_fd_request_irq(void) 214static int sun_fd_request_irq(void)
216{ 215{
@@ -220,8 +219,8 @@ static int sun_fd_request_irq(void)
220 if(!once) { 219 if(!once) {
221 once = 1; 220 once = 1;
222 221
223 error = request_fast_irq(FLOPPY_IRQ, floppy_hardint, 222 error = request_irq(FLOPPY_IRQ, sparc_floppy_irq,
224 SA_INTERRUPT, "floppy", NULL); 223 SA_INTERRUPT, "floppy", NULL);
225 224
226 return ((error == 0) ? 0 : -1); 225 return ((error == 0) ? 0 : -1);
227 } 226 }
@@ -615,7 +614,7 @@ static unsigned long __init sun_floppy_init(void)
615 struct linux_ebus *ebus; 614 struct linux_ebus *ebus;
616 struct linux_ebus_device *edev = NULL; 615 struct linux_ebus_device *edev = NULL;
617 unsigned long config = 0; 616 unsigned long config = 0;
618 unsigned long auxio_reg; 617 void __iomem *auxio_reg;
619 618
620 for_each_ebus(ebus) { 619 for_each_ebus(ebus) {
621 for_each_ebusdev(edev, ebus) { 620 for_each_ebusdev(edev, ebus) {
@@ -642,7 +641,7 @@ static unsigned long __init sun_floppy_init(void)
642 /* Make sure the high density bit is set, some systems 641 /* Make sure the high density bit is set, some systems
643 * (most notably Ultra5/Ultra10) come up with it clear. 642 * (most notably Ultra5/Ultra10) come up with it clear.
644 */ 643 */
645 auxio_reg = edev->resource[2].start; 644 auxio_reg = (void __iomem *) edev->resource[2].start;
646 writel(readl(auxio_reg)|0x2, auxio_reg); 645 writel(readl(auxio_reg)|0x2, auxio_reg);
647 646
648 sun_pci_ebus_dev = ebus->self; 647 sun_pci_ebus_dev = ebus->self;
@@ -650,7 +649,8 @@ static unsigned long __init sun_floppy_init(void)
650 spin_lock_init(&sun_pci_fd_ebus_dma.lock); 649 spin_lock_init(&sun_pci_fd_ebus_dma.lock);
651 650
652 /* XXX ioremap */ 651 /* XXX ioremap */
653 sun_pci_fd_ebus_dma.regs = edev->resource[1].start; 652 sun_pci_fd_ebus_dma.regs = (void __iomem *)
653 edev->resource[1].start;
654 if (!sun_pci_fd_ebus_dma.regs) 654 if (!sun_pci_fd_ebus_dma.regs)
655 return 0; 655 return 0;
656 656
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index 3aef0ca67750..8b70edcb80dc 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -16,10 +16,22 @@
16#include <asm/pil.h> 16#include <asm/pil.h>
17#include <asm/ptrace.h> 17#include <asm/ptrace.h>
18 18
19struct ino_bucket;
20
21#define MAX_IRQ_DESC_ACTION 4
22
23struct irq_desc {
24 void (*pre_handler)(struct ino_bucket *, void *, void *);
25 void *pre_handler_arg1;
26 void *pre_handler_arg2;
27 u32 action_active_mask;
28 struct irqaction action[MAX_IRQ_DESC_ACTION];
29};
30
19/* You should not mess with this directly. That's the job of irq.c. 31/* You should not mess with this directly. That's the job of irq.c.
20 * 32 *
21 * If you make changes here, please update hand coded assembler of 33 * If you make changes here, please update hand coded assembler of
22 * SBUS/floppy interrupt handler in entry.S -DaveM 34 * the vectored interrupt trap handler in entry.S -DaveM
23 * 35 *
24 * This is currently one DCACHE line, two buckets per L2 cache 36 * This is currently one DCACHE line, two buckets per L2 cache
25 * line. Keep this in mind please. 37 * line. Keep this in mind please.
@@ -42,24 +54,11 @@ struct ino_bucket {
42 /* Miscellaneous flags. */ 54 /* Miscellaneous flags. */
43/*0x06*/unsigned char flags; 55/*0x06*/unsigned char flags;
44 56
45 /* This is used to deal with IBF_DMA_SYNC on 57 /* Currently unused. */
46 * Sabre systems. 58/*0x07*/unsigned char __pad;
47 */ 59
48/*0x07*/unsigned char synctab_ent; 60 /* Reference to IRQ descriptor for this bucket. */
49 61/*0x08*/struct irq_desc *irq_info;
50 /* Reference to handler for this IRQ. If this is
51 * non-NULL this means it is active and should be
52 * serviced. Else the pending member is set to one
53 * and later registry of the interrupt checks for
54 * this condition.
55 *
56 * Normally this is just an irq_action structure.
57 * But, on PCI, if multiple interrupt sources behind
58 * a bridge have multiple interrupt sources that share
59 * the same INO bucket, this points to an array of
60 * pointers to four IRQ action structures.
61 */
62/*0x08*/void *irq_info;
63 62
64 /* Sun5 Interrupt Clear Register. */ 63 /* Sun5 Interrupt Clear Register. */
65/*0x10*/unsigned long iclr; 64/*0x10*/unsigned long iclr;
@@ -69,12 +68,6 @@ struct ino_bucket {
69 68
70}; 69};
71 70
72#ifdef CONFIG_PCI
73extern unsigned long pci_dma_wsync;
74extern unsigned long dma_sync_reg_table[256];
75extern unsigned char dma_sync_reg_table_entry;
76#endif
77
78/* IMAP/ICLR register defines */ 71/* IMAP/ICLR register defines */
79#define IMAP_VALID 0x80000000 /* IRQ Enabled */ 72#define IMAP_VALID 0x80000000 /* IRQ Enabled */
80#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */ 73#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */
@@ -90,11 +83,9 @@ extern unsigned char dma_sync_reg_table_entry;
90#define ICLR_PENDING 0x00000003 /* Pending state */ 83#define ICLR_PENDING 0x00000003 /* Pending state */
91 84
92/* Only 8-bits are available, be careful. -DaveM */ 85/* Only 8-bits are available, be careful. -DaveM */
93#define IBF_DMA_SYNC 0x01 /* DMA synchronization behind PCI bridge needed. */ 86#define IBF_PCI 0x02 /* PSYCHO/SABRE/SCHIZO PCI interrupt. */
94#define IBF_PCI 0x02 /* Indicates PSYCHO/SABRE/SCHIZO PCI interrupt. */ 87#define IBF_ACTIVE 0x04 /* Interrupt is active and has a handler.*/
95#define IBF_ACTIVE 0x04 /* This interrupt is active and has a handler. */ 88#define IBF_INPROGRESS 0x10 /* IRQ is being serviced. */
96#define IBF_MULTI 0x08 /* On PCI, indicates shared bucket. */
97#define IBF_INPROGRESS 0x10 /* IRQ is being serviced. */
98 89
99#define NUM_IVECS (IMAP_INR + 1) 90#define NUM_IVECS (IMAP_INR + 1)
100extern struct ino_bucket ivector_table[NUM_IVECS]; 91extern struct ino_bucket ivector_table[NUM_IVECS];
@@ -122,11 +113,6 @@ extern void enable_irq(unsigned int);
122extern unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap); 113extern unsigned int build_irq(int pil, int inofixup, unsigned long iclr, unsigned long imap);
123extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); 114extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
124 115
125extern int request_fast_irq(unsigned int irq,
126 irqreturn_t (*handler)(int, void *, struct pt_regs *),
127 unsigned long flags, __const__ char *devname,
128 void *dev_id);
129
130static __inline__ void set_softint(unsigned long bits) 116static __inline__ void set_softint(unsigned long bits)
131{ 117{
132 __asm__ __volatile__("wr %0, 0x0, %%set_softint" 118 __asm__ __volatile__("wr %0, 0x0, %%set_softint"
diff --git a/include/asm-sparc64/kdebug.h b/include/asm-sparc64/kdebug.h
index f70d3dad01f9..6321f5a0198d 100644
--- a/include/asm-sparc64/kdebug.h
+++ b/include/asm-sparc64/kdebug.h
@@ -16,7 +16,7 @@ struct die_args {
16}; 16};
17 17
18/* Note - you should never unregister because that can race with NMIs. 18/* Note - you should never unregister because that can race with NMIs.
19 * If you really want to do it first unregister - then synchronize_kernel 19 * If you really want to do it first unregister - then synchronize_sched
20 * - then free. 20 * - then free.
21 */ 21 */
22int register_die_notifier(struct notifier_block *nb); 22int register_die_notifier(struct notifier_block *nb);
diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h
index 219ea043a14a..b87dbbd64bc9 100644
--- a/include/asm-sparc64/page.h
+++ b/include/asm-sparc64/page.h
@@ -95,6 +95,8 @@ typedef unsigned long pgprot_t;
95#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) 95#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
96#define HPAGE_MASK (~(HPAGE_SIZE - 1UL)) 96#define HPAGE_MASK (~(HPAGE_SIZE - 1UL))
97#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) 97#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
98#define ARCH_HAS_SETCLEAR_HUGE_PTE
99#define ARCH_HAS_HUGETLB_PREFAULT_HOOK
98#endif 100#endif
99 101
100#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \ 102#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \
diff --git a/include/asm-sparc64/param.h b/include/asm-sparc64/param.h
index 6a12f3ac0359..a1cd4974630b 100644
--- a/include/asm-sparc64/param.h
+++ b/include/asm-sparc64/param.h
@@ -1,9 +1,10 @@
1/* $Id: param.h,v 1.2 2000/10/30 21:01:41 davem Exp $ */
2#ifndef _ASMSPARC64_PARAM_H 1#ifndef _ASMSPARC64_PARAM_H
3#define _ASMSPARC64_PARAM_H 2#define _ASMSPARC64_PARAM_H
4 3
4#include <linux/config.h>
5
5#ifdef __KERNEL__ 6#ifdef __KERNEL__
6# define HZ 1000 /* Internal kernel timer frequency */ 7# define HZ CONFIG_HZ /* Internal kernel timer frequency */
7# define USER_HZ 100 /* .. some user interfaces are in "ticks" */ 8# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
8# define CLOCKS_PER_SEC (USER_HZ) 9# define CLOCKS_PER_SEC (USER_HZ)
9#endif 10#endif
diff --git a/include/asm-sparc64/parport.h b/include/asm-sparc64/parport.h
index b7e635544cec..56b5197d7898 100644
--- a/include/asm-sparc64/parport.h
+++ b/include/asm-sparc64/parport.h
@@ -27,12 +27,12 @@ static struct sparc_ebus_info {
27 27
28static __inline__ void enable_dma(unsigned int dmanr) 28static __inline__ void enable_dma(unsigned int dmanr)
29{ 29{
30 ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1);
31
30 if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info, 32 if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info,
31 sparc_ebus_dmas[dmanr].addr, 33 sparc_ebus_dmas[dmanr].addr,
32 sparc_ebus_dmas[dmanr].count)) 34 sparc_ebus_dmas[dmanr].count))
33 BUG(); 35 BUG();
34
35 ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1);
36} 36}
37 37
38static __inline__ void disable_dma(unsigned int dmanr) 38static __inline__ void disable_dma(unsigned int dmanr)
diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h
index 4c15610a2bac..38bbbccb4068 100644
--- a/include/asm-sparc64/pbm.h
+++ b/include/asm-sparc64/pbm.h
@@ -145,6 +145,9 @@ struct pci_pbm_info {
145 /* Physical address base of PBM registers. */ 145 /* Physical address base of PBM registers. */
146 unsigned long pbm_regs; 146 unsigned long pbm_regs;
147 147
148 /* Physical address of DMA sync register, if any. */
149 unsigned long sync_reg;
150
148 /* Opaque 32-bit system bus Port ID. */ 151 /* Opaque 32-bit system bus Port ID. */
149 u32 portid; 152 u32 portid;
150 153
diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h
index e38d6598d626..a4ab0ec7143a 100644
--- a/include/asm-sparc64/pci.h
+++ b/include/asm-sparc64/pci.h
@@ -220,6 +220,25 @@ static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
220 return (dma_addr == PCI_DMA_ERROR_CODE); 220 return (dma_addr == PCI_DMA_ERROR_CODE);
221} 221}
222 222
223#ifdef CONFIG_PCI
224static inline void pci_dma_burst_advice(struct pci_dev *pdev,
225 enum pci_dma_burst_strategy *strat,
226 unsigned long *strategy_parameter)
227{
228 unsigned long cacheline_size;
229 u8 byte;
230
231 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
232 if (byte == 0)
233 cacheline_size = 1024;
234 else
235 cacheline_size = (int) byte * 4;
236
237 *strat = PCI_DMA_BURST_BOUNDARY;
238 *strategy_parameter = cacheline_size;
239}
240#endif
241
223/* Return the index of the PCI controller for device PDEV. */ 242/* Return the index of the PCI controller for device PDEV. */
224 243
225extern int pci_domain_nr(struct pci_bus *bus); 244extern int pci_domain_nr(struct pci_bus *bus);
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index ae2cd5b09a7c..1ae00c5087f1 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -286,6 +286,7 @@ static inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot)
286#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R)) 286#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R))
287#define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_WRITE)) 287#define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_WRITE))
288#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W)) 288#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W))
289#define pte_mkhuge(pte) (__pte(pte_val(pte) | _PAGE_SZHUGE))
289 290
290/* to find an entry in a page-table-directory. */ 291/* to find an entry in a page-table-directory. */
291#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 292#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h
index bc1445b904ef..d0bee2413560 100644
--- a/include/asm-sparc64/processor.h
+++ b/include/asm-sparc64/processor.h
@@ -192,6 +192,40 @@ extern unsigned long get_wchan(struct task_struct *task);
192 192
193#define cpu_relax() barrier() 193#define cpu_relax() barrier()
194 194
195/* Prefetch support. This is tuned for UltraSPARC-III and later.
196 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
197 * a shallower prefetch queue than later chips.
198 */
199#define ARCH_HAS_PREFETCH
200#define ARCH_HAS_PREFETCHW
201#define ARCH_HAS_SPINLOCK_PREFETCH
202
203static inline void prefetch(const void *x)
204{
205 /* We do not use the read prefetch mnemonic because that
206 * prefetches into the prefetch-cache which only is accessible
207 * by floating point operations in UltraSPARC-III and later.
208 * By contrast, "#one_write" prefetches into the L2 cache
209 * in shared state.
210 */
211 __asm__ __volatile__("prefetch [%0], #one_write"
212 : /* no outputs */
213 : "r" (x));
214}
215
216static inline void prefetchw(const void *x)
217{
218 /* The most optimal prefetch to use for writes is
219 * "#n_writes". This brings the cacheline into the
220 * L2 cache in "owned" state.
221 */
222 __asm__ __volatile__("prefetch [%0], #n_writes"
223 : /* no outputs */
224 : "r" (x));
225}
226
227#define spin_lock_prefetch(x) prefetchw(x)
228
195#endif /* !(__ASSEMBLY__) */ 229#endif /* !(__ASSEMBLY__) */
196 230
197#endif /* !(__ASM_SPARC64_PROCESSOR_H) */ 231#endif /* !(__ASM_SPARC64_PROCESSOR_H) */
diff --git a/include/asm-sparc64/rwsem.h b/include/asm-sparc64/rwsem.h
index bf2ae90ed3df..a1cc94f95984 100644
--- a/include/asm-sparc64/rwsem.h
+++ b/include/asm-sparc64/rwsem.h
@@ -55,8 +55,9 @@ static __inline__ int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
55 "add %%g1, %1, %%g7\n\t" 55 "add %%g1, %1, %%g7\n\t"
56 "cas [%2], %%g1, %%g7\n\t" 56 "cas [%2], %%g1, %%g7\n\t"
57 "cmp %%g1, %%g7\n\t" 57 "cmp %%g1, %%g7\n\t"
58 "membar #StoreLoad | #StoreStore\n\t"
58 "bne,pn %%icc, 1b\n\t" 59 "bne,pn %%icc, 1b\n\t"
59 " membar #StoreLoad | #StoreStore\n\t" 60 " nop\n\t"
60 "mov %%g7, %0\n\t" 61 "mov %%g7, %0\n\t"
61 : "=&r" (tmp) 62 : "=&r" (tmp)
62 : "0" (tmp), "r" (sem) 63 : "0" (tmp), "r" (sem)
diff --git a/include/asm-sparc64/seccomp.h b/include/asm-sparc64/seccomp.h
new file mode 100644
index 000000000000..7fcd9968192b
--- /dev/null
+++ b/include/asm-sparc64/seccomp.h
@@ -0,0 +1,21 @@
1#ifndef _ASM_SECCOMP_H
2
3#include <linux/thread_info.h> /* already defines TIF_32BIT */
4
5#ifndef TIF_32BIT
6#error "unexpected TIF_32BIT on sparc64"
7#endif
8
9#include <linux/unistd.h>
10
11#define __NR_seccomp_read __NR_read
12#define __NR_seccomp_write __NR_write
13#define __NR_seccomp_exit __NR_exit
14#define __NR_seccomp_sigreturn __NR_rt_sigreturn
15
16#define __NR_seccomp_read_32 __NR_read
17#define __NR_seccomp_write_32 __NR_write
18#define __NR_seccomp_exit_32 __NR_exit
19#define __NR_seccomp_sigreturn_32 __NR_sigreturn
20
21#endif /* _ASM_SECCOMP_H */
diff --git a/include/asm-sparc64/signal.h b/include/asm-sparc64/signal.h
index becdf1bc5924..e3059bb4a465 100644
--- a/include/asm-sparc64/signal.h
+++ b/include/asm-sparc64/signal.h
@@ -162,21 +162,6 @@ struct sigstack {
162#define MINSIGSTKSZ 4096 162#define MINSIGSTKSZ 4096
163#define SIGSTKSZ 16384 163#define SIGSTKSZ 16384
164 164
165#ifdef __KERNEL__
166/*
167 * DJHR
168 * SA_STATIC_ALLOC is used for the SPARC system to indicate that this
169 * interrupt handler's irq structure should be statically allocated
170 * by the request_irq routine.
171 * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge
172 * of interrupt usage and that sucks. Also without a flag like this
173 * it may be possible for the free_irq routine to attempt to free
174 * statically allocated data.. which is NOT GOOD.
175 *
176 */
177#define SA_STATIC_ALLOC 0x80
178#endif
179
180#include <asm-generic/signal.h> 165#include <asm-generic/signal.h>
181 166
182struct __new_sigaction { 167struct __new_sigaction {
diff --git a/include/asm-sparc64/smp.h b/include/asm-sparc64/smp.h
index 5e3e06d908fe..110a2de89123 100644
--- a/include/asm-sparc64/smp.h
+++ b/include/asm-sparc64/smp.h
@@ -64,7 +64,7 @@ static __inline__ int hard_smp_processor_id(void)
64 } 64 }
65} 65}
66 66
67#define smp_processor_id() (current_thread_info()->cpu) 67#define raw_smp_processor_id() (current_thread_info()->cpu)
68 68
69#endif /* !(__ASSEMBLY__) */ 69#endif /* !(__ASSEMBLY__) */
70 70
diff --git a/include/asm-sparc64/spinlock.h b/include/asm-sparc64/spinlock.h
index db7581bdb531..9cb93a5c2b4f 100644
--- a/include/asm-sparc64/spinlock.h
+++ b/include/asm-sparc64/spinlock.h
@@ -52,12 +52,14 @@ static inline void _raw_spin_lock(spinlock_t *lock)
52 52
53 __asm__ __volatile__( 53 __asm__ __volatile__(
54"1: ldstub [%1], %0\n" 54"1: ldstub [%1], %0\n"
55" membar #StoreLoad | #StoreStore\n"
55" brnz,pn %0, 2f\n" 56" brnz,pn %0, 2f\n"
56" membar #StoreLoad | #StoreStore\n" 57" nop\n"
57" .subsection 2\n" 58" .subsection 2\n"
58"2: ldub [%1], %0\n" 59"2: ldub [%1], %0\n"
60" membar #LoadLoad\n"
59" brnz,pt %0, 2b\n" 61" brnz,pt %0, 2b\n"
60" membar #LoadLoad\n" 62" nop\n"
61" ba,a,pt %%xcc, 1b\n" 63" ba,a,pt %%xcc, 1b\n"
62" .previous" 64" .previous"
63 : "=&r" (tmp) 65 : "=&r" (tmp)
@@ -95,16 +97,18 @@ static inline void _raw_spin_lock_flags(spinlock_t *lock, unsigned long flags)
95 97
96 __asm__ __volatile__( 98 __asm__ __volatile__(
97"1: ldstub [%2], %0\n" 99"1: ldstub [%2], %0\n"
98" brnz,pn %0, 2f\n"
99" membar #StoreLoad | #StoreStore\n" 100" membar #StoreLoad | #StoreStore\n"
101" brnz,pn %0, 2f\n"
102" nop\n"
100" .subsection 2\n" 103" .subsection 2\n"
101"2: rdpr %%pil, %1\n" 104"2: rdpr %%pil, %1\n"
102" wrpr %3, %%pil\n" 105" wrpr %3, %%pil\n"
103"3: ldub [%2], %0\n" 106"3: ldub [%2], %0\n"
104" brnz,pt %0, 3b\n"
105" membar #LoadLoad\n" 107" membar #LoadLoad\n"
108" brnz,pt %0, 3b\n"
109" nop\n"
106" ba,pt %%xcc, 1b\n" 110" ba,pt %%xcc, 1b\n"
107" wrpr %1, %%pil\n" 111" wrpr %1, %%pil\n"
108" .previous" 112" .previous"
109 : "=&r" (tmp1), "=&r" (tmp2) 113 : "=&r" (tmp1), "=&r" (tmp2)
110 : "r"(lock), "r"(flags) 114 : "r"(lock), "r"(flags)
@@ -162,12 +166,14 @@ static void inline __read_lock(rwlock_t *lock)
162"4: add %0, 1, %1\n" 166"4: add %0, 1, %1\n"
163" cas [%2], %0, %1\n" 167" cas [%2], %0, %1\n"
164" cmp %0, %1\n" 168" cmp %0, %1\n"
169" membar #StoreLoad | #StoreStore\n"
165" bne,pn %%icc, 1b\n" 170" bne,pn %%icc, 1b\n"
166" membar #StoreLoad | #StoreStore\n" 171" nop\n"
167" .subsection 2\n" 172" .subsection 2\n"
168"2: ldsw [%2], %0\n" 173"2: ldsw [%2], %0\n"
174" membar #LoadLoad\n"
169" brlz,pt %0, 2b\n" 175" brlz,pt %0, 2b\n"
170" membar #LoadLoad\n" 176" nop\n"
171" ba,a,pt %%xcc, 4b\n" 177" ba,a,pt %%xcc, 4b\n"
172" .previous" 178" .previous"
173 : "=&r" (tmp1), "=&r" (tmp2) 179 : "=&r" (tmp1), "=&r" (tmp2)
@@ -204,12 +210,14 @@ static void inline __write_lock(rwlock_t *lock)
204"4: or %0, %3, %1\n" 210"4: or %0, %3, %1\n"
205" cas [%2], %0, %1\n" 211" cas [%2], %0, %1\n"
206" cmp %0, %1\n" 212" cmp %0, %1\n"
213" membar #StoreLoad | #StoreStore\n"
207" bne,pn %%icc, 1b\n" 214" bne,pn %%icc, 1b\n"
208" membar #StoreLoad | #StoreStore\n" 215" nop\n"
209" .subsection 2\n" 216" .subsection 2\n"
210"2: lduw [%2], %0\n" 217"2: lduw [%2], %0\n"
218" membar #LoadLoad\n"
211" brnz,pt %0, 2b\n" 219" brnz,pt %0, 2b\n"
212" membar #LoadLoad\n" 220" nop\n"
213" ba,a,pt %%xcc, 4b\n" 221" ba,a,pt %%xcc, 4b\n"
214" .previous" 222" .previous"
215 : "=&r" (tmp1), "=&r" (tmp2) 223 : "=&r" (tmp1), "=&r" (tmp2)
@@ -240,8 +248,9 @@ static int inline __write_trylock(rwlock_t *lock)
240" or %0, %4, %1\n" 248" or %0, %4, %1\n"
241" cas [%3], %0, %1\n" 249" cas [%3], %0, %1\n"
242" cmp %0, %1\n" 250" cmp %0, %1\n"
251" membar #StoreLoad | #StoreStore\n"
243" bne,pn %%icc, 1b\n" 252" bne,pn %%icc, 1b\n"
244" membar #StoreLoad | #StoreStore\n" 253" nop\n"
245" mov 1, %2\n" 254" mov 1, %2\n"
246"2:" 255"2:"
247 : "=&r" (tmp1), "=&r" (tmp2), "=&r" (result) 256 : "=&r" (tmp1), "=&r" (tmp2), "=&r" (result)
diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h
index 9d7613eea812..1aa932773af8 100644
--- a/include/asm-sparc64/spitfire.h
+++ b/include/asm-sparc64/spitfire.h
@@ -111,7 +111,6 @@ static __inline__ void spitfire_put_dcache_tag(unsigned long addr, unsigned long
111 "membar #Sync" 111 "membar #Sync"
112 : /* No outputs */ 112 : /* No outputs */
113 : "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG)); 113 : "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG));
114 __asm__ __volatile__ ("membar #Sync" : : : "memory");
115} 114}
116 115
117/* The instruction cache lines are flushed with this, but note that 116/* The instruction cache lines are flushed with this, but note that
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h
index fd12ca386f48..f9be2c5b4dc9 100644
--- a/include/asm-sparc64/system.h
+++ b/include/asm-sparc64/system.h
@@ -139,19 +139,13 @@ extern void __flushw_user(void);
139#define flush_user_windows flushw_user 139#define flush_user_windows flushw_user
140#define flush_register_windows flushw_all 140#define flush_register_windows flushw_all
141 141
142#define prepare_arch_switch(rq, next) \ 142/* Don't hold the runqueue lock over context switch */
143do { spin_lock(&(next)->switch_lock); \ 143#define __ARCH_WANT_UNLOCKED_CTXSW
144 spin_unlock(&(rq)->lock); \ 144#define prepare_arch_switch(next) \
145do { \
145 flushw_all(); \ 146 flushw_all(); \
146} while (0) 147} while (0)
147 148
148#define finish_arch_switch(rq, prev) \
149do { spin_unlock_irq(&(prev)->switch_lock); \
150} while (0)
151
152#define task_running(rq, p) \
153 ((rq)->curr == (p) || spin_is_locked(&(p)->switch_lock))
154
155 /* See what happens when you design the chip correctly? 149 /* See what happens when you design the chip correctly?
156 * 150 *
157 * We tell gcc we clobber all non-fixed-usage registers except 151 * We tell gcc we clobber all non-fixed-usage registers except
diff --git a/include/asm-sparc64/termios.h b/include/asm-sparc64/termios.h
index 8effce0da087..9777a9cca88a 100644
--- a/include/asm-sparc64/termios.h
+++ b/include/asm-sparc64/termios.h
@@ -100,16 +100,17 @@ struct winsize {
100#define user_termio_to_kernel_termios(termios, termio) \ 100#define user_termio_to_kernel_termios(termios, termio) \
101({ \ 101({ \
102 unsigned short tmp; \ 102 unsigned short tmp; \
103 get_user(tmp, &(termio)->c_iflag); \ 103 int err; \
104 err = get_user(tmp, &(termio)->c_iflag); \
104 (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \ 105 (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \
105 get_user(tmp, &(termio)->c_oflag); \ 106 err |= get_user(tmp, &(termio)->c_oflag); \
106 (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \ 107 (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \
107 get_user(tmp, &(termio)->c_cflag); \ 108 err |= get_user(tmp, &(termio)->c_cflag); \
108 (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \ 109 (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \
109 get_user(tmp, &(termio)->c_lflag); \ 110 err |= get_user(tmp, &(termio)->c_lflag); \
110 (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \ 111 (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \
111 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ 112 err |= copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
112 0; \ 113 err; \
113}) 114})
114 115
115/* 116/*
@@ -119,53 +120,56 @@ struct winsize {
119 */ 120 */
120#define kernel_termios_to_user_termio(termio, termios) \ 121#define kernel_termios_to_user_termio(termio, termios) \
121({ \ 122({ \
122 put_user((termios)->c_iflag, &(termio)->c_iflag); \ 123 int err; \
123 put_user((termios)->c_oflag, &(termio)->c_oflag); \ 124 err = put_user((termios)->c_iflag, &(termio)->c_iflag); \
124 put_user((termios)->c_cflag, &(termio)->c_cflag); \ 125 err |= put_user((termios)->c_oflag, &(termio)->c_oflag); \
125 put_user((termios)->c_lflag, &(termio)->c_lflag); \ 126 err |= put_user((termios)->c_cflag, &(termio)->c_cflag); \
126 put_user((termios)->c_line, &(termio)->c_line); \ 127 err |= put_user((termios)->c_lflag, &(termio)->c_lflag); \
127 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ 128 err |= put_user((termios)->c_line, &(termio)->c_line); \
129 err |= copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
128 if (!((termios)->c_lflag & ICANON)) { \ 130 if (!((termios)->c_lflag & ICANON)) { \
129 put_user((termios)->c_cc[VMIN], &(termio)->c_cc[_VMIN]); \ 131 err |= put_user((termios)->c_cc[VMIN], &(termio)->c_cc[_VMIN]); \
130 put_user((termios)->c_cc[VTIME], &(termio)->c_cc[_VTIME]); \ 132 err |= put_user((termios)->c_cc[VTIME], &(termio)->c_cc[_VTIME]); \
131 } \ 133 } \
132 0; \ 134 err; \
133}) 135})
134 136
135#define user_termios_to_kernel_termios(k, u) \ 137#define user_termios_to_kernel_termios(k, u) \
136({ \ 138({ \
137 get_user((k)->c_iflag, &(u)->c_iflag); \ 139 int err; \
138 get_user((k)->c_oflag, &(u)->c_oflag); \ 140 err = get_user((k)->c_iflag, &(u)->c_iflag); \
139 get_user((k)->c_cflag, &(u)->c_cflag); \ 141 err |= get_user((k)->c_oflag, &(u)->c_oflag); \
140 get_user((k)->c_lflag, &(u)->c_lflag); \ 142 err |= get_user((k)->c_cflag, &(u)->c_cflag); \
141 get_user((k)->c_line, &(u)->c_line); \ 143 err |= get_user((k)->c_lflag, &(u)->c_lflag); \
142 copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \ 144 err |= get_user((k)->c_line, &(u)->c_line); \
145 err |= copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \
143 if((k)->c_lflag & ICANON) { \ 146 if((k)->c_lflag & ICANON) { \
144 get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ 147 err |= get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \
145 get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ 148 err |= get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \
146 } else { \ 149 } else { \
147 get_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ 150 err |= get_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \
148 get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ 151 err |= get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \
149 } \ 152 } \
150 0; \ 153 err; \
151}) 154})
152 155
153#define kernel_termios_to_user_termios(u, k) \ 156#define kernel_termios_to_user_termios(u, k) \
154({ \ 157({ \
155 put_user((k)->c_iflag, &(u)->c_iflag); \ 158 int err; \
156 put_user((k)->c_oflag, &(u)->c_oflag); \ 159 err = put_user((k)->c_iflag, &(u)->c_iflag); \
157 put_user((k)->c_cflag, &(u)->c_cflag); \ 160 err |= put_user((k)->c_oflag, &(u)->c_oflag); \
158 put_user((k)->c_lflag, &(u)->c_lflag); \ 161 err |= put_user((k)->c_cflag, &(u)->c_cflag); \
159 put_user((k)->c_line, &(u)->c_line); \ 162 err |= put_user((k)->c_lflag, &(u)->c_lflag); \
160 copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \ 163 err |= put_user((k)->c_line, &(u)->c_line); \
164 err |= copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \
161 if(!((k)->c_lflag & ICANON)) { \ 165 if(!((k)->c_lflag & ICANON)) { \
162 put_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ 166 err |= put_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \
163 put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ 167 err |= put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \
164 } else { \ 168 } else { \
165 put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ 169 err |= put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \
166 put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ 170 err |= put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \
167 } \ 171 } \
168 0; \ 172 err; \
169}) 173})
170 174
171#endif /* __KERNEL__ */ 175#endif /* __KERNEL__ */
diff --git a/include/asm-sparc64/thread_info.h b/include/asm-sparc64/thread_info.h
index 517caaba1c87..a1d25c06f92a 100644
--- a/include/asm-sparc64/thread_info.h
+++ b/include/asm-sparc64/thread_info.h
@@ -46,7 +46,7 @@ struct thread_info {
46 unsigned long fault_address; 46 unsigned long fault_address;
47 struct pt_regs *kregs; 47 struct pt_regs *kregs;
48 struct exec_domain *exec_domain; 48 struct exec_domain *exec_domain;
49 int preempt_count; 49 int preempt_count; /* 0 => preemptable, <0 => BUG */
50 int __pad; 50 int __pad;
51 51
52 unsigned long *utraps; 52 unsigned long *utraps;
@@ -220,8 +220,8 @@ register struct thread_info *current_thread_info_reg asm("g6");
220#define TIF_NEWSIGNALS 6 /* wants new-style signals */ 220#define TIF_NEWSIGNALS 6 /* wants new-style signals */
221#define TIF_32BIT 7 /* 32-bit binary */ 221#define TIF_32BIT 7 /* 32-bit binary */
222#define TIF_NEWCHILD 8 /* just-spawned child process */ 222#define TIF_NEWCHILD 8 /* just-spawned child process */
223/* TIF_* value 9 is available */ 223#define TIF_SECCOMP 9 /* secure computing */
224#define TIF_POLLING_NRFLAG 10 224#define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */
225#define TIF_SYSCALL_SUCCESS 11 225#define TIF_SYSCALL_SUCCESS 11
226/* NOTE: Thread flags >= 12 should be ones we have no interest 226/* NOTE: Thread flags >= 12 should be ones we have no interest
227 * in using in assembly, else we can't use the mask as 227 * in using in assembly, else we can't use the mask as
@@ -229,6 +229,7 @@ register struct thread_info *current_thread_info_reg asm("g6");
229 */ 229 */
230#define TIF_ABI_PENDING 12 230#define TIF_ABI_PENDING 12
231#define TIF_MEMDIE 13 231#define TIF_MEMDIE 13
232#define TIF_POLLING_NRFLAG 14
232 233
233#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 234#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
234#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 235#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
@@ -239,9 +240,11 @@ register struct thread_info *current_thread_info_reg asm("g6");
239#define _TIF_NEWSIGNALS (1<<TIF_NEWSIGNALS) 240#define _TIF_NEWSIGNALS (1<<TIF_NEWSIGNALS)
240#define _TIF_32BIT (1<<TIF_32BIT) 241#define _TIF_32BIT (1<<TIF_32BIT)
241#define _TIF_NEWCHILD (1<<TIF_NEWCHILD) 242#define _TIF_NEWCHILD (1<<TIF_NEWCHILD)
242#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 243#define _TIF_SECCOMP (1<<TIF_SECCOMP)
243#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) 244#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
244#define _TIF_SYSCALL_SUCCESS (1<<TIF_SYSCALL_SUCCESS) 245#define _TIF_SYSCALL_SUCCESS (1<<TIF_SYSCALL_SUCCESS)
246#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING)
247#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
245 248
246#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \ 249#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \
247 (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \ 250 (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | \
diff --git a/include/asm-sparc64/unistd.h b/include/asm-sparc64/unistd.h
index 5b8dcf5786a5..f59144c6b76a 100644
--- a/include/asm-sparc64/unistd.h
+++ b/include/asm-sparc64/unistd.h
@@ -212,7 +212,7 @@
212#define __NR_epoll_create 193 /* Linux Specific */ 212#define __NR_epoll_create 193 /* Linux Specific */
213#define __NR_epoll_ctl 194 /* Linux Specific */ 213#define __NR_epoll_ctl 194 /* Linux Specific */
214#define __NR_epoll_wait 195 /* Linux Specific */ 214#define __NR_epoll_wait 195 /* Linux Specific */
215/* #define __NR_ulimit 196 Linux Specific */ 215#define __NR_ioprio_set 196 /* Linux Specific */
216#define __NR_getppid 197 /* Linux Specific */ 216#define __NR_getppid 197 /* Linux Specific */
217#define __NR_sigaction 198 /* Linux Specific */ 217#define __NR_sigaction 198 /* Linux Specific */
218#define __NR_sgetmask 199 /* Linux Specific */ 218#define __NR_sgetmask 199 /* Linux Specific */
@@ -234,7 +234,7 @@
234#define __NR_ipc 215 /* Linux Specific */ 234#define __NR_ipc 215 /* Linux Specific */
235#define __NR_sigreturn 216 /* Linux Specific */ 235#define __NR_sigreturn 216 /* Linux Specific */
236#define __NR_clone 217 /* Linux Specific */ 236#define __NR_clone 217 /* Linux Specific */
237/* #define __NR_modify_ldt 218 Linux Specific - i386 specific, unused */ 237#define __NR_ioprio_get 218 /* Linux Specific */
238#define __NR_adjtimex 219 /* Linux Specific */ 238#define __NR_adjtimex 219 /* Linux Specific */
239#define __NR_sigprocmask 220 /* Linux Specific */ 239#define __NR_sigprocmask 220 /* Linux Specific */
240#define __NR_create_module 221 /* Linux Specific */ 240#define __NR_create_module 221 /* Linux Specific */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-27 07:31:52 -0500