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-rw-r--r--include/asm-sparc64/iommu.h22
-rw-r--r--include/asm-sparc64/pbm.h8
2 files changed, 15 insertions, 15 deletions
diff --git a/include/asm-sparc64/iommu.h b/include/asm-sparc64/iommu.h
index 0de7a3da79cd..d8d98f8f747f 100644
--- a/include/asm-sparc64/iommu.h
+++ b/include/asm-sparc64/iommu.h
@@ -7,15 +7,21 @@
7#define _SPARC64_IOMMU_H 7#define _SPARC64_IOMMU_H
8 8
9/* The format of an iopte in the page tables. */ 9/* The format of an iopte in the page tables. */
10#define IOPTE_VALID 0x8000000000000000UL /* IOPTE is valid */ 10#define IOPTE_VALID 0x8000000000000000UL
11#define IOPTE_64K 0x2000000000000000UL /* IOPTE is for 64k page */ 11#define IOPTE_64K 0x2000000000000000UL
12#define IOPTE_STBUF 0x1000000000000000UL /* DVMA can use streaming buffer */ 12#define IOPTE_STBUF 0x1000000000000000UL
13#define IOPTE_INTRA 0x0800000000000000UL /* SBUS slot-->slot direct transfer*/ 13#define IOPTE_INTRA 0x0800000000000000UL
14#define IOPTE_CONTEXT 0x07ff800000000000UL /* Context number */ 14#define IOPTE_CONTEXT 0x07ff800000000000UL
15#define IOPTE_PAGE 0x00007fffffffe000UL /* Physical page number (PA[42:13])*/ 15#define IOPTE_PAGE 0x00007fffffffe000UL
16#define IOPTE_CACHE 0x0000000000000010UL /* Cached (in UPA E-cache) */ 16#define IOPTE_CACHE 0x0000000000000010UL
17#define IOPTE_WRITE 0x0000000000000002UL /* Writeable */ 17#define IOPTE_WRITE 0x0000000000000002UL
18 18
19#define IOMMU_NUM_CTXS 4096 19#define IOMMU_NUM_CTXS 4096
20 20
21struct iommu_arena {
22 unsigned long *map;
23 unsigned int hint;
24 unsigned int limit;
25};
26
21#endif /* !(_SPARC_IOMMU_H) */ 27#endif /* !(_SPARC_IOMMU_H) */
diff --git a/include/asm-sparc64/pbm.h b/include/asm-sparc64/pbm.h
index 9afcc06a575d..4a0ed2ea950c 100644
--- a/include/asm-sparc64/pbm.h
+++ b/include/asm-sparc64/pbm.h
@@ -35,19 +35,13 @@ struct pci_controller_info;
35/* This contains the software state necessary to drive a PCI 35/* This contains the software state necessary to drive a PCI
36 * controller's IOMMU. 36 * controller's IOMMU.
37 */ 37 */
38struct pci_iommu_arena {
39 unsigned long *map;
40 unsigned int hint;
41 unsigned int limit;
42};
43
44struct pci_iommu { 38struct pci_iommu {
45 /* This protects the controller's IOMMU and all 39 /* This protects the controller's IOMMU and all
46 * streaming buffers underneath. 40 * streaming buffers underneath.
47 */ 41 */
48 spinlock_t lock; 42 spinlock_t lock;
49 43
50 struct pci_iommu_arena arena; 44 struct iommu_arena arena;
51 45
52 /* IOMMU page table, a linear array of ioptes. */ 46 /* IOMMU page table, a linear array of ioptes. */
53 iopte_t *page_table; /* The page table itself. */ 47 iopte_t *page_table; /* The page table itself. */