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-rw-r--r--include/asm-sparc64/dma-mapping.h4
-rw-r--r--include/asm-sparc64/futex.h4
-rw-r--r--include/asm-sparc64/pgalloc.h2
-rw-r--r--include/asm-sparc64/unistd.h118
4 files changed, 5 insertions, 123 deletions
diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h
index 27c46fbeebd6..2f858a2df94a 100644
--- a/include/asm-sparc64/dma-mapping.h
+++ b/include/asm-sparc64/dma-mapping.h
@@ -181,7 +181,7 @@ dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t siz
181 181
182#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 182#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
183#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 183#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
184#define dma_is_consistent(d) (1) 184#define dma_is_consistent(d, h) (1)
185 185
186static inline int 186static inline int
187dma_get_cache_alignment(void) 187dma_get_cache_alignment(void)
@@ -210,7 +210,7 @@ dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
210} 210}
211 211
212static inline void 212static inline void
213dma_cache_sync(void *vaddr, size_t size, 213dma_cache_sync(struct device *dev, void *vaddr, size_t size,
214 enum dma_data_direction direction) 214 enum dma_data_direction direction)
215{ 215{
216 /* could define this in terms of the dma_cache ... operations, 216 /* could define this in terms of the dma_cache ... operations,
diff --git a/include/asm-sparc64/futex.h b/include/asm-sparc64/futex.h
index 7392fc4a954e..876312fe82cc 100644
--- a/include/asm-sparc64/futex.h
+++ b/include/asm-sparc64/futex.h
@@ -45,7 +45,7 @@ static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
45 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) 45 if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
46 oparg = 1 << oparg; 46 oparg = 1 << oparg;
47 47
48 inc_preempt_count(); 48 pagefault_disable();
49 49
50 switch (op) { 50 switch (op) {
51 case FUTEX_OP_SET: 51 case FUTEX_OP_SET:
@@ -67,7 +67,7 @@ static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
67 ret = -ENOSYS; 67 ret = -ENOSYS;
68 } 68 }
69 69
70 dec_preempt_count(); 70 pagefault_enable();
71 71
72 if (!ret) { 72 if (!ret) {
73 switch (cmp) { 73 switch (cmp) {
diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h
index 010f9cd0a672..5891ff7ba760 100644
--- a/include/asm-sparc64/pgalloc.h
+++ b/include/asm-sparc64/pgalloc.h
@@ -13,7 +13,7 @@
13#include <asm/page.h> 13#include <asm/page.h>
14 14
15/* Page table allocation/freeing. */ 15/* Page table allocation/freeing. */
16extern kmem_cache_t *pgtable_cache; 16extern struct kmem_cache *pgtable_cache;
17 17
18static inline pgd_t *pgd_alloc(struct mm_struct *mm) 18static inline pgd_t *pgd_alloc(struct mm_struct *mm)
19{ 19{
diff --git a/include/asm-sparc64/unistd.h b/include/asm-sparc64/unistd.h
index 63669dad0d72..47047536f261 100644
--- a/include/asm-sparc64/unistd.h
+++ b/include/asm-sparc64/unistd.h
@@ -332,124 +332,6 @@
332 * find a free slot in the 0-302 range. 332 * find a free slot in the 0-302 range.
333 */ 333 */
334 334
335#define _syscall0(type,name) \
336type name(void) \
337{ \
338long __res; \
339register long __g1 __asm__ ("g1") = __NR_##name; \
340__asm__ __volatile__ ("t 0x6d\n\t" \
341 "sub %%g0, %%o0, %0\n\t" \
342 "movcc %%xcc, %%o0, %0\n\t" \
343 : "=r" (__res)\
344 : "r" (__g1) \
345 : "o0", "cc"); \
346if (__res >= 0) \
347 return (type) __res; \
348errno = -__res; \
349return -1; \
350}
351
352#define _syscall1(type,name,type1,arg1) \
353type name(type1 arg1) \
354{ \
355long __res; \
356register long __g1 __asm__ ("g1") = __NR_##name; \
357register long __o0 __asm__ ("o0") = (long)(arg1); \
358__asm__ __volatile__ ("t 0x6d\n\t" \
359 "sub %%g0, %%o0, %0\n\t" \
360 "movcc %%xcc, %%o0, %0\n\t" \
361 : "=r" (__res), "=&r" (__o0) \
362 : "1" (__o0), "r" (__g1) \
363 : "cc"); \
364if (__res >= 0) \
365 return (type) __res; \
366errno = -__res; \
367return -1; \
368}
369
370#define _syscall2(type,name,type1,arg1,type2,arg2) \
371type name(type1 arg1,type2 arg2) \
372{ \
373long __res; \
374register long __g1 __asm__ ("g1") = __NR_##name; \
375register long __o0 __asm__ ("o0") = (long)(arg1); \
376register long __o1 __asm__ ("o1") = (long)(arg2); \
377__asm__ __volatile__ ("t 0x6d\n\t" \
378 "sub %%g0, %%o0, %0\n\t" \
379 "movcc %%xcc, %%o0, %0\n\t" \
380 : "=r" (__res), "=&r" (__o0) \
381 : "1" (__o0), "r" (__o1), "r" (__g1) \
382 : "cc"); \
383if (__res >= 0) \
384 return (type) __res; \
385errno = -__res; \
386return -1; \
387}
388
389#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
390type name(type1 arg1,type2 arg2,type3 arg3) \
391{ \
392long __res; \
393register long __g1 __asm__ ("g1") = __NR_##name; \
394register long __o0 __asm__ ("o0") = (long)(arg1); \
395register long __o1 __asm__ ("o1") = (long)(arg2); \
396register long __o2 __asm__ ("o2") = (long)(arg3); \
397__asm__ __volatile__ ("t 0x6d\n\t" \
398 "sub %%g0, %%o0, %0\n\t" \
399 "movcc %%xcc, %%o0, %0\n\t" \
400 : "=r" (__res), "=&r" (__o0) \
401 : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__g1) \
402 : "cc"); \
403if (__res>=0) \
404 return (type) __res; \
405errno = -__res; \
406return -1; \
407}
408
409#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
410type name (type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
411{ \
412long __res; \
413register long __g1 __asm__ ("g1") = __NR_##name; \
414register long __o0 __asm__ ("o0") = (long)(arg1); \
415register long __o1 __asm__ ("o1") = (long)(arg2); \
416register long __o2 __asm__ ("o2") = (long)(arg3); \
417register long __o3 __asm__ ("o3") = (long)(arg4); \
418__asm__ __volatile__ ("t 0x6d\n\t" \
419 "sub %%g0, %%o0, %0\n\t" \
420 "movcc %%xcc, %%o0, %0\n\t" \
421 : "=r" (__res), "=&r" (__o0) \
422 : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__g1) \
423 : "cc"); \
424if (__res>=0) \
425 return (type) __res; \
426errno = -__res; \
427return -1; \
428}
429
430#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4, \
431 type5,arg5) \
432type name (type1 arg1,type2 arg2,type3 arg3,type4 arg4,type5 arg5) \
433{ \
434long __res; \
435register long __g1 __asm__ ("g1") = __NR_##name; \
436register long __o0 __asm__ ("o0") = (long)(arg1); \
437register long __o1 __asm__ ("o1") = (long)(arg2); \
438register long __o2 __asm__ ("o2") = (long)(arg3); \
439register long __o3 __asm__ ("o3") = (long)(arg4); \
440register long __o4 __asm__ ("o4") = (long)(arg5); \
441__asm__ __volatile__ ("t 0x6d\n\t" \
442 "sub %%g0, %%o0, %0\n\t" \
443 "movcc %%xcc, %%o0, %0\n\t" \
444 : "=r" (__res), "=&r" (__o0) \
445 : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__o3), "r" (__o4), "r" (__g1) \
446 : "cc"); \
447if (__res>=0) \
448 return (type) __res; \
449errno = -__res; \
450return -1; \
451}
452
453/* sysconf options, for SunOS compatibility */ 335/* sysconf options, for SunOS compatibility */
454#define _SC_ARG_MAX 1 336#define _SC_ARG_MAX 1
455#define _SC_CHILD_MAX 2 337#define _SC_CHILD_MAX 2