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-rw-r--r--include/asm-sparc64/tsb.h13
1 files changed, 10 insertions, 3 deletions
diff --git a/include/asm-sparc64/tsb.h b/include/asm-sparc64/tsb.h
index 09ab3aaa8d20..1addd91d7200 100644
--- a/include/asm-sparc64/tsb.h
+++ b/include/asm-sparc64/tsb.h
@@ -143,6 +143,14 @@
143 add REG1, (3 * 8), REG1; \ 143 add REG1, (3 * 8), REG1; \
14499: 14499:
145 145
146 /* We use a 32K TSB for the whole kernel, this allows to
147 * handle about 16MB of modules and vmalloc mappings without
148 * incurring many hash conflicts.
149 */
150#define KERNEL_TSB_SIZE_BYTES (32 * 1024)
151#define KERNEL_TSB_NENTRIES \
152 (KERNEL_TSB_SIZE_BYTES / 16)
153
146 /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL 154 /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL
147 * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries 155 * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries
148 * and the found TTE will be left in REG1. REG3 and REG4 must 156 * and the found TTE will be left in REG1. REG3 and REG4 must
@@ -150,12 +158,11 @@
150 * 158 *
151 * VADDR and TAG will be preserved and not clobbered by this macro. 159 * VADDR and TAG will be preserved and not clobbered by this macro.
152 */ 160 */
153 /* XXX non-8K base page size support... */
154#define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ 161#define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
155 sethi %hi(swapper_tsb), REG1; \ 162 sethi %hi(swapper_tsb), REG1; \
156 or REG1, %lo(swapper_tsb), REG1; \ 163 or REG1, %lo(swapper_tsb), REG1; \
157 srlx VADDR, 13, REG2; \ 164 srlx VADDR, PAGE_SHIFT, REG2; \
158 and REG2, (512 - 1), REG2; \ 165 and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \
159 sllx REG2, 4, REG2; \ 166 sllx REG2, 4, REG2; \
160 add REG1, REG2, REG2; \ 167 add REG1, REG2, REG2; \
161 ldda [REG2] ASI_NUCLEUS_QUAD_LDD, REG3; \ 168 ldda [REG2] ASI_NUCLEUS_QUAD_LDD, REG3; \