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-rw-r--r--include/asm-sparc64/system.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h
index 1faefa6d3708..53eae091a171 100644
--- a/include/asm-sparc64/system.h
+++ b/include/asm-sparc64/system.h
@@ -30,6 +30,8 @@ enum sparc_cpu {
30#define ARCH_SUN4C_SUN4 0 30#define ARCH_SUN4C_SUN4 0
31#define ARCH_SUN4 0 31#define ARCH_SUN4 0
32 32
33extern char reboot_command[];
34
33/* These are here in an effort to more fully work around Spitfire Errata 35/* These are here in an effort to more fully work around Spitfire Errata
34 * #51. Essentially, if a memory barrier occurs soon after a mispredicted 36 * #51. Essentially, if a memory barrier occurs soon after a mispredicted
35 * branch, the chip can stop executing instructions until a trap occurs. 37 * branch, the chip can stop executing instructions until a trap occurs.
@@ -117,6 +119,7 @@ do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
117extern void sun_do_break(void); 119extern void sun_do_break(void);
118extern int stop_a_enabled; 120extern int stop_a_enabled;
119 121
122extern void fault_in_user_windows(void);
120extern void synchronize_user_stack(void); 123extern void synchronize_user_stack(void);
121 124
122extern void __flushw_user(void); 125extern void __flushw_user(void);