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-rw-r--r--include/asm-sparc64/system.h18
1 files changed, 12 insertions, 6 deletions
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h
index b5417529f6f1..af254e581834 100644
--- a/include/asm-sparc64/system.h
+++ b/include/asm-sparc64/system.h
@@ -193,11 +193,7 @@ do { \
193 * not preserve it's value. Hairy, but it lets us remove 2 loads 193 * not preserve it's value. Hairy, but it lets us remove 2 loads
194 * and 2 stores in this critical code path. -DaveM 194 * and 2 stores in this critical code path. -DaveM
195 */ 195 */
196#if __GNUC__ >= 3
197#define EXTRA_CLOBBER ,"%l1" 196#define EXTRA_CLOBBER ,"%l1"
198#else
199#define EXTRA_CLOBBER
200#endif
201#define switch_to(prev, next, last) \ 197#define switch_to(prev, next, last) \
202do { if (test_thread_flag(TIF_PERFCTR)) { \ 198do { if (test_thread_flag(TIF_PERFCTR)) { \
203 unsigned long __tmp; \ 199 unsigned long __tmp; \
@@ -212,7 +208,7 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \
212 /* If you are tempted to conditionalize the following */ \ 208 /* If you are tempted to conditionalize the following */ \
213 /* so that ASI is only written if it changes, think again. */ \ 209 /* so that ASI is only written if it changes, think again. */ \
214 __asm__ __volatile__("wr %%g0, %0, %%asi" \ 210 __asm__ __volatile__("wr %%g0, %0, %%asi" \
215 : : "r" (__thread_flag_byte_ptr(next->thread_info)[TI_FLAG_BYTE_CURRENT_DS]));\ 211 : : "r" (__thread_flag_byte_ptr(task_thread_info(next))[TI_FLAG_BYTE_CURRENT_DS]));\
216 __asm__ __volatile__( \ 212 __asm__ __volatile__( \
217 "mov %%g4, %%g7\n\t" \ 213 "mov %%g4, %%g7\n\t" \
218 "wrpr %%g0, 0x95, %%pstate\n\t" \ 214 "wrpr %%g0, 0x95, %%pstate\n\t" \
@@ -242,7 +238,7 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \
242 "b,a ret_from_syscall\n\t" \ 238 "b,a ret_from_syscall\n\t" \
243 "1:\n\t" \ 239 "1:\n\t" \
244 : "=&r" (last) \ 240 : "=&r" (last) \
245 : "0" (next->thread_info), \ 241 : "0" (task_thread_info(next)), \
246 "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \ 242 "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \
247 "i" (TI_CWP), "i" (TI_TASK) \ 243 "i" (TI_CWP), "i" (TI_TASK) \
248 : "cc", \ 244 : "cc", \
@@ -257,6 +253,16 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \
257 } \ 253 } \
258} while(0) 254} while(0)
259 255
256/*
257 * On SMP systems, when the scheduler does migration-cost autodetection,
258 * it needs a way to flush as much of the CPU's caches as possible.
259 *
260 * TODO: fill this in!
261 */
262static inline void sched_cacheflush(void)
263{
264}
265
260static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val) 266static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val)
261{ 267{
262 unsigned long tmp1, tmp2; 268 unsigned long tmp1, tmp2;