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-rw-r--r--include/asm-sparc64/system.h25
1 files changed, 9 insertions, 16 deletions
diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h
index fd12ca386f48..ee4bdfc6b88f 100644
--- a/include/asm-sparc64/system.h
+++ b/include/asm-sparc64/system.h
@@ -139,19 +139,13 @@ extern void __flushw_user(void);
139#define flush_user_windows flushw_user 139#define flush_user_windows flushw_user
140#define flush_register_windows flushw_all 140#define flush_register_windows flushw_all
141 141
142#define prepare_arch_switch(rq, next) \ 142/* Don't hold the runqueue lock over context switch */
143do { spin_lock(&(next)->switch_lock); \ 143#define __ARCH_WANT_UNLOCKED_CTXSW
144 spin_unlock(&(rq)->lock); \ 144#define prepare_arch_switch(next) \
145do { \
145 flushw_all(); \ 146 flushw_all(); \
146} while (0) 147} while (0)
147 148
148#define finish_arch_switch(rq, prev) \
149do { spin_unlock_irq(&(prev)->switch_lock); \
150} while (0)
151
152#define task_running(rq, p) \
153 ((rq)->curr == (p) || spin_is_locked(&(p)->switch_lock))
154
155 /* See what happens when you design the chip correctly? 149 /* See what happens when you design the chip correctly?
156 * 150 *
157 * We tell gcc we clobber all non-fixed-usage registers except 151 * We tell gcc we clobber all non-fixed-usage registers except
@@ -196,24 +190,23 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \
196 "wrpr %%g1, %%cwp\n\t" \ 190 "wrpr %%g1, %%cwp\n\t" \
197 "ldx [%%g6 + %3], %%o6\n\t" \ 191 "ldx [%%g6 + %3], %%o6\n\t" \
198 "ldub [%%g6 + %2], %%o5\n\t" \ 192 "ldub [%%g6 + %2], %%o5\n\t" \
199 "ldx [%%g6 + %4], %%o7\n\t" \ 193 "ldub [%%g6 + %4], %%o7\n\t" \
200 "mov %%g6, %%l2\n\t" \ 194 "mov %%g6, %%l2\n\t" \
201 "wrpr %%o5, 0x0, %%wstate\n\t" \ 195 "wrpr %%o5, 0x0, %%wstate\n\t" \
202 "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \ 196 "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \
203 "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \ 197 "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \
204 "wrpr %%g0, 0x94, %%pstate\n\t" \ 198 "wrpr %%g0, 0x94, %%pstate\n\t" \
205 "mov %%l2, %%g6\n\t" \ 199 "mov %%l2, %%g6\n\t" \
206 "ldx [%%g6 + %7], %%g4\n\t" \ 200 "ldx [%%g6 + %6], %%g4\n\t" \
207 "wrpr %%g0, 0x96, %%pstate\n\t" \ 201 "wrpr %%g0, 0x96, %%pstate\n\t" \
208 "andcc %%o7, %6, %%g0\n\t" \ 202 "brz,pt %%o7, 1f\n\t" \
209 "beq,pt %%icc, 1f\n\t" \
210 " mov %%g7, %0\n\t" \ 203 " mov %%g7, %0\n\t" \
211 "b,a ret_from_syscall\n\t" \ 204 "b,a ret_from_syscall\n\t" \
212 "1:\n\t" \ 205 "1:\n\t" \
213 : "=&r" (last) \ 206 : "=&r" (last) \
214 : "0" (next->thread_info), \ 207 : "0" (next->thread_info), \
215 "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_FLAGS), "i" (TI_CWP), \ 208 "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \
216 "i" (_TIF_NEWCHILD), "i" (TI_TASK) \ 209 "i" (TI_CWP), "i" (TI_TASK) \
217 : "cc", \ 210 : "cc", \
218 "g1", "g2", "g3", "g7", \ 211 "g1", "g2", "g3", "g7", \
219 "l2", "l3", "l4", "l5", "l6", "l7", \ 212 "l2", "l3", "l4", "l5", "l6", "l7", \