diff options
Diffstat (limited to 'include/asm-sparc64/processor.h')
-rw-r--r-- | include/asm-sparc64/processor.h | 23 |
1 files changed, 8 insertions, 15 deletions
diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h index cd8d9b4c8658..c6896b88283e 100644 --- a/include/asm-sparc64/processor.h +++ b/include/asm-sparc64/processor.h | |||
@@ -28,6 +28,8 @@ | |||
28 | * User lives in his very own context, and cannot reference us. Note | 28 | * User lives in his very own context, and cannot reference us. Note |
29 | * that TASK_SIZE is a misnomer, it really gives maximum user virtual | 29 | * that TASK_SIZE is a misnomer, it really gives maximum user virtual |
30 | * address that the kernel will allocate out. | 30 | * address that the kernel will allocate out. |
31 | * | ||
32 | * XXX No longer using virtual page tables, kill this upper limit... | ||
31 | */ | 33 | */ |
32 | #define VA_BITS 44 | 34 | #define VA_BITS 44 |
33 | #ifndef __ASSEMBLY__ | 35 | #ifndef __ASSEMBLY__ |
@@ -37,18 +39,6 @@ | |||
37 | #endif | 39 | #endif |
38 | #define TASK_SIZE ((unsigned long)-VPTE_SIZE) | 40 | #define TASK_SIZE ((unsigned long)-VPTE_SIZE) |
39 | 41 | ||
40 | /* | ||
41 | * The vpte base must be able to hold the entire vpte, half | ||
42 | * of which lives above, and half below, the base. And it | ||
43 | * is placed as close to the highest address range as possible. | ||
44 | */ | ||
45 | #define VPTE_BASE_SPITFIRE (-(VPTE_SIZE/2)) | ||
46 | #if 1 | ||
47 | #define VPTE_BASE_CHEETAH VPTE_BASE_SPITFIRE | ||
48 | #else | ||
49 | #define VPTE_BASE_CHEETAH 0xffe0000000000000 | ||
50 | #endif | ||
51 | |||
52 | #ifndef __ASSEMBLY__ | 42 | #ifndef __ASSEMBLY__ |
53 | 43 | ||
54 | typedef struct { | 44 | typedef struct { |
@@ -101,7 +91,8 @@ extern unsigned long thread_saved_pc(struct task_struct *); | |||
101 | /* Do necessary setup to start up a newly executed thread. */ | 91 | /* Do necessary setup to start up a newly executed thread. */ |
102 | #define start_thread(regs, pc, sp) \ | 92 | #define start_thread(regs, pc, sp) \ |
103 | do { \ | 93 | do { \ |
104 | regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (ASI_PNF << 24); \ | 94 | unsigned long __asi = ASI_PNF; \ |
95 | regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \ | ||
105 | regs->tpc = ((pc & (~3)) - 4); \ | 96 | regs->tpc = ((pc & (~3)) - 4); \ |
106 | regs->tnpc = regs->tpc + 4; \ | 97 | regs->tnpc = regs->tpc + 4; \ |
107 | regs->y = 0; \ | 98 | regs->y = 0; \ |
@@ -138,10 +129,10 @@ do { \ | |||
138 | 129 | ||
139 | #define start_thread32(regs, pc, sp) \ | 130 | #define start_thread32(regs, pc, sp) \ |
140 | do { \ | 131 | do { \ |
132 | unsigned long __asi = ASI_PNF; \ | ||
141 | pc &= 0x00000000ffffffffUL; \ | 133 | pc &= 0x00000000ffffffffUL; \ |
142 | sp &= 0x00000000ffffffffUL; \ | 134 | sp &= 0x00000000ffffffffUL; \ |
143 | \ | 135 | regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \ |
144 | regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM); \ | ||
145 | regs->tpc = ((pc & (~3)) - 4); \ | 136 | regs->tpc = ((pc & (~3)) - 4); \ |
146 | regs->tnpc = regs->tpc + 4; \ | 137 | regs->tnpc = regs->tpc + 4; \ |
147 | regs->y = 0; \ | 138 | regs->y = 0; \ |
@@ -226,6 +217,8 @@ static inline void prefetchw(const void *x) | |||
226 | 217 | ||
227 | #define spin_lock_prefetch(x) prefetchw(x) | 218 | #define spin_lock_prefetch(x) prefetchw(x) |
228 | 219 | ||
220 | #define HAVE_ARCH_PICK_MMAP_LAYOUT | ||
221 | |||
229 | #endif /* !(__ASSEMBLY__) */ | 222 | #endif /* !(__ASSEMBLY__) */ |
230 | 223 | ||
231 | #endif /* !(__ASM_SPARC64_PROCESSOR_H) */ | 224 | #endif /* !(__ASM_SPARC64_PROCESSOR_H) */ |