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-rw-r--r--include/asm-sparc64/pci.h210
1 files changed, 1 insertions, 209 deletions
diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h
index f59f2571295b..da54c4d1f39c 100644
--- a/include/asm-sparc64/pci.h
+++ b/include/asm-sparc64/pci.h
@@ -1,209 +1 @@
1#ifndef __SPARC64_PCI_H #include <asm-sparc/pci.h>
2#define __SPARC64_PCI_H
3
4#ifdef __KERNEL__
5
6#include <linux/dma-mapping.h>
7
8/* Can be used to override the logic in pci_scan_bus for skipping
9 * already-configured bus numbers - to be used for buggy BIOSes
10 * or architectures with incomplete PCI setup by the loader.
11 */
12#define pcibios_assign_all_busses() 0
13#define pcibios_scan_all_fns(a, b) 0
14
15#define PCIBIOS_MIN_IO 0UL
16#define PCIBIOS_MIN_MEM 0UL
17
18#define PCI_IRQ_NONE 0xffffffff
19
20#define PCI_CACHE_LINE_BYTES 64
21
22static inline void pcibios_set_master(struct pci_dev *dev)
23{
24 /* No special bus mastering setup handling */
25}
26
27static inline void pcibios_penalize_isa_irq(int irq, int active)
28{
29 /* We don't do dynamic PCI IRQ allocation */
30}
31
32/* The PCI address space does not equal the physical memory
33 * address space. The networking and block device layers use
34 * this boolean for bounce buffer decisions.
35 */
36#define PCI_DMA_BUS_IS_PHYS (0)
37
38static inline void *pci_alloc_consistent(struct pci_dev *pdev, size_t size,
39 dma_addr_t *dma_handle)
40{
41 return dma_alloc_coherent(&pdev->dev, size, dma_handle, GFP_ATOMIC);
42}
43
44static inline void pci_free_consistent(struct pci_dev *pdev, size_t size,
45 void *vaddr, dma_addr_t dma_handle)
46{
47 return dma_free_coherent(&pdev->dev, size, vaddr, dma_handle);
48}
49
50static inline dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr,
51 size_t size, int direction)
52{
53 return dma_map_single(&pdev->dev, ptr, size,
54 (enum dma_data_direction) direction);
55}
56
57static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr,
58 size_t size, int direction)
59{
60 dma_unmap_single(&pdev->dev, dma_addr, size,
61 (enum dma_data_direction) direction);
62}
63
64#define pci_map_page(dev, page, off, size, dir) \
65 pci_map_single(dev, (page_address(page) + (off)), size, dir)
66#define pci_unmap_page(dev,addr,sz,dir) \
67 pci_unmap_single(dev,addr,sz,dir)
68
69/* pci_unmap_{single,page} is not a nop, thus... */
70#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
71 dma_addr_t ADDR_NAME;
72#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
73 __u32 LEN_NAME;
74#define pci_unmap_addr(PTR, ADDR_NAME) \
75 ((PTR)->ADDR_NAME)
76#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
77 (((PTR)->ADDR_NAME) = (VAL))
78#define pci_unmap_len(PTR, LEN_NAME) \
79 ((PTR)->LEN_NAME)
80#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
81 (((PTR)->LEN_NAME) = (VAL))
82
83static inline int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg,
84 int nents, int direction)
85{
86 return dma_map_sg(&pdev->dev, sg, nents,
87 (enum dma_data_direction) direction);
88}
89
90static inline void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg,
91 int nents, int direction)
92{
93 dma_unmap_sg(&pdev->dev, sg, nents,
94 (enum dma_data_direction) direction);
95}
96
97static inline void pci_dma_sync_single_for_cpu(struct pci_dev *pdev,
98 dma_addr_t dma_handle,
99 size_t size, int direction)
100{
101 dma_sync_single_for_cpu(&pdev->dev, dma_handle, size,
102 (enum dma_data_direction) direction);
103}
104
105static inline void pci_dma_sync_single_for_device(struct pci_dev *pdev,
106 dma_addr_t dma_handle,
107 size_t size, int direction)
108{
109 /* No flushing needed to sync cpu writes to the device. */
110}
111
112static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev,
113 struct scatterlist *sg,
114 int nents, int direction)
115{
116 dma_sync_sg_for_cpu(&pdev->dev, sg, nents,
117 (enum dma_data_direction) direction);
118}
119
120static inline void pci_dma_sync_sg_for_device(struct pci_dev *pdev,
121 struct scatterlist *sg,
122 int nelems, int direction)
123{
124 /* No flushing needed to sync cpu writes to the device. */
125}
126
127/* Return whether the given PCI device DMA address mask can
128 * be supported properly. For example, if your device can
129 * only drive the low 24-bits during PCI bus mastering, then
130 * you would pass 0x00ffffff as the mask to this function.
131 */
132extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
133
134/* PCI IOMMU mapping bypass support. */
135
136/* PCI 64-bit addressing works for all slots on all controller
137 * types on sparc64. However, it requires that the device
138 * can drive enough of the 64 bits.
139 */
140#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0)
141#define PCI64_ADDR_BASE 0xfffc000000000000UL
142
143static inline int pci_dma_mapping_error(dma_addr_t dma_addr)
144{
145 return dma_mapping_error(dma_addr);
146}
147
148#ifdef CONFIG_PCI
149static inline void pci_dma_burst_advice(struct pci_dev *pdev,
150 enum pci_dma_burst_strategy *strat,
151 unsigned long *strategy_parameter)
152{
153 unsigned long cacheline_size;
154 u8 byte;
155
156 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
157 if (byte == 0)
158 cacheline_size = 1024;
159 else
160 cacheline_size = (int) byte * 4;
161
162 *strat = PCI_DMA_BURST_BOUNDARY;
163 *strategy_parameter = cacheline_size;
164}
165#endif
166
167/* Return the index of the PCI controller for device PDEV. */
168
169extern int pci_domain_nr(struct pci_bus *bus);
170static inline int pci_proc_domain(struct pci_bus *bus)
171{
172 return 1;
173}
174
175/* Platform support for /proc/bus/pci/X/Y mmap()s. */
176
177#define HAVE_PCI_MMAP
178#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
179#define get_pci_unmapped_area get_fb_unmapped_area
180
181extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
182 enum pci_mmap_state mmap_state,
183 int write_combine);
184
185extern void
186pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
187 struct resource *res);
188
189extern void
190pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
191 struct pci_bus_region *region);
192
193extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *);
194
195static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
196{
197 return PCI_IRQ_NONE;
198}
199
200struct device_node;
201extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev);
202
203#define HAVE_ARCH_PCI_RESOURCE_TO_USER
204extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
205 const struct resource *rsrc,
206 resource_size_t *start, resource_size_t *end);
207#endif /* __KERNEL__ */
208
209#endif /* __SPARC64_PCI_H */
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