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Diffstat (limited to 'include/asm-sparc64/mostek.h')
-rw-r--r-- | include/asm-sparc64/mostek.h | 144 |
1 files changed, 144 insertions, 0 deletions
diff --git a/include/asm-sparc64/mostek.h b/include/asm-sparc64/mostek.h new file mode 100644 index 000000000000..ccf2f5f82d7f --- /dev/null +++ b/include/asm-sparc64/mostek.h | |||
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1 | /* $Id: mostek.h,v 1.4 2001/01/11 15:07:09 davem Exp $ | ||
2 | * mostek.h: Describes the various Mostek time of day clock registers. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) | ||
6 | */ | ||
7 | |||
8 | #ifndef _SPARC64_MOSTEK_H | ||
9 | #define _SPARC64_MOSTEK_H | ||
10 | |||
11 | #include <asm/idprom.h> | ||
12 | |||
13 | /* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ) | ||
14 | * | ||
15 | * Data | ||
16 | * Address Function | ||
17 | * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0 | ||
18 | * 7ff - - - - - - - - Year 00-99 | ||
19 | * 7fe 0 0 0 - - - - - Month 01-12 | ||
20 | * 7fd 0 0 - - - - - - Date 01-31 | ||
21 | * 7fc 0 FT 0 0 0 - - - Day 01-07 | ||
22 | * 7fb KS 0 - - - - - - Hours 00-23 | ||
23 | * 7fa 0 - - - - - - - Minutes 00-59 | ||
24 | * 7f9 ST - - - - - - - Seconds 00-59 | ||
25 | * 7f8 W R S - - - - - Control | ||
26 | * | ||
27 | * * ST is STOP BIT | ||
28 | * * W is WRITE BIT | ||
29 | * * R is READ BIT | ||
30 | * * S is SIGN BIT | ||
31 | * * FT is FREQ TEST BIT | ||
32 | * * KS is KICK START BIT | ||
33 | */ | ||
34 | |||
35 | /* The Mostek 48t02 real time clock and NVRAM chip. The registers | ||
36 | * other than the control register are in binary coded decimal. Some | ||
37 | * control bits also live outside the control register. | ||
38 | * | ||
39 | * We now deal with physical addresses for I/O to the chip. -DaveM | ||
40 | */ | ||
41 | static __inline__ u8 mostek_read(unsigned long addr) | ||
42 | { | ||
43 | u8 ret; | ||
44 | |||
45 | __asm__ __volatile__("lduba [%1] %2, %0" | ||
46 | : "=r" (ret) | ||
47 | : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | ||
48 | return ret; | ||
49 | } | ||
50 | |||
51 | static __inline__ void mostek_write(unsigned long addr, u8 val) | ||
52 | { | ||
53 | __asm__ __volatile__("stba %0, [%1] %2" | ||
54 | : /* no outputs */ | ||
55 | : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); | ||
56 | } | ||
57 | |||
58 | #define MOSTEK_EEPROM 0x0000UL | ||
59 | #define MOSTEK_IDPROM 0x07d8UL | ||
60 | #define MOSTEK_CREG 0x07f8UL | ||
61 | #define MOSTEK_SEC 0x07f9UL | ||
62 | #define MOSTEK_MIN 0x07faUL | ||
63 | #define MOSTEK_HOUR 0x07fbUL | ||
64 | #define MOSTEK_DOW 0x07fcUL | ||
65 | #define MOSTEK_DOM 0x07fdUL | ||
66 | #define MOSTEK_MONTH 0x07feUL | ||
67 | #define MOSTEK_YEAR 0x07ffUL | ||
68 | |||
69 | extern spinlock_t mostek_lock; | ||
70 | extern unsigned long mstk48t02_regs; | ||
71 | |||
72 | /* Control register values. */ | ||
73 | #define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */ | ||
74 | #define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */ | ||
75 | #define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */ | ||
76 | |||
77 | /* Control bits that live in the other registers. */ | ||
78 | #define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */ | ||
79 | #define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */ | ||
80 | #define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */ | ||
81 | |||
82 | #define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */ | ||
83 | #define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO) | ||
84 | |||
85 | /* Masks that define how much space each value takes up. */ | ||
86 | #define MSTK_SEC_MASK 0x7f | ||
87 | #define MSTK_MIN_MASK 0x7f | ||
88 | #define MSTK_HOUR_MASK 0x3f | ||
89 | #define MSTK_DOW_MASK 0x07 | ||
90 | #define MSTK_DOM_MASK 0x3f | ||
91 | #define MSTK_MONTH_MASK 0x1f | ||
92 | #define MSTK_YEAR_MASK 0xff | ||
93 | |||
94 | /* Binary coded decimal conversion macros. */ | ||
95 | #define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04)) | ||
96 | #define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A)) | ||
97 | |||
98 | /* Generic register set and get macros for internal use. */ | ||
99 | #define MSTK_GET(regs,name) \ | ||
100 | (MSTK_REGVAL_TO_DECIMAL(mostek_read(regs + MOSTEK_ ## name) & MSTK_ ## name ## _MASK)) | ||
101 | #define MSTK_SET(regs,name,value) \ | ||
102 | do { u8 __val = mostek_read(regs + MOSTEK_ ## name); \ | ||
103 | __val &= ~(MSTK_ ## name ## _MASK); \ | ||
104 | __val |= (MSTK_DECIMAL_TO_REGVAL(value) & \ | ||
105 | (MSTK_ ## name ## _MASK)); \ | ||
106 | mostek_write(regs + MOSTEK_ ## name, __val); \ | ||
107 | } while(0) | ||
108 | |||
109 | /* Macros to make register access easier on our fingers. These give you | ||
110 | * the decimal value of the register requested if applicable. You pass | ||
111 | * the a pointer to a 'struct mostek48t02'. | ||
112 | */ | ||
113 | #define MSTK_REG_CREG(regs) (mostek_read((regs) + MOSTEK_CREG)) | ||
114 | #define MSTK_REG_SEC(regs) MSTK_GET(regs,SEC) | ||
115 | #define MSTK_REG_MIN(regs) MSTK_GET(regs,MIN) | ||
116 | #define MSTK_REG_HOUR(regs) MSTK_GET(regs,HOUR) | ||
117 | #define MSTK_REG_DOW(regs) MSTK_GET(regs,DOW) | ||
118 | #define MSTK_REG_DOM(regs) MSTK_GET(regs,DOM) | ||
119 | #define MSTK_REG_MONTH(regs) MSTK_GET(regs,MONTH) | ||
120 | #define MSTK_REG_YEAR(regs) MSTK_GET(regs,YEAR) | ||
121 | |||
122 | #define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,SEC,value) | ||
123 | #define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,MIN,value) | ||
124 | #define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,HOUR,value) | ||
125 | #define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,DOW,value) | ||
126 | #define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,DOM,value) | ||
127 | #define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,MONTH,value) | ||
128 | #define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,YEAR,value) | ||
129 | |||
130 | |||
131 | /* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the | ||
132 | * same (basically) layout of the 48t02 chip except for the extra | ||
133 | * NVRAM on board (8 KB against the 48t02's 2 KB). | ||
134 | */ | ||
135 | #define MOSTEK_48T08_OFFSET 0x0000UL /* Lower NVRAM portions */ | ||
136 | #define MOSTEK_48T08_48T02 0x1800UL /* Offset to 48T02 chip */ | ||
137 | |||
138 | /* SUN5 systems usually have 48t59 model clock chipsets. But we keep the older | ||
139 | * clock chip definitions around just in case. | ||
140 | */ | ||
141 | #define MOSTEK_48T59_OFFSET 0x0000UL /* Lower NVRAM portions */ | ||
142 | #define MOSTEK_48T59_48T02 0x1800UL /* Offset to 48T02 chip */ | ||
143 | |||
144 | #endif /* !(_SPARC64_MOSTEK_H) */ | ||