diff options
Diffstat (limited to 'include/asm-sparc64/mmu.h')
-rw-r--r-- | include/asm-sparc64/mmu.h | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/include/asm-sparc64/mmu.h b/include/asm-sparc64/mmu.h index 1504d303a1d5..da14a9bf0ed6 100644 --- a/include/asm-sparc64/mmu.h +++ b/include/asm-sparc64/mmu.h | |||
@@ -6,19 +6,7 @@ | |||
6 | #include <asm/const.h> | 6 | #include <asm/const.h> |
7 | #include <asm/hypervisor.h> | 7 | #include <asm/hypervisor.h> |
8 | 8 | ||
9 | /* | 9 | #define CTX_NR_BITS 13 |
10 | * For the 8k pagesize kernel, use only 10 hw context bits to optimize some | ||
11 | * shifts in the fast tlbmiss handlers, instead of all 13 bits (specifically | ||
12 | * for vpte offset calculation). For other pagesizes, this optimization in | ||
13 | * the tlbhandlers can not be done; but still, all 13 bits can not be used | ||
14 | * because the tlb handlers use "andcc" instruction which sign extends 13 | ||
15 | * bit arguments. | ||
16 | */ | ||
17 | #if PAGE_SHIFT == 13 | ||
18 | #define CTX_NR_BITS 10 | ||
19 | #else | ||
20 | #define CTX_NR_BITS 12 | ||
21 | #endif | ||
22 | 10 | ||
23 | #define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL)) | 11 | #define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL)) |
24 | 12 | ||