diff options
Diffstat (limited to 'include/asm-sparc64/mmu.h')
-rw-r--r-- | include/asm-sparc64/mmu.h | 57 |
1 files changed, 43 insertions, 14 deletions
diff --git a/include/asm-sparc64/mmu.h b/include/asm-sparc64/mmu.h index 8627eed6e83d..2d4f2ea9568a 100644 --- a/include/asm-sparc64/mmu.h +++ b/include/asm-sparc64/mmu.h | |||
@@ -4,20 +4,9 @@ | |||
4 | #include <linux/config.h> | 4 | #include <linux/config.h> |
5 | #include <asm/page.h> | 5 | #include <asm/page.h> |
6 | #include <asm/const.h> | 6 | #include <asm/const.h> |
7 | #include <asm/hypervisor.h> | ||
7 | 8 | ||
8 | /* | 9 | #define CTX_NR_BITS 13 |
9 | * For the 8k pagesize kernel, use only 10 hw context bits to optimize some | ||
10 | * shifts in the fast tlbmiss handlers, instead of all 13 bits (specifically | ||
11 | * for vpte offset calculation). For other pagesizes, this optimization in | ||
12 | * the tlbhandlers can not be done; but still, all 13 bits can not be used | ||
13 | * because the tlb handlers use "andcc" instruction which sign extends 13 | ||
14 | * bit arguments. | ||
15 | */ | ||
16 | #if PAGE_SHIFT == 13 | ||
17 | #define CTX_NR_BITS 10 | ||
18 | #else | ||
19 | #define CTX_NR_BITS 12 | ||
20 | #endif | ||
21 | 10 | ||
22 | #define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL)) | 11 | #define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL)) |
23 | 12 | ||
@@ -90,10 +79,50 @@ | |||
90 | 79 | ||
91 | #ifndef __ASSEMBLY__ | 80 | #ifndef __ASSEMBLY__ |
92 | 81 | ||
82 | #define TSB_ENTRY_ALIGNMENT 16 | ||
83 | |||
84 | struct tsb { | ||
85 | unsigned long tag; | ||
86 | unsigned long pte; | ||
87 | } __attribute__((aligned(TSB_ENTRY_ALIGNMENT))); | ||
88 | |||
89 | extern void __tsb_insert(unsigned long ent, unsigned long tag, unsigned long pte); | ||
90 | extern void tsb_flush(unsigned long ent, unsigned long tag); | ||
91 | extern void tsb_init(struct tsb *tsb, unsigned long size); | ||
92 | |||
93 | struct tsb_config { | ||
94 | struct tsb *tsb; | ||
95 | unsigned long tsb_rss_limit; | ||
96 | unsigned long tsb_nentries; | ||
97 | unsigned long tsb_reg_val; | ||
98 | unsigned long tsb_map_vaddr; | ||
99 | unsigned long tsb_map_pte; | ||
100 | }; | ||
101 | |||
102 | #define MM_TSB_BASE 0 | ||
103 | |||
104 | #ifdef CONFIG_HUGETLB_PAGE | ||
105 | #define MM_TSB_HUGE 1 | ||
106 | #define MM_NUM_TSBS 2 | ||
107 | #else | ||
108 | #define MM_NUM_TSBS 1 | ||
109 | #endif | ||
110 | |||
93 | typedef struct { | 111 | typedef struct { |
94 | unsigned long sparc64_ctx_val; | 112 | spinlock_t lock; |
113 | unsigned long sparc64_ctx_val; | ||
114 | unsigned long huge_pte_count; | ||
115 | struct tsb_config tsb_block[MM_NUM_TSBS]; | ||
116 | struct hv_tsb_descr tsb_descr[MM_NUM_TSBS]; | ||
95 | } mm_context_t; | 117 | } mm_context_t; |
96 | 118 | ||
97 | #endif /* !__ASSEMBLY__ */ | 119 | #endif /* !__ASSEMBLY__ */ |
98 | 120 | ||
121 | #define TSB_CONFIG_TSB 0x00 | ||
122 | #define TSB_CONFIG_RSS_LIMIT 0x08 | ||
123 | #define TSB_CONFIG_NENTRIES 0x10 | ||
124 | #define TSB_CONFIG_REG_VAL 0x18 | ||
125 | #define TSB_CONFIG_MAP_VADDR 0x20 | ||
126 | #define TSB_CONFIG_MAP_PTE 0x28 | ||
127 | |||
99 | #endif /* __MMU_H */ | 128 | #endif /* __MMU_H */ |