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-rw-r--r--include/asm-sparc64/head.h59
1 files changed, 59 insertions, 0 deletions
diff --git a/include/asm-sparc64/head.h b/include/asm-sparc64/head.h
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1/* $Id: head.h,v 1.30 1997/08/08 08:34:33 jj Exp $ */
2#ifndef _SPARC64_HEAD_H
3#define _SPARC64_HEAD_H
4
5#include <asm/pstate.h>
6
7#define KERNBASE 0x400000
8
9#define PTREGS_OFF (STACK_BIAS + STACKFRAME_SZ)
10
11#define __CHEETAH_ID 0x003e0014
12#define __JALAPENO_ID 0x003e0016
13
14#define CHEETAH_MANUF 0x003e
15#define CHEETAH_IMPL 0x0014
16#define CHEETAH_PLUS_IMPL 0x0015
17#define JALAPENO_IMPL 0x0016
18
19#define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \
20 rdpr %ver, %tmp1; \
21 sethi %hi(__CHEETAH_ID), %tmp2; \
22 srlx %tmp1, 32, %tmp1; \
23 or %tmp2, %lo(__CHEETAH_ID), %tmp2;\
24 cmp %tmp1, %tmp2; \
25 be,pn %icc, label; \
26 nop;
27
28#define BRANCH_IF_JALAPENO(tmp1,tmp2,label) \
29 rdpr %ver, %tmp1; \
30 sethi %hi(__JALAPENO_ID), %tmp2; \
31 srlx %tmp1, 32, %tmp1; \
32 or %tmp2, %lo(__JALAPENO_ID), %tmp2;\
33 cmp %tmp1, %tmp2; \
34 be,pn %icc, label; \
35 nop;
36
37#define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label) \
38 rdpr %ver, %tmp1; \
39 srlx %tmp1, (32 + 16), %tmp2; \
40 cmp %tmp2, CHEETAH_MANUF; \
41 bne,pt %xcc, 99f; \
42 sllx %tmp1, 16, %tmp1; \
43 srlx %tmp1, (32 + 16), %tmp2; \
44 cmp %tmp2, CHEETAH_PLUS_IMPL; \
45 bgeu,pt %xcc, label; \
4699: nop;
47
48#define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label) \
49 rdpr %ver, %tmp1; \
50 srlx %tmp1, (32 + 16), %tmp2; \
51 cmp %tmp2, CHEETAH_MANUF; \
52 bne,pt %xcc, 99f; \
53 sllx %tmp1, 16, %tmp1; \
54 srlx %tmp1, (32 + 16), %tmp2; \
55 cmp %tmp2, CHEETAH_IMPL; \
56 bgeu,pt %xcc, label; \
5799: nop;
58
59#endif /* !(_SPARC64_HEAD_H) */