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1/*
2 * traps.h: Format of entries for the Sparc trap table.
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 */
6
7#ifndef _SPARC_TRAPS_H
8#define _SPARC_TRAPS_H
9
10#define NUM_SPARC_TRAPS 255
11
12#ifndef __ASSEMBLY__
13
14/* This is for V8 compliant Sparc CPUS */
15struct tt_entry {
16 unsigned long inst_one;
17 unsigned long inst_two;
18 unsigned long inst_three;
19 unsigned long inst_four;
20};
21
22/* We set this to _start in system setup. */
23extern struct tt_entry *sparc_ttable;
24
25static inline unsigned long get_tbr(void)
26{
27 unsigned long tbr;
28
29 __asm__ __volatile__("rd %%tbr, %0\n\t" : "=r" (tbr));
30 return tbr;
31}
32
33#endif /* !(__ASSEMBLY__) */
34
35/* For patching the trap table at boot time, we need to know how to
36 * form various common Sparc instructions. Thus these macros...
37 */
38
39#define SPARC_MOV_CONST_L3(const) (0xa6102000 | (const&0xfff))
40
41/* The following assumes that the branch lies before the place we
42 * are branching to. This is the case for a trap vector...
43 * You have been warned.
44 */
45#define SPARC_BRANCH(dest_addr, inst_addr) \
46 (0x10800000 | (((dest_addr-inst_addr)>>2)&0x3fffff))
47
48#define SPARC_RD_PSR_L0 (0xa1480000)
49#define SPARC_RD_WIM_L3 (0xa7500000)
50#define SPARC_NOP (0x01000000)
51
52/* Various interesting trap levels. */
53/* First, hardware traps. */
54#define SP_TRAP_TFLT 0x1 /* Text fault */
55#define SP_TRAP_II 0x2 /* Illegal Instruction */
56#define SP_TRAP_PI 0x3 /* Privileged Instruction */
57#define SP_TRAP_FPD 0x4 /* Floating Point Disabled */
58#define SP_TRAP_WOVF 0x5 /* Window Overflow */
59#define SP_TRAP_WUNF 0x6 /* Window Underflow */
60#define SP_TRAP_MNA 0x7 /* Memory Address Unaligned */
61#define SP_TRAP_FPE 0x8 /* Floating Point Exception */
62#define SP_TRAP_DFLT 0x9 /* Data Fault */
63#define SP_TRAP_TOF 0xa /* Tag Overflow */
64#define SP_TRAP_WDOG 0xb /* Watchpoint Detected */
65#define SP_TRAP_IRQ1 0x11 /* IRQ level 1 */
66#define SP_TRAP_IRQ2 0x12 /* IRQ level 2 */
67#define SP_TRAP_IRQ3 0x13 /* IRQ level 3 */
68#define SP_TRAP_IRQ4 0x14 /* IRQ level 4 */
69#define SP_TRAP_IRQ5 0x15 /* IRQ level 5 */
70#define SP_TRAP_IRQ6 0x16 /* IRQ level 6 */
71#define SP_TRAP_IRQ7 0x17 /* IRQ level 7 */
72#define SP_TRAP_IRQ8 0x18 /* IRQ level 8 */
73#define SP_TRAP_IRQ9 0x19 /* IRQ level 9 */
74#define SP_TRAP_IRQ10 0x1a /* IRQ level 10 */
75#define SP_TRAP_IRQ11 0x1b /* IRQ level 11 */
76#define SP_TRAP_IRQ12 0x1c /* IRQ level 12 */
77#define SP_TRAP_IRQ13 0x1d /* IRQ level 13 */
78#define SP_TRAP_IRQ14 0x1e /* IRQ level 14 */
79#define SP_TRAP_IRQ15 0x1f /* IRQ level 15 Non-maskable */
80#define SP_TRAP_RACC 0x20 /* Register Access Error ??? */
81#define SP_TRAP_IACC 0x21 /* Instruction Access Error */
82#define SP_TRAP_CPDIS 0x24 /* Co-Processor Disabled */
83#define SP_TRAP_BADFL 0x25 /* Unimplemented Flush Instruction */
84#define SP_TRAP_CPEXP 0x28 /* Co-Processor Exception */
85#define SP_TRAP_DACC 0x29 /* Data Access Error */
86#define SP_TRAP_DIVZ 0x2a /* Divide By Zero */
87#define SP_TRAP_DSTORE 0x2b /* Data Store Error ??? */
88#define SP_TRAP_DMM 0x2c /* Data Access MMU Miss ??? */
89#define SP_TRAP_IMM 0x3c /* Instruction Access MMU Miss ??? */
90
91/* Now the Software Traps... */
92#define SP_TRAP_SUNOS 0x80 /* SunOS System Call */
93#define SP_TRAP_SBPT 0x81 /* Software Breakpoint */
94#define SP_TRAP_SDIVZ 0x82 /* Software Divide-by-Zero trap */
95#define SP_TRAP_FWIN 0x83 /* Flush Windows */
96#define SP_TRAP_CWIN 0x84 /* Clean Windows */
97#define SP_TRAP_RCHK 0x85 /* Range Check */
98#define SP_TRAP_FUNA 0x86 /* Fix Unaligned Access */
99#define SP_TRAP_IOWFL 0x87 /* Integer Overflow */
100#define SP_TRAP_SOLARIS 0x88 /* Solaris System Call */
101#define SP_TRAP_NETBSD 0x89 /* NetBSD System Call */
102#define SP_TRAP_LINUX 0x90 /* Linux System Call */
103
104/* Names used for compatibility with SunOS */
105#define ST_SYSCALL 0x00
106#define ST_BREAKPOINT 0x01
107#define ST_DIV0 0x02
108#define ST_FLUSH_WINDOWS 0x03
109#define ST_CLEAN_WINDOWS 0x04
110#define ST_RANGE_CHECK 0x05
111#define ST_FIX_ALIGN 0x06
112#define ST_INT_OVERFLOW 0x07
113
114/* Special traps... */
115#define SP_TRAP_KBPT1 0xfe /* KADB/PROM Breakpoint one */
116#define SP_TRAP_KBPT2 0xff /* KADB/PROM Breakpoint two */
117
118/* Handy Macros */
119/* Is this a trap we never expect to get? */
120#define BAD_TRAP_P(level) \
121 ((level > SP_TRAP_WDOG && level < SP_TRAP_IRQ1) || \
122 (level > SP_TRAP_IACC && level < SP_TRAP_CPDIS) || \
123 (level > SP_TRAP_BADFL && level < SP_TRAP_CPEXP) || \
124 (level > SP_TRAP_DMM && level < SP_TRAP_IMM) || \
125 (level > SP_TRAP_IMM && level < SP_TRAP_SUNOS) || \
126 (level > SP_TRAP_LINUX && level < SP_TRAP_KBPT1))
127
128/* Is this a Hardware trap? */
129#define HW_TRAP_P(level) ((level > 0) && (level < SP_TRAP_SUNOS))
130
131/* Is this a Software trap? */
132#define SW_TRAP_P(level) ((level >= SP_TRAP_SUNOS) && (level <= SP_TRAP_KBPT2))
133
134/* Is this a system call for some OS we know about? */
135#define SCALL_TRAP_P(level) ((level == SP_TRAP_SUNOS) || \
136 (level == SP_TRAP_SOLARIS) || \
137 (level == SP_TRAP_NETBSD) || \
138 (level == SP_TRAP_LINUX))
139
140#endif /* !(_SPARC_TRAPS_H) */
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/*
 * Device driver for the via-cuda on Apple Powermacs.
 *
 * The VIA (versatile interface adapter) interfaces to the CUDA,
 * a 6805 microprocessor core which controls the ADB (Apple Desktop
 * Bus) which connects to the keyboard and mouse.  The CUDA also
 * controls system power and the RTC (real time clock) chip.
 *
 * Copyright (C) 1996 Paul Mackerras.
 */
#include <stdarg.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/adb.h>
#include <linux/cuda.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#ifdef CONFIG_PPC
#include <asm/prom.h>
#include <asm/machdep.h>
#else
#include <asm/macintosh.h>
#include <asm/macints.h>
#include <asm/machw.h>
#include <asm/mac_via.h>
#endif
#include <asm/io.h>
#include <asm/system.h>
#include <linux/init.h>

static volatile unsigned char __iomem *via;
static DEFINE_SPINLOCK(cuda_lock);

/* VIA registers - spaced 0x200 bytes apart */
#define RS		0x200		/* skip between registers */
#define B		0		/* B-side data */
#define A		RS		/* A-side data */
#define DIRB		(2*RS)		/* B-side direction (1=output) */
#define DIRA		(3*RS)		/* A-side direction (1=output) */
#define T1CL		(4*RS)		/* Timer 1 ctr/latch (low 8 bits) */
#define T1CH		(5*RS)		/* Timer 1 counter (high 8 bits) */
#define T1LL		(6*RS)		/* Timer 1 latch (low 8 bits) */
#define T1LH		(7*RS)		/* Timer 1 latch (high 8 bits) */
#define T2CL		(8*RS)		/* Timer 2 ctr/latch (low 8 bits) */
#define T2CH		(9*RS)		/* Timer 2 counter (high 8 bits) */
#define SR		(10*RS)		/* Shift register */
#define ACR		(11*RS)		/* Auxiliary control register */
#define PCR		(12*RS)		/* Peripheral control register */
#define IFR		(13*RS)		/* Interrupt flag register */
#define IER		(14*RS)		/* Interrupt enable register */
#define ANH		(15*RS)		/* A-side data, no handshake */

/* Bits in B data register: all active low */
#define TREQ		0x08		/* Transfer request (input) */
#define TACK		0x10		/* Transfer acknowledge (output) */
#define TIP		0x20		/* Transfer in progress (output) */

/* Bits in ACR */
#define SR_CTRL		0x1c		/* Shift register control bits */
#define SR_EXT		0x0c		/* Shift on external clock */
#define SR_OUT		0x10		/* Shift out if 1 */

/* Bits in IFR and IER */
#define IER_SET		0x80		/* set bits in IER */
#define IER_CLR		0		/* clear bits in IER */
#define SR_INT		0x04		/* Shift register full/empty */

static enum cuda_state {
    idle,
    sent_first_byte,
    sending,
    reading,
    read_done,
    awaiting_reply
} cuda_state;

static struct adb_request *current_req;
static struct adb_request *last_req;
static unsigned char cuda_rbuf[16];
static unsigned char *reply_ptr;
static int reading_reply;
static int data_index;
static int cuda_irq;
#ifdef CONFIG_PPC
static struct device_node *vias;
#endif
static int cuda_fully_inited;

#ifdef CONFIG_ADB
static int cuda_probe(void);
static int cuda_init(void);
static int cuda_send_request(struct adb_request *req, int sync);
static int cuda_adb_autopoll(int devs);
static int cuda_reset_adb_bus(void);
#endif /* CONFIG_ADB */

static int cuda_init_via(void);
static void cuda_start(void);