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Diffstat (limited to 'include/asm-sparc/pgtsun4c.h')
-rw-r--r-- | include/asm-sparc/pgtsun4c.h | 172 |
1 files changed, 172 insertions, 0 deletions
diff --git a/include/asm-sparc/pgtsun4c.h b/include/asm-sparc/pgtsun4c.h new file mode 100644 index 000000000000..f53b6dbc5fe3 --- /dev/null +++ b/include/asm-sparc/pgtsun4c.h | |||
@@ -0,0 +1,172 @@ | |||
1 | /* $Id: pgtsun4c.h,v 1.37 2000/06/05 06:08:46 anton Exp $ | ||
2 | * pgtsun4c.h: Sun4c specific pgtable.h defines and code. | ||
3 | * | ||
4 | * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) | ||
5 | */ | ||
6 | #ifndef _SPARC_PGTSUN4C_H | ||
7 | #define _SPARC_PGTSUN4C_H | ||
8 | |||
9 | #include <asm/contregs.h> | ||
10 | |||
11 | /* PMD_SHIFT determines the size of the area a second-level page table can map */ | ||
12 | #define SUN4C_PMD_SHIFT 22 | ||
13 | |||
14 | /* PGDIR_SHIFT determines what a third-level page table entry can map */ | ||
15 | #define SUN4C_PGDIR_SHIFT 22 | ||
16 | #define SUN4C_PGDIR_SIZE (1UL << SUN4C_PGDIR_SHIFT) | ||
17 | #define SUN4C_PGDIR_MASK (~(SUN4C_PGDIR_SIZE-1)) | ||
18 | #define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK) | ||
19 | |||
20 | /* To represent how the sun4c mmu really lays things out. */ | ||
21 | #define SUN4C_REAL_PGDIR_SHIFT 18 | ||
22 | #define SUN4C_REAL_PGDIR_SIZE (1UL << SUN4C_REAL_PGDIR_SHIFT) | ||
23 | #define SUN4C_REAL_PGDIR_MASK (~(SUN4C_REAL_PGDIR_SIZE-1)) | ||
24 | #define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK) | ||
25 | |||
26 | /* 16 bit PFN on sun4c */ | ||
27 | #define SUN4C_PFN_MASK 0xffff | ||
28 | |||
29 | /* Don't increase these unless the structures in sun4c.c are fixed */ | ||
30 | #define SUN4C_MAX_SEGMAPS 256 | ||
31 | #define SUN4C_MAX_CONTEXTS 16 | ||
32 | |||
33 | /* | ||
34 | * To be efficient, and not have to worry about allocating such | ||
35 | * a huge pgd, we make the kernel sun4c tables each hold 1024 | ||
36 | * entries and the pgd similarly just like the i386 tables. | ||
37 | */ | ||
38 | #define SUN4C_PTRS_PER_PTE 1024 | ||
39 | #define SUN4C_PTRS_PER_PMD 1 | ||
40 | #define SUN4C_PTRS_PER_PGD 1024 | ||
41 | |||
42 | /* | ||
43 | * Sparc SUN4C pte fields. | ||
44 | */ | ||
45 | #define _SUN4C_PAGE_VALID 0x80000000 | ||
46 | #define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */ | ||
47 | #define _SUN4C_PAGE_DIRTY 0x40000000 | ||
48 | #define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */ | ||
49 | #define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */ | ||
50 | #define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */ | ||
51 | #define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */ | ||
52 | #define _SUN4C_PAGE_IO 0x04000000 /* I/O page */ | ||
53 | #define _SUN4C_PAGE_FILE 0x02000000 /* implemented in software */ | ||
54 | #define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */ | ||
55 | #define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */ | ||
56 | #define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */ | ||
57 | #define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */ | ||
58 | |||
59 | #define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\ | ||
60 | _SUN4C_PAGE_ACCESSED) | ||
61 | #define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\ | ||
62 | _SUN4C_PAGE_MODIFIED) | ||
63 | |||
64 | #define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED) | ||
65 | |||
66 | #define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT) | ||
67 | #define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\ | ||
68 | _SUN4C_PAGE_WRITE) | ||
69 | #define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) | ||
70 | #define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) | ||
71 | #define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\ | ||
72 | _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV) | ||
73 | |||
74 | /* SUN4C swap entry encoding | ||
75 | * | ||
76 | * We use 5 bits for the type and 19 for the offset. This gives us | ||
77 | * 32 swapfiles of 4GB each. Encoding looks like: | ||
78 | * | ||
79 | * RRRRRRRRooooooooooooooooooottttt | ||
80 | * fedcba9876543210fedcba9876543210 | ||
81 | * | ||
82 | * The top 8 bits are reserved for protection and status bits, especially | ||
83 | * FILE and PRESENT. | ||
84 | */ | ||
85 | #define SUN4C_SWP_TYPE_MASK 0x1f | ||
86 | #define SUN4C_SWP_OFF_MASK 0x7ffff | ||
87 | #define SUN4C_SWP_OFF_SHIFT 5 | ||
88 | |||
89 | #ifndef __ASSEMBLY__ | ||
90 | |||
91 | static inline unsigned long sun4c_get_synchronous_error(void) | ||
92 | { | ||
93 | unsigned long sync_err; | ||
94 | |||
95 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
96 | "=r" (sync_err) : | ||
97 | "r" (AC_SYNC_ERR), "i" (ASI_CONTROL)); | ||
98 | return sync_err; | ||
99 | } | ||
100 | |||
101 | static inline unsigned long sun4c_get_synchronous_address(void) | ||
102 | { | ||
103 | unsigned long sync_addr; | ||
104 | |||
105 | __asm__ __volatile__("lda [%1] %2, %0\n\t" : | ||
106 | "=r" (sync_addr) : | ||
107 | "r" (AC_SYNC_VA), "i" (ASI_CONTROL)); | ||
108 | return sync_addr; | ||
109 | } | ||
110 | |||
111 | /* SUN4C pte, segmap, and context manipulation */ | ||
112 | static inline unsigned long sun4c_get_segmap(unsigned long addr) | ||
113 | { | ||
114 | register unsigned long entry; | ||
115 | |||
116 | __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : | ||
117 | "=r" (entry) : | ||
118 | "r" (addr), "i" (ASI_SEGMAP)); | ||
119 | |||
120 | return entry; | ||
121 | } | ||
122 | |||
123 | static inline void sun4c_put_segmap(unsigned long addr, unsigned long entry) | ||
124 | { | ||
125 | |||
126 | __asm__ __volatile__("\n\tstba %1, [%0] %2; nop; nop; nop;\n\t" : : | ||
127 | "r" (addr), "r" (entry), | ||
128 | "i" (ASI_SEGMAP) | ||
129 | : "memory"); | ||
130 | } | ||
131 | |||
132 | static inline unsigned long sun4c_get_pte(unsigned long addr) | ||
133 | { | ||
134 | register unsigned long entry; | ||
135 | |||
136 | __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" : | ||
137 | "=r" (entry) : | ||
138 | "r" (addr), "i" (ASI_PTE)); | ||
139 | return entry; | ||
140 | } | ||
141 | |||
142 | static inline void sun4c_put_pte(unsigned long addr, unsigned long entry) | ||
143 | { | ||
144 | __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : : | ||
145 | "r" (addr), | ||
146 | "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE) | ||
147 | : "memory"); | ||
148 | } | ||
149 | |||
150 | static inline int sun4c_get_context(void) | ||
151 | { | ||
152 | register int ctx; | ||
153 | |||
154 | __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : | ||
155 | "=r" (ctx) : | ||
156 | "r" (AC_CONTEXT), "i" (ASI_CONTROL)); | ||
157 | |||
158 | return ctx; | ||
159 | } | ||
160 | |||
161 | static inline int sun4c_set_context(int ctx) | ||
162 | { | ||
163 | __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : : | ||
164 | "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL) | ||
165 | : "memory"); | ||
166 | |||
167 | return ctx; | ||
168 | } | ||
169 | |||
170 | #endif /* !(__ASSEMBLY__) */ | ||
171 | |||
172 | #endif /* !(_SPARC_PGTSUN4C_H) */ | ||