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-rw-r--r--include/asm-sh/bugs.h4
-rw-r--r--include/asm-sh/cpu-sh4/cache.h2
2 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index a6de3d06a3d9..b4000c8bf31b 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -32,6 +32,10 @@ static void __init check_bugs(void)
32 case CPU_SH7750 ... CPU_SH4_501: 32 case CPU_SH7750 ... CPU_SH4_501:
33 *p++ = '4'; 33 *p++ = '4';
34 break; 34 break;
35 case CPU_SH7770 ... CPU_SH7781:
36 *p++ = '4';
37 *p++ = 'a';
38 break;
35 default: 39 default:
36 *p++ = '?'; 40 *p++ = '?';
37 *p++ = '!'; 41 *p++ = '!';
diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h
index 1fe20359312c..6e9c7e6ee8e4 100644
--- a/include/asm-sh/cpu-sh4/cache.h
+++ b/include/asm-sh/cpu-sh4/cache.h
@@ -22,7 +22,9 @@
22#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ 22#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */
23#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ 23#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */
24#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ 24#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */
25#ifndef CONFIG_CPU_SUBTYPE_SH7780
25#define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ 26#define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */
27#endif
26 28
27/* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */ 29/* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */
28#define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE) 30#define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE)