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-rw-r--r--include/asm-sh/a.out.h1
-rw-r--r--include/asm-sh/bug.h2
-rw-r--r--include/asm-sh/bugs.h4
-rw-r--r--include/asm-sh/clock.h1
-rw-r--r--include/asm-sh/cpu-sh3/freq.h4
-rw-r--r--include/asm-sh/cpu-sh3/mmu_context.h1
-rw-r--r--include/asm-sh/cpu-sh3/timer.h3
-rw-r--r--include/asm-sh/cpu-sh4/freq.h2
-rw-r--r--include/asm-sh/dma-mapping.h27
-rw-r--r--include/asm-sh/dma.h1
-rw-r--r--include/asm-sh/fixmap.h8
-rw-r--r--include/asm-sh/flat.h3
-rw-r--r--include/asm-sh/floppy.h4
-rw-r--r--include/asm-sh/hw_irq.h77
-rw-r--r--include/asm-sh/io.h4
-rw-r--r--include/asm-sh/mpc1211/mc146818rtc.h2
-rw-r--r--include/asm-sh/pgtable.h6
-rw-r--r--include/asm-sh/processor.h4
-rw-r--r--include/asm-sh/rts7751r2d.h2
-rw-r--r--include/asm-sh/se7300.h64
-rw-r--r--include/asm-sh/se73180.h66
-rw-r--r--include/asm-sh/se7722.h40
-rw-r--r--include/asm-sh/system.h10
-rw-r--r--include/asm-sh/thread_info.h10
-rw-r--r--include/asm-sh/ubc.h3
-rw-r--r--include/asm-sh/unistd.h3
26 files changed, 144 insertions, 208 deletions
diff --git a/include/asm-sh/a.out.h b/include/asm-sh/a.out.h
index 6e9fca9ee333..685d0f6125fa 100644
--- a/include/asm-sh/a.out.h
+++ b/include/asm-sh/a.out.h
@@ -20,6 +20,7 @@ struct exec
20#ifdef __KERNEL__ 20#ifdef __KERNEL__
21 21
22#define STACK_TOP TASK_SIZE 22#define STACK_TOP TASK_SIZE
23#define STACK_TOP_MAX STACK_TOP
23 24
24#endif 25#endif
25 26
diff --git a/include/asm-sh/bug.h b/include/asm-sh/bug.h
index 46f925c815ac..a78d482e8b2f 100644
--- a/include/asm-sh/bug.h
+++ b/include/asm-sh/bug.h
@@ -61,7 +61,7 @@ do { \
61} while (0) 61} while (0)
62 62
63#define WARN_ON(x) ({ \ 63#define WARN_ON(x) ({ \
64 typeof(x) __ret_warn_on = (x); \ 64 int __ret_warn_on = !!(x); \
65 if (__builtin_constant_p(__ret_warn_on)) { \ 65 if (__builtin_constant_p(__ret_warn_on)) { \
66 if (__ret_warn_on) \ 66 if (__ret_warn_on) \
67 __WARN(); \ 67 __WARN(); \
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index aeee8da9c54f..b66139ff73fc 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -29,7 +29,7 @@ static void __init check_bugs(void)
29 *p++ = '2'; 29 *p++ = '2';
30 *p++ = 'a'; 30 *p++ = 'a';
31 break; 31 break;
32 case CPU_SH7705 ... CPU_SH7300: 32 case CPU_SH7705 ... CPU_SH7729:
33 *p++ = '3'; 33 *p++ = '3';
34 break; 34 break;
35 case CPU_SH7750 ... CPU_SH4_501: 35 case CPU_SH7750 ... CPU_SH4_501:
@@ -39,7 +39,7 @@ static void __init check_bugs(void)
39 *p++ = '4'; 39 *p++ = '4';
40 *p++ = 'a'; 40 *p++ = 'a';
41 break; 41 break;
42 case CPU_SH73180 ... CPU_SH7722: 42 case CPU_SH7343 ... CPU_SH7722:
43 *p++ = '4'; 43 *p++ = '4';
44 *p++ = 'a'; 44 *p++ = 'a';
45 *p++ = 'l'; 45 *p++ = 'l';
diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h
index 386d797d86b7..b550a27a7042 100644
--- a/include/asm-sh/clock.h
+++ b/include/asm-sh/clock.h
@@ -14,6 +14,7 @@ struct clk_ops {
14 void (*disable)(struct clk *clk); 14 void (*disable)(struct clk *clk);
15 void (*recalc)(struct clk *clk); 15 void (*recalc)(struct clk *clk);
16 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); 16 int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
17 long (*round_rate)(struct clk *clk, unsigned long rate);
17}; 18};
18 19
19struct clk { 20struct clk {
diff --git a/include/asm-sh/cpu-sh3/freq.h b/include/asm-sh/cpu-sh3/freq.h
index 273f3229785c..0a054b53b9de 100644
--- a/include/asm-sh/cpu-sh3/freq.h
+++ b/include/asm-sh/cpu-sh3/freq.h
@@ -10,11 +10,7 @@
10#ifndef __ASM_CPU_SH3_FREQ_H 10#ifndef __ASM_CPU_SH3_FREQ_H
11#define __ASM_CPU_SH3_FREQ_H 11#define __ASM_CPU_SH3_FREQ_H
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH7300)
14#define FRQCR 0xa415ff80
15#else
16#define FRQCR 0xffffff80 13#define FRQCR 0xffffff80
17#endif
18#define MIN_DIVISOR_NR 0 14#define MIN_DIVISOR_NR 0
19#define MAX_DIVISOR_NR 4 15#define MAX_DIVISOR_NR 4
20 16
diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h
index 4704e86dff5b..b20786d42d09 100644
--- a/include/asm-sh/cpu-sh3/mmu_context.h
+++ b/include/asm-sh/cpu-sh3/mmu_context.h
@@ -30,7 +30,6 @@
30#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 30#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
31 defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 31 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
32 defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 32 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
33 defined(CONFIG_CPU_SUBTYPE_SH7300) || \
34 defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 33 defined(CONFIG_CPU_SUBTYPE_SH7705) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7712) || \ 34 defined(CONFIG_CPU_SUBTYPE_SH7712) || \
36 defined(CONFIG_CPU_SUBTYPE_SH7710) 35 defined(CONFIG_CPU_SUBTYPE_SH7710)
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h
index 4928b08f9d19..b6c2020a2ad3 100644
--- a/include/asm-sh/cpu-sh3/timer.h
+++ b/include/asm-sh/cpu-sh3/timer.h
@@ -19,7 +19,6 @@
19 * SH7729R 19 * SH7729R
20 * SH7710 20 * SH7710
21 * SH7720 21 * SH7720
22 * SH7300
23 * SH7710 22 * SH7710
24 * --------------------------------------------------------------------------- 23 * ---------------------------------------------------------------------------
25 */ 24 */
@@ -28,7 +27,7 @@
28#define TMU_TOCR 0xfffffe90 /* Byte access */ 27#define TMU_TOCR 0xfffffe90 /* Byte access */
29#endif 28#endif
30 29
31#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) 30#if defined(CONFIG_CPU_SUBTYPE_SH7710)
32#define TMU_012_TSTR 0xa412fe92 /* Byte access */ 31#define TMU_012_TSTR 0xa412fe92 /* Byte access */
33 32
34#define TMU0_TCOR 0xa412fe94 /* Long access */ 33#define TMU0_TCOR 0xa412fe94 /* Long access */
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h
index 026025b51cea..dc1d32a86374 100644
--- a/include/asm-sh/cpu-sh4/freq.h
+++ b/include/asm-sh/cpu-sh4/freq.h
@@ -10,7 +10,7 @@
10#ifndef __ASM_CPU_SH4_FREQ_H 10#ifndef __ASM_CPU_SH4_FREQ_H
11#define __ASM_CPU_SH4_FREQ_H 11#define __ASM_CPU_SH4_FREQ_H
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722) 13#if defined(CONFIG_CPU_SUBTYPE_SH7722)
14#define FRQCR 0xa4150000 14#define FRQCR 0xa4150000
15#define VCLKCR 0xa4150004 15#define VCLKCR 0xa4150004
16#define SCLKACR 0xa4150008 16#define SCLKACR 0xa4150008
diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h
index d3bc7818bbbe..84fefdaa01a5 100644
--- a/include/asm-sh/dma-mapping.h
+++ b/include/asm-sh/dma-mapping.h
@@ -69,11 +69,11 @@ static inline dma_addr_t dma_map_single(struct device *dev,
69{ 69{
70#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) 70#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
71 if (dev->bus == &pci_bus_type) 71 if (dev->bus == &pci_bus_type)
72 return virt_to_bus(ptr); 72 return virt_to_phys(ptr);
73#endif 73#endif
74 dma_cache_sync(dev, ptr, size, dir); 74 dma_cache_sync(dev, ptr, size, dir);
75 75
76 return virt_to_bus(ptr); 76 return virt_to_phys(ptr);
77} 77}
78 78
79#define dma_unmap_single(dev, addr, size, dir) do { } while (0) 79#define dma_unmap_single(dev, addr, size, dir) do { } while (0)
@@ -116,7 +116,7 @@ static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle,
116 if (dev->bus == &pci_bus_type) 116 if (dev->bus == &pci_bus_type)
117 return; 117 return;
118#endif 118#endif
119 dma_cache_sync(dev, bus_to_virt(dma_handle), size, dir); 119 dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir);
120} 120}
121 121
122static inline void dma_sync_single_range(struct device *dev, 122static inline void dma_sync_single_range(struct device *dev,
@@ -128,7 +128,7 @@ static inline void dma_sync_single_range(struct device *dev,
128 if (dev->bus == &pci_bus_type) 128 if (dev->bus == &pci_bus_type)
129 return; 129 return;
130#endif 130#endif
131 dma_cache_sync(dev, bus_to_virt(dma_handle) + offset, size, dir); 131 dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir);
132} 132}
133 133
134static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, 134static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
@@ -160,6 +160,25 @@ static inline void dma_sync_single_for_device(struct device *dev,
160 dma_sync_single(dev, dma_handle, size, dir); 160 dma_sync_single(dev, dma_handle, size, dir);
161} 161}
162 162
163static inline void dma_sync_single_range_for_cpu(struct device *dev,
164 dma_addr_t dma_handle,
165 unsigned long offset,
166 size_t size,
167 enum dma_data_direction direction)
168{
169 dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction);
170}
171
172static inline void dma_sync_single_range_for_device(struct device *dev,
173 dma_addr_t dma_handle,
174 unsigned long offset,
175 size_t size,
176 enum dma_data_direction direction)
177{
178 dma_sync_single_for_device(dev, dma_handle+offset, size, direction);
179}
180
181
163static inline void dma_sync_sg_for_cpu(struct device *dev, 182static inline void dma_sync_sg_for_cpu(struct device *dev,
164 struct scatterlist *sg, int nelems, 183 struct scatterlist *sg, int nelems,
165 enum dma_data_direction dir) 184 enum dma_data_direction dir)
diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h
index 6034d4a29e73..4c75b70b6414 100644
--- a/include/asm-sh/dma.h
+++ b/include/asm-sh/dma.h
@@ -111,6 +111,7 @@ struct dma_info {
111 111
112 struct list_head list; 112 struct list_head list;
113 int first_channel_nr; 113 int first_channel_nr;
114 int first_vchannel_nr;
114}; 115};
115 116
116struct dma_chan_caps { 117struct dma_chan_caps {
diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h
index 458e9fa59545..8a566177ad96 100644
--- a/include/asm-sh/fixmap.h
+++ b/include/asm-sh/fixmap.h
@@ -46,6 +46,9 @@
46 * fix-mapped? 46 * fix-mapped?
47 */ 47 */
48enum fixed_addresses { 48enum fixed_addresses {
49#define FIX_N_COLOURS 16
50 FIX_CMAP_BEGIN,
51 FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS,
49#ifdef CONFIG_HIGHMEM 52#ifdef CONFIG_HIGHMEM
50 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ 53 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
51 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, 54 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
@@ -53,8 +56,8 @@ enum fixed_addresses {
53 __end_of_fixed_addresses 56 __end_of_fixed_addresses
54}; 57};
55 58
56extern void __set_fixmap (enum fixed_addresses idx, 59extern void __set_fixmap(enum fixed_addresses idx,
57 unsigned long phys, pgprot_t flags); 60 unsigned long phys, pgprot_t flags);
58 61
59#define set_fixmap(idx, phys) \ 62#define set_fixmap(idx, phys) \
60 __set_fixmap(idx, phys, PAGE_KERNEL) 63 __set_fixmap(idx, phys, PAGE_KERNEL)
@@ -106,5 +109,4 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
106 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); 109 BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
107 return __virt_to_fix(vaddr); 110 return __virt_to_fix(vaddr);
108} 111}
109
110#endif 112#endif
diff --git a/include/asm-sh/flat.h b/include/asm-sh/flat.h
index 0d5cc04ab005..dc4f5950dafa 100644
--- a/include/asm-sh/flat.h
+++ b/include/asm-sh/flat.h
@@ -16,8 +16,9 @@
16#define flat_argvp_envp_on_stack() 0 16#define flat_argvp_envp_on_stack() 0
17#define flat_old_ram_flag(flags) (flags) 17#define flat_old_ram_flag(flags) (flags)
18#define flat_reloc_valid(reloc, size) ((reloc) <= (size)) 18#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
19#define flat_get_addr_from_rp(rp, relval, flags) get_unaligned(rp) 19#define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp)
20#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) 20#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp)
21#define flat_get_relocate_addr(rel) (rel) 21#define flat_get_relocate_addr(rel) (rel)
22#define flat_set_persistent(relval, p) 0
22 23
23#endif /* __ASM_SH_FLAT_H */ 24#endif /* __ASM_SH_FLAT_H */
diff --git a/include/asm-sh/floppy.h b/include/asm-sh/floppy.h
index dc1ad464fa32..3b59b3af777b 100644
--- a/include/asm-sh/floppy.h
+++ b/include/asm-sh/floppy.h
@@ -181,7 +181,7 @@ static void _fd_chose_dma_mode(char *addr, unsigned long size)
181{ 181{
182 if(can_use_virtual_dma == 2) { 182 if(can_use_virtual_dma == 2) {
183 if((unsigned int) addr >= (unsigned int) high_memory || 183 if((unsigned int) addr >= (unsigned int) high_memory ||
184 virt_to_bus(addr) >= 0x10000000) 184 virt_to_phys(addr) >= 0x10000000)
185 use_virtual_dma = 1; 185 use_virtual_dma = 1;
186 else 186 else
187 use_virtual_dma = 0; 187 use_virtual_dma = 0;
@@ -219,7 +219,7 @@ static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
219 doing_pdma = 0; 219 doing_pdma = 0;
220 clear_dma_ff(FLOPPY_DMA); 220 clear_dma_ff(FLOPPY_DMA);
221 set_dma_mode(FLOPPY_DMA,mode); 221 set_dma_mode(FLOPPY_DMA,mode);
222 set_dma_addr(FLOPPY_DMA,virt_to_bus(addr)); 222 set_dma_addr(FLOPPY_DMA,virt_to_phys(addr));
223 set_dma_count(FLOPPY_DMA,size); 223 set_dma_count(FLOPPY_DMA,size);
224 enable_dma(FLOPPY_DMA); 224 enable_dma(FLOPPY_DMA);
225 return 0; 225 return 0;
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index 4ca3f765bacc..20d42959f52a 100644
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -1,6 +1,7 @@
1#ifndef __ASM_SH_HW_IRQ_H 1#ifndef __ASM_SH_HW_IRQ_H
2#define __ASM_SH_HW_IRQ_H 2#define __ASM_SH_HW_IRQ_H
3 3
4#include <linux/init.h>
4#include <asm/atomic.h> 5#include <asm/atomic.h>
5 6
6extern atomic_t irq_err_count; 7extern atomic_t irq_err_count;
@@ -22,7 +23,6 @@ struct intc2_desc {
22}; 23};
23 24
24void register_intc2_controller(struct intc2_desc *); 25void register_intc2_controller(struct intc2_desc *);
25void init_IRQ_intc2(void);
26 26
27struct ipr_data { 27struct ipr_data {
28 unsigned char irq; 28 unsigned char irq;
@@ -40,11 +40,82 @@ struct ipr_desc {
40}; 40};
41 41
42void register_ipr_controller(struct ipr_desc *); 42void register_ipr_controller(struct ipr_desc *);
43void init_IRQ_ipr(void);
44 43
45/* 44/*
46 * Enable individual interrupt mode for external IPR IRQs. 45 * Enable individual interrupt mode for external IPR IRQs.
47 */ 46 */
48void ipr_irq_enable_irlm(void); 47void __init ipr_irq_enable_irlm(void);
48
49typedef unsigned char intc_enum;
50
51struct intc_vect {
52 intc_enum enum_id;
53 unsigned short vect;
54};
55
56#define INTC_VECT(enum_id, vect) { enum_id, vect }
57
58struct intc_prio {
59 intc_enum enum_id;
60 unsigned char priority;
61};
62
63#define INTC_PRIO(enum_id, prio) { enum_id, prio }
64
65struct intc_group {
66 intc_enum enum_id;
67 intc_enum *enum_ids;
68};
69
70#define INTC_GROUP(enum_id, ids...) { enum_id, (intc_enum []) { ids, 0 } }
71
72struct intc_mask_reg {
73 unsigned long set_reg, clr_reg, reg_width;
74 intc_enum enum_ids[32];
75};
76
77struct intc_prio_reg {
78 unsigned long reg, reg_width, field_width;
79 intc_enum enum_ids[16];
80};
81
82struct intc_sense_reg {
83 unsigned long reg, reg_width, field_width;
84 intc_enum enum_ids[16];
85};
86
87struct intc_desc {
88 struct intc_vect *vectors;
89 unsigned int nr_vectors;
90 struct intc_group *groups;
91 unsigned int nr_groups;
92 struct intc_prio *priorities;
93 unsigned int nr_priorities;
94 struct intc_mask_reg *mask_regs;
95 unsigned int nr_mask_regs;
96 struct intc_prio_reg *prio_regs;
97 unsigned int nr_prio_regs;
98 struct intc_sense_reg *sense_regs;
99 unsigned int nr_sense_regs;
100 struct irq_chip chip;
101};
102
103#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
104#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
105 priorities, mask_regs, prio_regs, sense_regs) \
106struct intc_desc symbol = { \
107 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
108 _INTC_ARRAY(priorities), \
109 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
110 _INTC_ARRAY(sense_regs), \
111 .chip.name = chipname, \
112}
113
114void __init register_intc_controller(struct intc_desc *desc);
115
116void __init plat_irq_setup(void);
117
118enum { IRQ_MODE_IRQ, IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
119void __init plat_irq_setup_pins(int mode);
49 120
50#endif /* __ASM_SH_HW_IRQ_H */ 121#endif /* __ASM_SH_HW_IRQ_H */
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h
index aa80930ce8e4..e6a1877dcb20 100644
--- a/include/asm-sh/io.h
+++ b/include/asm-sh/io.h
@@ -241,10 +241,6 @@ static inline void *phys_to_virt(unsigned long address)
241#define virt_to_phys(address) ((unsigned long)(address)) 241#define virt_to_phys(address) ((unsigned long)(address))
242#endif 242#endif
243 243
244#define virt_to_bus virt_to_phys
245#define bus_to_virt phys_to_virt
246#define page_to_bus page_to_phys
247
248/* 244/*
249 * readX/writeX() are used to access memory mapped devices. On some 245 * readX/writeX() are used to access memory mapped devices. On some
250 * architectures the memory mapped IO stuff needs to be accessed 246 * architectures the memory mapped IO stuff needs to be accessed
diff --git a/include/asm-sh/mpc1211/mc146818rtc.h b/include/asm-sh/mpc1211/mc146818rtc.h
index 0ec78f66cea4..e245f2a3cd78 100644
--- a/include/asm-sh/mpc1211/mc146818rtc.h
+++ b/include/asm-sh/mpc1211/mc146818rtc.h
@@ -1,6 +1,6 @@
1/* 1/*
2 * MPC1211 uses PC/AT style RTC definitions. 2 * MPC1211 uses PC/AT style RTC definitions.
3 */ 3 */
4#include <asm-i386/mc146818rtc.h> 4#include <asm-x86/mc146818rtc_32.h>
5 5
6 6
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index 22efffe45019..e3fae12c0e49 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -55,11 +55,7 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
55 55
56#define PTE_PHYS_MASK (0x20000000 - PAGE_SIZE) 56#define PTE_PHYS_MASK (0x20000000 - PAGE_SIZE)
57 57
58/* 58#define VMALLOC_START (P3SEG)
59 * First 1MB map is used by fixed purpose.
60 * Currently only 4-entry (16kB) is used (see arch/sh/mm/cache.c)
61 */
62#define VMALLOC_START (P3SEG+0x00100000)
63#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) 59#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
64 60
65/* 61/*
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index 2252e75daa26..26d52174f4b4 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -45,7 +45,7 @@ enum cpu_type {
45 CPU_SH7705, CPU_SH7706, CPU_SH7707, 45 CPU_SH7705, CPU_SH7706, CPU_SH7707,
46 CPU_SH7708, CPU_SH7708S, CPU_SH7708R, 46 CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
47 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, 47 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
48 CPU_SH7729, CPU_SH7300, 48 CPU_SH7729,
49 49
50 /* SH-4 types */ 50 /* SH-4 types */
51 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, 51 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
@@ -55,7 +55,7 @@ enum cpu_type {
55 CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3, 55 CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3,
56 56
57 /* SH4AL-DSP types */ 57 /* SH4AL-DSP types */
58 CPU_SH73180, CPU_SH7343, CPU_SH7722, 58 CPU_SH7343, CPU_SH7722,
59 59
60 /* Unknown subtype */ 60 /* Unknown subtype */
61 CPU_SH_NONE 61 CPU_SH_NONE
diff --git a/include/asm-sh/rts7751r2d.h b/include/asm-sh/rts7751r2d.h
index 10565ac7966a..5d7800aa31b5 100644
--- a/include/asm-sh/rts7751r2d.h
+++ b/include/asm-sh/rts7751r2d.h
@@ -37,7 +37,7 @@
37#define PA_VERREG 0xa4000032 /* FPGA Version Register */ 37#define PA_VERREG 0xa4000032 /* FPGA Version Register */
38#define PA_INPORT 0xa4000034 /* KEY Input Port control */ 38#define PA_INPORT 0xa4000034 /* KEY Input Port control */
39#define PA_OUTPORT 0xa4000036 /* LED control */ 39#define PA_OUTPORT 0xa4000036 /* LED control */
40#define PA_DMPORT 0xa4000038 /* DM270 Output Port control */ 40#define PA_BVERREG 0xa4000038 /* Board Revision Register */
41 41
42#define PA_AX88796L 0xaa000400 /* AX88796L Area */ 42#define PA_AX88796L 0xaa000400 /* AX88796L Area */
43#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */ 43#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */
diff --git a/include/asm-sh/se7300.h b/include/asm-sh/se7300.h
deleted file mode 100644
index 4e24edccb30d..000000000000
--- a/include/asm-sh/se7300.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef __ASM_SH_HITACHI_SE7300_H
2#define __ASM_SH_HITACHI_SE7300_H
3
4/*
5 * linux/include/asm-sh/se/se7300.h
6 *
7 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
8 *
9 * SH-Mobile SolutionEngine 7300 support
10 */
11
12/* Box specific addresses. */
13
14/* Area 0 */
15#define PA_ROM 0x00000000 /* EPROM */
16#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
17#define PA_FROM 0x00400000 /* Flash ROM */
18#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
19#define PA_SRAM 0x00800000 /* SRAM */
20#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
21/* Area 1 */
22#define PA_EXT1 0x04000000
23#define PA_EXT1_SIZE 0x04000000
24/* Area 2 */
25#define PA_EXT2 0x08000000
26#define PA_EXT2_SIZE 0x04000000
27/* Area 3 */
28#define PA_SDRAM 0x0c000000
29#define PA_SDRAM_SIZE 0x04000000
30/* Area 4 */
31#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
32#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
33#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
34#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
35#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
36#define MRSHPC_OPTION (PA_MRSHPC + 6)
37#define MRSHPC_CSR (PA_MRSHPC + 8)
38#define MRSHPC_ISR (PA_MRSHPC + 10)
39#define MRSHPC_ICR (PA_MRSHPC + 12)
40#define MRSHPC_CPWCR (PA_MRSHPC + 14)
41#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
42#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
43#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
44#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
45#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
46#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
47#define MRSHPC_CDCR (PA_MRSHPC + 28)
48#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
49#define PA_LED 0xb0800000 /* LED */
50#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
51#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */
52#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */
53#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */
54/* Area 5 */
55#define PA_EXT5 0x14000000
56#define PA_EXT5_SIZE 0x04000000
57/* Area 6 */
58#define PA_LCD1 0xb8000000
59#define PA_LCD2 0xb8800000
60
61#define __IO_PREFIX sh7300se
62#include <asm/io_generic.h>
63
64#endif /* __ASM_SH_HITACHI_SE7300_H */
diff --git a/include/asm-sh/se73180.h b/include/asm-sh/se73180.h
deleted file mode 100644
index 907c062b4c9a..000000000000
--- a/include/asm-sh/se73180.h
+++ /dev/null
@@ -1,66 +0,0 @@
1#ifndef __ASM_SH_SE73180_H
2#define __ASM_SH_SE73180_H
3
4/*
5 * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
6 *
7 * SH-Mobile SolutionEngine 73180 support
8 */
9
10/* Box specific addresses. */
11
12/* Area 0 */
13#define PA_ROM 0x00000000 /* EPROM */
14#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */
15#define PA_FROM 0x00400000 /* Flash ROM */
16#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */
17#define PA_SRAM 0x00800000 /* SRAM */
18#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */
19/* Area 1 */
20#define PA_EXT1 0x04000000
21#define PA_EXT1_SIZE 0x04000000
22/* Area 2 */
23#define PA_EXT2 0x08000000
24#define PA_EXT2_SIZE 0x04000000
25/* Area 3 */
26#define PA_SDRAM 0x0c000000
27#define PA_SDRAM_SIZE 0x04000000
28/* Area 4 */
29#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */
30#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */
31#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */
32#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */
33#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */
34#define MRSHPC_OPTION (PA_MRSHPC + 6)
35#define MRSHPC_CSR (PA_MRSHPC + 8)
36#define MRSHPC_ISR (PA_MRSHPC + 10)
37#define MRSHPC_ICR (PA_MRSHPC + 12)
38#define MRSHPC_CPWCR (PA_MRSHPC + 14)
39#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
40#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
41#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
42#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
43#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
44#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
45#define MRSHPC_CDCR (PA_MRSHPC + 28)
46#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
47#define PA_LED 0xb0C00000 /* LED */
48#define LED_SHIFT 0
49#define PA_DIPSW 0xb0900000 /* Dip switch 31 */
50#define PA_EPLD_MODESET 0xb0a00000 /* FPGA Mode set register */
51#define PA_EPLD_ST1 0xb0a80000 /* FPGA Interrupt status register1 */
52#define PA_EPLD_ST2 0xb0ac0000 /* FPGA Interrupt status register2 */
53/* Area 5 */
54#define PA_EXT5 0x14000000
55#define PA_EXT5_SIZE 0x04000000
56/* Area 6 */
57#define PA_LCD1 0xb8000000
58#define PA_LCD2 0xb8800000
59
60#define __IO_PREFIX sh73180se
61#include <asm/io_generic.h>
62
63/* arch/sh/boards/se/73180/irq.c */
64int shmse_irq_demux(int irq);
65
66#endif /* __ASM_SH_SE73180_H */
diff --git a/include/asm-sh/se7722.h b/include/asm-sh/se7722.h
index b3b31e4725c6..e0e89fcb8388 100644
--- a/include/asm-sh/se7722.h
+++ b/include/asm-sh/se7722.h
@@ -81,36 +81,32 @@
81/* IRQ */ 81/* IRQ */
82#define IRQ0_IRQ 32 82#define IRQ0_IRQ 32
83#define IRQ1_IRQ 33 83#define IRQ1_IRQ 33
84#define INTC_ICR0 0xA4140000UL
85#define INTC_ICR1 0xA414001CUL
86
87#define INTMSK0 0xa4140044
88#define INTMSKCLR0 0xa4140064
89#define INTC_INTPRI0 0xa4140010
90 84
91#define IRQ01_MODE 0xb1800000 85#define IRQ01_MODE 0xb1800000
92#define IRQ01_STS 0xb1800004 86#define IRQ01_STS 0xb1800004
93#define IRQ01_MASK 0xb1800008 87#define IRQ01_MASK 0xb1800008
94#define EXT_BIT (0x3fc0) /* SH IRQ1 */
95#define MRSHPC_BIT0 (0x0004) /* SH IRQ1 */
96#define MRSHPC_BIT1 (0x0008) /* SH IRQ1 */
97#define MRSHPC_BIT2 (0x0010) /* SH IRQ1 */
98#define MRSHPC_BIT3 (0x0020) /* SH IRQ1 */
99#define SMC_BIT (0x0002) /* SH IRQ0 */
100#define USB_BIT (0x0001) /* SH IRQ0 */
101
102#define MRSHPC_IRQ3 11
103#define MRSHPC_IRQ2 12
104#define MRSHPC_IRQ1 13
105#define MRSHPC_IRQ0 14
106#define SMC_IRQ 10
107#define EXT_IRQ 5
108#define USB_IRQ 6
109 88
89/* Bits in IRQ01_* registers */
90
91#define SE7722_FPGA_IRQ_USB 0 /* IRQ0 */
92#define SE7722_FPGA_IRQ_SMC 1 /* IRQ0 */
93#define SE7722_FPGA_IRQ_MRSHPC0 2 /* IRQ1 */
94#define SE7722_FPGA_IRQ_MRSHPC1 3 /* IRQ1 */
95#define SE7722_FPGA_IRQ_MRSHPC2 4 /* IRQ1 */
96#define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */
97
98#define SE7722_FPGA_IRQ_NR 6
99#define SE7722_FPGA_IRQ_BASE 110
100
101#define MRSHPC_IRQ3 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC3)
102#define MRSHPC_IRQ2 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC2)
103#define MRSHPC_IRQ1 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC1)
104#define MRSHPC_IRQ0 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC0)
105#define SMC_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_SMC)
106#define USB_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_USB)
110 107
111/* arch/sh/boards/se/7722/irq.c */ 108/* arch/sh/boards/se/7722/irq.c */
112void init_se7722_IRQ(void); 109void init_se7722_IRQ(void);
113int se7722_irq_demux(int);
114 110
115#define __IO_PREFIX se7722 111#define __IO_PREFIX se7722
116#include <asm/io_generic.h> 112#include <asm/io_generic.h>
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index 7c75045ae22b..245042537205 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -64,16 +64,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
64 last = __last; \ 64 last = __last; \
65} while (0) 65} while (0)
66 66
67/*
68 * On SMP systems, when the scheduler does migration-cost autodetection,
69 * it needs a way to flush as much of the CPU's caches as possible.
70 *
71 * TODO: fill this in!
72 */
73static inline void sched_cacheflush(void)
74{
75}
76
77#ifdef CONFIG_CPU_SH4A 67#ifdef CONFIG_CPU_SH4A
78#define __icbi() \ 68#define __icbi() \
79{ \ 69{ \
diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h
index 31d55e3782d5..1f7e1deb8d92 100644
--- a/include/asm-sh/thread_info.h
+++ b/include/asm-sh/thread_info.h
@@ -107,18 +107,16 @@ static inline struct thread_info *current_thread_info(void)
107 * - other flags in MSW 107 * - other flags in MSW
108 */ 108 */
109#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ 109#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
110#define TIF_NOTIFY_RESUME 1 /* resumption notification requested */ 110#define TIF_SIGPENDING 1 /* signal pending */
111#define TIF_SIGPENDING 2 /* signal pending */ 111#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
112#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ 112#define TIF_RESTORE_SIGMASK 3 /* restore signal mask in do_signal() */
113#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ 113#define TIF_SINGLESTEP 4 /* singlestepping active */
114#define TIF_SINGLESTEP 5 /* singlestepping active */
115#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ 114#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
116#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 115#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
117#define TIF_MEMDIE 18 116#define TIF_MEMDIE 18
118#define TIF_FREEZE 19 117#define TIF_FREEZE 19
119 118
120#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 119#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
121#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
122#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 120#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
123#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 121#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
124#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 122#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h
index 38d46e01b846..56f4e30dc49c 100644
--- a/include/asm-sh/ubc.h
+++ b/include/asm-sh/ubc.h
@@ -15,8 +15,7 @@
15#include <asm/cpu/ubc.h> 15#include <asm/cpu/ubc.h>
16 16
17/* User Break Controller */ 17/* User Break Controller */
18#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 18#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
19 defined(CONFIG_CPU_SUBTYPE_SH7300)
20#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729) 19#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729)
21#else 20#else
22#define UBC_TYPE_SH7729 0 21#define UBC_TYPE_SH7729 0
diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h
index 77bcb09d6ac8..b182b1cb05fd 100644
--- a/include/asm-sh/unistd.h
+++ b/include/asm-sh/unistd.h
@@ -332,8 +332,9 @@
332#define __NR_signalfd 321 332#define __NR_signalfd 321
333#define __NR_timerfd 322 333#define __NR_timerfd 322
334#define __NR_eventfd 323 334#define __NR_eventfd 323
335#define __NR_fallocate 324
335 336
336#define NR_syscalls 324 337#define NR_syscalls 325
337 338
338#ifdef __KERNEL__ 339#ifdef __KERNEL__
339 340
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 04:28:39 -0500