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-rw-r--r--include/asm-sh/bugs.h2
-rw-r--r--include/asm-sh/cpu-sh4/freq.h6
-rw-r--r--include/asm-sh/cpu-sh4/rtc.h5
-rw-r--r--include/asm-sh/migor.h58
-rw-r--r--include/asm-sh/processor.h5
-rw-r--r--include/asm-sh/r7780rp.h22
-rw-r--r--include/asm-sh/se7721.h70
-rw-r--r--include/asm-sh/se7722.h2
-rw-r--r--include/asm-sh/sh_keysc.h13
-rw-r--r--include/asm-sh/system.h2
-rw-r--r--include/asm-sh/topology.h2
-rw-r--r--include/asm-sh/uaccess_32.h5
12 files changed, 171 insertions, 21 deletions
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index cfda7d5bf026..121b2ecddfc3 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -25,7 +25,7 @@ static void __init check_bugs(void)
25 case CPU_SH7619: 25 case CPU_SH7619:
26 *p++ = '2'; 26 *p++ = '2';
27 break; 27 break;
28 case CPU_SH7203 ... CPU_SH7263: 28 case CPU_SH7203 ... CPU_MXG:
29 *p++ = '2'; 29 *p++ = '2';
30 *p++ = 'a'; 30 *p++ = 'a';
31 break; 31 break;
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h
index ec028c649215..da46e67ae26d 100644
--- a/include/asm-sh/cpu-sh4/freq.h
+++ b/include/asm-sh/cpu-sh4/freq.h
@@ -10,14 +10,14 @@
10#ifndef __ASM_CPU_SH4_FREQ_H 10#ifndef __ASM_CPU_SH4_FREQ_H
11#define __ASM_CPU_SH4_FREQ_H 11#define __ASM_CPU_SH4_FREQ_H
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH7722) || defined(CONFIG_CPU_SUBTYPE_SH7366) 13#if defined(CONFIG_CPU_SUBTYPE_SH7722) || \
14 defined(CONFIG_CPU_SUBTYPE_SH7723) || \
15 defined(CONFIG_CPU_SUBTYPE_SH7366)
14#define FRQCR 0xa4150000 16#define FRQCR 0xa4150000
15#define VCLKCR 0xa4150004 17#define VCLKCR 0xa4150004
16#define SCLKACR 0xa4150008 18#define SCLKACR 0xa4150008
17#define SCLKBCR 0xa415000c 19#define SCLKBCR 0xa415000c
18#if defined(CONFIG_CPU_SUBTYPE_SH7722)
19#define IrDACLKCR 0xa4150010 20#define IrDACLKCR 0xa4150010
20#endif
21#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 21#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
22 defined(CONFIG_CPU_SUBTYPE_SH7780) 22 defined(CONFIG_CPU_SUBTYPE_SH7780)
23#define FRQCR 0xffc80000 23#define FRQCR 0xffc80000
diff --git a/include/asm-sh/cpu-sh4/rtc.h b/include/asm-sh/cpu-sh4/rtc.h
index f3d0f53275e4..25b1e6adfe8c 100644
--- a/include/asm-sh/cpu-sh4/rtc.h
+++ b/include/asm-sh/cpu-sh4/rtc.h
@@ -1,7 +1,12 @@
1#ifndef __ASM_SH_CPU_SH4_RTC_H 1#ifndef __ASM_SH_CPU_SH4_RTC_H
2#define __ASM_SH_CPU_SH4_RTC_H 2#define __ASM_SH_CPU_SH4_RTC_H
3 3
4#ifdef CONFIG_CPU_SUBTYPE_SH7723
5#define rtc_reg_size sizeof(u16)
6#else
4#define rtc_reg_size sizeof(u32) 7#define rtc_reg_size sizeof(u32)
8#endif
9
5#define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */ 10#define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */
6#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR 11#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
7 12
diff --git a/include/asm-sh/migor.h b/include/asm-sh/migor.h
new file mode 100644
index 000000000000..2329363afdc3
--- /dev/null
+++ b/include/asm-sh/migor.h
@@ -0,0 +1,58 @@
1#ifndef __ASM_SH_MIGOR_H
2#define __ASM_SH_MIGOR_H
3
4/*
5 * linux/include/asm-sh/migor.h
6 *
7 * Copyright (C) 2008 Renesas Solutions
8 *
9 * Portions Copyright (C) 2007 Nobuhiro Iwamatsu
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 *
15 */
16#include <asm/addrspace.h>
17
18/* GPIO */
19#define MSTPCR0 0xa4150030
20#define MSTPCR1 0xa4150034
21#define MSTPCR2 0xa4150038
22
23#define PORT_PACR 0xa4050100
24#define PORT_PDCR 0xa4050106
25#define PORT_PECR 0xa4050108
26#define PORT_PHCR 0xa405010e
27#define PORT_PJCR 0xa4050110
28#define PORT_PKCR 0xa4050112
29#define PORT_PLCR 0xa4050114
30#define PORT_PMCR 0xa4050116
31#define PORT_PRCR 0xa405011c
32#define PORT_PWCR 0xa4050146
33#define PORT_PXCR 0xa4050148
34#define PORT_PYCR 0xa405014a
35#define PORT_PZCR 0xa405014c
36#define PORT_PADR 0xa4050120
37#define PORT_PWDR 0xa4050166
38
39#define PORT_HIZCRA 0xa4050158
40#define PORT_HIZCRC 0xa405015c
41
42#define PORT_MSELCRB 0xa4050182
43
44#define MSTPCR1 0xa4150034
45#define MSTPCR2 0xa4150038
46
47#define PORT_PSELA 0xa405014e
48#define PORT_PSELB 0xa4050150
49#define PORT_PSELC 0xa4050152
50#define PORT_PSELD 0xa4050154
51
52#define PORT_HIZCRA 0xa4050158
53#define PORT_HIZCRB 0xa405015a
54#define PORT_HIZCRC 0xa405015c
55
56#define BSC_CS6ABCR 0xfec1001c
57
58#endif /* __ASM_SH_MIGOR_H */
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index ec707b98e5b9..b7c7ce80f03e 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -16,7 +16,7 @@ enum cpu_type {
16 CPU_SH7619, 16 CPU_SH7619,
17 17
18 /* SH-2A types */ 18 /* SH-2A types */
19 CPU_SH7203, CPU_SH7206, CPU_SH7263, 19 CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
20 20
21 /* SH-3 types */ 21 /* SH-3 types */
22 CPU_SH7705, CPU_SH7706, CPU_SH7707, 22 CPU_SH7705, CPU_SH7706, CPU_SH7707,
@@ -29,7 +29,8 @@ enum cpu_type {
29 CPU_SH7760, CPU_SH4_202, CPU_SH4_501, 29 CPU_SH7760, CPU_SH4_202, CPU_SH4_501,
30 30
31 /* SH-4A types */ 31 /* SH-4A types */
32 CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3, 32 CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785,
33 CPU_SH7723, CPU_SHX3,
33 34
34 /* SH4AL-DSP types */ 35 /* SH4AL-DSP types */
35 CPU_SH7343, CPU_SH7722, CPU_SH7366, 36 CPU_SH7343, CPU_SH7722, CPU_SH7366,
diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h
index 1770460a4616..a33838f23a6d 100644
--- a/include/asm-sh/r7780rp.h
+++ b/include/asm-sh/r7780rp.h
@@ -55,11 +55,11 @@
55#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */ 55#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */
56#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */ 56#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */
57#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */ 57#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */
58#define PA_ICCR (PA_BCR+0x0600) /* Serial control */ 58#define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */
59#define PA_SAR (PA_BCR+0x0602) /* Serial Slave control */ 59#define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */
60#define PA_MDR (PA_BCR+0x0604) /* Serial Mode control */ 60#define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */
61#define PA_ADR1 (PA_BCR+0x0606) /* Serial Address1 control */ 61#define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
62#define PA_DAR1 (PA_BCR+0x0646) /* Serial Data1 control */ 62#define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */
63#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */ 63#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */
64#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ 64#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */
65#define PA_PMR (PA_BCR+0x0900) /* */ 65#define PA_PMR (PA_BCR+0x0900) /* */
@@ -107,11 +107,11 @@
107#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */ 107#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */
108#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */ 108#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */
109#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */ 109#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */
110#define PA_ICCR (PA_BCR+0x0500) /* Serial control */ 110#define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */
111#define PA_SAR (PA_BCR+0x0502) /* Serial Slave control */ 111#define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */
112#define PA_MDR (PA_BCR+0x0504) /* Serial Mode control */ 112#define PA_SMMR (PA_BCR+0x0504) /* 2-wire Serial Mode control */
113#define PA_ADR1 (PA_BCR+0x0506) /* Serial Address1 control */ 113#define PA_SMSADR1 (PA_BCR+0x0506) /* 2-wire Serial Address1 control */
114#define PA_DAR1 (PA_BCR+0x0546) /* Serial Data1 control */ 114#define PA_SMTRDR1 (PA_BCR+0x0546) /* 2-wire Serial Data1 control */
115#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */ 115#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */
116 116
117#define PA_AX88796L 0xa5800400 /* AX88796L Area */ 117#define PA_AX88796L 0xa5800400 /* AX88796L Area */
@@ -190,6 +190,8 @@
190#define IRQ_TP (HL_FPGA_IRQ_BASE + 12) 190#define IRQ_TP (HL_FPGA_IRQ_BASE + 12)
191#define IRQ_RTC (HL_FPGA_IRQ_BASE + 13) 191#define IRQ_RTC (HL_FPGA_IRQ_BASE + 13)
192#define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14) 192#define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14)
193#define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15)
194#define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16)
193 195
194unsigned char *highlander_init_irq_r7780mp(void); 196unsigned char *highlander_init_irq_r7780mp(void);
195unsigned char *highlander_init_irq_r7780rp(void); 197unsigned char *highlander_init_irq_r7780rp(void);
diff --git a/include/asm-sh/se7721.h b/include/asm-sh/se7721.h
new file mode 100644
index 000000000000..b957f6041193
--- /dev/null
+++ b/include/asm-sh/se7721.h
@@ -0,0 +1,70 @@
1/*
2 * Copyright (C) 2008 Renesas Solutions Corp.
3 *
4 * Hitachi UL SolutionEngine 7721 Support.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 */
11
12#ifndef __ASM_SH_SE7721_H
13#define __ASM_SH_SE7721_H
14#include <asm/addrspace.h>
15
16/* Box specific addresses. */
17#define SE_AREA0_WIDTH 2 /* Area0: 32bit */
18#define PA_ROM 0xa0000000 /* EPROM */
19#define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */
20#define PA_FROM 0xa1000000 /* Flash-ROM */
21#define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */
22#define PA_EXT1 0xa4000000
23#define PA_EXT1_SIZE 0x04000000
24#define PA_SDRAM 0xaC000000 /* SDRAM(Area3) 64MB */
25#define PA_SDRAM_SIZE 0x04000000
26
27#define PA_EXT4 0xb0000000
28#define PA_EXT4_SIZE 0x04000000
29
30#define PA_PERIPHERAL 0xB8000000
31
32#define PA_PCIC PA_PERIPHERAL
33#define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0)
34#define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000)
35#define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000)
36#define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000)
37#define MRSHPC_OPTION (PA_MRSHPC + 6)
38#define MRSHPC_CSR (PA_MRSHPC + 8)
39#define MRSHPC_ISR (PA_MRSHPC + 10)
40#define MRSHPC_ICR (PA_MRSHPC + 12)
41#define MRSHPC_CPWCR (PA_MRSHPC + 14)
42#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
43#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
44#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
45#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
46#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
47#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
48#define MRSHPC_CDCR (PA_MRSHPC + 28)
49#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
50
51#define PA_LED 0xB6800000 /* 8bit LED */
52#define PA_FPGA 0xB7000000 /* FPGA base address */
53
54#define MRSHPC_IRQ0 10
55
56#define FPGA_ILSR1 (PA_FPGA + 0x02)
57#define FPGA_ILSR2 (PA_FPGA + 0x03)
58#define FPGA_ILSR3 (PA_FPGA + 0x04)
59#define FPGA_ILSR4 (PA_FPGA + 0x05)
60#define FPGA_ILSR5 (PA_FPGA + 0x06)
61#define FPGA_ILSR6 (PA_FPGA + 0x07)
62#define FPGA_ILSR7 (PA_FPGA + 0x08)
63#define FPGA_ILSR8 (PA_FPGA + 0x09)
64
65void init_se7721_IRQ(void);
66
67#define __IO_PREFIX se7721
68#include <asm/io_generic.h>
69
70#endif /* __ASM_SH_SE7721_H */
diff --git a/include/asm-sh/se7722.h b/include/asm-sh/se7722.h
index e0e89fcb8388..3690fe5857a4 100644
--- a/include/asm-sh/se7722.h
+++ b/include/asm-sh/se7722.h
@@ -77,6 +77,8 @@
77#define PORT_PSELA 0xA405014EUL 77#define PORT_PSELA 0xA405014EUL
78#define PORT_PYCR 0xA405014AUL 78#define PORT_PYCR 0xA405014AUL
79#define PORT_PZCR 0xA405014CUL 79#define PORT_PZCR 0xA405014CUL
80#define PORT_HIZCRA 0xA4050158UL
81#define PORT_HIZCRC 0xA405015CUL
80 82
81/* IRQ */ 83/* IRQ */
82#define IRQ0_IRQ 32 84#define IRQ0_IRQ 32
diff --git a/include/asm-sh/sh_keysc.h b/include/asm-sh/sh_keysc.h
new file mode 100644
index 000000000000..b5a4dd5a9729
--- /dev/null
+++ b/include/asm-sh/sh_keysc.h
@@ -0,0 +1,13 @@
1#ifndef __ASM_KEYSC_H__
2#define __ASM_KEYSC_H__
3
4#define SH_KEYSC_MAXKEYS 30
5
6struct sh_keysc_info {
7 enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3 } mode;
8 int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */
9 int delay;
10 int keycodes[SH_KEYSC_MAXKEYS];
11};
12
13#endif /* __ASM_KEYSC_H__ */
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index 5145aa2a0ce9..e65b6b822cb3 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -146,6 +146,8 @@ extern unsigned int instruction_size(unsigned int insn);
146 146
147extern unsigned long cached_to_uncached; 147extern unsigned long cached_to_uncached;
148 148
149extern struct dentry *sh_debugfs_root;
150
149/* XXX 151/* XXX
150 * disable hlt during certain critical i/o operations 152 * disable hlt during certain critical i/o operations
151 */ 153 */
diff --git a/include/asm-sh/topology.h b/include/asm-sh/topology.h
index f402a3b1cfa4..34cdb28e8f44 100644
--- a/include/asm-sh/topology.h
+++ b/include/asm-sh/topology.h
@@ -16,7 +16,7 @@
16 .cache_nice_tries = 2, \ 16 .cache_nice_tries = 2, \
17 .busy_idx = 3, \ 17 .busy_idx = 3, \
18 .idle_idx = 2, \ 18 .idle_idx = 2, \
19 .newidle_idx = 0, \ 19 .newidle_idx = 2, \
20 .wake_idx = 1, \ 20 .wake_idx = 1, \
21 .forkexec_idx = 1, \ 21 .forkexec_idx = 1, \
22 .flags = SD_LOAD_BALANCE \ 22 .flags = SD_LOAD_BALANCE \
diff --git a/include/asm-sh/uaccess_32.h b/include/asm-sh/uaccess_32.h
index c0318b608893..1e41fda74bd3 100644
--- a/include/asm-sh/uaccess_32.h
+++ b/include/asm-sh/uaccess_32.h
@@ -55,13 +55,10 @@ static inline void set_fs(mm_segment_t s)
55 * If we don't have an MMU (or if its disabled) the only thing we really have 55 * If we don't have an MMU (or if its disabled) the only thing we really have
56 * to look out for is if the address resides somewhere outside of what 56 * to look out for is if the address resides somewhere outside of what
57 * available RAM we have. 57 * available RAM we have.
58 *
59 * TODO: This check could probably also stand to be restricted somewhat more..
60 * though it still does the Right Thing(tm) for the time being.
61 */ 58 */
62static inline int __access_ok(unsigned long addr, unsigned long size) 59static inline int __access_ok(unsigned long addr, unsigned long size)
63{ 60{
64 return ((addr >= memory_start) && ((addr + size) < memory_end)); 61 return 1;
65} 62}
66#else /* CONFIG_MMU */ 63#else /* CONFIG_MMU */
67#define __addr_ok(addr) \ 64#define __addr_ok(addr) \
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-10 18:31:04 -0500