diff options
Diffstat (limited to 'include/asm-sh/pgtable_64.h')
-rw-r--r-- | include/asm-sh/pgtable_64.h | 300 |
1 files changed, 300 insertions, 0 deletions
diff --git a/include/asm-sh/pgtable_64.h b/include/asm-sh/pgtable_64.h new file mode 100644 index 000000000000..d422111006f4 --- /dev/null +++ b/include/asm-sh/pgtable_64.h | |||
@@ -0,0 +1,300 @@ | |||
1 | #ifndef __ASM_SH64_PGTABLE_H | ||
2 | #define __ASM_SH64_PGTABLE_H | ||
3 | |||
4 | /* | ||
5 | * This file is subject to the terms and conditions of the GNU General Public | ||
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | * | ||
9 | * include/asm-sh64/pgtable.h | ||
10 | * | ||
11 | * Copyright (C) 2000, 2001 Paolo Alberelli | ||
12 | * Copyright (C) 2003, 2004 Paul Mundt | ||
13 | * Copyright (C) 2003, 2004 Richard Curnow | ||
14 | * | ||
15 | * This file contains the functions and defines necessary to modify and use | ||
16 | * the SuperH page table tree. | ||
17 | */ | ||
18 | |||
19 | #include <linux/threads.h> | ||
20 | #include <asm/processor.h> | ||
21 | #include <asm/page.h> | ||
22 | |||
23 | /* | ||
24 | * Error outputs. | ||
25 | */ | ||
26 | #define pte_ERROR(e) \ | ||
27 | printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e)) | ||
28 | #define pgd_ERROR(e) \ | ||
29 | printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) | ||
30 | |||
31 | /* | ||
32 | * Table setting routines. Used within arch/mm only. | ||
33 | */ | ||
34 | #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) | ||
35 | |||
36 | static __inline__ void set_pte(pte_t *pteptr, pte_t pteval) | ||
37 | { | ||
38 | unsigned long long x = ((unsigned long long) pteval.pte_low); | ||
39 | unsigned long long *xp = (unsigned long long *) pteptr; | ||
40 | /* | ||
41 | * Sign-extend based on NPHYS. | ||
42 | */ | ||
43 | *(xp) = (x & NPHYS_SIGN) ? (x | NPHYS_MASK) : x; | ||
44 | } | ||
45 | #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) | ||
46 | |||
47 | static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) | ||
48 | { | ||
49 | pmd_val(*pmdp) = (unsigned long) ptep; | ||
50 | } | ||
51 | |||
52 | /* | ||
53 | * PGD defines. Top level. | ||
54 | */ | ||
55 | |||
56 | /* To find an entry in a generic PGD. */ | ||
57 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) | ||
58 | #define __pgd_offset(address) pgd_index(address) | ||
59 | #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) | ||
60 | |||
61 | /* To find an entry in a kernel PGD. */ | ||
62 | #define pgd_offset_k(address) pgd_offset(&init_mm, address) | ||
63 | |||
64 | /* | ||
65 | * PMD level access routines. Same notes as above. | ||
66 | */ | ||
67 | #define _PMD_EMPTY 0x0 | ||
68 | /* Either the PMD is empty or present, it's not paged out */ | ||
69 | #define pmd_present(pmd_entry) (pmd_val(pmd_entry) & _PAGE_PRESENT) | ||
70 | #define pmd_clear(pmd_entry_p) (set_pmd((pmd_entry_p), __pmd(_PMD_EMPTY))) | ||
71 | #define pmd_none(pmd_entry) (pmd_val((pmd_entry)) == _PMD_EMPTY) | ||
72 | #define pmd_bad(pmd_entry) ((pmd_val(pmd_entry) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) | ||
73 | |||
74 | #define pmd_page_vaddr(pmd_entry) \ | ||
75 | ((unsigned long) __va(pmd_val(pmd_entry) & PAGE_MASK)) | ||
76 | |||
77 | #define pmd_page(pmd) \ | ||
78 | (virt_to_page(pmd_val(pmd))) | ||
79 | |||
80 | /* PMD to PTE dereferencing */ | ||
81 | #define pte_index(address) \ | ||
82 | ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) | ||
83 | |||
84 | #define pte_offset_kernel(dir, addr) \ | ||
85 | ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr))) | ||
86 | |||
87 | #define pte_offset_map(dir,addr) pte_offset_kernel(dir, addr) | ||
88 | #define pte_offset_map_nested(dir,addr) pte_offset_kernel(dir, addr) | ||
89 | #define pte_unmap(pte) do { } while (0) | ||
90 | #define pte_unmap_nested(pte) do { } while (0) | ||
91 | |||
92 | #ifndef __ASSEMBLY__ | ||
93 | #define IOBASE_VADDR 0xff000000 | ||
94 | #define IOBASE_END 0xffffffff | ||
95 | |||
96 | /* | ||
97 | * PTEL coherent flags. | ||
98 | * See Chapter 17 ST50 CPU Core Volume 1, Architecture. | ||
99 | */ | ||
100 | /* The bits that are required in the SH-5 TLB are placed in the h/w-defined | ||
101 | positions, to avoid expensive bit shuffling on every refill. The remaining | ||
102 | bits are used for s/w purposes and masked out on each refill. | ||
103 | |||
104 | Note, the PTE slots are used to hold data of type swp_entry_t when a page is | ||
105 | swapped out. Only the _PAGE_PRESENT flag is significant when the page is | ||
106 | swapped out, and it must be placed so that it doesn't overlap either the | ||
107 | type or offset fields of swp_entry_t. For x86, offset is at [31:8] and type | ||
108 | at [6:1], with _PAGE_PRESENT at bit 0 for both pte_t and swp_entry_t. This | ||
109 | scheme doesn't map to SH-5 because bit [0] controls cacheability. So bit | ||
110 | [2] is used for _PAGE_PRESENT and the type field of swp_entry_t is split | ||
111 | into 2 pieces. That is handled by SWP_ENTRY and SWP_TYPE below. */ | ||
112 | #define _PAGE_WT 0x001 /* CB0: if cacheable, 1->write-thru, 0->write-back */ | ||
113 | #define _PAGE_DEVICE 0x001 /* CB0: if uncacheable, 1->device (i.e. no write-combining or reordering at bus level) */ | ||
114 | #define _PAGE_CACHABLE 0x002 /* CB1: uncachable/cachable */ | ||
115 | #define _PAGE_PRESENT 0x004 /* software: page referenced */ | ||
116 | #define _PAGE_FILE 0x004 /* software: only when !present */ | ||
117 | #define _PAGE_SIZE0 0x008 /* SZ0-bit : size of page */ | ||
118 | #define _PAGE_SIZE1 0x010 /* SZ1-bit : size of page */ | ||
119 | #define _PAGE_SHARED 0x020 /* software: reflects PTEH's SH */ | ||
120 | #define _PAGE_READ 0x040 /* PR0-bit : read access allowed */ | ||
121 | #define _PAGE_EXECUTE 0x080 /* PR1-bit : execute access allowed */ | ||
122 | #define _PAGE_WRITE 0x100 /* PR2-bit : write access allowed */ | ||
123 | #define _PAGE_USER 0x200 /* PR3-bit : user space access allowed */ | ||
124 | #define _PAGE_DIRTY 0x400 /* software: page accessed in write */ | ||
125 | #define _PAGE_ACCESSED 0x800 /* software: page referenced */ | ||
126 | |||
127 | /* Mask which drops software flags */ | ||
128 | #define _PAGE_FLAGS_HARDWARE_MASK 0xfffffffffffff3dbLL | ||
129 | |||
130 | /* | ||
131 | * HugeTLB support | ||
132 | */ | ||
133 | #if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) | ||
134 | #define _PAGE_SZHUGE (_PAGE_SIZE0) | ||
135 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) | ||
136 | #define _PAGE_SZHUGE (_PAGE_SIZE1) | ||
137 | #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) | ||
138 | #define _PAGE_SZHUGE (_PAGE_SIZE0 | _PAGE_SIZE1) | ||
139 | #endif | ||
140 | |||
141 | /* | ||
142 | * Default flags for a Kernel page. | ||
143 | * This is fundametally also SHARED because the main use of this define | ||
144 | * (other than for PGD/PMD entries) is for the VMALLOC pool which is | ||
145 | * contextless. | ||
146 | * | ||
147 | * _PAGE_EXECUTE is required for modules | ||
148 | * | ||
149 | */ | ||
150 | #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ | ||
151 | _PAGE_EXECUTE | \ | ||
152 | _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_DIRTY | \ | ||
153 | _PAGE_SHARED) | ||
154 | |||
155 | /* Default flags for a User page */ | ||
156 | #define _PAGE_TABLE (_KERNPG_TABLE | _PAGE_USER) | ||
157 | |||
158 | #define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) | ||
159 | |||
160 | /* | ||
161 | * We have full permissions (Read/Write/Execute/Shared). | ||
162 | */ | ||
163 | #define _PAGE_COMMON (_PAGE_PRESENT | _PAGE_USER | \ | ||
164 | _PAGE_CACHABLE | _PAGE_ACCESSED) | ||
165 | |||
166 | #define PAGE_NONE __pgprot(_PAGE_CACHABLE | _PAGE_ACCESSED) | ||
167 | #define PAGE_SHARED __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_WRITE | \ | ||
168 | _PAGE_SHARED) | ||
169 | #define PAGE_EXECREAD __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_EXECUTE) | ||
170 | |||
171 | /* | ||
172 | * We need to include PAGE_EXECUTE in PAGE_COPY because it is the default | ||
173 | * protection mode for the stack. | ||
174 | */ | ||
175 | #define PAGE_COPY PAGE_EXECREAD | ||
176 | |||
177 | #define PAGE_READONLY __pgprot(_PAGE_COMMON | _PAGE_READ) | ||
178 | #define PAGE_WRITEONLY __pgprot(_PAGE_COMMON | _PAGE_WRITE) | ||
179 | #define PAGE_RWX __pgprot(_PAGE_COMMON | _PAGE_READ | \ | ||
180 | _PAGE_WRITE | _PAGE_EXECUTE) | ||
181 | #define PAGE_KERNEL __pgprot(_KERNPG_TABLE) | ||
182 | |||
183 | /* Make it a device mapping for maximum safety (e.g. for mapping device | ||
184 | registers into user-space via /dev/map). */ | ||
185 | #define pgprot_noncached(x) __pgprot(((x).pgprot & ~(_PAGE_CACHABLE)) | _PAGE_DEVICE) | ||
186 | #define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) | ||
187 | |||
188 | /* | ||
189 | * Handling allocation failures during page table setup. | ||
190 | */ | ||
191 | extern void __handle_bad_pmd_kernel(pmd_t * pmd); | ||
192 | #define __handle_bad_pmd(x) __handle_bad_pmd_kernel(x) | ||
193 | |||
194 | /* | ||
195 | * PTE level access routines. | ||
196 | * | ||
197 | * Note1: | ||
198 | * It's the tree walk leaf. This is physical address to be stored. | ||
199 | * | ||
200 | * Note 2: | ||
201 | * Regarding the choice of _PTE_EMPTY: | ||
202 | |||
203 | We must choose a bit pattern that cannot be valid, whether or not the page | ||
204 | is present. bit[2]==1 => present, bit[2]==0 => swapped out. If swapped | ||
205 | out, bits [31:8], [6:3], [1:0] are under swapper control, so only bit[7] is | ||
206 | left for us to select. If we force bit[7]==0 when swapped out, we could use | ||
207 | the combination bit[7,2]=2'b10 to indicate an empty PTE. Alternatively, if | ||
208 | we force bit[7]==1 when swapped out, we can use all zeroes to indicate | ||
209 | empty. This is convenient, because the page tables get cleared to zero | ||
210 | when they are allocated. | ||
211 | |||
212 | */ | ||
213 | #define _PTE_EMPTY 0x0 | ||
214 | #define pte_present(x) (pte_val(x) & _PAGE_PRESENT) | ||
215 | #define pte_clear(mm,addr,xp) (set_pte_at(mm, addr, xp, __pte(_PTE_EMPTY))) | ||
216 | #define pte_none(x) (pte_val(x) == _PTE_EMPTY) | ||
217 | |||
218 | /* | ||
219 | * Some definitions to translate between mem_map, PTEs, and page | ||
220 | * addresses: | ||
221 | */ | ||
222 | |||
223 | /* | ||
224 | * Given a PTE, return the index of the mem_map[] entry corresponding | ||
225 | * to the page frame the PTE. Get the absolute physical address, make | ||
226 | * a relative physical address and translate it to an index. | ||
227 | */ | ||
228 | #define pte_pagenr(x) (((unsigned long) (pte_val(x)) - \ | ||
229 | __MEMORY_START) >> PAGE_SHIFT) | ||
230 | |||
231 | /* | ||
232 | * Given a PTE, return the "struct page *". | ||
233 | */ | ||
234 | #define pte_page(x) (mem_map + pte_pagenr(x)) | ||
235 | |||
236 | /* | ||
237 | * Return number of (down rounded) MB corresponding to x pages. | ||
238 | */ | ||
239 | #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) | ||
240 | |||
241 | |||
242 | /* | ||
243 | * The following have defined behavior only work if pte_present() is true. | ||
244 | */ | ||
245 | static inline int pte_dirty(pte_t pte){ return pte_val(pte) & _PAGE_DIRTY; } | ||
246 | static inline int pte_young(pte_t pte){ return pte_val(pte) & _PAGE_ACCESSED; } | ||
247 | static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } | ||
248 | static inline int pte_write(pte_t pte){ return pte_val(pte) & _PAGE_WRITE; } | ||
249 | |||
250 | static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_WRITE)); return pte; } | ||
251 | static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } | ||
252 | static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; } | ||
253 | static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_WRITE)); return pte; } | ||
254 | static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } | ||
255 | static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } | ||
256 | static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; } | ||
257 | |||
258 | |||
259 | /* | ||
260 | * Conversion functions: convert a page and protection to a page entry. | ||
261 | * | ||
262 | * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) | ||
263 | */ | ||
264 | #define mk_pte(page,pgprot) \ | ||
265 | ({ \ | ||
266 | pte_t __pte; \ | ||
267 | \ | ||
268 | set_pte(&__pte, __pte((((page)-mem_map) << PAGE_SHIFT) | \ | ||
269 | __MEMORY_START | pgprot_val((pgprot)))); \ | ||
270 | __pte; \ | ||
271 | }) | ||
272 | |||
273 | /* | ||
274 | * This takes a (absolute) physical page address that is used | ||
275 | * by the remapping functions | ||
276 | */ | ||
277 | #define mk_pte_phys(physpage, pgprot) \ | ||
278 | ({ pte_t __pte; set_pte(&__pte, __pte(physpage | pgprot_val(pgprot))); __pte; }) | ||
279 | |||
280 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) | ||
281 | { set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } | ||
282 | |||
283 | /* Encode and decode a swap entry */ | ||
284 | #define __swp_type(x) (((x).val & 3) + (((x).val >> 1) & 0x3c)) | ||
285 | #define __swp_offset(x) ((x).val >> 8) | ||
286 | #define __swp_entry(type, offset) ((swp_entry_t) { ((offset << 8) + ((type & 0x3c) << 1) + (type & 3)) }) | ||
287 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | ||
288 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | ||
289 | |||
290 | /* Encode and decode a nonlinear file mapping entry */ | ||
291 | #define PTE_FILE_MAX_BITS 29 | ||
292 | #define pte_to_pgoff(pte) (pte_val(pte)) | ||
293 | #define pgoff_to_pte(off) ((pte_t) { (off) | _PAGE_FILE }) | ||
294 | |||
295 | #endif /* !__ASSEMBLY__ */ | ||
296 | |||
297 | #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
298 | #define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) | ||
299 | |||
300 | #endif /* __ASM_SH64_PGTABLE_H */ | ||