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-rw-r--r--include/asm-sh/pgtable.h516
1 files changed, 39 insertions, 477 deletions
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index cf0dd2b648c2..a4a8f8b93463 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -3,7 +3,7 @@
3 * use the SuperH page table tree. 3 * use the SuperH page table tree.
4 * 4 *
5 * Copyright (C) 1999 Niibe Yutaka 5 * Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2002 - 2005 Paul Mundt 6 * Copyright (C) 2002 - 2007 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General 8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file "COPYING" in the main directory of this 9 * Public License. See the file "COPYING" in the main directory of this
@@ -29,10 +29,27 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
29#endif /* !__ASSEMBLY__ */ 29#endif /* !__ASSEMBLY__ */
30 30
31/* 31/*
32 * Effective and physical address definitions, to aid with sign
33 * extension.
34 */
35#define NEFF 32
36#define NEFF_SIGN (1LL << (NEFF - 1))
37#define NEFF_MASK (-1LL << NEFF)
38
39#ifdef CONFIG_29BIT
40#define NPHYS 29
41#else
42#define NPHYS 32
43#endif
44
45#define NPHYS_SIGN (1LL << (NPHYS - 1))
46#define NPHYS_MASK (-1LL << NPHYS)
47
48/*
32 * traditional two-level paging structure 49 * traditional two-level paging structure
33 */ 50 */
34/* PTE bits */ 51/* PTE bits */
35#ifdef CONFIG_X2TLB 52#if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64)
36# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */ 53# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */
37#else 54#else
38# define PTE_MAGNITUDE 2 /* 32-bit PTEs */ 55# define PTE_MAGNITUDE 2 /* 32-bit PTEs */
@@ -52,281 +69,27 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
52#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) 69#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
53#define FIRST_USER_ADDRESS 0 70#define FIRST_USER_ADDRESS 0
54 71
55#define PTE_PHYS_MASK (0x20000000 - PAGE_SIZE) 72#ifdef CONFIG_32BIT
56 73#define PHYS_ADDR_MASK 0xffffffff
57#define VMALLOC_START (P3SEG)
58#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
59
60/*
61 * Linux PTEL encoding.
62 *
63 * Hardware and software bit definitions for the PTEL value (see below for
64 * notes on SH-X2 MMUs and 64-bit PTEs):
65 *
66 * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4).
67 *
68 * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the
69 * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set,
70 * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT).
71 *
72 * In order to keep this relatively clean, do not use these for defining
73 * SH-3 specific flags until all of the other unused bits have been
74 * exhausted.
75 *
76 * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
77 *
78 * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
79 * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused.
80 *
81 * - Bits 31, 30, and 29 remain unused by everyone and can be used for future
82 * software flags, although care must be taken to update _PAGE_CLEAR_FLAGS.
83 *
84 * XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day.
85 *
86 * SH-X2 MMUs and extended PTEs
87 *
88 * SH-X2 supports an extended mode TLB with split data arrays due to the
89 * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and
90 * SZ bit placeholders still exist in data array 1, but are implemented as
91 * reserved bits, with the real logic existing in data array 2.
92 *
93 * The downside to this is that we can no longer fit everything in to a 32-bit
94 * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus
95 * side, this gives us quite a few spare bits to play with for future usage.
96 */
97/* Legacy and compat mode bits */
98#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */
99#define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */
100#define _PAGE_DIRTY 0x004 /* D-bit : page changed */
101#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */
102#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */
103#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */
104#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/
105#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */
106#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
107#define _PAGE_PROTNONE 0x200 /* software: if not present */
108#define _PAGE_ACCESSED 0x400 /* software: page referenced */
109#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
110
111#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1)
112#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER)
113
114/* Extended mode bits */
115#define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */
116#define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */
117#define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */
118#define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */
119
120#define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */
121#define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */
122#define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */
123
124#define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */
125#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */
126#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */
127
128/* Wrapper for extended mode pgprot twiddling */
129#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
130
131/* software: moves to PTEA.TC (Timing Control) */
132#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
133#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
134
135/* software: moves to PTEA.SA[2:0] (Space Attributes) */
136#define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */
137#define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */
138#define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */
139#define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */
140#define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */
141#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
142#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
143
144/* Mask which drops unused bits from the PTEL value */
145#if defined(CONFIG_CPU_SH3)
146#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \
147 _PAGE_FILE | _PAGE_SZ1 | \
148 _PAGE_HW_SHARED)
149#elif defined(CONFIG_X2TLB)
150/* Get rid of the legacy PR/SZ bits when using extended mode */
151#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \
152 _PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK)
153#else 74#else
154#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) 75#define PHYS_ADDR_MASK 0x1fffffff
155#endif 76#endif
156 77
157#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS)) 78#define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK)
158 79
159/* Hardware flags, page size encoding */ 80#ifdef CONFIG_SUPERH32
160#if defined(CONFIG_X2TLB) 81#define VMALLOC_START (P3SEG)
161# if defined(CONFIG_PAGE_SIZE_4KB)
162# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0)
163# elif defined(CONFIG_PAGE_SIZE_8KB)
164# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1)
165# elif defined(CONFIG_PAGE_SIZE_64KB)
166# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2)
167# endif
168#else 82#else
169# if defined(CONFIG_PAGE_SIZE_4KB) 83#define VMALLOC_START (0xf0000000)
170# define _PAGE_FLAGS_HARD _PAGE_SZ0
171# elif defined(CONFIG_PAGE_SIZE_64KB)
172# define _PAGE_FLAGS_HARD _PAGE_SZ1
173# endif
174#endif 84#endif
85#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
175 86
176#if defined(CONFIG_X2TLB) 87#if defined(CONFIG_SUPERH32)
177# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 88#include <asm/pgtable_32.h>
178# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2)
179# elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
180# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2)
181# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
182# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2)
183# elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
184# define _PAGE_SZHUGE (_PAGE_EXT_ESZ3)
185# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
186# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
187# endif
188#else 89#else
189# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 90#include <asm/pgtable_64.h>
190# define _PAGE_SZHUGE (_PAGE_SZ1)
191# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
192# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
193# endif
194#endif
195
196/*
197 * Stub out _PAGE_SZHUGE if we don't have a good definition for it,
198 * to make pte_mkhuge() happy.
199 */
200#ifndef _PAGE_SZHUGE
201# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD)
202#endif
203
204#define _PAGE_CHG_MASK \
205 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
206
207#ifndef __ASSEMBLY__
208
209#if defined(CONFIG_X2TLB) /* SH-X2 TLB */
210#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
211 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
212
213#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
214 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
215 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
216 _PAGE_EXT_KERN_WRITE | \
217 _PAGE_EXT_USER_READ | \
218 _PAGE_EXT_USER_WRITE))
219
220#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
221 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
222 _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \
223 _PAGE_EXT_KERN_READ | \
224 _PAGE_EXT_USER_EXEC | \
225 _PAGE_EXT_USER_READ))
226
227#define PAGE_COPY PAGE_EXECREAD
228
229#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
230 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
231 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
232 _PAGE_EXT_USER_READ))
233
234#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
235 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
236 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
237 _PAGE_EXT_USER_WRITE))
238
239#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
240 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
241 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
242 _PAGE_EXT_KERN_READ | \
243 _PAGE_EXT_KERN_EXEC | \
244 _PAGE_EXT_USER_WRITE | \
245 _PAGE_EXT_USER_READ | \
246 _PAGE_EXT_USER_EXEC))
247
248#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
249 _PAGE_DIRTY | _PAGE_ACCESSED | \
250 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
251 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
252 _PAGE_EXT_KERN_WRITE | \
253 _PAGE_EXT_KERN_EXEC))
254
255#define PAGE_KERNEL_NOCACHE \
256 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
257 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
258 _PAGE_FLAGS_HARD | \
259 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
260 _PAGE_EXT_KERN_WRITE | \
261 _PAGE_EXT_KERN_EXEC))
262
263#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
264 _PAGE_DIRTY | _PAGE_ACCESSED | \
265 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
266 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
267 _PAGE_EXT_KERN_EXEC))
268
269#define PAGE_KERNEL_PCC(slot, type) \
270 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
271 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
272 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
273 _PAGE_EXT_KERN_WRITE | \
274 _PAGE_EXT_KERN_EXEC) \
275 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
276 (type))
277
278#elif defined(CONFIG_MMU) /* SH-X TLB */
279#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
280 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
281
282#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
283 _PAGE_CACHABLE | _PAGE_ACCESSED | \
284 _PAGE_FLAGS_HARD)
285
286#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
287 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
288
289#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
290 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
291
292#define PAGE_EXECREAD PAGE_READONLY
293#define PAGE_RWX PAGE_SHARED
294#define PAGE_WRITEONLY PAGE_SHARED
295
296#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \
297 _PAGE_DIRTY | _PAGE_ACCESSED | \
298 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
299
300#define PAGE_KERNEL_NOCACHE \
301 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
302 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
303 _PAGE_FLAGS_HARD)
304
305#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
306 _PAGE_DIRTY | _PAGE_ACCESSED | \
307 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
308
309#define PAGE_KERNEL_PCC(slot, type) \
310 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
311 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
312 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
313 (type))
314#else /* no mmu */
315#define PAGE_NONE __pgprot(0)
316#define PAGE_SHARED __pgprot(0)
317#define PAGE_COPY __pgprot(0)
318#define PAGE_EXECREAD __pgprot(0)
319#define PAGE_RWX __pgprot(0)
320#define PAGE_READONLY __pgprot(0)
321#define PAGE_WRITEONLY __pgprot(0)
322#define PAGE_KERNEL __pgprot(0)
323#define PAGE_KERNEL_NOCACHE __pgprot(0)
324#define PAGE_KERNEL_RO __pgprot(0)
325#define PAGE_KERNEL_PCC __pgprot(0)
326#endif 91#endif
327 92
328#endif /* __ASSEMBLY__ */
329
330/* 93/*
331 * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page 94 * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page
332 * protection for execute, and considers it the same as a read. Also, write 95 * protection for execute, and considers it the same as a read. Also, write
@@ -355,208 +118,6 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
355#define __S110 PAGE_RWX 118#define __S110 PAGE_RWX
356#define __S111 PAGE_RWX 119#define __S111 PAGE_RWX
357 120
358#ifndef __ASSEMBLY__
359
360/*
361 * Certain architectures need to do special things when PTEs
362 * within a page table are directly modified. Thus, the following
363 * hook is made available.
364 */
365#ifdef CONFIG_X2TLB
366static inline void set_pte(pte_t *ptep, pte_t pte)
367{
368 ptep->pte_high = pte.pte_high;
369 smp_wmb();
370 ptep->pte_low = pte.pte_low;
371}
372#else
373#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
374#endif
375
376#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
377
378/*
379 * (pmds are folded into pgds so this doesn't get actually called,
380 * but the define is needed for a generic inline function.)
381 */
382#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
383
384#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
385
386#define pfn_pte(pfn, prot) \
387 __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
388#define pfn_pmd(pfn, prot) \
389 __pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
390
391#define pte_none(x) (!pte_val(x))
392#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
393
394#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
395
396#define pmd_none(x) (!pmd_val(x))
397#define pmd_present(x) (pmd_val(x))
398#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
399#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
400
401#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
402#define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK)
403
404/*
405 * The following only work if pte_present() is true.
406 * Undefined behaviour if not..
407 */
408#define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT))
409#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY)
410#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED)
411#define pte_file(pte) ((pte).pte_low & _PAGE_FILE)
412
413#ifdef CONFIG_X2TLB
414#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE)
415#else
416#define pte_write(pte) ((pte).pte_low & _PAGE_RW)
417#endif
418
419#define PTE_BIT_FUNC(h,fn,op) \
420static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; }
421
422#ifdef CONFIG_X2TLB
423/*
424 * We cheat a bit in the SH-X2 TLB case. As the permission bits are
425 * individually toggled (and user permissions are entirely decoupled from
426 * kernel permissions), we attempt to couple them a bit more sanely here.
427 */
428PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE);
429PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
430PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
431#else
432PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW);
433PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW);
434PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE);
435#endif
436
437PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
438PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
439PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
440PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
441
442/*
443 * Macro and implementation to make a page protection as uncachable.
444 */
445#define pgprot_writecombine(prot) \
446 __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
447
448#define pgprot_noncached pgprot_writecombine
449
450/*
451 * Conversion functions: convert a page and protection to a page entry,
452 * and a page entry and page directory to the page they refer to.
453 *
454 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
455 */
456#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
457
458static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
459{
460 pte.pte_low &= _PAGE_CHG_MASK;
461 pte.pte_low |= pgprot_val(newprot);
462
463#ifdef CONFIG_X2TLB
464 pte.pte_high |= pgprot_val(newprot) >> 32;
465#endif
466
467 return pte;
468}
469
470#define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd))
471#define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
472
473/* to find an entry in a page-table-directory. */
474#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
475#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
476
477/* to find an entry in a kernel page-table-directory */
478#define pgd_offset_k(address) pgd_offset(&init_mm, address)
479
480/* Find an entry in the third-level page table.. */
481#define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
482#define pte_offset_kernel(dir, address) \
483 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
484#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
485#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
486
487#define pte_unmap(pte) do { } while (0)
488#define pte_unmap_nested(pte) do { } while (0)
489
490#ifdef CONFIG_X2TLB
491#define pte_ERROR(e) \
492 printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \
493 &(e), (e).pte_high, (e).pte_low)
494#define pgd_ERROR(e) \
495 printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e))
496#else
497#define pte_ERROR(e) \
498 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
499#define pgd_ERROR(e) \
500 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
501#endif
502
503struct vm_area_struct;
504extern void update_mmu_cache(struct vm_area_struct * vma,
505 unsigned long address, pte_t pte);
506
507/*
508 * Encode and de-code a swap entry
509 *
510 * Constraints:
511 * _PAGE_FILE at bit 0
512 * _PAGE_PRESENT at bit 8
513 * _PAGE_PROTNONE at bit 9
514 *
515 * For the normal case, we encode the swap type into bits 0:7 and the
516 * swap offset into bits 10:30. For the 64-bit PTE case, we keep the
517 * preserved bits in the low 32-bits and use the upper 32 as the swap
518 * offset (along with a 5-bit type), following the same approach as x86
519 * PAE. This keeps the logic quite simple, and allows for a full 32
520 * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with
521 * in the pte_low case.
522 *
523 * As is evident by the Alpha code, if we ever get a 64-bit unsigned
524 * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes
525 * much cleaner..
526 *
527 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
528 * and _PAGE_PROTNONE bits
529 */
530#ifdef CONFIG_X2TLB
531#define __swp_type(x) ((x).val & 0x1f)
532#define __swp_offset(x) ((x).val >> 5)
533#define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5})
534#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high })
535#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val })
536
537/*
538 * Encode and decode a nonlinear file mapping entry
539 */
540#define pte_to_pgoff(pte) ((pte).pte_high)
541#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
542
543#define PTE_FILE_MAX_BITS 32
544#else
545#define __swp_type(x) ((x).val & 0xff)
546#define __swp_offset(x) ((x).val >> 10)
547#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10})
548
549#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
550#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 })
551
552/*
553 * Encode and decode a nonlinear file mapping entry
554 */
555#define PTE_FILE_MAX_BITS 29
556#define pte_to_pgoff(pte) (pte_val(pte) >> 1)
557#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE })
558#endif
559
560typedef pte_t *pte_addr_t; 121typedef pte_t *pte_addr_t;
561 122
562#define kern_addr_valid(addr) (1) 123#define kern_addr_valid(addr) (1)
@@ -564,27 +125,28 @@ typedef pte_t *pte_addr_t;
564#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ 125#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
565 remap_pfn_range(vma, vaddr, pfn, size, prot) 126 remap_pfn_range(vma, vaddr, pfn, size, prot)
566 127
567struct mm_struct; 128#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
568 129
569/* 130/*
570 * No page table caches to initialise 131 * No page table caches to initialise
571 */ 132 */
572#define pgtable_cache_init() do { } while (0) 133#define pgtable_cache_init() do { } while (0)
573 134
574#ifndef CONFIG_MMU
575extern unsigned int kobjsize(const void *objp);
576#endif /* !CONFIG_MMU */
577
578#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \ 135#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \
579 defined(CONFIG_SH7705_CACHE_32KB)) 136 defined(CONFIG_SH7705_CACHE_32KB))
137struct mm_struct;
580#define __HAVE_ARCH_PTEP_GET_AND_CLEAR 138#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
581extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep); 139pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
582#endif 140#endif
583 141
142struct vm_area_struct;
143extern void update_mmu_cache(struct vm_area_struct * vma,
144 unsigned long address, pte_t pte);
584extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 145extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
585extern void paging_init(void); 146extern void paging_init(void);
147extern void page_table_range_init(unsigned long start, unsigned long end,
148 pgd_t *pgd);
586 149
587#include <asm-generic/pgtable.h> 150#include <asm-generic/pgtable.h>
588 151
589#endif /* !__ASSEMBLY__ */ 152#endif /* __ASM_SH_PGTABLE_H */
590#endif /* __ASM_SH_PAGE_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-16 13:18:30 -0500