diff options
Diffstat (limited to 'include/asm-sh/irq.h')
| -rw-r--r-- | include/asm-sh/irq.h | 91 |
1 files changed, 5 insertions, 86 deletions
diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index afe188f0ad5f..e81bf21c801e 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h | |||
| @@ -2,94 +2,13 @@ | |||
| 2 | #define __ASM_SH_IRQ_H | 2 | #define __ASM_SH_IRQ_H |
| 3 | 3 | ||
| 4 | #include <asm/machvec.h> | 4 | #include <asm/machvec.h> |
| 5 | #include <asm/ptrace.h> /* for pt_regs */ | ||
| 6 | 5 | ||
| 7 | /* NR_IRQS is made from three components: | 6 | /* |
| 8 | * 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules | 7 | * A sane default based on a reasonable vector table size, platforms are |
| 9 | * 2. PINT_NR_IRQS - number of PINT interrupts | 8 | * advised to cap this at the hard limit that they're interested in |
| 10 | * 3. OFFCHIP_NR_IRQS - numbe of IRQs from off-chip peripherial modules | 9 | * through the machvec. |
| 11 | */ | 10 | */ |
| 12 | 11 | #define NR_IRQS 256 | |
| 13 | /* 1. ONCHIP_NR_IRQS */ | ||
| 14 | #if defined(CONFIG_CPU_SUBTYPE_SH7604) | ||
| 15 | # define ONCHIP_NR_IRQS 24 // Actually 21 | ||
| 16 | #elif defined(CONFIG_CPU_SUBTYPE_SH7707) | ||
| 17 | # define ONCHIP_NR_IRQS 64 | ||
| 18 | # define PINT_NR_IRQS 16 | ||
| 19 | #elif defined(CONFIG_CPU_SUBTYPE_SH7708) | ||
| 20 | # define ONCHIP_NR_IRQS 32 | ||
| 21 | #elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \ | ||
| 22 | defined(CONFIG_CPU_SUBTYPE_SH7706) || \ | ||
| 23 | defined(CONFIG_CPU_SUBTYPE_SH7705) | ||
| 24 | # define ONCHIP_NR_IRQS 64 // Actually 61 | ||
| 25 | # define PINT_NR_IRQS 16 | ||
| 26 | #elif defined(CONFIG_CPU_SUBTYPE_SH7710) | ||
| 27 | # define ONCHIP_NR_IRQS 104 | ||
| 28 | #elif defined(CONFIG_CPU_SUBTYPE_SH7750) | ||
| 29 | # define ONCHIP_NR_IRQS 48 // Actually 44 | ||
| 30 | #elif defined(CONFIG_CPU_SUBTYPE_SH7751) | ||
| 31 | # define ONCHIP_NR_IRQS 72 | ||
| 32 | #elif defined(CONFIG_CPU_SUBTYPE_SH7760) | ||
| 33 | # define ONCHIP_NR_IRQS 112 /* XXX */ | ||
| 34 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) | ||
| 35 | # define ONCHIP_NR_IRQS 72 | ||
| 36 | #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) | ||
| 37 | # define ONCHIP_NR_IRQS 144 | ||
| 38 | #elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \ | ||
| 39 | defined(CONFIG_CPU_SUBTYPE_SH73180) || \ | ||
| 40 | defined(CONFIG_CPU_SUBTYPE_SH7343) || \ | ||
| 41 | defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
| 42 | # define ONCHIP_NR_IRQS 109 | ||
| 43 | #elif defined(CONFIG_CPU_SUBTYPE_SH7780) | ||
| 44 | # define ONCHIP_NR_IRQS 111 | ||
| 45 | #elif defined(CONFIG_CPU_SUBTYPE_SH7206) | ||
| 46 | # define ONCHIP_NR_IRQS 256 | ||
| 47 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) | ||
| 48 | # define ONCHIP_NR_IRQS 128 | ||
| 49 | #elif defined(CONFIG_SH_UNKNOWN) /* Most be last */ | ||
| 50 | # define ONCHIP_NR_IRQS 144 | ||
| 51 | #endif | ||
| 52 | |||
| 53 | /* 2. PINT_NR_IRQS */ | ||
| 54 | #ifdef CONFIG_SH_UNKNOWN | ||
| 55 | # define PINT_NR_IRQS 16 | ||
| 56 | #else | ||
| 57 | # ifndef PINT_NR_IRQS | ||
| 58 | # define PINT_NR_IRQS 0 | ||
| 59 | # endif | ||
| 60 | #endif | ||
| 61 | |||
| 62 | #if PINT_NR_IRQS > 0 | ||
| 63 | # define PINT_IRQ_BASE ONCHIP_NR_IRQS | ||
| 64 | #endif | ||
| 65 | |||
| 66 | /* 3. OFFCHIP_NR_IRQS */ | ||
| 67 | #if defined(CONFIG_HD64461) | ||
| 68 | # define OFFCHIP_NR_IRQS 18 | ||
| 69 | #elif defined(CONFIG_HD64465) | ||
| 70 | # define OFFCHIP_NR_IRQS 16 | ||
| 71 | #elif defined (CONFIG_SH_DREAMCAST) | ||
| 72 | # define OFFCHIP_NR_IRQS 96 | ||
| 73 | #elif defined (CONFIG_SH_TITAN) | ||
| 74 | # define OFFCHIP_NR_IRQS 4 | ||
| 75 | #elif defined(CONFIG_SH_R7780RP) | ||
| 76 | # define OFFCHIP_NR_IRQS 16 | ||
| 77 | #elif defined(CONFIG_SH_7343_SOLUTION_ENGINE) | ||
| 78 | # define OFFCHIP_NR_IRQS 12 | ||
| 79 | #elif defined(CONFIG_SH_7722_SOLUTION_ENGINE) | ||
| 80 | # define OFFCHIP_NR_IRQS 14 | ||
| 81 | #elif defined(CONFIG_SH_UNKNOWN) | ||
| 82 | # define OFFCHIP_NR_IRQS 16 /* Must also be last */ | ||
| 83 | #else | ||
| 84 | # define OFFCHIP_NR_IRQS 0 | ||
| 85 | #endif | ||
| 86 | |||
| 87 | #if OFFCHIP_NR_IRQS > 0 | ||
| 88 | # define OFFCHIP_IRQ_BASE (ONCHIP_NR_IRQS + PINT_NR_IRQS) | ||
| 89 | #endif | ||
| 90 | |||
| 91 | /* NR_IRQS. 1+2+3 */ | ||
| 92 | #define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS) | ||
| 93 | 12 | ||
| 94 | /* | 13 | /* |
| 95 | * Convert back and forth between INTEVT and IRQ values. | 14 | * Convert back and forth between INTEVT and IRQ values. |