aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-sh/io.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-sh/io.h')
-rw-r--r--include/asm-sh/io.h283
1 files changed, 166 insertions, 117 deletions
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h
index 6bc343fee7a0..b0b2937b6f83 100644
--- a/include/asm-sh/io.h
+++ b/include/asm-sh/io.h
@@ -11,7 +11,7 @@
11 * For read{b,w,l} and write{b,w,l} there are also __raw versions, which 11 * For read{b,w,l} and write{b,w,l} there are also __raw versions, which
12 * do not have a memory barrier after them. 12 * do not have a memory barrier after them.
13 * 13 *
14 * In addition, we have 14 * In addition, we have
15 * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O. 15 * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O.
16 * which are processor specific. 16 * which are processor specific.
17 */ 17 */
@@ -23,19 +23,27 @@
23 * inb by default expands to _inb, but the machine specific code may 23 * inb by default expands to _inb, but the machine specific code may
24 * define it to __inb if it chooses. 24 * define it to __inb if it chooses.
25 */ 25 */
26 26#include <linux/config.h>
27#include <asm/cache.h> 27#include <asm/cache.h>
28#include <asm/system.h> 28#include <asm/system.h>
29#include <asm/addrspace.h> 29#include <asm/addrspace.h>
30#include <asm/machvec.h> 30#include <asm/machvec.h>
31#include <linux/config.h> 31#include <asm/pgtable.h>
32#include <asm-generic/iomap.h>
33
34#ifdef __KERNEL__
32 35
33/* 36/*
34 * Depending on which platform we are running on, we need different 37 * Depending on which platform we are running on, we need different
35 * I/O functions. 38 * I/O functions.
36 */ 39 */
40#define __IO_PREFIX generic
41#include <asm/io_generic.h>
42
43#define maybebadio(port) \
44 printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \
45 __FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0))
37 46
38#ifdef __KERNEL__
39/* 47/*
40 * Since boards are able to define their own set of I/O routines through 48 * Since boards are able to define their own set of I/O routines through
41 * their respective machine vector, we always wrap through the mv. 49 * their respective machine vector, we always wrap through the mv.
@@ -44,113 +52,120 @@
44 * a given routine, it will be wrapped to generic code at run-time. 52 * a given routine, it will be wrapped to generic code at run-time.
45 */ 53 */
46 54
47# define __inb(p) sh_mv.mv_inb((p)) 55#define __inb(p) sh_mv.mv_inb((p))
48# define __inw(p) sh_mv.mv_inw((p)) 56#define __inw(p) sh_mv.mv_inw((p))
49# define __inl(p) sh_mv.mv_inl((p)) 57#define __inl(p) sh_mv.mv_inl((p))
50# define __outb(x,p) sh_mv.mv_outb((x),(p)) 58#define __outb(x,p) sh_mv.mv_outb((x),(p))
51# define __outw(x,p) sh_mv.mv_outw((x),(p)) 59#define __outw(x,p) sh_mv.mv_outw((x),(p))
52# define __outl(x,p) sh_mv.mv_outl((x),(p)) 60#define __outl(x,p) sh_mv.mv_outl((x),(p))
53 61
54# define __inb_p(p) sh_mv.mv_inb_p((p)) 62#define __inb_p(p) sh_mv.mv_inb_p((p))
55# define __inw_p(p) sh_mv.mv_inw_p((p)) 63#define __inw_p(p) sh_mv.mv_inw_p((p))
56# define __inl_p(p) sh_mv.mv_inl_p((p)) 64#define __inl_p(p) sh_mv.mv_inl_p((p))
57# define __outb_p(x,p) sh_mv.mv_outb_p((x),(p)) 65#define __outb_p(x,p) sh_mv.mv_outb_p((x),(p))
58# define __outw_p(x,p) sh_mv.mv_outw_p((x),(p)) 66#define __outw_p(x,p) sh_mv.mv_outw_p((x),(p))
59# define __outl_p(x,p) sh_mv.mv_outl_p((x),(p)) 67#define __outl_p(x,p) sh_mv.mv_outl_p((x),(p))
60 68
61# define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) 69#define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c))
62# define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) 70#define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c))
63# define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) 71#define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c))
64# define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) 72#define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
65# define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) 73#define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
66# define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) 74#define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
67 75
68# define __readb(a) sh_mv.mv_readb((a)) 76#define __readb(a) sh_mv.mv_readb((a))
69# define __readw(a) sh_mv.mv_readw((a)) 77#define __readw(a) sh_mv.mv_readw((a))
70# define __readl(a) sh_mv.mv_readl((a)) 78#define __readl(a) sh_mv.mv_readl((a))
71# define __writeb(v,a) sh_mv.mv_writeb((v),(a)) 79#define __writeb(v,a) sh_mv.mv_writeb((v),(a))
72# define __writew(v,a) sh_mv.mv_writew((v),(a)) 80#define __writew(v,a) sh_mv.mv_writew((v),(a))
73# define __writel(v,a) sh_mv.mv_writel((v),(a)) 81#define __writel(v,a) sh_mv.mv_writel((v),(a))
74 82
75# define __ioremap(a,s) sh_mv.mv_ioremap((a), (s)) 83#define inb __inb
76# define __iounmap(a) sh_mv.mv_iounmap((a)) 84#define inw __inw
77 85#define inl __inl
78# define __isa_port2addr(a) sh_mv.mv_isa_port2addr(a) 86#define outb __outb
79 87#define outw __outw
80# define inb __inb 88#define outl __outl
81# define inw __inw 89
82# define inl __inl 90#define inb_p __inb_p
83# define outb __outb 91#define inw_p __inw_p
84# define outw __outw 92#define inl_p __inl_p
85# define outl __outl 93#define outb_p __outb_p
86 94#define outw_p __outw_p
87# define inb_p __inb_p 95#define outl_p __outl_p
88# define inw_p __inw_p 96
89# define inl_p __inl_p 97#define insb __insb
90# define outb_p __outb_p 98#define insw __insw
91# define outw_p __outw_p 99#define insl __insl
92# define outl_p __outl_p 100#define outsb __outsb
93 101#define outsw __outsw
94# define insb __insb 102#define outsl __outsl
95# define insw __insw 103
96# define insl __insl 104#define __raw_readb(a) __readb((void __iomem *)(a))
97# define outsb __outsb 105#define __raw_readw(a) __readw((void __iomem *)(a))
98# define outsw __outsw 106#define __raw_readl(a) __readl((void __iomem *)(a))
99# define outsl __outsl 107#define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a))
100 108#define __raw_writew(v, a) __writew(v, (void __iomem *)(a))
101# define __raw_readb __readb 109#define __raw_writel(v, a) __writel(v, (void __iomem *)(a))
102# define __raw_readw __readw
103# define __raw_readl __readl
104# define __raw_writeb __writeb
105# define __raw_writew __writew
106# define __raw_writel __writel
107 110
108/* 111/*
109 * The platform header files may define some of these macros to use 112 * The platform header files may define some of these macros to use
110 * the inlined versions where appropriate. These macros may also be 113 * the inlined versions where appropriate. These macros may also be
111 * redefined by userlevel programs. 114 * redefined by userlevel programs.
112 */ 115 */
113#ifdef __raw_readb 116#ifdef __readb
114# define readb(a) ({ unsigned long r_ = __raw_readb((unsigned long)a); mb(); r_; }) 117# define readb(a) ({ unsigned long r_ = __raw_readb(a); mb(); r_; })
115#endif 118#endif
116#ifdef __raw_readw 119#ifdef __raw_readw
117# define readw(a) ({ unsigned long r_ = __raw_readw((unsigned long)a); mb(); r_; }) 120# define readw(a) ({ unsigned long r_ = __raw_readw(a); mb(); r_; })
118#endif 121#endif
119#ifdef __raw_readl 122#ifdef __raw_readl
120# define readl(a) ({ unsigned long r_ = __raw_readl((unsigned long)a); mb(); r_; }) 123# define readl(a) ({ unsigned long r_ = __raw_readl(a); mb(); r_; })
121#endif 124#endif
122 125
123#ifdef __raw_writeb 126#ifdef __raw_writeb
124# define writeb(v,a) ({ __raw_writeb((v),(unsigned long)(a)); mb(); }) 127# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); })
125#endif 128#endif
126#ifdef __raw_writew 129#ifdef __raw_writew
127# define writew(v,a) ({ __raw_writew((v),(unsigned long)(a)); mb(); }) 130# define writew(v,a) ({ __raw_writew((v),(a)); mb(); })
128#endif 131#endif
129#ifdef __raw_writel 132#ifdef __raw_writel
130# define writel(v,a) ({ __raw_writel((v),(unsigned long)(a)); mb(); }) 133# define writel(v,a) ({ __raw_writel((v),(a)); mb(); })
131#endif 134#endif
132 135
133#define readb_relaxed(a) readb(a) 136#define readb_relaxed(a) readb(a)
134#define readw_relaxed(a) readw(a) 137#define readw_relaxed(a) readw(a)
135#define readl_relaxed(a) readl(a) 138#define readl_relaxed(a) readl(a)
136 139
137#define mmiowb() 140/* Simple MMIO */
141#define ioread8(a) readb(a)
142#define ioread16(a) readw(a)
143#define ioread16be(a) be16_to_cpu(__raw_readw((a)))
144#define ioread32(a) readl(a)
145#define ioread32be(a) be32_to_cpu(__raw_readl((a)))
138 146
139/* 147#define iowrite8(v,a) writeb((v),(a))
140 * If the platform has PC-like I/O, this function converts the offset into 148#define iowrite16(v,a) writew((v),(a))
141 * an address. 149#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a))
142 */ 150#define iowrite32(v,a) writel((v),(a))
143static __inline__ unsigned long isa_port2addr(unsigned long offset) 151#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a))
144{ 152
145 return __isa_port2addr(offset); 153#define ioread8_rep(a,d,c) insb((a),(d),(c))
146} 154#define ioread16_rep(a,d,c) insw((a),(d),(c))
155#define ioread32_rep(a,d,c) insl((a),(d),(c))
156
157#define iowrite8_rep(a,s,c) outsb((a),(s),(c))
158#define iowrite16_rep(a,s,c) outsw((a),(s),(c))
159#define iowrite32_rep(a,s,c) outsl((a),(s),(c))
160
161#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */
147 162
148/* 163/*
149 * This function provides a method for the generic case where a board-specific 164 * This function provides a method for the generic case where a board-specific
150 * isa_port2addr simply needs to return the port + some arbitrary port base. 165 * ioport_map simply needs to return the port + some arbitrary port base.
151 * 166 *
152 * We use this at board setup time to implicitly set the port base, and 167 * We use this at board setup time to implicitly set the port base, and
153 * as a result, we can use the generic isa_port2addr. 168 * as a result, we can use the generic ioport_map.
154 */ 169 */
155static inline void __set_io_port_base(unsigned long pbase) 170static inline void __set_io_port_base(unsigned long pbase)
156{ 171{
@@ -159,51 +174,52 @@ static inline void __set_io_port_base(unsigned long pbase)
159 generic_io_base = pbase; 174 generic_io_base = pbase;
160} 175}
161 176
162#define isa_readb(a) readb(isa_port2addr(a)) 177#define isa_readb(a) readb(ioport_map(a, 1))
163#define isa_readw(a) readw(isa_port2addr(a)) 178#define isa_readw(a) readw(ioport_map(a, 2))
164#define isa_readl(a) readl(isa_port2addr(a)) 179#define isa_readl(a) readl(ioport_map(a, 4))
165#define isa_writeb(b,a) writeb(b,isa_port2addr(a)) 180#define isa_writeb(b,a) writeb(b,ioport_map(a, 1))
166#define isa_writew(w,a) writew(w,isa_port2addr(a)) 181#define isa_writew(w,a) writew(w,ioport_map(a, 2))
167#define isa_writel(l,a) writel(l,isa_port2addr(a)) 182#define isa_writel(l,a) writel(l,ioport_map(a, 4))
183
168#define isa_memset_io(a,b,c) \ 184#define isa_memset_io(a,b,c) \
169 memset((void *)(isa_port2addr((unsigned long)a)),(b),(c)) 185 memset((void *)(ioport_map((unsigned long)(a), 1)),(b),(c))
170#define isa_memcpy_fromio(a,b,c) \ 186#define isa_memcpy_fromio(a,b,c) \
171 memcpy((a),(void *)(isa_port2addr((unsigned long)(b))),(c)) 187 memcpy((a),(void *)(ioport_map((unsigned long)(b), 1)),(c))
172#define isa_memcpy_toio(a,b,c) \ 188#define isa_memcpy_toio(a,b,c) \
173 memcpy((void *)(isa_port2addr((unsigned long)(a))),(b),(c)) 189 memcpy((void *)(ioport_map((unsigned long)(a), 1)),(b),(c))
174 190
175/* We really want to try and get these to memcpy etc */ 191/* We really want to try and get these to memcpy etc */
176extern void memcpy_fromio(void *, unsigned long, unsigned long); 192extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long);
177extern void memcpy_toio(unsigned long, const void *, unsigned long); 193extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long);
178extern void memset_io(unsigned long, int, unsigned long); 194extern void memset_io(volatile void __iomem *, int, unsigned long);
179 195
180/* SuperH on-chip I/O functions */ 196/* SuperH on-chip I/O functions */
181static __inline__ unsigned char ctrl_inb(unsigned long addr) 197static inline unsigned char ctrl_inb(unsigned long addr)
182{ 198{
183 return *(volatile unsigned char*)addr; 199 return *(volatile unsigned char*)addr;
184} 200}
185 201
186static __inline__ unsigned short ctrl_inw(unsigned long addr) 202static inline unsigned short ctrl_inw(unsigned long addr)
187{ 203{
188 return *(volatile unsigned short*)addr; 204 return *(volatile unsigned short*)addr;
189} 205}
190 206
191static __inline__ unsigned int ctrl_inl(unsigned long addr) 207static inline unsigned int ctrl_inl(unsigned long addr)
192{ 208{
193 return *(volatile unsigned long*)addr; 209 return *(volatile unsigned long*)addr;
194} 210}
195 211
196static __inline__ void ctrl_outb(unsigned char b, unsigned long addr) 212static inline void ctrl_outb(unsigned char b, unsigned long addr)
197{ 213{
198 *(volatile unsigned char*)addr = b; 214 *(volatile unsigned char*)addr = b;
199} 215}
200 216
201static __inline__ void ctrl_outw(unsigned short b, unsigned long addr) 217static inline void ctrl_outw(unsigned short b, unsigned long addr)
202{ 218{
203 *(volatile unsigned short*)addr = b; 219 *(volatile unsigned short*)addr = b;
204} 220}
205 221
206static __inline__ void ctrl_outl(unsigned int b, unsigned long addr) 222static inline void ctrl_outl(unsigned int b, unsigned long addr)
207{ 223{
208 *(volatile unsigned long*)addr = b; 224 *(volatile unsigned long*)addr = b;
209} 225}
@@ -214,12 +230,12 @@ static __inline__ void ctrl_outl(unsigned int b, unsigned long addr)
214 * Change virtual addresses to physical addresses and vv. 230 * Change virtual addresses to physical addresses and vv.
215 * These are trivial on the 1:1 Linux/SuperH mapping 231 * These are trivial on the 1:1 Linux/SuperH mapping
216 */ 232 */
217static __inline__ unsigned long virt_to_phys(volatile void * address) 233static inline unsigned long virt_to_phys(volatile void *address)
218{ 234{
219 return PHYSADDR(address); 235 return PHYSADDR(address);
220} 236}
221 237
222static __inline__ void * phys_to_virt(unsigned long address) 238static inline void *phys_to_virt(unsigned long address)
223{ 239{
224 return (void *)P1SEGADDR(address); 240 return (void *)P1SEGADDR(address);
225} 241}
@@ -234,27 +250,60 @@ static __inline__ void * phys_to_virt(unsigned long address)
234 * differently. On the x86 architecture, we just read/write the 250 * differently. On the x86 architecture, we just read/write the
235 * memory location directly. 251 * memory location directly.
236 * 252 *
237 * On SH, we have the whole physical address space mapped at all times 253 * On SH, we traditionally have the whole physical address space mapped
238 * (as MIPS does), so "ioremap()" and "iounmap()" do not need to do 254 * at all times (as MIPS does), so "ioremap()" and "iounmap()" do not
239 * anything. (This isn't true for all machines but we still handle 255 * need to do anything but place the address in the proper segment. This
240 * these cases with wired TLB entries anyway ...) 256 * is true for P1 and P2 addresses, as well as some P3 ones. However,
257 * most of the P3 addresses and newer cores using extended addressing
258 * need to map through page tables, so the ioremap() implementation
259 * becomes a bit more complicated. See arch/sh/mm/ioremap.c for
260 * additional notes on this.
241 * 261 *
242 * We cheat a bit and always return uncachable areas until we've fixed 262 * We cheat a bit and always return uncachable areas until we've fixed
243 * the drivers to handle caching properly. 263 * the drivers to handle caching properly.
244 */ 264 */
245static __inline__ void * ioremap(unsigned long offset, unsigned long size) 265#ifdef CONFIG_MMU
266void __iomem *__ioremap(unsigned long offset, unsigned long size,
267 unsigned long flags);
268void __iounmap(void __iomem *addr);
269#else
270#define __ioremap(offset, size, flags) ((void __iomem *)(offset))
271#define __iounmap(addr) do { } while (0)
272#endif /* CONFIG_MMU */
273
274static inline void __iomem *
275__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
246{ 276{
247 return __ioremap(offset, size); 277 unsigned long last_addr = offset + size - 1;
278
279 /*
280 * For P1 and P2 space this is trivial, as everything is already
281 * mapped. Uncached access for P1 addresses are done through P2.
282 * In the P3 case or for addresses outside of the 29-bit space,
283 * mapping must be done by the PMB or by using page tables.
284 */
285 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
286 if (unlikely(flags & _PAGE_CACHABLE))
287 return (void __iomem *)P1SEGADDR(offset);
288
289 return (void __iomem *)P2SEGADDR(offset);
290 }
291
292 return __ioremap(offset, size, flags);
248} 293}
249 294
250static __inline__ void iounmap(void *addr) 295#define ioremap(offset, size) \
251{ 296 __ioremap_mode((offset), (size), 0)
252 return __iounmap(addr); 297#define ioremap_nocache(offset, size) \
253} 298 __ioremap_mode((offset), (size), 0)
254 299#define ioremap_cache(offset, size) \
255#define ioremap_nocache(off,size) ioremap(off,size) 300 __ioremap_mode((offset), (size), _PAGE_CACHABLE)
256 301#define p3_ioremap(offset, size, flags) \
257static __inline__ int check_signature(unsigned long io_addr, 302 __ioremap((offset), (size), (flags))
303#define iounmap(addr) \
304 __iounmap((addr))
305
306static inline int check_signature(char __iomem *io_addr,
258 const unsigned char *signature, int length) 307 const unsigned char *signature, int length)
259{ 308{
260 int retval = 0; 309 int retval = 0;