diff options
Diffstat (limited to 'include/asm-sh/hw_irq.h')
-rw-r--r-- | include/asm-sh/hw_irq.h | 53 |
1 files changed, 23 insertions, 30 deletions
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h index 20d42959f52a..cb0b6c9f7020 100644 --- a/include/asm-sh/hw_irq.h +++ b/include/asm-sh/hw_irq.h | |||
@@ -6,24 +6,6 @@ | |||
6 | 6 | ||
7 | extern atomic_t irq_err_count; | 7 | extern atomic_t irq_err_count; |
8 | 8 | ||
9 | struct intc2_data { | ||
10 | unsigned short irq; | ||
11 | unsigned char ipr_offset, ipr_shift; | ||
12 | unsigned char msk_offset, msk_shift; | ||
13 | unsigned char priority; | ||
14 | }; | ||
15 | |||
16 | struct intc2_desc { | ||
17 | unsigned long prio_base; | ||
18 | unsigned long msk_base; | ||
19 | unsigned long mskclr_base; | ||
20 | struct intc2_data *intc2_data; | ||
21 | unsigned int nr_irqs; | ||
22 | struct irq_chip chip; | ||
23 | }; | ||
24 | |||
25 | void register_intc2_controller(struct intc2_desc *); | ||
26 | |||
27 | struct ipr_data { | 9 | struct ipr_data { |
28 | unsigned char irq; | 10 | unsigned char irq; |
29 | unsigned char ipr_idx; /* Index for the IPR registered */ | 11 | unsigned char ipr_idx; /* Index for the IPR registered */ |
@@ -41,11 +23,6 @@ struct ipr_desc { | |||
41 | 23 | ||
42 | void register_ipr_controller(struct ipr_desc *); | 24 | void register_ipr_controller(struct ipr_desc *); |
43 | 25 | ||
44 | /* | ||
45 | * Enable individual interrupt mode for external IPR IRQs. | ||
46 | */ | ||
47 | void __init ipr_irq_enable_irlm(void); | ||
48 | |||
49 | typedef unsigned char intc_enum; | 26 | typedef unsigned char intc_enum; |
50 | 27 | ||
51 | struct intc_vect { | 28 | struct intc_vect { |
@@ -54,6 +31,7 @@ struct intc_vect { | |||
54 | }; | 31 | }; |
55 | 32 | ||
56 | #define INTC_VECT(enum_id, vect) { enum_id, vect } | 33 | #define INTC_VECT(enum_id, vect) { enum_id, vect } |
34 | #define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq)) | ||
57 | 35 | ||
58 | struct intc_prio { | 36 | struct intc_prio { |
59 | intc_enum enum_id; | 37 | intc_enum enum_id; |
@@ -64,19 +42,25 @@ struct intc_prio { | |||
64 | 42 | ||
65 | struct intc_group { | 43 | struct intc_group { |
66 | intc_enum enum_id; | 44 | intc_enum enum_id; |
67 | intc_enum *enum_ids; | 45 | intc_enum enum_ids[32]; |
68 | }; | 46 | }; |
69 | 47 | ||
70 | #define INTC_GROUP(enum_id, ids...) { enum_id, (intc_enum []) { ids, 0 } } | 48 | #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } } |
71 | 49 | ||
72 | struct intc_mask_reg { | 50 | struct intc_mask_reg { |
73 | unsigned long set_reg, clr_reg, reg_width; | 51 | unsigned long set_reg, clr_reg, reg_width; |
74 | intc_enum enum_ids[32]; | 52 | intc_enum enum_ids[32]; |
53 | #ifdef CONFIG_SMP | ||
54 | unsigned long smp; | ||
55 | #endif | ||
75 | }; | 56 | }; |
76 | 57 | ||
77 | struct intc_prio_reg { | 58 | struct intc_prio_reg { |
78 | unsigned long reg, reg_width, field_width; | 59 | unsigned long set_reg, clr_reg, reg_width, field_width; |
79 | intc_enum enum_ids[16]; | 60 | intc_enum enum_ids[16]; |
61 | #ifdef CONFIG_SMP | ||
62 | unsigned long smp; | ||
63 | #endif | ||
80 | }; | 64 | }; |
81 | 65 | ||
82 | struct intc_sense_reg { | 66 | struct intc_sense_reg { |
@@ -84,6 +68,12 @@ struct intc_sense_reg { | |||
84 | intc_enum enum_ids[16]; | 68 | intc_enum enum_ids[16]; |
85 | }; | 69 | }; |
86 | 70 | ||
71 | #ifdef CONFIG_SMP | ||
72 | #define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8) | ||
73 | #else | ||
74 | #define INTC_SMP(stride, nr) | ||
75 | #endif | ||
76 | |||
87 | struct intc_desc { | 77 | struct intc_desc { |
88 | struct intc_vect *vectors; | 78 | struct intc_vect *vectors; |
89 | unsigned int nr_vectors; | 79 | unsigned int nr_vectors; |
@@ -97,25 +87,28 @@ struct intc_desc { | |||
97 | unsigned int nr_prio_regs; | 87 | unsigned int nr_prio_regs; |
98 | struct intc_sense_reg *sense_regs; | 88 | struct intc_sense_reg *sense_regs; |
99 | unsigned int nr_sense_regs; | 89 | unsigned int nr_sense_regs; |
100 | struct irq_chip chip; | 90 | char *name; |
101 | }; | 91 | }; |
102 | 92 | ||
103 | #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) | 93 | #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) |
104 | #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ | 94 | #define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ |
105 | priorities, mask_regs, prio_regs, sense_regs) \ | 95 | priorities, mask_regs, prio_regs, sense_regs) \ |
106 | struct intc_desc symbol = { \ | 96 | struct intc_desc symbol __initdata = { \ |
107 | _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ | 97 | _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ |
108 | _INTC_ARRAY(priorities), \ | 98 | _INTC_ARRAY(priorities), \ |
109 | _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ | 99 | _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ |
110 | _INTC_ARRAY(sense_regs), \ | 100 | _INTC_ARRAY(sense_regs), \ |
111 | .chip.name = chipname, \ | 101 | chipname, \ |
112 | } | 102 | } |
113 | 103 | ||
114 | void __init register_intc_controller(struct intc_desc *desc); | 104 | void __init register_intc_controller(struct intc_desc *desc); |
105 | int intc_set_priority(unsigned int irq, unsigned int prio); | ||
115 | 106 | ||
116 | void __init plat_irq_setup(void); | 107 | void __init plat_irq_setup(void); |
117 | 108 | ||
118 | enum { IRQ_MODE_IRQ, IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; | 109 | enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, |
110 | IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK, | ||
111 | IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; | ||
119 | void __init plat_irq_setup_pins(int mode); | 112 | void __init plat_irq_setup_pins(int mode); |
120 | 113 | ||
121 | #endif /* __ASM_SH_HW_IRQ_H */ | 114 | #endif /* __ASM_SH_HW_IRQ_H */ |